MSI MS-6526 Schematics
8
7
6
5
4
3
2
1
D D
MS-6526
Version 300
INTEL (R) Brookdale-G Chipset
Willamette/Northwood 478pin mPGA-B Processor Schematics
Title Page
Cover Sheet
Block Diagram
1
2
Voltage Distribution 3
CPU:
Willamette/Northwood mPGA-478B Processor
System Brookdale-G Chipset:
INTEL GMCH (North Bridge) +
INTEL ICH4 (South Bridge)
C C
On Board Chipset:
BIOS -- FWH
AC'97 Codec -- ALC201A
LPC Super I/O -- W83627HF-AW
Clock Generation -- ICS950218AF
LAN -- Intel 562ET
Expansion Slots:
B B
PCI2.2 SLOT * 3
General SPEC 4
Clock ICS950218AF & ATA100 IDE CONNECTORS
mPGA478-B INTEL CPU Sockets
INTEL Brookdale-G GMCH -- North Bridge
INTEL ICH4 -- South Bridge
6 - 7
8-10
11-12
LPC I/O -- W83627HF-AW
DDR DIMM1&2 and DDR Terminator Resistor
14-15
AGP Slot
VGA Connector
PCI SLOT 1 & 2 & 3
FWH & CNR
USB Connectors
AC'97 Codec ALC201A & Connectors
21-22
IO Connectors
FAN & 1.5V Votlage Regulator
W83302D ACPI Controller
VRM9.9 -- CPU Power
Front Panel & ATX Connectors
RealTek 8101L PCI Lan / MC97 Controller
Manual Parts
5
13
16
17
18
19
20
23
24
25
26
27
28
29
A A
MS6526 STD
MS6526 Option:L
MS6526M1 STD
MS6526M1 Option:L
8
ORCAD Config.MODEL Config. ERP NumberFunction
cfg6526-STD
cfg6526-LAN
cfg6526M1-STD
cfg6526M1-LAN
7
STD
STD+Intel LAN
STD+M1
STD+M1+Intel LAN
601-6526-08S
MSI
601-6526-09S
6
5
4
3
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
Cover Sheet
MS-6526
2
1 29Monday, May 13, 2002
1
300
1
Block Diagram
VRM
AGPCLK 66MHZ
AGP BUSAGP / ADD
INT & PWR-MNG
P4 478-Pin Processor
CTRL
ADDR
ADDR
AGTL+ BUS
CTRL
DATA
DATA
14.318MHZ
CPUCLK, CPUCLK# 100/133MHZ
MCHCLK, MCHCLK# 100/133MHZ
MCH_66 66MHZ
DOT_CLK 48MHZ
X'TEL
Clock 408
Generator
AGPCLK 66MHZ
ICH_66 66MHZ
ICH_PCLK 33MHZ
FWH_PCLK 33MHZ
SIO_PCLK 33MHZ
PCICLK0,1,2,3 33MHZ
LAN_PCLK 33MHZ
SIO_48 48MHZ
ICH_48 48MHZ
ICH_14 14.318MHZ
Slot
845G / GL
DDR1
VGA
VGA BUS
Connector
A A
IDE Primary
UltraDMA 66/100
IDE Secondary
BGA 760 Pin
VCCP
HUB LINK
BUS
ICH4
VCC_AGP 1.5V
MEM_STR 2. 5V
ICH_66 66MHZ
ICH_PCLK 33MHZ
ICH_48 48MHZ
ICH_14 14.318MHZ
FW82801DB
CNR Slot
AC'97 Link / LAN / EEPROM
VCC5_SB 5V
VCC3_SB 3.3V
VCC1_5SB 1.5V
VCCP
VCC3 3.3V
VCC_AGP 1.5V
INT & PWR-MNG
DDR BUS
PCICLK0,1,2,3 33MHZ
PCI BUS
LAN_PCLK 33MHZ
DDR2
PCI Slot 1
PCI Slot 2
RealTek
8101L
LAN Chip
PCI Slot 3
Onboard
AC'97 Codec
Audio port
USB Port 6
USB 6 PORT
USB Port 3
USB Port 4
USB Port 1
USB Port 2
SIO_PCLK 33MHZ
LPC SIO
SIO_48 48MHZ
Mouse Floopy Parallel
Keyboard
Serial1,2
1
LPC BUS
FirmWare
FWH_PCLK 33MHZ
Hub
BIOS
Game PortUSB Port 5
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
Block Diagram
MS-6526
2 29Monday, May 13, 2002
300
8
7
6
5
4
3
2
1
Power Delivery Map
ATX P/S
with 1A Stby current
5VSB
D D
C C
B B
A A
+/-5%
5V 3.3V 12V -12V
+/-5% +/-5% +/-5% +/-10%
8
VID voltage
regulator
VRM 9/0
1.5V regulator
2.5V regulator
2.5V Standby
regulator
1.25V regulator
1.5V Standby
regulator
3.3V Standby
regulator
CNR Connector
5V
3.3V
12V
3.3Vaux
-12V
5VDual 0.5A
7
6
1.0A
1.0A
0.5A
1.0A
0.1A
PCI Slot (per slot)
5V
3.3V
12V
3.3Vaux
-12V
5.0A
7.6A
0.5A
0.375A
0.1A
5
AGP Slot
5V 2.0A
3.3V
12V
3.3Vaux
0.375A
1.5V
6.0A
1.0A
2.0A
4
Processor
VCCVID
1.2V
30mA
VccCORE/Vtt
1.15V-1.75V
60A
Memory
Vdd/Vddq
2.5V
5.92A
Vtt
1.25V
2.1A
USB
Vdd
5V
2.0A
BG GMCH
VccCORE
VccAGP
1.15V-1.75V
VccGPIO
Vcca_DAC
VccCORE
Vccsus1_5
V_CPU_IO
1.15V-1.75V
Vcc3_3
Vccsus3_3
CK-408
LPC Super I/O
3
1.5V
2.46A
1.5V
370mA
VccHI
1.5V
90mA
VttFSB
2.4A
VccSM
2.5V
2.8A
3.3V
30mA
1.5V
65mA
ICH4
1.5V
970mA
VccHI
1.5V
90mA
1.5V
85mA
45mA
3.3V
610mA
3.3V
70mA
Vcc
3.3V
280mA
Vdd
3.3V
25mA
FWH
Vdd
3.3V
67mA
MSI
Title
Size Document Number Rev
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
Power Delivery Map
MS-6526
2
3 29Monday, May 13, 2002
1
300
8
General SPEC
7
6
5
4
3
2
1
ICH4
GPIO 0
D D
GPIO 1
GPIO 2
GPIO 3
GPIO 4
GPIO 5
GPIO 6
GPIO 7
GPIO 8
GPIO 9
GPIO 10
GPIO 11
GPIO 12
GPIO 13
GPIO 14~15
C C
GPIO 16
GPIO 17
GPIO 18*
GPIO 19
GPIO 20
GPIO 21
GPIO 22
GPIO 23
GPIO 24
GPIO 25
GPIO 26
GPIO 27
GPIO 28
GPIO 29~31
B B
GPIO 32
GPIO 33
GPIO 34
GPIO 35
GPIO 36
GPIO 37
GPIO 38
GPIO 39
GPIO 40
GPIO 41
GPIO 42
GPIO 43
GPIO 44~47
* GPIO18 will toggle at 1Hz frequency.
A A
FunctionTypeGPIO Pin
I
REQ#A (multifunction pin)
REQ#B (multifunction pin)
I
Pull up through 8.2K ohms (PIRQE#)
I
Pull up through 8.2K ohms (PIRQF#)
I
Pull up through 8.2K ohms (PIRQG#)
I
Pull up through 8.2K ohms (PIRQH#)
I
I
Pull down through 10K ohms (unused)
I
Pull down through 10K ohms (unused)
Pull Up to 3.3VSBY through 4.7K ohms (SIO_PME)
I
Not Implemented
I
Not Implemented
I
SMB_ALERT (multifuntion pin)
I
I
EXTSMI# with Pull up 10K ohms to VCC3_SB
I
Pull down through 10K ohms (unused)
Not Implemented
I
O
GNT#A (multifunction pin)
GNT#B (multifuntion pin)
O
O
No Connected
O
No Connected
O
No Connected
O
No Connected
OD
No Connected
Pull Up to 3.3V through 8.2K ohms (BIOS protect)
O
I/O
No Connected
I/O
No Connected
Not Implemented
I/O
I/O
No Connected
I/O
No Connected
Not Implemented
O
I/O
No Connected
I/O
No Connected
Primary IDE ATA66/100 detection (PD_DET)
I/O
Secondary IDE ATA66/100 detection (SD_DET)
I/O
I/O
No Connected
I/O
No Connected
I/O
No Connected
I/O
No Connected
I/O
No Connected
I/O
No Connected
I/O
No Connected
I/O
No Connected
Not Implemented
I/O
FWH
GPIO Pin Type Function
GPI 1
GPI 2
GPI 3
GPI 4
IGPI 0
Pull down through 8.2K ohms (unused)
I
Pull down through 8.2K ohms (unused)
P1 customer defined
I
I
P1 customer defined
I
Pull down through 8.2K ohms (unused)
PCI Config.
DEVICE ICH INT Pin IDSEL
PCI Slot 1
PCI Slot 2
PCI Slot 3
PCI LAN
INTA#
INTB#
INTC#
INTD#
INTB#
INTC#
INTD#
INTA#
INTC#
INTD#
INTA#
INTB#
INTG#
INTF#
AD16
AD17
AD18
AD29
*ICH4 reserved PCI address line AD22 for the PCI-to-ISA Bridge's IDSEL input.
CLOCK
PCICLK0
PCICLK1
PCICLK2
LAN_PCLK
CLK GEN PIN OUT
10 (PCI3/FS4)
11 (PCI4)
12 (PCI5)
17 (PCI9)
DIMM Config.
DEVICE ADDRESS CLOCK
DIMM 1 1010000B DCLK0/DCLK0#
DIMM 2 1010001B
DCLK1/DCLK1#
DCLK2/DCLK2#
DCLK3/DCLK3#
DCLK4/DCLK4#
DCLK5/DCLK5#
MSI
Title
Size Document Number Rev
8
7
6
5
4
3
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
General SPEC
MS-6526
2
4 29Monday, May 13, 2002
1
300
8
CP18 X_COPPER
CB1
0.1u
CP19 X_COPPER
FB2 X_80_0805
CB7
0.1u
VCC3
VCCP
R512 X_10K
VCC3
FB1 X_80_0805
CB195
0.1u
filtering from 10K~1M
CB275
X_4.7u-0805
R30 1K
R35 220
R513
X_220
Q1
3904
CB273
X_10u-0805
VDDA3V
VCC3
D D
* Put GND copper under Clock Gen.
connect to every GND pin
* 40 mils Trace on Layer 4
with GND copper around
it
* put close to every power pin
*
Trace Width 7mils.
*
Same Group spacing 15mils
*
Different Group spacing 30mils
*
Differentical mode spacing 7mils on itself
VCC3
C C
SKTOCC#6
7
CLOCK GENERATOR BLOCK
VCC3V
CB274
0.1u
SMBCLK_ISO13,14,19,24,25
SMBDATA_ISO13,14,19,24,25
Q2
X_3904 0.1u
SMBCLK_ISO
SMBDATA_ISO
R39
X_1K
CB2
0.1u
CB3
0.1u
CB4
0.1u
CB5
0.1u
CB6
0.1u
C24
0.01u
C26
0.01u
C27
0.01u
39
36
46
43
29
9
5
18
13
24
21
2
47
34
33
26
25
19
U1
CPU_VDD
CPU_GND
MREF_VDD
MREF_GND
3V66_GND
PCI_VDD
PCI_GND
PCI_VDD
PCI_GND
48_VDD
48_GND
REF_VDD
REF_GND
CORE_VDD
CORE_GND
SCLK
SDATA
VTT_GD#
CY28349
6
CPUCLK0
CPUCLK0#
CPUCLK1
CPUCLK1#
CPUCLK2
CPUCLK2#
3V66_48/SEL66_48#
FS2/PCI0
FS3/PCI1
SEL48_24#/PCI2
FS4/PCI3
FS0/48MHz
FS1/24_48MHz
MUL0/REF0
MUL1/REF1
RESET#
PWR_DN#
3V66_03V66_VDD
3V66_1
3V66_2
PCI4
PCI5
PCI6
PCI7
PCI8
PCI9
IREF
*Trace < 0.5"
CPU0
41
CPU0#
40
CPU1
38
CPU1# MCHCLK#
37
45
44
3132
30
28
SEL48_2
27
FS2
6
FS3
7
SEL48_1
8
FS4
10
11
12
14
15
16
17
22
23
48
1
3
X1
4
X2
35
20
42
RN85
33
RN2
33
FS0
R26 33
FS1 DOT_CLK
R27 33
MUL0 ICH_14
MUL1 MUL0
X1
X1 14M-32pf-HC49S-D
X2
PWR_DN# VCC3V
5
R2 27.4_1%
R4 27.4_1%
R10 27.4_1%
R12 27.4_1%
RN84
1 2
3 4
5 6
7 8
R589 47
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
R25 33
R1002 X_33
R28 475_1%
R590 1K
VCC3 VCC3 VCC3 VCC3
CB312
CPUCLK
CPUCLK#
MCHCLK
33
MCH_66
ICH_66
AGPCLK
SIO_48
PCICLK3
PCICLK0
PCICLK1
PCICLK2
FWH_PCLK
SIO_PCLK
ICH_PCLK
ICH_48
AUDIO_14
22pC23
22pC25
Iref = 2.32mA
CB313
CB314
0.1u
0.1u
4
CPUCLK 6
CPUCLK# 6
MCHCLK 8
MCHCLK# 8
MCH_66 8
ICH_66 12
AGPCLK 16
SIO_48 13
PCICLK3 18
PCICLK0 18
PCICLK1 18
PCICLK2 18
FWH_PCLK 19
SIO_PCLK 13
ICH_PCLK 11
ICH_48 12
DOT_CLK 8
ICH_14 12
AUDIO_14 21
CB315
0.1u
8445
8442
8544
8547
8119
8132
4098
4480
5613
5614
5591
5613
8106
8105
8104
3060
7222
2641
5512
3
2
Shut Source Termination Resistors
CPUCLK
R1 49.9_1%
CPUCLK#
R3 49.9_1%
MCHCLK
R5 49.9_1%
MCHCLK#
R7 49.9_1%
Trace less 0.2"
49.9ohm for 50ohm M/B impedance
CLOCK STRAPPING RESISTORS
FS0 VCC3V
R740 10K
VCC3V
R22 1.5K
DOT_CLK
R18 8.2K
SEL48_1
FS3
FS2
FS4
SEL48_2
MUL1
RN75
1 2
3 4
5 6
7 8
10K
R741 10K
R742 10K
R871 X_10K
R1003 X_10K
1 1 1 1 1
SMBCLK_ISO
SMBDATA_ISO
R29 2.7K
R32 2.7K
VCC3V
VCC3V
FSB (MHz)FS4 FS3 FS2 FS1 FS0
100 MHz1 1 1 0 1
133 MHz
BSEL0 6
VCC3
MUL0=0
MUL1=1
1
Pull-Down Capacito rs
CPUCLK
CPUCLK#
MCHCLK
MCHCLK#
AGPCLK
ICH_66
MCH_66
PCICLK3
PCICLK0
PCICLK1
PCICLK2
FWH_PCLK
SIO_PCLK
ICH_PCLK
ICH_14
SIO_48
ICH_48
DOT_CLK
used only for EMI issue
X_10pC1
X_10pC2
X_10pC3
X_10pC4
CN10
2
4
6
8
X_10p
CN14
7
5
3
1
X_10p
CN11
2
4
6
8
X_10p
10pC16
10pC376
10pC20
10pC21
Ioh=6*Iref
Voh=0.71V
Trace less 0.2"
1
3
5
7
8
6
4
2
1
3
5
7
B B
HD_RST#25
PD_DREQ12
PD_IOW#12
PD_IOR#12
PD_IORDY12
PD_DACK#12
IRQ1411
PD_A112
PD_CS#112 PD_CS#3 12
A A
8
HD_RST#
PDD7
PDD6
PDD5
PDD4
PDD3
PDD2
PDD1
PDD0
R47
4.7K
PRIMARY IDE BLOCK SECONDARY IDE BLOCK
IDE1
YJ220-CB-1
1
2
3 4
5 6
7 8
91110
13 14
17 18
19
21
23
25
27
29
31
33
35
37
R48
C29
10K
X_220p
7
PDD8
PDD9
PDD10
PDD11
PDD12
12
PDD13
PDD14
1615
PDD15
22
24
26
28
30
32
34
36
38
4039
R743
15K
6
ATA100 IDE CONNECTORS
PD_DET 19
PD_A2 12PD_A012
PDD[8..15] 12PDD[0..7]12
5
SDD[0..7]12
SD_DREQ12
SD_IOW#12
SD_IOR#12
SD_IORDY12
SD_DACK#12
IRQ1511
SD_A112
SD_A012
SD_CS#112 SD_CS#3 12
SD_LED27PD_LED27
4
HD_RST#
SDD7
SDD6
SDD5
SDD4
SDD3
SDD2
SDD1
SDD0
R49
4.7K
R44 33R43 33
C31
X_220p
IDE2
YJ220-CW-1
1
2
3 4
5 6
7 8
91110
12
13 14
1615
17 18
19
22
21
24
23
26
25
28
27
30
29
32
31
34
33
36
35
38
37
4039
R50
10K
VCC3VCC5 VCC5VCC3
3
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15
R744
15K
MSI
Title
Size Document Number Rev
Date: Sheet of
2
* Trace Width : 5mils
* Trace Spacing : 7mils
* Length(longest)-Length(shortest)<0.5"
* Trace Length less than 5"
SDD[8..15] 12
SD_DET 19
SD_A2 12
MICRO-STAR INT'L CO.,LTD.
Clock Gen & ATA100 IDE Connectors
MS-6526
5 29Monday, May 13, 2002
1
300
8
7
6
5
4
3
2
1
CPU GTL REFERNCE VOLTAGE BLOCKCPU SIGNAL BLOCK
HA#[31..3]8
VID4
VID1
VID2
H21
AD26
D11#
G22
AC26
ITP_CLK1
ITP_CLK0
D10#
D9#
D8#
B25
C24
C23
D7#
AE1
B24
VID3
AE2
VID4#
VID3#
D6#
D5#
D22
AE3
C21
AE4
VID2#
D4#
A25
VID1#
D3#
HA#22
HA#25
HA#23
HA#26
HA#27
HA#28
HA#30
HA#29
D D
HINV#[3..0]8
FERR#11
STPCLK#11
HINIT#11
HDBSY#8
HDRDY#8
HTRDY#8
HADS#8
HLOCK#8
HBNR#8
HIT#8
HITM#8
C C
Trace 10 mils width
10 mils space, Max 8"
B B
HBPRI#8
HDEFER#8
CPU_TMPA13
TRMTRIP #11
SKTOCC#5
PROCHOT#12
IGNNE#11
HSMI#11
A20M#11
SLP#11
BSEL05,8
CPU_GD12
CPURST#8
HD#[63..0]8
HINV#0
HINV#1
HINV#2
HINV#3
HINIT#
ITP_TDI
ITP_TD O
ITP_TM S
ITP_TRST#
ITP_TCK
PROCHOT#
CPU_GD
CPURST#
HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54
AF26
AB26
AE21
AF24
AF25
AB23
AB25
AA24
AA22
AA25
W25
W26
E21
G25
P26
V21
AC3
AA3
W5
AB2
G1
G4
G2
A22
AD2
AD3
AD6
AD5
Y21
Y24
Y23
Y26
V24
U3A
V6
B6
Y4
H5
H2
J6
F3
E3
D2
E2
C1
D5
F7
E6
D4
B3
C4
A2
C3
B2
B5
C6
A7
DBI0#
DBI1#
DBI2#
DBI3#
IERR#
MCERR#
FERR#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
SLP#
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
RESERVED6
BSEL0
BSEL1
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
D53#
V22
HA#31
AB1Y1W2V3U4T5W1R6V2T4U3P6U1T2R3P4P3R2T1N5N4N2M1N1M4M3L2M6L3K1L6K4K2
A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
A26#
A25#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
D41#
D40#
U21
V25
U23
U24
U26
T23
T22
T25
T26
R24
R25
P24
R21
N25
HA#24
A24#
D39#
N26
A23#
D38#
M26
HA#21
A22#
D37#
N23
HA#20
A21#
D36#
M24
HA#19
A20#
D35#
P21
HA#18
A19#
D34#
N22
HA#17
A18#
D33#
M23
HA#16
A17#
D32#
H25
A16#
D31#
HA#15
K23
HA#14
A15#
D30#
J24
HA#13
A14#
D29#
L22
HA#12
A13#
D28#
M21
HA#11
A12#
D27#
H24
HA#10
A11#
D26#
G26
HA#9
A10#
D25#
L21
A9#
D24#
D26
HA#7
A8#
D23#
F26
HA#6
A7#
D22#
E25
HA#5
A6#
D21#
F24
HA#4
A5#
D20#
F23
HA#3
A4#
D19#
G23
A3#
D18#
E24
AE25A5A4
D17#
D16#
H22
D25
DBR#
VCC_SENSE
D15#
D14#
D13#
J21
D23
C26
VSS_SENSE
D12#
HA#8
VID0
AE5
VID0#
GTLREF3
GTLREF2
GTLREF1
GTLREF0
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
D2#
D1#
A23
B22
B21
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
D0#
VID[4..0] 13,26
AA21
AA6
F20
F6
AB4
AA5
Y6
AC4
AB5
AC6
H3
J3
J4
K5
J1
AD25
A6
Y3
W4
U6
AB22
AA20
AC23
AC24
AC20
AC21
AA2
AD24
AF23
AF22
F4
G5
F1
V5
AC1
H6
P1
L24
L25
K26
K25
J26
R5
L5
W23
P23
J23
F21
W22
R22
K22
E22
E5
D1
SOCKET478
GTLREF
BPM#5
BPM#4
BPM#3
BPM#2
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0
R929 49.9_1%
R930 49.9_1%
R931 49.9_1%
R932 49.9_1%
R933 1K
HRS#2
HRS#1
HRS#0
HBR#0
R64 51.1_1%
R65 51.1_1%
HREQ#[0..4] 8
VCCP
VCCP
CPUCLK# 5
CPUCLK 5
HRS#[2..0] 8
HBR#0 8
* Short trace
HADSTB#1 8
HADSTB#0 8
HDSTBP#3 8
HDSTBP#2 8
HDSTBP#1 8
HDSTBP#0 8
HDSTBN#3 8
HDSTBN#2 8
HDSTBN#1 8
HDSTBN#0 8
NMI 11
INTR 11
with in
1"~2"
VCCP
1u-0805
R54
49.9_1%
R55
100_1%
GTLREF
2/3*Vccp
C34 C35
220p
Every pin put one 220pF cap near it.
Trace Width 7mils, Space 10mils.
Keep the voltage divider within
1.5" of the GETREF pin.
CPU STRAPPING RESISTORS
BPM#5
BPM#4
BPM#3
BPM#2
ALL COMPONENTS CLOSE TO CPU
PROCHOT#
CPU_GD
HBR#0
CPURST#
HINIT#
ITP_TDI
ITP_TD O
ITP_TMS
ITP_TRST#
ITP_TC K
R85 51
R82 51
R88 51
R87 51
R78 X_62
R80 300
R81 150
R84 51
R86 X_300
R79 150
R76 75
R74 39
R83 680
R77 27
VCCP
VCCP
VCCP
HD#5
HD#53
HD#48
HD#51
HD#50
HD#49
HD#52
A A
8
7
HD#41
HD#45
HD#39
HD#42
HD#44
HD#43
HD#40
HD#47
HD#46
HD#38
HD#32
HD#29
HD#31
HD#26
HD#30
HD#28
HD#27
HD#34
HD#37
HD#35
HD#33
HD#36
6
HD#25
HD#19
HD#23
HD#24
HD#22
HD#21
HD#16
HD#20
HD#18
HD#17
HD#15
5
HD#9
HD#10
HD#14
HD#11
HD#12
HD#13
HD#8
HD#7
HD#0
HD#2
HD#4
HD#3
HD#1
HD#6
MSI
Title
Size Document Number Rev
4
3
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
mPGA478-B INTEL CPU SOCKET Part1
MS-6526
2
6 29Monday, May 13, 2002
1
300
8
7
6
5
4
3
2
1
CPU VOLTAGE BLOCK
VCCP
D D
D10
A11
A13
A15
A17
A19
A21
A24
A26
A3
A9
AA1
AA11
AA13
AA15
AA17
AA19
AA23
AA26
AA4
AA7
AA9
AB10
C C
B B
AB12
AB14
AB16
AB18
AB20
AB21
AB24
AC11
AC13
AC15
AC17
AC19
AC22
AC25
AB3
AB6
AB8
AC2
AC5
AC7
AC9
AD1
A10
A12
A14
A16
A18
A20A8AA10
AA12
AA14
AA16
AA18
AA8
AB11
AB13
AB15
AB17
AB19
AB7
AB9
AC10
AC12
AC14
AC16
AC18
AC8
AD11
AD13
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
AE16
AE18
AE20
AE6
AE8
AF11
AF13
AF15
AF17
AF19
AF2
AF21
AF5
AF7
AF9
B11
B13
B15
B17
B19B7B9
C10
C12
C14
C16
C18
C20C8D11
D13
D15
D17
D19D7D9
E10
E12
E14
E16
E18
E20E8F11
F13
F15
F17
F19
VCC
VSS
VCC
VSS
G21G6G24
VCC
VCC
VSS
VSS
G3H1H23
VCC
VSS
VCC
VSS
F9
VCC
VSS
VCC
VSS
H26H4J2
U3B
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
F14
VSS
F16
VSS
VSS
F18F2F22
VSS
VSS
F25F5F8
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AD10
VSS
AD12
VSS
AD14
VSS
AD16
VSS
AD18
VSS
AD21
VSS
AD23
AD4
VSS
AD8
VSS
AE11
VSS
VSS
AE13
VSS
AE15
VSS
AE17
VSS
AE19
VSS
AE22
VSS
AE24
VSS
AE26
AE7
VSS
AE9
VSS
AF1
VSS
VSS
AF10
VSS
AF12
VSS
AF14
VSS
AF16
VSS
AF18
VSS
AF20
AF6
VSS
AF8
VSS
B10
VSS
B12
VSS
B14
VSS
B16
VSS
B18
VSS
B20
VSS
VSS
B23
VSS
VSS
B26B4B8
VSS
C11
VSS
C13
VSS
C15
VSS
C17C2C19
VSS
VSS
VSS
C22
VSS
VSS
VSS
VSS
C25C5C7C9D12
VSS
VSS
D14
VSS
D16
VSS
VSS
VSS
VSS
D18
D20
D21D3D24D6D8E1E11
VSS
VSS
VSS
VSS
VSS
VSS
E13
VSS
E15
VSS
E17
VSS
E19
VSS
E23
VSS
E26
VSS
E4
VSS
VSS
E7E9F10
VSS
VSS
F12
AF4
VCC-VID
VSS
VSS
AE23
AF3
VCC-IOPLL
VCC-VIDPRG
VSS
VSS
VSS
VSS
J22
J25J5K21
AD20
VSS
VSSA
VCCA
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AD22
Y5
Y25
Y22
Y2
W6
W3
W24
W21
V4
V26
V23
V1
U5
U25
U22
U2
T6
T3
T24
T21
R4
R26
R23
R1
P5
P25
P22
P2
N6
N3
N24
N21
M5
M25
M22
M2
L4
L26
L23
L1
K6
K3
K24
SOCKET478
VCC_VID 25
L23 4.7uH/100MA
L24 4.7uH/100MA
C444
C39
22u-1206
C40
22u-1206
0.1u
Keep the 22uF cap within 0.6"
of the CPU pin.
Trace Width 12mils, Space 10mils.
VCCP
CPU DECOUPLING CAPACITORS
CB12
10u-1206
CB19
10u-1206
CB26
10u-1206
CB33
10u-1206
CB40
X_10u-1206
CB47
A A
10u-1206
CB53
X_10u-1206
Place 14 pcs 1206 size cap
north side of processor
8
VCCP
CB20
X_10u-1206
CB34
10u-1206
CB41
10u-1206
7
CB21
10u-0805
CB28
10u-0805
CB42
10u-0805
CB49
10u-0805
CB55
10u-0805
CB18
10u-0805
CB22
10u-0805
CB43
10u-0805
CB56
10u-0805
PLACE CAPS WITHIN CPU CAVITY
VCCPVCCP
CB59
10u-0805
CB15
10u-0805
CB29
10u-1206
CB14
10u-0805
CB50
10u-0805
CB25
10u-0805
6
VCCPVCCP
CB39
X_10u-0805
CB46
10u-0805
CB52
10u-0805
CB57
X_10u-0805
CB60
10u-0805
CB58
X_10u-0805
Place these caps on south
side of processor
5
Within CPU Cavity Solder Side
4
MSI
Title
Size Document Number Rev
3
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
mPGA478-B INTEL CPU Part2
MS-6526
2
7 29Monday, May 13, 2002
1
300
5
HA#[31..3]6 HD#[63..0] 6
* Length must be matched
within +/-0.1"of the Strobe
Signals
D D
HBR#06
HBNR#6
HBPRI#6
HLOCK#6
HADS#6
HREQ#[4..0]6
C C
HRS#[2..0]6
HINV#[3..0]6
B B
HIT#6
HITM#6
HDEFER#6
HTRDY#6
HDBSY#6
HDRDY#6
HADSTB#06
HADSTB#16
HDSTBN#06
HDSTBP#06
HDSTBN#16
HDSTBP#16
HDSTBN#26
HDSTBP#26
HDSTBN#36
HDSTBP#36
MCHCLK5
MCHCLK#5
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
HRS#0
HRS#1
HRS#2
HINV#0
HINV#1
HINV#2
HINV#3
R94 24.9_1%
R95 24.9_1%
U4A
W31
AA33
AB30
V34
Y36
AC33
Y35
AA36
AC34
AB34
Y34
AB36
AC36
AC31
AF35
AD36
AD35
AE34
AD34
AE36
AF36
AE33
AF34
AG34
AG36
AE31
AH35
AG33
AG31
U33
T34
M34
T35
T36
V36
AA31
W33
AA34
W35
P36
M36
N36
V30
R36
U34
P34
U31
U36
AB35
AF30
N31
L31
G33
J34
C30
E29
D25
E25
N33
C35
B33
C26 H30
K30
J31
V35
B28
Y28
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
BREQ0#
BNR#
BPRI#
HLOCK#
ADS#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HIT#
HITM#
DEFER#
HTRDY#
RS0#
RS1#
RS2#
DBSY#
DRDY#
HAD_STB0#
HAD_STB1#
HD_STBN0#
HD_STBP0#
HD_STBN1#
HD_STBP1#
HD_STBN2#
HD_STBP2#
HD_STBN3#
HD_STBP3#
DINV_0#
DINV_1#
DINV_2#
DINV_3# HD_VREF0
HCLKP
HCLKN
HY_RCOMP
HX_RCOMP
T28
VTTFSB
HOST
Trace 10 mils & 7mils space < 0.5"
HL[5..0]11
HL_STB11
HL_STB#11
CRT_B17
CRT_B#17
CRT_G17
A A
CRT_G#17
CRT_R17
CRT_R#17
5
HL0
HL1
HL2
HL3
HL4
HL5
AA7
HI0
AB8
AC7
AC5
AD8
AF4 AD3
AD4
AC4
G15
H16
E15
F16
C15
D16
HUB LINK
HI1
HI2
HI3
HI4
HI5 HI_REF
HI_STBS
HI_STBF
VGA
BLUE
BLUE#
GREEN
GREEN#
RED
RED#
M28
K26
VTTFSB
VTTFSB
K22
K20
VTTFSB
VTTFSB
K18
AD28
VTTFSB
VTTFSB
VTTFSB
DDCA_DATA
4
VCCP
HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
GCLKIN
RSTIN#
CPURST#
PWROK
HD_VREF1
HD_VREF2
HA_VREF
HCC_VREF
HY_SWNG
HX_SWNG
HI6
HI7
HI8
HI9
HI10
HI_SWING
HL_RCOMP
DDCA_CLK
HSYNC
VSYNC
DREFCLK
REFSET
4
HD#0
T30
HD#1
R33
HD#2
R34
HD#3
N34
HD#4
R31
HD#5
L33
HD#6
L36
HD#7
P35
HD#8
J36
HD#9
K34
HD#10
K36
HD#11
M30
HD#12
M35
HD#13
L34
HD#14
K35
HD#15
H36
HD#16
G34
HD#17
G36
HD#18
J33
HD#19
D35
HD#20
F36
HD#21
F34
HD#22
E36
HD#23
H34
HD#24
F35
HD#25
D36
HD#26
H35
HD#27
E33
HD#28
E34
HD#29
B35
HD#30
G31
HD#31
C36
HD#32
D33
HD#33
D30
HD#34
D29
HD#35
E31
HD#36
D32
HD#37
C34
HD#38
B34
HD#39
D31
HD#40
G29
HD#41
C32
HD#42
B31
HD#43
B32
HD#44
B30
HD#45
B29
HD#46
E27
HD#47
C28
HD#48
B27
HD#49
D26
HD#50
D28
HD#51
B26
HD#52
G27
HD#53
H26
HD#54
B25
HD#55
C24
HD#56
B23
HD#57
B24
HD#58
E23
HD#59
C22
HD#60
G25
HD#61
B22
HD#62
D24
HD#63
G23
AE7
AJ31
D22
E7
H24
D27
AD30
P30
Y30
H28
HL6
AE4
HL7
AE5
HL8
AF3
HL9
AE2
HL10
AF2
HUB_MREF
HI_SWING
AD2
R98 68.1_1%
AC2
C7
D7
B7
C6
D14
R103 137_1%
B16
Brookdale_MCH
HVREF
HSWNG
X_10pC294
MCH_66 5
PCIRST#1 25
CPURST# 6
PWR_GD 25
HL[10..6] 11
Trace 10 mils &
7mils space < 0.5"
VCC_AGP
BSEL06
3VDDCDA 17
3VDDCCL 17
3V_HSYNC 17
3V_VSYNC 17
DOT_CLK 5
3
VCC_AGP MEM_STR
VCCA_SM
VCC_AGP
VCCA_DPLL
VCC3
CB71 0.1u
R101
10K
3
U4C
A3
VCC_AGP
A7
C1
D4
D6
G1
K6
L1
L9
P6
R1
R9
W9
V6
AD6
AC9
AC1
AE3
W19
Y19
AA19
W20
U21
W21
AA21
A9
B9
C9
D9
E9
B10
C10
D10
F10
H10
A11
B11
C11
D11
E11
G11
J11
B12
C12
D12
F12
H12
G13
J13
H14
J15
AA17
W18
W17
V19
U19
U17
AG2 AT20
AG1
A15
B14
A13
C14
B15
B6
Y3
R102
10K
Y2
AA2
AA4
AA3
AA5
W7
Y4
Y8
A37
AB2
AB3
POWER
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_AGP
VCC_HI
VCC_HI
VCC_HI
VCC_HI
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCA_SM VCCQ_SM
VCCA_SM
VCCA_DAC
VCCA_DAC
VCCA_DPLL
VSSA_DAC
VSSA_DAC
VCC_GPIO
M10
GND
GND
T10
Other
GND
GND
GND
GND
Y10
AH16
AH20
AH24
AH28
GND
AF28
PSBSEL
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
GND
AB28
GND
V28
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VTTFSB
VCCA_FSB
VCCQ_SM
VCCQ_SM
VTT_DECAP
VTT_DECAP
VTT_DECAP
VTT_DECAP
VTT_DECAP
GND
GND
GND
GND
P28
K24
K28
2
AH8
AK8
AG9
AJ9
AL9
AM22
AJ23
AL37
AU9
AK10
AJ11
AL11
AU25
AM26
AU13
AM14
AJ27
AJ1
AL1
AJ15
AP15
AU29
AH2
AJ2
AK2
AL2
AM30
AH3
AJ3
AK3
AL3
AH4
AJ4
AK4
AL4
AU17
AJ5
AL5
AU5
AM18
AJ19
AK32
AU33
AH6
AK6
AP20
AG7
AJ7
AL7
AP7
B18
C18
D18
H18
B19
C19
D19
E19
G19
J19
B20
C20
D20
F20
H20
F18
A17
AT21
AU21
G37
L37
R37
AC37
A31
Place <0.1"
A2
NC
A36
NC
AH34
NC
AJ35
NC
AT1
NC
AT37
NC
AU1
NC
AU2
NC
AU36
NC
AU37
NC
B1
NC
B37
NC
Brookdale_GMCH
2
VCCA_FSB
VCCQ_SM
1
GMCH REFERENCE BLOCK
VCCA_FSB
VCCA_DPLL
VCCA_SM
VCCQ_SM
VCCP
Place Cap. as Close as possible to
, Trace width 12 mils & 10mils space
GMCH
Keep the voltage divider within 3" of the
GMCH pin.
HI_SWING
CB66 0.1u
CB67 0.1u
CB68 0.1u
CB69 0.1u
CB70 0.1u
MSI
Title
Size Document Number Rev
Date: Sheet of
HUB_MREF
Place 0.01uF Cap. as Close as possible to
GMCH< 0.25"
Trace width 12 mils & 10mils space
MICRO-STAR INT'L CO.,LTD.
Brookdale-G GMCH-1 (HOST & HI & VGA)
CB62
0.1u
CB63
0.1u
CB64
0.1u
CB270
0.1u
HSWNG
HVREF
C51
0.01u
C53
0.01u
L25 0.82uH_0603
C284
I=30mA
22u-1206
L26
+
10uH_0805
C46
I=35mA
470u
L27 1uH-0805
+
CT10
I=500mA
100u_16V
L28 0.68uH-0805
C285
I=150mA
4.7u-0805
R520
1
VCCP
R89
301 1%
R90
C48
150 1%
0.01u
VCCP
R91
49.9 1%
R92
C50
100_1%
0.1u
VCC_AGP
C52
0.1u
C54
0.1u
MS-6526
1
R991
R93
226_1%
R96
100_1%
R97
100_1%
8 29Monday, May 13, 2002
1
C446
0.01u
VCC_AGP
VCC_AGP
VCC_AGP
MEM_STR
300
5
MDQ0
MDQ1
MDQ2
MDQ3
MDQ4
MDQ5
MDQ6
MDQ7
MDQ8
MDQ9
MDQ10
MDQ11
D D
C C
Trace lengh
must as short
as possible
for SRCVEN
Trace width 12
mil with 12 mil
space for
SM_VREF.
B B
A A
DDR_VREF
GAD[31..0]16
GC_BE#[3..0]16
MDQ12
MDQ13
MDQ14
MDQ15
MDQ16
MDQ17
MDQ18
MDQ19
MDQ20
MDQ21
MDQ22
MDQ23
MDQ24
MDQ25
MDQ26
MDQ27
MDQ28
MDQ29
MDQ30
MDQ31
MDQ32
MDQ33
MDQ34
MDQ35
MDQ36
MDQ37
MDQ38
MDQ39
MDQ40
MDQ41
MDQ42
MDQ43
MDQ44
MDQ45
MDQ46
MDQ47
MDQ48
MDQ49
MDQ50
MDQ51
MDQ52
MDQ53
MDQ54
MDQ55
MDQ56
MDQ57
MDQ58
MDQ59
MDQ60
MDQ61
MDQ62
MDQ63
R118 X_0_Soder
C55 0.1u
GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31
GC_BE#0
GC_BE#1
GC_BE#2
GC_BE#3
5
VCC_AGP
AN4
AN2
AR4
AR6
AR10
AP10
AT11
AT13
AT14
AT10
AR12
AR14
AP14
AT15
AP16
AT18
AT19
AR16
AT16
AP18
AR20
AR22
AP22
AP24
AT26
AT22
AT23
AT25
AR26
AP26
AT28
AR30
AP30
AT27
AR28
AT30
AT31
AR32
AT32
AR36
AP35
AP32
AT33
AP34
AT35
AN36
AM36
AK36
AJ36
AP36
AM35
AK35
AK34
AK24
AL23
AP2
AT3
AP5
AP3
AT4
AT5
AT9
AT6
AP6
AT8
AP8
V4
V2
W4
W5
U5
U4
U2
V3
T2
T3
T4
R2
R5
R7
T8
P3
P8
K4
K2
J2
M3
L5
L4
H4
G2
K3
J4
J5
J7
H3
K8
G4
R4
N4
M2
H2
U4B
SDQ0
SDQ1
SDQ2
SDQ3
SDQ4
SDQ5
SDQ6
SDQ7
SDQ8
SDQ9
SDQ10
SDQ11
SDQ12
SDQ13
SDQ14
SDQ15
SDQ16
SDQ17
SDQ18
SDQ19
SDQ20
SDQ21
SDQ22
SDQ23
SDQ24
SDQ25
SDQ26
SDQ27
SDQ28
SDQ29
SDQ30
SDQ31
SDQ32
SDQ33
SDQ34
SDQ35
SDQ36
SDQ37
SDQ38
SDQ39
SDQ40
SDQ41
SDQ42
SDQ43
SDQ44
SDQ45
SDQ46
SDQ47
SDQ48
SDQ49
SDQ50
SDQ51
SDQ52
SDQ53
SDQ54
SDQ55
SDQ56
SDQ57
SDQ58
SDQ59
SDQ60
SDQ61
SDQ62
SDQ63
SRCVEN_OUT#
SRCVEN_IN#
G_AD0
G_AD1
G_AD2
G_AD3
G_AD4
G_AD5
G_AD6
G_AD7
G_AD8
G_AD9
G_AD10
G_AD11
G_AD12
G_AD13
G_AD14
G_AD15
G_AD16
G_AD17
G_AD18
G_AD19
G_AD20
G_AD21
G_AD22
G_AD23
G_AD24
G_AD25
G_AD26
G_AD27
G_AD28
G_AD29
G_AD30
G_AD31
G_C/BE0#
G_C/BE1#
G_C/BE2#
G_C/BE3#
AGP
VCC_AGP
VCC_AGP
K10
K12
AH10
AH12
AH14
VCCSM
VCCSM
VCCSM
DDR
VCC_AGP
VCC_AGP
VCC_AGP
K14
K16
P10
AH18
AH22
VCCSM
VCC_AGP
V10
AB10
AH26
VCCSM
VCCSM
SCMDCLK_0#
SCMDCLK_1#
SCMDCLK_2#
SCMDCLK_3#
SCMDCLK_4#
SCMDCLK_5#
SMX_RCOMP0
VCC_AGP
VCC_AGP
AD10
SMA0
SMA1
SMA2
SMA3
SMA4
SMA5
SMA6
SMA7
SMA8
SMA9
SMA10
SMA11
SMA12
SMAB1
SMAB2
SMAB4
SMAB5
SDQS0
SDQS1
SDQS2
SDQS3
SDQS4
SDQS5
SDQS6
SDQS7
SDM0
SDM1
SDM2
SDM3
SDM4
SDM5
SDM6
SDM7
SCKE0
SCKE1
SCKE2
SCKE3
SCS0#
SCS1#
SCS2#
SCS3#
SCMDCL_K0
SCMDCLK_1
SCMDCLK_2
SCMDCLK_3
SCMDCLK_4
SCMDCLK_5
SBA_0
SBA_1
SRAS#
SCAS#
SWE#
SMY_RCOMPSM_VREF
G_FRAME#
G_IRDY#
G_TRDY#
G_DEVSEL#
G_STOP#
G_PAR
G_REQ#
G_GNT#
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
SB_STB
SB_STB#
ST0
ST1
ST2
AD_STB0
AD_STB0#
AD_STB1
AD_STB1#
PIPE#
RBF#
WBF#
AGP_VREF
AGP_RCOMP
4
MEM_STR
AL25
AN25
AP23
AK20
AL19
AL17
AP19
AP17
AN17
AK16
AK26
AL15
AN15
AP25
AN23
AN19
AK18
AR2
AT7
AT12
AT17
AR24
AT29
AT34
AL36
AP4
AR8
AP12
AR18
AT24
AP28
AR34
AL34
AP13
AN13
AK14
AL13
AL29
AP31
AK30
AN31
AL21
AK22
AN11
AP11
AM34
AL33
AP21
AN21
AP9
AN9
AP33
AN34
AN27
AP27
AK28
AN29
AP29
SMX
AF10
SMY
AJ34AM2
M4
N7
N5
N2
P2
P4
D5
B5
C3
C2
D3
D2
E4
E2
F3
F2
F4
E5
C4
B4
B3
V8
U7
M8
L7
H8
G7
G5
CB72 0.1u
W2
R121 40.2_1%
L2
Brookdale_GMCH
4
DDRMAA0
DDRMAA1
DDRMAA2
DDRMAA3
DDRMAA4
DDRMAA5
DDRMAA6
DDRMAA7
DDRMAA8
DDRMAA9
DDRMAA10
DDRMAA11
DDRMAA12
MSDQS0
MSDQS1
MSDQS2
MSDQS3
MSDQS4
MSDQS5
MSDQS6
MSDQS7
MSDM0
MSDM1
MSDM2
MSDM3
MSDM4
MSDM5
MSDM6
MSDM7
MSCKE0
MSCKE1
MSCKE2
MSCKE3
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
ST0
ST1
ST2
Place < 0.5"
DDRMAA[12..0] 14,15
DDRMAB1 14,15
DDRMAB2 14,15
DDRMAB4 14,15
DDRMAB5 14,15
MSCKE[3..0] 14,15
MSCS0# 14,15
MSCS1# 14,15
MSCS2# 14,15
MSCS3# 14,15
DCLK0 14
DCLK0# 14
DCLK1 14
DCLK1# 14
DCLK2 14
DCLK2# 14
DCLK3 14
DCLK3# 14
DCLK4 14
DCLK4# 14
DCLK5 14
DCLK5# 14
MSBS0 14
MSBS1 14
MRAS# 14,15
MCAS# 14,15
MWE# 14,15
GFRAME# 16
GIRDY# 16
GTRDY# 16
GDEVSEL# 16
GSTOP# 16
GPAR 16
GREQ# 16
GGNT# 16
SBA[7..0] 16
SB_STB 16
SB_STB# 16
ST[2..0] 16
GAD_STB0 16
GAD_STB#0 16
GAD_STB1 16
GAD_STB#1 16
PIPE# 16
RBF# 16
WBF# 16
AGPREF 16
3
Trace width 12 mil
with 10 mil space.
Place 0.1uF <1" to GMCH
MEM_STR
R119
60.4
R33
60.4
C57
0.1u
R120
60.4
R34
60.4
3
C56
0.1u
2
1
DDR SERIAL RESISTORS
DDRMD1
RN3 10
DDRMD[63..0]14,15
DDRMD5
DDRMD4
DDRMD0
DDRMD3
DDRMD7
DDRMD6
DDRMD2
DDRMD13
DDRMD12
DDRMD9
DDRMD8
DDRMD11
DDRMD10
DDRMD15
DDRMD14
DDRMD21
DDRMD17
DDRMD16
DDRMD20
DDRMD23
DDRMD19
DDRMD22
DDRMD18
DDRMD25
DDRMD29
DDRMD28
DDRMD24
DDRMD31
DDRMD27
DDRMD30
DDRMD26
DDRMD37
DDRMD33
DDRMD36
DDRMD32
DDRMD35
DDRMD39
DDRMD38
DDRMD34
DDRMD41
DDRMD45
DDRMD44
DDRMD40
DDRMD47
DDRMD43
DDRMD46
DDRMD42
DDRMD53
DDRMD52
DDRMD49
DDRMD48
DDRMD51
DDRMD50
DDRMD55
DDRMD54
DDRMD57
DDRMD61
DDRMD56
DDRMD60
DDRMD59
DDRMD63
DDRMD58
DDRMD62
MSDM0 SDM0
MSDM1
MSDM2
MSDM3
MSDM4
MSDM5
MSDM6
MSDM7
MSDQS0
MSDQS1
MSDQS2
MSDQS3
MSDQS4
MSDQS5
MSDQS6
MSDQS7
2
7 8
5 6
3 4
1 2
RN5 10
7 8
5 6
3 4
1 2
RN7 10
7 8
5 6
3 4
1 2
RN9 10
7 8
5 6
3 4
1 2
RN10 10
7 8
5 6
3 4
1 2
RN12 10
7 8
5 6
3 4
1 2
RN13 10
7 8
5 6
3 4
1 2
RN14 10
7 8
5 6
3 4
1 2
RN15 10
7 8
5 6
3 4
1 2
RN16 10
7 8
5 6
3 4
1 2
RN18 10
7 8
5 6
3 4
1 2
RN20 10
7 8
5 6
3 4
1 2
RN21 10
7 8
5 6
3 4
1 2
RN22 10
7 8
5 6
3 4
1 2
RN23 10
7 8
5 6
3 4
1 2
RN24 10
7 8
5 6
3 4
1 2
R609 10
R610 10
R611 10
R612 10
R613 10
R614 10
R615 10
R616 10
R110 10
R111 10
R112 10
R113 10
R114 10
R115 10
R116 10
R117 10
Title
Size Document Number Rev
Date: Sheet of
MDQ1
MDQ5
MDQ4
MDQ0
MDQ3
MDQ7
MDQ6
MDQ2
MDQ13
MDQ12
MDQ9
MDQ8
MDQ11
MDQ10
MDQ15
MDQ14
MDQ21
MDQ17
MDQ16
MDQ20
MDQ23
MDQ19
MDQ22
MDQ18
MDQ25
MDQ29
MDQ28
MDQ24
MDQ31
MDQ27
MDQ30
MDQ26
MDQ37
MDQ33
MDQ36
MDQ32
MDQ35
MDQ39
MDQ38
MDQ34
MDQ41
MDQ45
MDQ44
MDQ40
MDQ47
MDQ43
MDQ46
MDQ42
MDQ53
MDQ52
MDQ49
MDQ48
MDQ51
MDQ50
MDQ55
MDQ54
MDQ57
MDQ61
MDQ56
MDQ60
MDQ59
MDQ63
MDQ58
MDQ62
SDM0 15
SDM1 15
SDM2 15
SDM3 15
SDM4 15
SDM5 15
SDM6 15
SDM7 15
SDQS[7..0] 14,15
MICRO-STAR INT'L CO.,LTD.
MSI
SDM1
SDM2
SDM3
SDM4
SDM5
SDM6
SDM7
SDQS0
SDQS1
SDQS2
SDQS3
SDQS4
SDQS5
SDQS6
SDQS7
Brookdale-G GMCH-2 (DDR & AGP)
MS-6526
9 29Monday, May 13, 2002
1
300
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