![](/html/c8/c8ac/c8aca2207c2e82fce9cd00271fbfc6c5ea1458445672f12cf17b5e639eb566d1/bg1.png)
8
7
6
Last Schematic Update Date:
07/02/2001
5
4
3
2
1
D D
MS-6506
Version 0B
INTEL (R) Brookdale Chipset
Willamette/Northwood 478pin mPGA-B Processor Schematics
Cover Sheet
Block Diagram
GPIO Spec. 3
Clock ICS950208 & ATA100 IDE CONNECTORS
mPGA478-B INTEL CPU Sockets
FormFactor : Flex-ATX (22.4 X 19.2mm) for NEC-CI
CPU:
Willamette/Northwood mPGA-478B Processor
INTEL Brookdale MCH -- North Bridge
INTEL ICH2 -- South Bridge
LPC Super I/O Winbond W83627HF
AC'97 Codec & Audio Amp TL072 & GAME
System Brookdale Chipset:
C C
INTEL MCH (North Bridge) +
INTEL ICH2 (South Bridge)
On Board Chipset:
BIOS -- FWH SST49LF004
LPC Super I/O -- W83627HF
Clock Generation -- ICS950208
AC'97 Codec SigmaTel 9756T
FWH -- BIOS & CNR RISER
SDR DIMM-168PIN DIMM1,2
AGP 4X SLOT (1.5V)
PCI SLOT 1 & 2
Front Panel & Connectors
USB & FAN Connectors
Votlage Regulator
HIP6301V CPU Power ( PWM )-VRM9.0
Expansion Slots:
AGP2.0 SLOT * 1
B B
PCI2.2 SLOT * 2
CNR SLOT * 1
IO Connectors
Layout Screw Hole
Jumper Setting
Layout Guide
Power Delivery
1
2
4
5 - 6
7 - 8
9 - 10
11
12
13
14
15
16
17
18
19
20
21
22
23
24-30
31
History I 32
ERP BOM
601-6506-A10
Function Description
MS-6506 Ver:0A
With AGP,CNR,STR.
A A
Micro Star Restricted Secret
Title
Cover Sheet
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
8
7
6
5
4
3
http://www.msi.com.tw
2
MS-6506
Last Revision Date:
Tuesday, July 03, 2001
Sheet
1
1 33
of
Rev
![](/html/c8/c8ac/c8aca2207c2e82fce9cd00271fbfc6c5ea1458445672f12cf17b5e639eb566d1/bg2.png)
8
D D
AGP
4X(1.5V)
AGP CONN
7
Power
Supply
CONN
Page.15
AGP 4X
(1.5V)
6
Page.20Page.17
VRM
9.2
4X (66MHz) AGP
Page.5,6
(593PINS/FCBGA)
5
(478PINS)
Willamette/Northwood
Socket (mPGA478-B)
Scalable Bus
Page.7,8
MCH: Memory
Controller HUB
4
(100MHz)
3
Page.4
2
1
CK408 Clock
(100MHz)
Scalable Bus/2
(133MHz)
Page.14
DIMM 1:2
( 66MHz X 4 )
Page.18
C C
Heceta Hardware
Monitor
Page.4
IDE CONN 1&2
Page.18
USB Port 0:3
SM Bus
(360PINS/EBGA)
(48MHz)
LPC Bus AC Link
Page.11
Page.9,10
Page.13
FWH: Firmware HUB
SIO
W83627HF
Page.19
B B
PS2 Mouse &
Keyboard
Parallel (1)
Serial (2)
Floppy Disk
Drive CONN
HUB Interface
ICH2: I/O
Controller HUB
(33MHz)
(33MHz)
(14.318MHz)
PCI (33MHz)
Page.12
AC '97 Audio
Codec
Line In
CD-ROM
MIC In
Audio In
Page.16
PCI Slots 1:2
Page.13
CNR Riser
(Shared slot)
AMP
Telephone In
Line Out
A A
Micro Star Restricted Secret
Title
Block Diagram
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
8
7
6
5
4
3
http://www.msi.com.tw
2
MS-6506
Last Revision Date:
Tuesday, July 03, 2001
Sheet
2 33
Rev
0B
of
1
![](/html/c8/c8ac/c8aca2207c2e82fce9cd00271fbfc6c5ea1458445672f12cf17b5e639eb566d1/bg3.png)
5
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1
General Purpose I/O Spec.
D D
ICH2
FunctionTypeGPIO Pin
GPIO 0
GPIO 1
GPIO 2
GPIO 3
GPIO 4
C C
GPIO 5
GPIO 6
GPIO 7
GPIO 8
GPIO 9
GPIO 10
GPIO 11
GPIO 12
GPIO 13
GPIO 14~15
B B
GPIO 16
GPIO 17
GPIO 18
GPIO 19
GPIO 20
GPIO 21
GPIO 22
GPIO 23
GPIO 24
A A
GPIO 25
GPIO 26
GPIO 27
GPIO 28
GPIO 29~31
5
I
REQ#A
I
PREQ#5
I
INTE#
I
INTF#
I
INTG#
I
INTH#
I
AC97 Enabled/Disabled
I
None
I
Non Connect
I
AC'97 Serial Data In
I
Non Connect
I
Non Connect
I
External SMI
I
LPC PME
I
Not Implemented
O
Non Connect
O
Non Connect
O
Not Implemented
O
Not Implemented
O Non
O
Not Implemented
O
Not Implemented
OD
BIOS Locked/Unlocked
O
Non
O
Non
O
Non
I/O
Non
I/O
non
I/O
Not Implemented
FWH
GPIO Pin Type Function
GPI 0
GPI 1
GPI 2
GPI 3
DEVICE
PCI Slot 1
PCI Slot 2
4
I
ATA IDE 1 Detect
I
ATA IDE 2 Detect
Auto Recovery
I
I
Reserved
ICH INT Pin
INTA#
INTB#
INTC#
INTD#
INTF#
INTG#
INTH#
INTE#
3
IDSEL
AD16
AD17
Micro Star Restricted Secret
Title
GPIO Spec.
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
2
http://www.msi.com.tw
MS-6506
Last Revision Date:
Tuesday, July 03, 2001
Sheet
1
3 33
Rev
0B
of
![](/html/c8/c8ac/c8aca2207c2e82fce9cd00271fbfc6c5ea1458445672f12cf17b5e639eb566d1/bg4.png)
8
7
6
5
4
3
2
1
*Trace less 0.5"
for good filtering from 10K~1M
VCC3
D D
VCC3
*Put GND copper under Clock Gen.
connect to every GND pin
* 40 mils Trace on Layer 4
with GND copper around it
* put close to every power pin
C C
Trace Width 7mils.
*
Same Group spacing 15mils
*
Different Group spacing 30mils
*
Different mode spacing 7mils on itself
*
FB12
X_600S/0805
CB145
104P
CB167
104P
Rubycon
for good filtering from 10K~1M
FB13
X_600S/0805
Rubycon
+
ELS10/16-B
+
ELS10/16-B
VCC3
VCCP
CT23
CT24
R148
10K
R157 220
CB81
105P
R127
X_0
VCC3V
CB98
105P
SMBCLK{10,11,13,14}
SMBDATA{10,11,13,14}
B
SMBCLK
SMBDATA
VTT_GD# P_STP
CE
Q19
2N3904S
CB77
104P
CB86
104P
CB76
104P
CB91
104P
CB89
104P
CB93
104P
CB95
104P
CB78
104P
U10
39
CPU_VDD
36
CPU_GND
46
MREF_VDD
43
MREF_GND
29
3V66_GND
9
PCI_VDD
5
PCI_GND
18
PCI_VDD
13
PCI_GND
24
48_VDD
21
48_GND
2
REF_VDD
47
REF_GND
34
CORE_VDD
33
CORE_GND
26
SCLK
25
SDATA
19
VTT_GD#
ICS950208
ICS950208
CY28324
CPU0
CPU0#
CPU1
CPU1#
3VMREF/CPU_STP#
3VMREF#/PCI_STP#
3V66_03V66_VDD
3V66_1
3V66_2
3V66_3
FS2/PCI_F0
FS3/PCI_F1
MODE/PCI_F2
FS4/PCI0
PCI1
PCI2
PCI3
PCI4
PCI5
PCI6
FS0/48MHz
FS1/24_48MHz
MUL0/REF0
MUL1/REF1
IREF
RST#
PWR_DN#
41
40
38
37
45
44
3132
30
28
27
6
7
8
10
11
12
14
15
16
17
22
23
48
1
3
X1
4
X2
35
20
42
R115 33
R116 33
R110 33
R111 33
C_STP
P_STP
R117 33
R118 33
R119 33
3V66_3
FS2
MODE
FS3
RN9
MODE
FS2
8P4R-33
FS4
RN10
8P4R-33
FS0
R153 33
FS1
R137 33
MUL0
R120 33
MUL1
32pF
X1 14.318MHZ/32PF
R104 475RST
CRST#
R134 10K
R114 4.7K
Differential Pair
CPUCLK
CPUCLK#
MCHCLK
MCHCLK#
MCH_66
ICH_66
AGPCLK
SIO_PCLK
1 2
FWH_PCLK
3 4
ICH_PCLK
5 6
7 8
7 8
5 6
3 4
1 2
PCICLK0
PCICLK1
ICH_48
SIO_48
ICH_14
18PC81
18PC78 R101 4.7K
10PC73
VCC3V
CPUCLK {5}
CPUCLK# {5}
MCHCLK {7}
MCHCLK# {7}
MCH_66 {7}
ICH_66 {10}
AGPCLK {15}
SIO_PCLK {11}
FWH_PCLK {13}
ICH_PCLK {9}
PCICLK0 {16}
PCICLK1 {16}
ICH_48 {10}
SIO_48 {11}
ICH_14 {10}
CPUCLK
R108 49.9RST
CPUCLK#
R107 49.9RST
MCHCLK
R102 49.9RST
MCHCLK#
R103 49.9RST
Trace less 0.2"
49.9ohm for 50ohm M/B impedance
CLOCK STRAPPING RESISTORS
FS4
R151 10K
FS3
R141 10K
FS1
R136 X_10K
R147 10K
FS0
R135 10K
R146 X_10K
FS2
R140 10K
R139 X_10K
MODE
R142 10K
MUL0
R106 X_10K
R105 10K
MUL1
R149 X_10K
R150 10K
SMBCLK
SMBDATA
R109 4.7K
C_STP VCC3V
R112 X_1K
R113 X_1K
VCC3V
VCC3V
VCC3V
VCC3V
VCC3V
VCC3V
VCC3V
VCC3
CLOCK GENERATOR BLOCK Shut Source Termination Resistors
Pull-Down Capacitors
CN10
X_10P-8P4C
7
MCH_66
ICH_66
AGPCLK
SIO_PCLK
FWH_PCLK
ICH_PCLK
PCICLK0
PCICLK1
ICH_48
SIO_48
ICH_14
used only for EMI issue
Trace less 0.2"
8
6
4
2
CN15
X_10P-8P4C
8
6
4
2
CN16
X_8P4C-10P
10PC93
10PC89
10PC74
5
3
1
7
5
3
1
87
65
43
21
PRIMARY IDE BLOCK SECONDARY IDE BLOCK
B B
PDD[0..7]{10}
A A
RESET BLOCK
PCIRST#
PCIRST#{9} PCIRST#1 {7,11,13} PCIRST#2 {15,16}
8
HD_RST# HD_RST#
PD_DREQ{10}
PD_IOW#{10}
PD_IOR#{10}
PD_IORDY{10}
PD_DACK#{10}
IRQ14{9}
PD_A1{10}
PD_A0{10}
PD_CS#1{10}
PD_LED{17}
R187 8.2K
1 2
U18A
7407S
(VCC5_SB)
PDD7
PDD6
PDD5
PDD4
PDD3
PDD2
PDD1
PDD0
R186 4.7K
R185 33
R327 330
C173
X_10P
7
C75
220P
IDE1
YJ220-CB-1
1
2
3 4
5 6
7 8
91110
12
13 14
1615
17 18
19
22
21
24
23
26
25
27
29
31
33
35
37
R122
8.2K
VCC3 VCC3
VCC3 VCC3
R125 470
28
30
32
34
36
38
4039
PCIRST# HD_RST#
PCIRST#
6
ATA100 IDE CONNECTORS
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
9 8
U18D
7407S
(VCC5_SB)
3 4
U18B
7407S
(VCC5_SB)
PDD[8..15] {10}
PD_DET {13}
PD_A2 {10}
PD_CS#3 {10}
R328 330
R300 1K
5
VCC5
R172 4.7K
R189 33
SD_LED{17}
IRQ15{9}
SD_A1{10}
SD_A0{10}
SDD7
SDD6
SDD5
SDD4
SDD3
SDD2
SDD1
SDD0
R100 8.2K
C77
220P
3
SDD[0..7]{10}
SD_DREQ{10}
SD_IOW#{10}
SD_IOR#{10}
SD_IORDY{10}
SD_DACK#{10}
SD_CS#1{10}
VCC5VCC5
4
IDE2
YJ220-CW-1
1
3 4
5 6
7 8
91110
13 14
17 18
19
21
23
25
27
29
31
33
35
37
R121
8.2K
2
12
1615
22
24
26
R128 470
28
30
32
34
36
38
4039
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15
SD_DET {13}
SD_A2 {10}
SD_CS#3 {10}
Micro Star Restricted Secret
Title
Clock CY28323/4 & ATA100 IDE
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
2
SDD[8..15] {10}
MS-6506
Last Revision Date:
Tuesday, July 03, 2001
Sheet
4 33
of
1
Rev
0B
![](/html/c8/c8ac/c8aca2207c2e82fce9cd00271fbfc6c5ea1458445672f12cf17b5e639eb566d1/bg5.png)
8
7
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2
1
CPU GTL REFERNCE VOLTAGE BLOCKCPU SIGNAL BLOCK
VID1
AE4
VID2#
VID1#
D4#
D3#
A25
HD#3
VID0
AE5
A23
HD#2
VID0#
D2#
B22
HD#1
VCCPS+ {20}
VCCPS- {20}
VID[0..4] {11,20}
GTLREF3
GTLREF2
GTLREF1
GTLREF0
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
D1#
D0#
B21
SOCKET478
HD#0
AA21
AA6
F20
F6
AB4
AA5
Y6
AC4
AB5
AC6
H3
J3
J4
K5
J1
AD25
A6
Y3
W4
U6
AB22
AA20
AC23
AC24
AC20
AC21
AA2
AD24
AF23
AF22
F4
G5
F1
V5
AC1
H6
P1
L24
L25
K26
K25
J26
R5
L5
W23
P23
J23
F21
W22
R22
K22
E22
E5
D1
4
GTLREF1
GTLREF2
BPM#5
BPM#4
BPM#1
BPM#0
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0
R83 4.7K
R46 4.7K
R84 4.7K
R51 4.7K
HRS#2
HRS#1
HRS#0
R56 49.9RST
R81 49.9RST
HREQ#[0..4] {7}
VCCP
CPUCLK# {4}
CPUCLK {4}
HRS#[0..2] {7}
HBR#0 {7}
* Short trace
HADSTB#1 {7}
HADSTB#0 {7}
HDSTBP#3 {7}
HDSTBP#2 {7}
HDSTBP#1 {7}
HDSTBP#0 {7}
HDSTBN#3 {7}
HDSTBN#2 {7}
HDSTBN#1 {7}
HDSTBN#0 {7}
NMI {9}
INTR {9}
Length < 1.5inch.
GTLREF1
Length < 1.5inch.
GTLREF2
C44
220P
C35
220P
2/3*Vccp
C43
220P
2/3*Vccp
C34
Every pin put one 220pF cap near it.
Trace Width 15mils, Space 15mils.
Keep the voltage dividers within 1.5 inches of the
first GTLREF Pin
CPU ITP BLOCK
ITP_TMS
ITP_TDO
ITP_DBR#
ITP_TCK
R53 39
R55 75
R49 27
CPU STRAPPING RESISTORS
ALL COMPONENTS CLOSE TO CPU
PROCHOT#
CPU_GD
HBR#0
CPURST#
THERMTRIP#
BPM#0
BPM#1
BPM#4
BPM#5
ITP_TDI
ITP_TRST#
HINIT#
Title
INTEL mPGA478-B CPU1
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
3
http://www.msi.com.tw
2
R48 X_62
R88 300
R70 49.9RST
R85 49.9RST
R74 62
R61 49.9RST
R62 49.9RST
R63 49.9RST
R57 49.9RST
R72 150
R52 680
R44 300
Micro Star Restricted Secret
HA#[3..31]{7}
D D
U7A
HDBI#[0..3]{7}
STPCLK#{9}
HDRDY#{7}
C C
HDEFER#{7}
Trace : 10
mil width
10mil space
CPU_TMPA{11,18}
VTIN_GND{11}
THERMTRIP#{10}
B B
CPU_GD{10}
CPURST#{7}
HD#[0..63]{7}
A A
8
HDBI#0
HDBI#1
HDBI#2
HDBI#3
FERR#{9}
HINIT#{9,13}
HDBSY#{7}
HTRDY#{7}
HADS#{7}
HLOCK#{7}
HBNR#{7}
HIT#{7}
HITM#{7}
HBPRI#{7}
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_TCK
CPU_TMPA
THERMTRIP#
IGNNE#{9}
HSMI#{9}
A20M#{9}
PROCHOT#
SLP#{9}
CPU_GD
CPURST#
HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54
R82
X_0
E21
G25
P26
V21
AC3
AA3
W5
AB2
G1
G4
G2
AF26
AB26
A22
AD2
AD3
AE21
AF24
AF25
AD6
AD5
AB23
AB25
AA24
AA22
AA25
Y21
Y24
Y23
W25
Y26
W26
V24
V6
B6
Y4
H5
H2
J6
F3
E3
D2
E2
C1
D5
F7
E6
D4
B3
C4
A2
C3
B2
B5
C6
A7
DBI0#
DBI1#
DBI2#
DBI3#
IERR#
MCERR#
FERR#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
SLP#
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
RESERVED6
BSEL0
BSEL1
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
AB1Y1W2V3U4T5W1R6V2T4U3P6U1T2R3P4P3R2T1N5N4N2M1N1M4M3L2M6L3K1L6K4K2
A35#
D53#
D52#
D51#
D50#
V22
U21
V25
U23
U24
HD#53
HD#51
HD#50
HD#49
HD#52
7
A34#
D49#
U26
HD#48
A33#
D48#
T23
HA#31
A32#
D47#
T22
HD#47
HD#46
A31#
D46#
HA#30
HA#29
A30#
D45#
T25
T26
HD#45
HD#44
HA#28
A29#
D44#
R24
HD#43
HA#27
A28#
D43#
R25
HD#42
A27#
D42#
HA#25
HA#26
A26#
D41#
P24
R21
HD#41
HD#40
A25#
D40#
HA#23
HA#24
A24#
D39#
N25
N26
HD#39
HD#38
A23#
D38#
M26
HA#22
HA#21
A22#
D37#
N23
HD#37
HD#36
A21#
D36#
HA#20
HA#19
A20#
D35#
M24
P21
HD#34
HD#35
6
HA#18
A19#
D34#
N22
HD#33
A18#
D33#
M23
HA#16
HA#17
A17#
D32#
H25
HD#32
HD#31
HA#15
A16#
D31#
K23
HD#30
HA#14
A15#
D30#
J24
HD#29
HA#13
A14#
D29#
L22
HD#28
A13#
D28#
HA#11
HA#12
A12#
D27#
M21
H24
HD#26
HD#27
HA#10
A11#
D26#
G26
HD#25
HA#9
A10#
D25#
L21
HD#24
A9#
D24#
HA#8
HA#7
A8#
D23#
D26
F26
HD#23
HD#22
A7#
D22#
HA#6
A6#
D21#
E25
HD#21
HA#5
HA#4
A5#
D20#
F24
F23
HD#19
HD#20
HA#3
A4#
D19#
G23
HD#18
A3#
D18#
E24
HD#17
ITP_DBR#
AE25A5A4
DBR#
Differential
Host Data
Strobes
D17#
D16#
D15#
D14#
H22
D25
J21
D23
HD#14
HD#16
HD#15
HD#13
5
AD26
AC26
ITP_CLK1
ITP_CLK0
VCC_SENSE
VSS_SENSE
D13#
D12#
D11#
D10#
D9#
C26
H21
G22
B25
HD#9
HD#10
HD#11
HD#12
D8#
C24
HD#8
C23
HD#7
D7#
VID4
AE1
VID4#
D6#
B24
HD#6
VID3
AE2
VID3#
D5#
D22
HD#5
VID2
AE3
C21
HD#4
C53
105P
C20
105P220P
MS-6506
Last Revision Date:
Sheet
VCCP
R86
49.9RST
R87
100RST
VCCP
R66
49.9RST
R64
100RST
VCCP
FP_RST# {17}
VCCP
VCCP
VCCP
VCCP
Tuesday, July 03, 2001
5 33
of
1
Rev
0B
![](/html/c8/c8ac/c8aca2207c2e82fce9cd00271fbfc6c5ea1458445672f12cf17b5e639eb566d1/bg6.png)
8
VCCP
A10
A12
A14
A16
A18
A20A8AA10
AA12
AA14
VCC
VSS
AD18
VCC
VSS
AD21
VCC
VSS
AD23
AD4
VCC
VSS
AD8
VCC
VSS
VCC
VSS
AE11
AA16
AE13
U7B
VCC
VCC
VCC
VSS
AD10
AD12
VSS
VSS
AD14
VCC
VSS
AD16
D D
D10
VSS
A11
VSS
A13
VSS
A15
VSS
A17
VSS
A19
VSS
A21
VSS
A24
VSS
A26
VSS
A3
VSS
A9
VSS
AA1
VSS
AA11
VSS
AA13
VSS
AA15
VSS
AA17
VSS
AA19
VSS
AA23
VSS
AA26
VSS
AA4
VSS
AA7
VSS
AA9
VSS
AB10
VSS
AB12
VSS
AB14
VSS
AB16
VSS
AB18
VSS
AB20
AB21
AB24
AB3
AB6
AB8
AC11
AC13
AC15
AC17
AC19
AC2
AC22
AC25
AC5
AC7
AC9
AD1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C C
VCC
VSS
AA18
VCC
VSS
AE15
AA8
VCC
VSS
AE17
AB11
AE19
VCC
VSS
AB13
VCC
VSS
AE22
AB15
VCC
VSS
AE24
AB17
VCC
VSS
AE26
7
AB19
VCC
VSS
AE7
AB7
AE9
VCC
VSS
AB9
AF1
VCC
VSS
AC10
VCC
VSS
AF10
AC12
AF12
VCC
VSS
AC14
AF14
VCC
VSS
AC16
VCC
VSS
AF16
AC18
VCC
VSS
AF18
AC8
AF20
VCC
VSS
AD11
VCC
VSS
AF6
6
CPU VOLTAGE BLOCK
AD13
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
AE16
AE18
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AF8
B10
B12
B14
B16
B18
B23
B20
B26B4B8
AE20
VCC
VSS
C11
AE6
C13
VCC
VSS
AE8
C15
VCC
VSS
AF11
VCC
VSS
C17C2C19
AF13
VCC
VSS
AF15
VCC
VSS
AF17
AF19
AF2
VCC
VCC
VCC
VSS
VSS
VSS
C22
C25C5C7C9D12
AF21
VCC
VSS
AF5
VCC
VSS
AF7
AF9
VCC
VSS
D14
VCC
VSS
B11
B13
B15
VCC
VCC
VCC
VSS
VSS
VSS
D16
D18
D20
5
B17
B19B7B9
C10
C12
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
D21D3D24D6D8E1E11
4
C14
C16
C18
C20C8D11
D13
D15
D17
D19D7D9
E10
E12
E14
E16
E18
E20E8F11
F13
F15
F17
F19
AF4
F9
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC-VID
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
F25F5F8
G21G6G24
VSS
VSS
G3H1H23
VSS
VSS
VSS
H26H4J2
VSS
VSS
E13
E15
E17
E19
E23
E7E9F10
F12
F14
F16
E4
E26
F18F2F22
AE23
AF3
VCC-VIDPRG
VSS
VSS
VSS
J22
J25J5K21
3
AD20
VCCA
VSSA
VCC-IOPLL
VSS
VSS
VSS
SOCKET478
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AD22
Y5
Y25
Y22
Y2
W6
W3
W24
W21
V4
V26
V23
V1
U5
U25
U22
U2
T6
T3
T24
T21
R4
R26
R23
R1
P5
P25
P22
P2
N6
N3
N24
N21
M5
M25
M22
M2
L4
L26
L23
L1
K6
K3
K24
VCC_VID {19}
C51
106P/1206
C48
106P/1206
2
C50
226P/1206
L2 4.7UH/1206
L1 4.7UH/1206
C47
226P/1206
1
VCCP
B B
CPU DECOUPLING CAPACITORS
CPU DECOUPLING CAPACITORS
BOTTOM
CB29
106P/1206
CB49
106P/1206
CB55
106P/1206
CB32
106P/1206
CB13
106P/1206
CB30
106P/1206
CB34
106P/1206
CB36
106P/1206
A A
CB41
106P/1206
CB26
106P/1206
CB46
106P/1206
CB24
106P/1206
CB27
106P/1206
CB22
106P/1206
CB50
106P/1206
CB43
106P/1206
CB47
106P/1206
CB51
106P/1206
CB19
106P/1206
CB20
106P/1206
CB18
106P/1206
CB15
106P/1206
CB48
106P/1206
CB39
106P/1206
CB45
106P/1206
CB42
106P/1206
CB23
106P/1206
PLACE CAPS WITHIN CPU CAVITY
VCCPVCCP VCCPVCCP
8
7
6
CB188
106P/1206 5020
5
PLACE CAPS WITHIN CPU CAVITY SOLDER
Micro Star Restricted Secret
Title
INTEL mPGA478-B CPU2
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
4
3
http://www.msi.com.tw
2
MS-6506
Last Revision Date:
Tuesday, July 03, 2001
Sheet
6 33
Rev
0B
of
1
![](/html/c8/c8ac/c8aca2207c2e82fce9cd00271fbfc6c5ea1458445672f12cf17b5e639eb566d1/bg7.png)
5
HBR#0{5}
HIT#{5}
HITM#{5}
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
HRS#0
HRS#1
HRS#2
HDBI#0
HDBI#1
HDBI#2
HDBI#3
R97 24.9RST
R123 24.9RST
HL0
HL1
HL2
HL3
HL4
HL5
VCCP
HA#[3..31]{5}
D D
HBNR#{5}
HBPRI#{5}
HLOCK#{5}
HADS#{5}
HREQ#[0..4]{5}
C C
HDEFER#{5}
HRS#[0..2]{5}
B B
HL[0..10]{9}
A A
HTRDY#{5}
HDBSY#{5}
HDRDY#{5}
HADSTB#0{5}
HADSTB#1{5}
HDSTBN#0{5}
HDSTBP#0{5}
HDSTBN#1{5}
HDSTBP#1{5}
HDSTBN#2{5}
HDSTBP#2{5}
HDSTBN#3{5}
HDSTBP#3{5}
HDBI#[0..3]{5}
MCHCLK{4}
MCHCLK#{4}
HL[0..10]
HL_STB{9}
HL_STB#{9}
5
AE11
AD11
AC15
AC16
AD15
AC13
AB18
AB20
AC19
AD18
AD20
AE19
AE21
AF18
AF20
AG19
AG21
AG23
AJ19
AJ21
AJ23
AD4
AD3
AE6
AE7
AD5
AG4
AH9
AC2
P25
P24
N27
P23
M26
M25
N25
N24
AA9
AB8
U3
R3
P7
R2
P4
R6
P5
P3
N2
N7
N3
K4
M4
M3
K3
M5
H4
N5
M6
V7
W3
Y7
W5
V3
U6
R7
U5
U2
Y5
Y3
Y4
U7
W2
W7
W6
V5
V4
R5
N6
K8
M8
U8
T4
T5
T3
L3
L5
J2
J3
L2
G2
L7
T7
J8
U11A
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
BR0#
BNR#
BPRI#
HLOCK#
ADS#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HIT#
HITM#
DEFER#
HTRDY#
RS0#
RS1#
RS2#
DBSY#
DRDY#
HAD_STB0#
HAD_STB1#
HD_STBN0#
HD_STBP0#
HD_STBN1#
HD_STBP1#
HD_STBN2#
HD_STBP2#
HD_STBN3#
HD_STBP3#
DBI0#
DBI1#
DBI2#
DBI3#
BCLK
BCLK#
H_RCOMP0
H_RCOMP1
HI0
HI1
HI2
HI3
HI4
HI5
HI_STB
HI_STB#
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
82845-A1
HOST
HUB LINK
POWER
4
HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
66IN
RSTIN#
CPURST#
H_VREF0
H_VREF1
H_VREF2
H_VREF3
H_VREF4
H_SWNG0
H_SWNG1
HI10
HI_REF
HL_RCOMP
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
RSVD0
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
NC0
NC1
4
3
HD#0
AA2
HD#1
AB5
HD#2
AA5
HD#3
AB3
HD#4
AB4
HD#5
AC5
HD#6
AA3
HD#7
AA6
HD#8
AE3
HD#9
AB7
HD#10
AD7
HD#11
AC7
HD#12
AC6
HD#13
AC3
HD#14
AC8
HD#15
AE2
HD#16
AG5
HD#17
AG2
HD#18
AE8
HD#19
AF6
HD#20
AH2
HD#21
AF3
HD#22
AG3
HD#23
AE5
HD#24
AH7
HD#25
AH3
HD#26
AF4
HD#27
AG8
HD#28
AG7
HD#29
AG6
HD#30
AF8
HD#31
AH5
HD#32
AC11
HD#33
AC12
HD#34
AE9
HD#35
AC9
HD#36
AE10
HD#37
AD9
HD#38
AG9
HD#39
AC10
HD#40
AE12
HD#41
AF10
HD#42
AG11
HD#43
AG10
HD#44
AH11
HD#45
AG12
HD#46
AE13
HD#47
AF12
HD#48
AG13
HD#49
AH13
HD#50
AC14
HD#51
AF14
HD#52
AG14
HD#53
AE14
HD#54
AG15
HD#55
AG16
HD#56
AG17
HD#57
AH15
HD#58
AC17
HD#59
AF16
HD#60
AE15
HD#61
AH17
HD#62
AD17
HD#63
AE16
P22
J27
AE17
HVREF
M7
R8
Y8
AB11
AB17
HSWNG
AA7
AD13
HL6
L28
HI6
HI7
HI8
HI9
L27
M27
N28
M24
P26
P27
L25
L29
M22
N23
N26
B19
C5
C8
C23
C26
D12
F26
H27
K23
K25
AD26
AD27
HL7
HL8
HL9
HL10
HUB_MREF
R171 40.2RST
VCC1_8
HD#[0..63] {5}
MCH_66 {4}
PCIRST#1 {4,11,13}
CPURST# {5}
HL[0..10]
VCC1_8
VCC_AGP
VCC_DIMM
3
VTT1
VTT2
VTT_GND1
VTT_GND2
W22
W29
AA22
AA26
AB21
AC29
AD21
AD23
AE26
AF23
AG29
AJ25
U13
U17
AD12
AD14
AD16
AD19
AD22
AE1
AE4
AE18
AE20
AE29
AF5
AF7
AF9
AF11
AF13
AF15
AF17
AF19
AF21
AF25
AG1
AG18
AG20
AG22
AH19
AH21
AH23
AJ3
AJ5
AJ7
AJ9
AJ11
AJ13
AJ15
AJ17
AJ27
R22
R29
U22
U26
N14
N16
P13
P15
P17
R14
R16
T15
U14
U16
T13
T17
A13
A17
A21
A25
C29
D11
D15
D19
D23
D25
F10
F14
F18
F22
G29
H10
H12
H14
H16
H18
H20
H22
H24
K22
K24
K26
L23
A5
A9
C1
D7
H8
K6
F6
G1
G4
J5
J7
U11C
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
82845-A1
POWER
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
2
A3
A7
A11
A15
A19
A23
A27
D5
D9
D13
D17
D21
E1
E4
E26
E29
F8
F12
F16
F20
F24
G26
H9
H11
H13
H15
H17
H19
H21
J1
J4
J6
J22
J26
J29
K5
K7
K27
L1
L4
L6
L8
L22
L24
L26
M23
N1
N4
N8
N13
N15
N17
N22
N29
P6
P8
P14
P16
R1
R4
R13
R15
R17
R26
T6
T8
T14
T16
T22
U1
U4
U15
U29
V6
V8
V22
W1
W4
W8
W26
Y6
Y22
AA1
AA4
AA8
AA29
AB6
AB9
AB10
AB12
AB13
AB14
AB15
AB16
AB19
AB22
AC1
AC4
AC18
AC20
AC21
AC23
AC26
AD6
AD8
AD10
2
MCH REFERENCE BLOCK
VTT1
VTT_GND1
VTT2
VTT_GND2
Length < 3inch.Width at 12mils.
Place 1 Cap. as Close as possible to
every pin of MCH
Trace width use 15 mils and 15mils space
Length < 3inch.Width at 12mils.
HVREF
C87
103P
Place 1 Cap. as Close as possible to
every pin of MCH
Trace width use 15 mils and 15mils space
Place 0.01uF Cap. as Close as possible to MCH
Trace width use 15 mils and 15mils space
CB92
104P
CB96
104P
HSWNG
C67
103P
HUB_MREF
C86
226P/1206
C92
106P/1206
C65
104P
C66
103P
C98
103P
MCH Trace Decoupling Capacitors
VCCP
CB199
5020
X_104P
CB202
X_104P 5020
BOTTOM
Micro Star Restricted Secret
Title
Brookdale MCH 1
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
1
L4 4.7UH/1206
C85
106P/1206
L6 4.7UH/1206
C91
226P/1206
C82
C80
103P
103P
C84
C68
103P
103P
C100
C99
104P
104P
MS-6506
Last Revision Date:
Tuesday, July 03, 2001
Sheet
1
VCCP
R126
301RST
R131
150RST
VCCP
R99
49.9RST
R98
100RST
VCC1_8
R170
150RST
R169
150RST
VCC1_8
CB139
104P
CB121
104P
MCH & ICH2
7 33
of
VCC_AGP
VCC_AGP
C69
104P
Rev
0B
![](/html/c8/c8ac/c8aca2207c2e82fce9cd00271fbfc6c5ea1458445672f12cf17b5e639eb566d1/bg8.png)
5
AA28
AB25
AB27
AA27
AB26
AB23
AA24
AA25
AB24
AC25
AC24
AC22
AD24
AA23
U11B
F27
SDQ0
SDQ1
SDQ2
SDQ3
SDQ4
SDQ5
SDQ6
SDQ7
SDQ8
SDQ9
SDQ10
SDQ11
SDQ12
SDQ13
SDQ14
SDQ15
SDQ16
SDQ17
SDQ18
SDQ19
SDQ20
SDQ21
SDQ22
SDQ23
SDQ24
SDQ25
SDQ26
SDQ27
SDQ28
SDQ29
SDQ30
SDQ31
SDQ32
SDQ33
SDQ34
SDQ35
SDQ36
SDQ37
SDQ38
SDQ39
SDQ40
SDQ41
SDQ42
SDQ43
SDQ44
SDQ45
SDQ46
SDQ47
SDQ48
SDQ49
SDQ50
SDQ51
SDQ52
SDQ53
SDQ54
SDQ55
SDQ56
SDQ57
SDQ58
SDQ59
SDQ60
SDQ61
SDQ62
SDQ63
RD_CLKIN
RD_CLKO
G_AD0
G_AD1
G_AD2
G_AD3
G_AD4
G_AD5
G_AD6
G_AD7
G_AD8
G_AD9
G_AD10
G_AD11
G_AD12
G_AD13
G_AD14
G_AD15
G_AD16
G_AD17
G_AD18
G_AD19
G_AD20
G_AD21
G_AD22
G_AD23
G_AD24
G_AD25
G_AD26
G_AD27
G_AD28
G_AD29
G_AD30
G_AD31
G_C/BE0#
G_C/BE1#
G_C/BE2#
G_C/BE3#
82845-A1
SDRAM
AGP
Tri-Stated
during
RSTIN#
assertion
E27
B28
C27
D26
E25
B25
D24
F23
B23
C22
C21
D20
C19
C18
C17
B13
E13
C12
B11
E11
C10
F9
C9
E8
E7
C7
D6
B5
D4
C3
B2
G28
E28
C28
D27
B27
F25
C25
E24
C24
E23
D22
E22
B21
C20
D18
E18
E14
C13
E12
F11
C11
E10
D10
B9
E9
D8
B7
E6
C6
C4
B3
D3
G3
H3
R27
R28
T25
R25
T26
T27
U27
U28
V26
V27
T23
U23
T24
U24
U25
V24
Y27
Y26
Y23
V25
V23
Y25
MD[0..63]{14}
D D
C C
Trace Length:50mils
B B
A A
with TP.
GAD[0..31]{15}
GC_BE#0{15}
GC_BE#1{15}
GC_BE#2{15}
GC_BE#3{15}
5
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31
GC_BE#0
GC_BE#1
GC_BE#2
GC_BE#3
Data line
SDRAM ECC
Bank
Select
System
memory
clock
4
SMA10
SMA11
SMA12
SCS0#
SCS1#
SCS2#
SCS3#
SCS4#
SCS5#
SCS6#
SCS7#
SCS8#
SCS9#
SCS10#
SCS11#
SCKE0
SCKE1
SCKE2
SCKE3
SCKE4
SCKE5
SCK10
SCK11
SRAS#
SCAS#
SM_RCOMP
SD_REF0
SD_REF1
G_FRAME#
G_IRDY#
G_TRDY#
G_DEVSEL#
G_STOP#
G_PAR
G_REQ#
G_GNT#
SB_STB
SB_STB#
AD_STB0
AD_STB0#
AD_STB1
AD_STB1#
AGPREF
G_RCOMP
TESTIN#
4
SMA0
SMA1
SMA2
SMA3
SMA4
SMA5
SMA6
SMA7
SMA8
SMA9
SCB0
SCB1
SCB2
SCB3
SCB4
SCB5
SCB6
SCB7
SBS0
SBS1
SCK0
SCK1
SCK2
SCK3
SCK4
SCK5
SCK6
SCK7
SCK8
SCK9
SWE#
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
PIPE#
RBF#
WBF#
3
MA0
G22
MA1
E21
MA2
F21
MA3
G21
MA4
E20
MA5
G20
MA6
E19
MA7
F19
MA8
G19
MA9
G18
MA10
E17
MA11
E15
MA12
G12
MCS#0
H23
MCS#1
J23
MCS#2
G7
MCS#3
G8
MCS#4
J24
MCS#5
G24
MCS#6
H7
MCS#7
F7
G25
H25
G6
H6
MDP0
C16
MDP1
E16
MDP2
C15
MDP3
D14
MDP4
B17
MDP5
D16
MDP6
B15
MDP7
C14
MCKE0
G9
MCKE1
F4
MCKE2
G10
MCKE3
F5
G11
E5
F17
G17
MCLK0
F13
MCLK1
G13
MCLK2
E2
MCLK3
C2
MCLK4
G15
MCLK5
G14
MCLK6
F3
MCLK7
E3
G16
F15
H5
G5
G23
J25
G27
R162 20.5RST
J28
SM_REF
J9
J21
Y24
W27
W24
W28
W23
W25
AG24
AH25
SBA0
AH28
SBA1
AH27
SBA2
AG28
SBA3
AG27
SBA4
AE28
SBA5
AE27
SBA6
AE24
SBA7
AE25
AF27
AF26
ST0
AG25
ST0
ST1
ST2
AF24
AG26
R24
R23
AC27
AC28
AF22
AE22
AE23
AA21
AD25
H26
ST1
ST2
CB207 X_104P
5020
R161 40.2RST
R163 X_4.7K
MA[0..12] {14}
MCS#0 {14}
MCS#1 {14}
MCS#2 {14}
MCS#3 {14}
MCS#4 {14}
MCS#5 {14}
MCS#6 {14}
MCS#7 {14}
MDP[0..7] {14}
MCKE0 {14}
MCKE1 {14}
MCKE2 {14}
MCKE3 {14}
MBS0 {14}
MBS1 {14}
MRAS# {14}
MCAS# {14}
MWE# {14}
GFRAME# {15}
GIRDY# {15}
GTRDY# {15}
GDEVSEL# {15}
GSTOP# {15}
GPAR {15}
GREQ# {15}
GGNT# {15}
SB_STB {15}
SB_STB# {15}
ST0 {15}
ST1 {15}
ST2 {15}
GAD_STB0 {15}
GAD_STB#0 {15}
GAD_STB1 {15}
GAD_STB#1 {15}
PIPE# {15}
RBF# {15}
WBF# {15}
AGPREF {15}
VCC1_8
SBA[0..7] {15}
Width 10 mils and less
than 500 mils.
3
VCC_DIMM VCC5
VCC_DIMM VCC1_8
BACK
CB198 X_105P 5020
VCC_AGP
CB206 X_105P 5020
CB200 X_105P 5020
CB208 X_105P 5020
CB204 X_105P 5020
CB205 X_105P 5020
2
MCH REFERENCE VOLTAGE
VCC_DIMM
SM_REF
C88
104P
C90
105P
MCH MEMORY CLOCK RC CIRCUITS
MCLK1{14}
MCLK0{14}
MCLK5{14}
MCLK4{14}
MCLK6{14}
MCLK2{14}
MCLK7{14}
MCLK3{14}
MCLK1
MCLK0
MCLK5
MCLK4
MCLK6
MCLK2
MCLK7
MCLK3
MCH DECOUPLING CAPACITOR
CB97
104P
CB101
106P/1206
CB99
106P/1206
104PC41
104PC101
VCC1_8 VCC_DIMMVCCP VCC_AGP
CB111
105P
CB110
104P
104PC97
C96 105P
VCC_DIMMVCCP
CB203 X_105P 5020
CB201 X_105P 5020
2
AGPREF
Title
Brookdale MCH 2
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
1
R152
49.9RST
R144
49.9RST
CN13
X_33P-8P4C
7
8
5
6
3
4
1
2
7
8
5
6
3
4
1
2
CN9
X_33P-8P4C
CB107
104P
CB109
104P
CB116
104P
CB108
104P
CB135
104P
CB94
104P
CB85
104P
CB102
104P
CB90
104P
CB79
104P
CB87
104P
CB82
104P
Micro Star Restricted Secret
MS-6506
Last Revision Date:
Tuesday, July 03, 2001
Sheet
8 33
1
of
Rev
0B
![](/html/c8/c8ac/c8aca2207c2e82fce9cd00271fbfc6c5ea1458445672f12cf17b5e639eb566d1/bg9.png)
ICH2 PCI / HUB LINK / CPU / LAN / INTERRUPT SIGNALS
ICH2 SMI# SIGNAL
VCC1_8
D10D2E5
K19
L19P5V9
VCC1.8
VCC1.8
GND1
GND2
VCC1.8
VCC1.8
GND3
GND4
VCC1.8
GND5
GND6
E14
VCC3
GND7
AD[0..31]{16}
C_BE#0{16}
C_BE#1{16}
C_BE#2{16}
C_BE#3{16}
DEVSEL#{16}
FRAME#{16}
IRDY#{16}
TRDY#{16}
STOP#{16}
PLOCK#{16}
SERR#{16}
PERR#{16}
ICH_PCLK{4}
PCIRST#{4}
CS{13}
DIN{13}
DOUT{13}
SHCLK{13}
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C_BE#0
C_BE#1
C_BE#2
C_BE#3
PAR{16}
PME#{15,16}
REQA#
GNTA#
AA4
AB4
AB3
AA5
AB5
AA6
AA8
AB8
AB9
W10
Y10
AA10
AA3
AB6
AA9
AB7
AA7
Y15
W11
AA15
W5
W4
W6
W3
W9
W8
W1
W2
W7
M3
H3
H4
K4
K3
U15A
Y4
Y5
Y3
Y6
Y2
Y1
V2
V1
U4
U3
Y9
U2
U1
T4
T3
Y8
V3
V4
Y7
L2
F4
G4
J1
J4
J3
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE#0
CBE#1
CBE#2
CBE#3
DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
PLOCK#
SERR#
PERR#
PME#
GPIO0/REQA#
GPIO16/GNTA#
PCICLK
PCIRST#
NC12
NC13
NC14
NC15
NC16
EE_CS
EE_DIN
EE_DOUT
EE_SHCLK
VCC1.8
VCC1.8
A1A2A10B1B2B3B9
VCC3
E15
E16
E17
E18
F18
G18
H18
J18
P18
R18R5T5U5V5V6V7V8V14
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
GND8
GND9
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
GND19
GND20
B10C2C3C4C9D5D6D7D8D9E6E7E8E9J9
VCC3
VCC3
GND21
GND22
J10
VCC3
VCC3
GND23
GND24
J11
VCC1_8SB
V15
VCCSUS1_8
GND25
GND26
J12
J13
J14K9K10
V16H5J5
VCCSUS1_8
VCCSUS1_8
VCCSUS1_8
VCCSUS1_8
GND27
GND28
GND29
GND30
K11
K12
A22
B21
B22C1D1D3E1E2E3
GND68
GND69
GND31
GND32
GND33
K13
K14J2K1
GND70
GND71
GND58
GND59
AA1
NC5
GND60
AA2
AA21
E4
NC6
NC8
NC9
CPUSLP#
NC10
NC11
NC17
STPCLK#
GPIO1/REQB#/REQ5#
GPIO17/GNTB#/GNT5#
LAN_CLK
LAN_RSTSYNC
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
GND61
GND62
GND63
GND64
GND65
82I801BA
AA22
AB1
AB2
AB21
A20M#
FERR#
IGNNE#
INIT#
INTR
NMI
SMI#
RCIN#
A20GATE
HL0
HL1
HL2
HL3
HL4
HL5
HL6
HL7
HL8
HL9
HL10
HL11
HL_STB
HL_STB#
HLCOMP
HUBREF
PIRQA#
PIRQB#
PIRQC#
PIRQD#
IRQ14
IRQ15
APICCLK
APICD0
APICD1
SERIRQ
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
GNT0#
GNT1#
GNT2#
GNT3#
GNT4#
GND67
GND66
D11
A12
R22
A11
C12
C11
B11
B12
C10
B13
C13
A4
B5
A5
B6
B7
A8
B8
A9
C8
C6
C7
C5
A6
A7
A3
B4
P1
P2
P3
N4
F21
C16
N20
P22
N19
N21
R2
R3
T1
AB10
P4
L3
M2
M1
R4
T2
R1
L4
G3
H2
G2
G1
H1
F3
F2
F1
A21
AB22
A20M#
FERR#
SMI#
KB_RST#
A20GATE#
HL0
HL1
HL2
HL3
HL4
HL5
HL6
HL7
HL8
HL9
HL10
R238 40.2RST
HUB_IREF
APIC_D0
APIC_D1
SERIRQ
PREQ#0
PREQ#1
PREQ#2
PREQ#3
PREQ#4
PREQ#5
PGNT#0
PGNT#1
PGNT#2
PGNT#3
PGNT#4
PGNT#5
RN16
8P4R-22
RN15
8P4R-22
A20M# {5}
SLP# {5}
FERR# {5}
IGNNE# {5}
HINIT# {5,13}
INTR {5}
NMI {5}
STPCLK# {5}
KB_RST# {11}
A20GATE# {11}
HL[0..10] {7}
This resistor less than 0.5"
from ICH use 15 mils trace
HL_STB {7}
HL_STB# {7}
VCC1_8
INTA# {15,16}
INTB# {15,16}
INTC# {16}
INTD# {16}
IRQ14 {4}
IRQ15 {4}
SERIRQ {11}
PREQ#0 {16}
PREQ#1 {16}
PREQ#2 {16}
PREQ#3 {16}
PREQ#4 {16}
PREQ#5 {16}
PGNT#0 {16}
PGNT#1 {16}
PGNT#2 {16}
PGNT#3 {16}
PGNT#4 {16}
PGNT#5 {16}
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
CNR_CLK {13}
CNR_RST {13}
CNR_RXD0 {13}
CNR_RXD1 {13}
CNR_RXD2 {13}
CNR_TXD2 {13}
CNR_TXD1 {13}
CNR_TXD0 {13}
SMI#
R239 33
100PC124
HSMI# {5}
ICH2 STRAPPING RESISTORS
FERR#
SERIRQ
PME#
KB_RST#
A20GATE#
REQA#
GNTA#
APIC_D0
APIC_D1
R65 62
R255 8.2K
R246 X_10K
R240 10K
R227 10K
R260 2.7K
R266 2.7K
R258 10K
R256 10K
VCCP
VCC3
VCC3_SB
VCC3
VCC5
VCC3
ICH2 REFERENCE VOLTAGE
VCC1_8
R225
150RST
HUB_IREF
C123
C122
104P
Place Cap. as Close as possible to ICH2
Trace width use 15 mils and 15mils space
C121
104P
R226
150RST103P
VCC3
CB173
X_104P
CB148
X_104P
CB163
104P
CB156
X_104P
CB122
X_103P
CB142
103P
CB147
104P
Place one 0.1U/0.01U pair in each corner and
2 on opposite sides close to ICH2 if it fit
ICH2 DECOUPLING CAPACITORS
CB125
CB140
104P
104P
Distribute near the 1.8V
power pin of the ICH2
Distribute near the VCC1_8SB
Power pin of the ICH2
VCC1_8SBVCC1_8
Micro Star Restricted Secret
CB151
104P
CB152
104P
Title
Brookdale ICH2 PCI
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
MS-6506
Last Revision Date:
Sheet
Tuesday, July 03, 2001
9 33
Rev
0B
of
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ICH2 ASIC / RTC / AC'97 / GPIO / LPC / USB / IDE SIGNALS
VCC5VCC3
AC
D5
P11
GND54
P12
VCC5REF1
VCC5REF2
GPIO2/PIRQE#
GPIO3/PIRQF#
GPIO4/PIRQG#
GPIO5/PIRQH#
GND55
GND56
GND57
82I801BA
P13
P14
1N5817S
PDCS1#
SDCS1#
PDCS3#
SDCS3#
PDA0
PDA1
PDA2
SDA0
SDA1
SDA2
PDDREQ
SDDREQ
PDDACK#
SDDACK#
PDIOR#
SDIOR#
PDIOW#
SDIOW#
PIORDY
SIORDY
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15
GPIO6
GPIO7
GPIO8
GPIO18
GPIO19
GPIO20
GPIO24
GPIO25
TP0
VCC3_SB
RTC_VCC
U21
T18
GND35
L10
L11
VCCRTC
GND36
GND37
L12
GND38
L13
L14M9M10
U18
VCC3SUS1
GND39
GND40
THRM#
THRM#{11}
SLP_S3#{11,19}
SLP_S5#{19}
PWR_GD{17}
CPU_GD{5}
VRM_GD{20}
PWRBTN#{11}
RSMRST#{11}
SUSCLK{11}
SMBDATA{4,11,13,14}
SMBCLK{4,11,13,14}
SM_LNK0{16}
SM_LNK1{16}
AC_RST#{12,13}
AC_SYNC{12,13}
AC_BCLK{12,13}
AC_SDOUT{12,13}
AC_SDIN0{12,13}
AC_SDIN1{13}
EXTSMI#{17}
SIO_PME#{11}
LAD0/FWH0{11,13}
LAD1/FWH1{11,13}
LAD2/FWH2{11,13}
LAD3/FWH3{11,13}
LFRAME#/FWH4{11,13}
NEAR CHIPSET LESS THAN 1 INCH
RN25
8P4R-15
1
USB0+{18}
USB0-{18}
USB1-{18}
USB1+{18}
USB3-{18}
USB3+{18}
USB2-{18}
USB2+{18}
3
5
7
1
3
5
7
RN26
8P4R-15
2
4
6
8
2
4
6
8
R30715
R30615
USBP1USBP1+
USBP3USBP3+
USBP2USBP2+
PWR_GD
VRM_GD
RING#
RSMRST#
SMB_ALERT
INTRUDER#
RTCRST#
VBIAS
RTCX2
ICH_66{4}
ICH_14{4}
ICH_48{4}
R261 33
SPKR{17}
SIO_PME#
GPIO22
GP23
GP23{13}
R331 X_10K
LDRQ#{11}
USBP0+
USBP0USBP1+
USBP1USBP2+
USBP2USBP3+
USBP3-
OC#0{18}
OC#1{18}
CNR_USB1- {13}
CNR_USB1+ {13}
U15B
AA13
THRM#
W16
SLP_S3#
AB18
SLP_S5
R20
PWROK
A13
CPUPWRGD
B15
VRMPWRGD
W21
PWRBTN#
AA17
RI#
R21
RSMRST#
Y16
RSM_PWROK
Y17
SUSSTAT#
AA18
SUSCLK
AA16
SMBDATA
AB16
SMBCLK
AB17
GPIO11/SMBALERT#
U19
SMLINK0
V20
SMLINK1
T19
INTRUDER#
T20
RTCRST#
T21
VBIAS
U22
RTCX1
T22
RTCX2
D4
CLK66
M19
CLK14
P20
CLK48
V22
AC_RST#
P19
AC_SYNC
R19
AC_BITCLK
P21
AC_SDOUT
Y22
AC_SDIN0
W22
AC_SDIN1
N22
SPKR
W14
GPIO12
AB15
GPIO13
L1
GPIO21
B14
GPIO22
A14
GPIO23
AB14
GPIO27
AA14
GPIO28
Y12
LAD0/FWH0
W12
LAD1/FWH1
AB13
LAD2/FWH2
AB12
LAD3/FWH3
AA12
FS0
Y13
LDRQ0#
W13
LDRQ1#
AB11
LFRAME#/FWH4
W17
USBP0+
Y18
USBP0-
AB19
USBP1+
AA19
USBP1-
W18
USBP2+
Y19
USBP2-
AB20
USBP3+
AA20
USBP3-
W19
OC0#
Y20
OC1#
Y21
OC2#
W20
OC3#
GND34
L9
F5G5V17
VCC3SUS2
VCC3SUS4
VCC3SUS5
VCC3SUS6
GND41
GND42
GND43
GND44
M11
M12
M13
VCCP VCC5_SB
V18
VCC3SUS7
GND45
GND46
GND47
M14N9N10
N11
D12
D13
VCPU_IO1
GND48
GND49
N12
N13
V19K2M20
VCPU_IO2
GND50
GND51
GND52
N14P9P10
VCC5REF_SUS
GND53
R259
1K
CB153
CB154
104P
104P
E21
C15
E19
D15
F20
F19
E22
A16
D16
B16
G22
B18
F22
B17
G19
D17
G21
C17
G20
A17
H19
H22
J19
J22
K21
L20
M21
M22
L22
L21
K22
K20
J21
J20
H21
H20
D18
B19
D19
A20
C20
C21
D22
E20
D21
C22
D20
B20
C19
A19
C18
A18
U20
N3
N2
N1
M4
Y11
AA11
Y14
A15
D14
C14
V21
W15
PD_CS#1 {4}
SD_CS#1 {4}
PD_CS#3 {4}
SD_CS#3 {4}
PD_A0 {4}
PD_A1 {4}
PD_A2 {4}
SD_A0 {4}
SD_A1 {4}
SD_A2 {4}
PD_DREQ {4}
SD_DREQ {4}
PD_DACK# {4}
SD_DACK# {4}
PD_IOR# {4}
SD_IOR# {4}
PD_IOW# {4}
SD_IOW# {4}
PD_IORDY {4}
SD_IORDY {4}
PDD0
PDD1RTCX1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15
BATLOW#
GP6
GP7
GP8 GP8
INTE# {16}
INTF# {16}
INTG# {16}
INTH# {16}
PDD[0..7] {4}
PDD[8..15] {4}
SDD[0..7] {4}
SDD[8..15] {4}
VCC5_SB
VBAT
R338
1.5K
D10
1N5817S
BAT1
YSKTBT-1
R335
4.7K
AC
ICH2 STRAPPING RESISTORS
PD_IORDY
SD_IORDY
PD_DREQ
SD_DREQ
INTRUDER#
RSMRST#
SPKR
PWR_GD
THRM#
VRM_GD
SIO_PME#
RING#
RSMRST#
PWRBTN#
SM_LNK0
SM_LNK1
BATLOW#
EXTSMI#
SMB_ALERT
SLP_S3#
GP23
GPIO22
GP6
GP7
R130 4.7K
R241 4.7K
R132 5.6K
R229 5.6K
R270 22K
R304 10K
R257 X_10K
R268 8.2K
R316 10K
R231 10K
R332 4.7K
R317 8.2K
R303 1K
R295 10K
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
123
D8
1N4148S
D9
A C
1N5817S
R336
1K
RTC BLOCK
R319
1K
R329
390K
R11-0394013
473PC167
R334
X_20M
R288 10M R280 10M
R289
X_5.6M
VCC3
VBAT
VCC3
VCC3
VCC3_SB
VCC3_SB
RN23
8P4R-4.7K
VCC3_SB
RN29
8P4R-10K
VCC3
RN24
8P4R-4.7K
C176
473P
C161
15P
RTC_VCC
32.768KHZ +-30PPM
SM_CTRL{17}
THERMTRIP#{5}
YJ102-B
JBAT1 Clear CMOS
1 - 2
2 - 3*Clear CMOS
1
2
3
R311
1K
X3
32pF
R262
4.7K
INTERUDER
JCS1
2
1
Normal
JBAT1
D1x3-BK
JBAT1(1-2)
YJUMPER-MG
RTCRST#
VBIAS
RTCX1
C155
15P
R347
10K
RTCX2
R263
1K
B
Q26
2N3904S
THMTR1
NEC-CI AOL2 Function
+12V
12
CE
B
VCC3
VRM_GDINTRUDER#
CE
DS
G
DS
G
R330
8.2K
THMTR2
Q35
2N3904S
SM_LNK0
SM_LNK1
R228
0
Q27
NDS7002AS
Q28
NDS7002AS
VCC3
B
SM_LNK0 {16}
SMBCLK {4,11,13,14}
SM_LNK1 {16}
SMBDATA {4,11,13,14}
R315
8.2K
THRM# {11}
CE
Q34
2N3904S
SMB_ALERT
VCC3_SB
CB170
104P
VCCP VCC5_SB
CB182
104P
CB141
104P
CB185
104P
RTC_VCC
CB159
103P
Distribute near the VCC3_SB power pin of the ICH
ICH2 DECOUPLING CAPACITOR
VCC5_SBVCC5
CB160
104P
CB168
104P
VCC3
R312
1K
JP3(1-2)
YJUMPER-MG
RECOVERY{13}
AC_SDOUT
1
JP3
2
D1x3-BK
3
Micro Star Restricted Secret
Title
Brookdale ICH2 Other
Document Number
MICRO-STAR INT'L CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
MS-6506
Last Revision Date:
Sheet
Tuesday, July 03, 2001
10 33
of
Rev
0B