This manual is intended for use by service technicians familiar with similar types of equipment. It contains
service information required for the equipment described and is current as of the printing date. Changes which
occur after the printing date may be incorporated by a complete Manual revision or alternatively as additions.
Note:
Before operating or testing these units, please read the Product Safety and RF Exposure
Compliance section.
Computer Software Copyrights
The Motorola products described in this manual may include copyrighted Motorola computer programs stored
in semiconductor memories or other media. Laws in the United States and other countries preserve for
Motorola certain exclusive rights for copyrighted computer programs, including, but not limited to, the
exclusive right to copy or reproduce in any form the copyrighted computer program. Accordingly, any
copyrighted Motorola computer programs contained in the Motorola products described in this manual may
not be copied, reproduced, modified, reverse-engineered, or distributed in any manner without the express
written permission of Motorola. Furthermore, the purchase of Motorola products shall not be deemed to grant
either directly or by implication, estoppel, or otherwise, any license under the copyrights, patents or patent
applications of Motorola, except for the normal non-exclusive license to use that arises by operation of law in
the sale of a product.
Document Copyrights
No duplication or distribution of this document or any portion thereof shall take place without the express
written permission of Motorola. No part of this manual may be reproduced, distributed, or transmitted in any
form or by any means, electronic or mechanical, for any purpose without the express written permission of
Motorola.
Disclaimer
The information in this document is carefully examined, and is believed to be entirely reliable. However, no
responsibility is assumed for inaccuracies. Furthermore, Motorola reserves the right to make changes to any
products herein to improve readability, function, or design. Motorola does not assume any liability arising out
of the applications or use of any product or circuit described herein; nor does it cover any license under its
patent rights nor the rights of others.
Section 3UHF2 Low Power (1-25 W) Service Information (438-470 MHz)
Section 4UHF2 High Power (25-40 W) Service Information (438-470 MHz)
Section 5UHF3 High Power (25-40 W) Service Information (465-495 MHz)
Page 6
Notes
THIS PAGE INTENTIONALLY LEFT BLANK
Page 7
M
CM200/CM300/PM400
Radios
Service Maintainability
Issue: November, 2007
Page 8
ii
Computer Software Copyrights
The Motorola products described in this manual may include copyrighted Motorola computer programs stored
in semiconductor memories or other media. Laws in the United States and other countries preserve for
Motorola certain exclusive rights for copyrighted computer programs, including the exclusive right to copy or
reproduce in any form, the copyrighted computer program. Accordingly, any copyrighted Motorola computer
programs contained in the Motorola products described in this manual may not be copied or reproduced in
any manner without the express written permission of Motorola. Furthermore, the purchase of Motorola
products shall not be deemed to grant, either directly or by implication, estoppel or otherwise, any license
under the copyrights, patents or patent applications of Motorola, except for the normal non-exclusive
royalty-free license to use that arises by operation of law in the sale of a product.
Page 9
Table of Contents
SAFETY INFORMATION .......................................................................................... v
Chapter 1INTRODUCTION
1.0Scope of Manual..................................................................................................1-1
2.0Warranty and Service Support.............................................................................1-1
2.1Warranty Period and Return Instructions .......................................................1-1
Before using this product, read the operating instructions for safe usage contained in the
Product Safety and RF Exposure booklet enclosed with your radio.
ATTENTION!
This radio is restricted to occupational use only to satisfy FCC RF energy exposure requirements.
Before using this product, read the RF energy awareness information and operating instructions in the
Product Safety and RF Exposure booklet enclosed with your radio (Motorola Publication part number
68P81095C99) to ensure compliance with RF energy exposure limits.
For a list of Motorola-approved antennas, batteries, and other accessories, visit the following web site which
lists approved accessories: http://www.motorola.com/governmentandenterprise.
v
Page 12
vi
Notes
Page 13
1.0Scope of Manual
This manual is intended for use by service technicians familiar with similar types of equipment. It
contains service information required for the equipment described and is current as of the printing
date. Changes which occur after the printing date may be incorporated by a complete Manual
revision or alternatively as additions.
Chapter 1
INTRODUCTION
NOTE
Before operating or testing these units, please read the Safety Information Section in the
front of this manual.
2.0Warranty and Service Support
Motorola offers long term support for its products. This support includes full exchange and/or repair
of the product during the warranty period, and service/ repair or spare parts support out of warranty.
Any "return for exchange" or "return for repair" by an authorised Motorola Dealer must be
accompanied by a Warranty Claim Form. Warranty Claim Forms are obtained by contacting an
Authorized Motorola Dealer.
2.1Warranty Period and Return Instructions
The terms and conditions of warranty are defined fully in the Motorola Dealer or Distributor or
Reseller contract. These conditions may change from time to time and the following notes are for
guidance purposes only.
In instances where the product is covered under a "return for replacement" or "return for repair"
warranty, a check of the product should be performed prior to shipping the unit back to Motorola.
This is to ensure that the product has been correctly programmed or has not been subjected to
damage outside the terms of the warranty.
Prior to shipping any radio back to the appropriate Motorola warranty depot, please contact
Customer Resources (Please see page 2 and page 3 in this Chapter). All returns must be
accompanied by a Warranty Claim Form, available from your Customer Services representative.
Products should be shipped back in the original packaging, or correctly packaged to ensure no
damage occurs in transit.
2.2After Warranty Period
After the Warranty period, Motorola continues to support its products in two ways.
1. Motorola's Radio Products and Solutions Organization (RPSO) offers a repair service to both end
users and dealers at competitive prices.
2. Radio Products and Solutions Organization (RPSO) supplies individual parts and modules that
can be purchased by dealers who are technically capable of performing fault analysis and repair.
* The Radio Products and Solutions Organization (RPSO) was formerly known as the Radio Products
Services Division (RPSD) and/or the Accessories and Aftermarket Division (AAD).
Page 14
1-2INTRODUCTION
3.0Replacement Parts Ordering
3.1Basic Ordering Information
When ordering replacement parts or equipment information, the complete identification number
should be included. This applied to all components, kits, and chassis. If the component part number is
not known, the order should include the number of the chassis or kit of which it is a part, a sufficient
description of the desired component to identify it.
3.2Motorola Online
Motorola online users can access our on-line catalog at:
http://www.motorola.com/businessonline
To register for online access, please call 800-814-0601 (for U.S. and Canada Service Centers only).
3.3Mail Orders
Send written orders to the following addresses:
Replacement Parts/
Test Equipment/Manuals/
Crystal Service Items:
Motorola Inc.
Radio Products and Solutions
Organization*
Attention: Order Processing
1307 E. Algonquin Road
Schaumburg, IL 60196
U.S.A.
3.4Telephone Orders
Radio Products and Solutions Organization*
(United States and Canada)
7:00 AM to 7:00 PM (Central Standard Time)
Monday through Friday (Chicago, U.S.A.)
1-800-422-4210
1-847-538-8023 (International Orders)
U.S. Federal Government Markets Division (USFGMD)
1-800-873-4668
8:30 AM to 5:00 PM (Eastern Standard Time)
Federal Government Orders:International Orders:
Motorola Inc.
U.S. Federal Government Markets
Division
Attention: Order Processing
7230 Parkway Drive
Landover, MD 21076
U.S.A.
Motorola Inc.
Radio Products and Solutions
Organization*
Attention: Order Processing
1307 E. Algonquin Road
Schaumburg, IL 60196
U.S.A.
3.5Fax Orders
Radio Products and Solutions Organization*
(United States and Canada)
1-800-622-6210
1-847-576-3023 (International)
USFGMD
(Federal Government Orders)
1-800-526-8641 (For Parts and Equipment Purchase Orders)
Page 15
Radio Model Information1-3
3.6Parts Identification
Radio Products and Solutions Organization*
(United States and Canada)
1-800-422-4210
* The Radio Products and Solutions Organization (RPSO) was formerly known as the Radio Products
Services Division (RPSD) and/or the Accessories and Aftermarket Division (AAD).
4.0Radio Model Information
The model number and serial number are located on a label attached to the back of your radio. You
can determine the RF output power, frequency band, protocols, and physical packages. The
example below shows one mobile radio model number and its specific characteristics.
Table 1-1 Radio Model Number (Example: AAM50RNC9AA1)
Typ e of
Unit
AAM50R
Model
Series
Freq.
Band
UHF2
(438-470
MHz)
M = Mobile
AA = Country Code
UHF3
(465-495
MHz)
Power
Level
1-25 WCCM2009ProgrammableAAConventional
S
25-40 WFCM300
25-45 W
N
P
Q
Physical
Packages
PM400
Channel
Spacing
Protocol
MDC
Feature
Level
1
4/32 mini-U
3
64 mini-U
Page 16
1-4INTRODUCTION
Notes
Page 17
1.0Introduction
!
This chapter of the manual describes:
•preventive maintenance
•safe handling of CMOS devices
•repair procedures and techniques
2.0Preventive Maintenance
The radios do not require a scheduled preventive maintenance program; however, periodic visual
inspection and cleaning is recommended.
2.1Inspection
Check that the external surfaces of the radio are clean, and that all external controls and switches
are functional. It is not recommended to inspect the interior electronic circuitry.
Chapter 2
MAINTENANCE
2.2Cleaning
The following procedures describe the recommended cleaning agents and the methods to be
used when cleaning the external and internal surfaces of the radio. External surfaces include the
front cover, housing assembly, and battery case. These surfaces should be cleaned whenever a
periodic visual inspection reveals the presence of smudges, grease, and/or grime.
NOTE
The only recommended agent for cleaning the external radio surfaces is a 0.5% solution of a mild
dishwashing detergent in water. The only factory recommended liquid for cleaning the printed
circuit boards and their components is isopropyl alcohol (100% by volume).
CAUTION: The effects of certain chemicals and their vapors can have harmful results on
certain plastics. Aerosol sprays, tuner cleaners, and other chemicals should be avoided.
1.Cleaning External Plastic Surfaces
2.Cleaning Internal Circuit Boards and Components
Internal surfaces should be cleaned only when the radio is disassembled for servicing or
repair.
The detergent-water solution should be applied sparingly with a stiff, non-metallic, shortbristled brush to work all loose dirt away from the radio. A soft, absorbent, lintless cloth or
tissue should be used to remove the solution and dry the radio. Make sure that no water
remains entrapped near the connectors, cracks, or crevices.
Isopropyl alcohol may be applied with a stiff, non-metallic, short-bristled brush to dislodge
embedded or caked materials located in hard-to-reach areas. The brush stroke should
direct the dislodged material out and away from the inside of the radio. Make sure that
controls or tunable components are not soaked with alcohol. Do not use high-pressure
air to hasten the drying process since this could cause the liquid to collect in unwanted
places. Upon completion of the cleaning process, use a soft, absorbent, lintless cloth to
dry the area. Do not brush or apply any isopropyl alcohol to the frame, front cover, or
back cover.
Page 18
2-2MAINTENANCE
NOTE
Always use a fresh supply of alcohol and a clean container to prevent contamination by
dissolved material (from previous usage).
3.0Safe Handling of CMOS and LDMOS
Complementary metal-oxide semiconductor (CMOS) devices are used in this family of radios.
CMOS characteristics make them susceptible to damage by electrostatic or high voltage
charges. Damage can be latent, resulting in failures occurring weeks or months later. Therefore,
special precautions must be taken to prevent device damage during disassembly,
troubleshooting, and repair.
Handling precautions are mandatory for CMOS circuits and are especially important in low
humidity conditions. DO NOT attempt to disassemble the radio without first referring to the CMOS
CAUTION paragraph in the Disassembly and Reassembly section of the manual.
4.0General Repair Procedures and Techniques
Parts Replacement and Substitution
When damaged parts are replaced, identical parts should be used. If the identical replacement
component is not locally available, check the parts list for the proper Motorola part number and
order the component from the nearest Motorola Communications parts center listed in the “Piece
Parts” section of this manual.
Rigid Circuit Boards
The family of radios uses bonded, multi-layer, printed circuit boards. Since the inner layers are
not accessible, some special considerations are required when soldering and unsoldering
components. The through-plated holes may interconnect multiple layers of the printed circuit.
Therefore, care should be exercised to avoid pulling the plated circuit out of the hole.
When soldering near the 18-pin and 40-pin connectors:
•avoid accidentally getting solder in the connector.
•be careful not to form solder bridges between the connector pins
•closely examine your work for shorts due to solder bridges.
Page 19
General Repair Procedures and Techniques2-3
Chip Components
Use either the RLN4062 Hot-Air Repair Station or the Motorola 0180381B45 Repair Station for
chip component replacement. When using the 0180381B45 Repair Station, select the TJ-65 minithermojet hand piece. On either unit, adjust the temperature control to 370 °C (700 °F), and
adjust the airflow to a minimum setting. Airflow can vary due to component density.
•To remove a chip component:
1.Use a hot-air hand piece and position the nozzle of the hand piece approximately 0.3 cm
(1/8") above the component to be removed.
2.Begin applying the hot air. Once the solder reflows, remove the component using a pair
of tweezers.
3.Using a solder wick and a soldering iron or a power desoldering station, remove the
excess solder from the pads.
•To replace a chip component using a soldering iron:
1.Select the appropriate micro-tipped soldering iron and apply fresh solder to one of the
solder pads.
2.Using a pair of tweezers, position the new chip component in place while heating the
fresh solder.
3.Once solder wicks onto the new component, remove the heat from the solder.
4.Heat the remaining pad with the soldering iron and apply solder until it wicks to the
component. If necessary, touch up the first side. All solder joints should be smooth and
shiny.
•To replace a chip component using hot air:
1.Use the hot-air hand piece and reflow the solder on the solder pads to smooth it.
2.Apply a drop of solder paste flux to each pad.
3.Using a pair of tweezers, position the new component in place.
4.Position the hot-air hand piece approximately 0.3 cm (1/8” ) above the component and
begin applying heat.
5.Once the solder wicks to the component, remove the heat and inspect the repair. All
joints should be smooth and shiny.
Page 20
2-4MAINTENANCE
Shields
Removing and replacing shields will be done with the R1070 station with the temperature control
set to approximately 215°C (415°F) [230°C (445°F) maximum].
•To remove the shield:
1.Place the circuit board in the R1070 circuit board holder.
2.Select the proper heat focus head and attach it to the heater chimney.
3.Add solder paste flux around the base of the shield.
4.Position the shield under the heat-focus head.
5.Lower the vacuum tip and attach it to the shield by turning on the vacuum pump.
6.Lower the focus head until it is approximately 0.3 cm (1/8”) above the shield.
7.Turn on the heater and wait until the shield lifts off the circuit board.
8.Once the shield is off, turn off the heat, grab the part with a pair of tweezers, and turn off
the vacuum pump.
9.Remove the circuit board from the R1070 circuit board holder.
•To replace the shield:
1.Add solder to the shield if necessary, using a micro-tipped soldering iron.
2.Next, rub the soldering iron tip along the edge of the shield to smooth out any excess
solder. Use solder wick and a soldering iron to remove excess solder from the solder
pads on the circuit board.
3.Place the circuit board back in the R1070 circuit board holder.
4.Place the shield on the circuit board using a pair of tweezers.
5.Position the heat-focus head over the shield and lower it to approximately 0.3 cm (1/8”)
above the shield.
6.Turn on the heater and wait for the solder to reflow.
7.Once complete, turn off the heat, raise the heat-focus head and wait approximately one
minute for the part to cool.
8.Remove the circuit board and inspect the repair. No cleaning should be necessary.
Page 21
Notes For All Schematics and Circuit Boards2-5
5.0Notes For All Schematics and Circuit Boards
* Component is frequency sensitive. Refer to the Electrical Parts List for value and usage.
1. Unless otherwise stated, resistances are in Ohms (k = 1000), and capacitances are in picofarads
(pF) or microfarads (µF).
2. DC voltages are measured from point indicated to chassis ground using a Motorola DC
multimeter or equivalent. Transmitter measurements should be made with a 1.2 µH choke in
series with the voltage probe to prevent circuit loading.
3. Interconnect Tie Point Legend:
Signal NameSignal Description
16_8MHz16.8MHz Reference Frequency from Synthesizer to ASFIC
3V3V RF regulator
5V5V RF regulator
5V_CHOptional 5V for Control Head
9V Regulated 9.3V Supply Voltage
9R9V to enable RX_INJ when RX_EN is active
ASFIC_CSASFIC Chip Select
B+13.8V Supply Voltage
BATT_SENSEBattery Voltage Sense Line
BOOT_EN_IN_CHBoot Mode Select
BW_SELSelect BW (12.5 KHz, 25 KHz)
CH_ACTChannel Activity Indicator Signal (Fast Squelch)
COMM_DATA_SEL_CHDisplay Driver Command/ Data Select
D3_V3Regulated 3.3V supply voltage for Voice Storage
DEMODAudio Output Signal from the Receiver IC
DETECTOR_AUDIO_SEND_BRDFlat Audio to Option Board
DISPLAY_CS_CHControl Head Chip Select
EMERGENCY_ACCES_CONNEmergency line to switch on the radio voltage regulators
EMERGENCY_SENSEEmergency sense to µP
EXTERNAL_MIC_AUDIO ACCES_CONNExternal (from accessory connector) microphone input
F1200Interrupt line from ASFIC CMP
FILT_SW_B+Switched 13.8 V supply voltage
FLAT_TX_AUDIO_INPUT_ACCESS_CONNFlat TX input from accessory connector
HANDSE RX_AUDIO_CHHandset Audio Output
HOOK_CHHang-up switch input
HSIOHigh Speed Clock In / Data Out
IGNITIONIgnition Line to switch on the radio’s voltage regulator
KEYPAD_COL_CHKeypad Matrix Column
LOC_DISTEnable Attenuator for RX line
LSIOLow Speed Clock In / Data Out
MIC_AUDIO_CHMicrophone Input
Page 22
2-6MAINTENANCE
MIC_PTT_CHMicrophone PTT Input
MOD_INModulation Signal from ASFIC
MOD_OUTModulation Signal to the Synthesizer
ONOFF_SENSEOn off sense switch
OPT_DATA_R_OPRDDATA/Ready Request from Option Board
OPT_EN_OPBDOption Board Chip Select
PA_BIASPA Control bias voltage
PA_CURRENTNot used
POST_LIMITER_TX
Flat TX Input from Option Board
AUDIO_RETURN_OPT_BRD
PROG x IN ACC yGeneral Purpose Input x accessory connector Pin y
PROG x INOUT ACC yGeneral Purpose Input/Output x accessory connector Pin y
PROG x OUT ACC yGeneral Purpose Input x accessory connector Pin y
PWR_SETPA Power Control Voltage
RESETReset Line
RSSIReceived Signal Strength Indicator
RXRX signal
RX AUD RTNOption Board Input/Output of Receiver Audio Path
RX_AUDIO_OUTPUT_ACCESS_CONNFlat or filtered audio to accessory connector
RX_ENEnable Receiving
RX_INJRF signal from VCO into the Receiver
SCI_CHBi-directional serial communication line
SHIFT_R_CSSPI Chip select for the Control Head
SPI_CLKSerial peripheral interface bus CLOCK
SPI_MISOSerial peripheral interface bus data IN
SPI_MOSISerial peripheral interface bus data OUT
SPKR-Negative Audio PA Speaker Output
SPKR-Negative Audio PA Speaker Output
SPKR+Positive Audio PA Speaker Output
SQ_DETSquelch Detect Signal
SYNTH_CSSynth Chip Select
SYNTH_LOCKµP Clock Lock Signal
TX AUDIO_RETURN_OPT_BRDOption Board Output to Transmit Audio Path
TX AUDIO_SEND_OPT_BRDMicrophone Audio to Option Board
TX_INJRF signal from the VCO to transmitter PA
TX_ENEnable transmitting
UNMUTED RX_AUDIO_SEND_OPT_BRDUnmuted filtered audio to option board
uP_CLKµP Clock signal
VoL_INDIRECTVolume Pot Input
VOXVoice operated transmit level
Page 23
Notes For All Schematics and Circuit Boards2-7
VS AUDIO_SELSwitch signal to Enable option board audio output signal
VS GAIN_SELVoice Storage Gain Select line
VS_MICVoice Storage Audio Signal to microphone path
VS_INTVoice Storage Interrupt line
VS_RACVoice storage Row Address Clock Signal
VSTBY3.3 V supply for µP when the radio is switched off
Page 24
2-8MAINTENANCE
Notes
Page 25
1.0Recommended Test Tools
Table 3-1 lists the service aids recommended for working on the radio. While all of these items are
available from Motorola, most are standard workshop equipment items, and any equivalent item
capable of the same performance may be substituted for the item listed.
Table 3-1 Service Aids
Chapter 3
SERVICE AIDS
Motorola Part
No.
RLN4460_Portable Test SetEnables connection to audio/accessory jack.
RVN4191_Customer Programming
Software (CPS) - Software on
CDROM & Global Tuner
RKN4081_Programming Cable with
Internal RIB
FKN8096_Data/Flash Adapter KeyUsed with RKN4081 (10 to 8 pin adapter for
RKN4083_Mobile Programming/Test Cable Connects radio to RIB (RLN4008_).via rear
FKN8113_Adapter CableUsed with RKN4083 (20 to 16 pin adapter for
GTF374_Program CableConnects RIB to Radio microphone input.
RLN4008_Radio Interface BoxEnables communications between radio and
DescriptionApplication
Allows switching for radio testing.
Programs customer options and channel data.
Includes radio interface box (RIB) capability.
front Telco connector with Data/Flash switch).
accessory connector
rear accessory connector).
computer’s serial communications adapter.
HSN9412_Wall-Mount Power SuppyUsed to power the RIB. (120 V ac)
HLN8027_Mini UHF to BNC AdaptorAdapts radio antenna port to BNC cabling of
8180384N64Housing Eliminator (25W)Test Fixture used to bench test the radio pcb.
3080369B71Computer Interface CableConnects the RIB to the Computer (25-pin).
3080369B72Computer Interface CableConnects the RIB to the Computer (9-pin)
6686119B01Removal ToolAssists in the removal of radio control head.
6680334F39Hex ToolAssists in the removal of antenna connector.
test equipment.
(Use for IBM PC AT - other IBM models use
the B71 cable above).
Page 26
3-2SERVICE AIDS
2.0Test Equipment
Table 3-2 lists test equipment required to service the radio and other two-way radios.
Table 3-2 Recommended Test Equipment
Motorola Part No.DescriptionCharacteristicsApplication
R2000, R2600,
R2400, or R2001
with trunking
option for Privacy
Service MonitorThis monitor will
substitute for items
listed below with an
asterisk *
Frequency/deviation meter and
signal generator for wide-range
troubleshooting and alignment
Plus™ and
Smartnet
Systems™
†
*R1049Digital MultimeterTwo meters recommended for AC/
DC voltage and current
measurements
*S1100Audio Oscillator67 to 200Hz tonesUsed with service monitor for
S1348 (prog)DC Power Supply0-20 Vdc, 0-20 AmpsBench supply for 13.8Vdc
Page 27
M
CM200/CM300/PM400
Radios
Control Head
Service Information
Issue: November, 2007
Page 28
ii
Computer Software Copyrights
The Motorola products described in this manual may include copyrighted Motorola computer programs stored
in semiconductor memories or other media. Laws in the United States and other countries preserve for
Motorola certain exclusive rights for copyrighted computer programs, including the exclusive right to copy or
reproduce in any form, the copyrighted computer program. Accordingly, any copyrighted Motorola computer
programs contained in the Motorola products described in this manual may not be copied or reproduced in
any manner without the express written permission of Motorola. Furthermore, the purchase of Motorola
products shall not be deemed to grant, either directly or by implication, estoppel or otherwise, any license
under the copyrights, patents or patent applications of Motorola, except for the normal non-exclusive
royalty-free license to use that arises by operation of law in the sale of a product.
1.0Control Head CM200 Troubleshooting Chart.......................................................3-1
1.1Control Head Failure ......................................................................................3-1
1.2Button/Tones Select Error (Page 1 of 2) ........................................................3-2
1.3Button/Tones Select Error (Page 2 of 2) ........................................................3-3
2.0Control Head CM300/PM400 Troubleshooting Chart ..........................................3-4
2.1Control Head Failure ......................................................................................3-4
2.2Button/Tones Select Error (Page 1 of 2) ........................................................3-5
2.3Button/Tones Select Error (Page 2 of 2) ........................................................3-6
Chapter 4CONTROL HEAD PCB / SCHEMATICS / PARTS LISTS
1.0Allocation of Schematics and Circuit Boards .......................................................4-1
2.0Control Head CM200 - PCB 8488998U01 / Schematics .....................................4-3
Page 30
iv
2.1Control Head PCB 8488998U01 Parts List ....................................................4-5
3.0Control Head CM300/PM400 - PCB 8489714U01 / Schematics......................... 4-6
3.1Control Head PCB 8489714U01 Parts List ....................................................4-8
Page 31
1.0CM200 Model
The control head contains the internal speaker, the on/off/volume knob, the microphone connector,
several buttons to operate the radio, three indicator Light Emitting Diodes (LED) to inform the user
about the radio status, and a single character 7-segment display for numeric information e.g.
channel number.
Chapter 1
OVERVIEW
2.0CM300/PM400 Models
The control head contains the internal speaker, the on/off/volume knob, the microphone connector,
several buttons to operate the radio, three indicator Light Emitting Diodes (LED) to inform the user
about the radio status, and an 8 character Liquid Crystal Display (LCD) for alpha - numerical
information e.g. channel number or call address name.
PERS4
P1P3P4
P2
PERS4
CM300
PM400
P1P3P4
P2
Page 32
1-2OVERVIEW
Notes
Page 33
1.0Introduction
This Chapter provides a detailed theory of operation for the Control head circuits. For details of the
trouble shooting refer to the related chapter in this section.
2.0Control Head Model for CM200
The head contains the internal speaker, the on/off/volume knob, the microphone connector, several
buttons to operate the radio and three indicator Light Emitting Diodes (LED) to inform the user about
the radio status and a 7-segment display for numeric information.
Chapter 2
THEORY OF OPERATION
7-segment
7-segment
display
display
4
DTMF
DTMF
Resistors
Resistors
Keypads
Keypads
2.1Power Supplies
BCD To
BCD To
7-segment
7-segment
Control line
Control line
Boot_res / SCI
Boot_res / SCI
DTMF
DTMF
Row/Column
Row/Column
Mux.
Mux.
Control
Control
Keypad
Keypad
Backlight
Backlight
9.3VRow/Column
9.3VRow/Column
Shift
Shift
Register
Register
9.3V
9.3V
PTT
PTT
circuit
circuit
Boot_res (DTMF-
Boot_res (DTMFColumn)/ SCI
Column)/ SCI
(DTMF-Row)
(DTMF-Row)
2 pin speaker
2 pin speaker
connector
connector
The power supply to the head is taken from the host radio’s 9.3V via connector J803-9, The 9.3V is
used for the LEDs and back light, the 5V is used for the LCD driver and level shifter. The stabilized
3V is used for the other parts.
2.2SPI Interface
The host radio (master) communicates with the head through its SPI bus. Three lines are
connected to the shift register (U801):SPI clock (J803-17), SPI MOSI (J803-16) and shift register
chip select (J803-15).
Page 34
2-2THEORY OF OPERATION
When the host radio needs to send date to the shift register, the radio asserts the shift register chip
select and the data is loaded to the shift register. For example, the host radio sends data to change
display channel or change LED status.
2.3Keypad Keys
The head keypad is a four-key design. All keys are configured as two analog lines read by µP. The
voltage on the analog lines varies between 0V and 3.3 V depending on which key is pressed. If no
key is pressed, the voltage at both lines is 3.3V. The key configuration can be thought of as a matrix
where the two lines represent one row and one column. Each line is connected to a resistive divider
powered by 3.3V. If a button is pressed, it will connect one specific resistor of each divider line to
ground level and thereby reduce the voltages on the analog lines. The voltages of the lines are A/D
converted inside the µP (ports PE 6 - 7) and specify the pressed button. To determine which key is
pressed, the voltage of both lines must be considered.
The same analog lines also support a keypad microphone. A microphone key press is processed in
the same manner like a head key press.
2.4Status LED’s and Back Light Circuit
All indicator LEDs (red, yellow, and green) are driven by current sources. To change the LED status
the host radio sends a data message to the head shift register via the SPI bus. The head shift
register determines the LED status from the received data and switches the LEDs on or off via Q5Q7.
The back light for the keypad is always on. The back light current for the keypad is drawn from the
9.3 V source and led by two current sources. The LED current is determined by the resistor at the
emitter of the respective current source transistor.
2.5Microphone Connector Signals
The MIC_PTT line (J802-3) is grounded when the PTT button on the microphone is pressed. When
released, this line is pulled to 9.3V by R805. Two transistor stages (Q802, Q801 and associated
parts) are used to level shift between 9.3V and 3.3V required for the uP while keeping the same
sense (active low for PTT pressed).
Two of the mic socket lines (J802-2,7) have dual functions depending on the type of microphone or
SCI lead connected. An electronic switch (U803) is used to switch these two lines between mic
keypad operation or SCI operation. The switch (mux) is led by the uP through J803-20 with level
shifting (and inversion) provided by transistor Q812. When MUX_CTRL (J803-20) is low the
electronic switch is in the mic keypad mode. The mic socket (J802) pin 2 is connected to the keypad
row line that goes to J803-13 and pin 7 is connected to the keypad column line that goes to J803-12.
When MUX_CTRL (J803-20) is high the electronic switch is in the SCI mode. The mic socket (J802
pin 2) is connected to the SCI line that goes to J803-4 and pin 7 is connected to the BOOT_RES line
that goes to J803-11.
The HOOK line (J802-6) is used to inform the uP which type of microphone or SCI lead is connected
to the microphone socket. The voltage of the HOOK line is monitored by the uP (port PE0,
MIC_SENSE) through a resistor divider on the main board. When the HOOK line is grounded (on
hook condition) or floating (2.8V nominal), the uP sets the mux (U803) for keypad operation to allow
the use of microphones with a keypad. When the HOOK line is connected to 9.3V, the uP sets the
mux for SCI operation. This mode is also used to select low cost mic operation where the gain of the
microphone path is increased (on the main board) to compensate for not having a pre-amp in the low
cost mic.
Page 35
Control Head Model for CM2002-3
If the BOOT_RES (J802-7) line is connected to >5V (e.g. 9.3V) at turn-on, the uP will start in boot
mode instead of normal operation. This mode is used to programme new firmware into the FLASH
memory (U404 mainboard).
2.6Speaker
The head contains a speaker for the receiver audio. The receiver audio signal from the differential
audio output of the audio amplifier located on the radio’s ler is fed via connector J803-1, 2 to the
speaker connector P801 pin 1 and pin 2. The speaker is connected to the speaker connector P801.
The control head speaker must be disconnected if an external speaker, connected on the accessory
connector, is used.
2.7Electrostatic Transient Protection
Electrostatic transient protection is provided for the sensitive components in the control head by
diodes VR801, VR802, VR803 and VR804. The diodes limit any transient voltages to tolerable
levels. The associated capacitors provide Radio Frequency Interference (RFI) protection.
Page 36
2-4THEORY OF OPERATION
3.0Control Head Model for CM300/PM400
The control head contains the internal speaker, the on/off/volume knob, the microphone connector,
several buttons to operate the radio, three indicator Light Emitting Diodes (LED) to inform the user
about the radio status, and an 8 character Liquid Crystal Display (LCD) for alpha - numerical
information e.g. channel number or call address name.
9.3V
9.3V
LCD
LCD
LED
LED
Backlight
Backlight
Backlight
Backlight
Control
Control
Keypad
Keypad
Resistors
Resistors
Keypads
Keypads
3.1Power Supplies
The power supply to the control head is taken from the host radio’s 9.3V via connector J103-9, The
9.3V is used for the LEDs and back light, the 5V is used for the LCD driver (U3) and level shifter
(U4). The stabilized 3V is used for the other parts.
LED
LED
Indicators
Indicators
Boot_Res / SCI
Boot_Res / SCI
DTMF
DTMF
Row/Column
Row/Column
Row/Column
Row/Column
Control line
Control line
Mux.
Mux.
Control
Control
LCD
LCD
Driver
Driver
Shift
Shift
Register
Register
Level
Level
Shifter
Shifter
PTT
PTT
circuit
circuit
Boot_Res (DTMF-
Boot_Res (DTMFColumn)/ SCI
Column)/ SCI
(DTMF-Row)
(DTMF-Row)
9.3V
9.3V
8 pin JACK
8 pin JACK
connector
connector
2-pin speaker
2-pin speaker
connector
connector
3.2SPI Interface
The host radio (master) communicates with the control head through its SPI bus. Three lines are
connected to the shift register (U8):SPI clock (J103-17), SPI MOSI (J103-16), shift register chip
select (J103-15) and LCD driver chip select (J103-18).
When the host radio needs to send date to the shift register, the radio asserts the shift register chip
select and the data is loaded to the shift register. For example, the host radio sends data to change
display channel or change LED status.
Page 37
Control Head Model for CM300/PM4002-5
3.3Keypad Keys
The control head keypad is a four-key design. All keys are configured as two analog lines read by
µP. The voltage on the analog lines varies between 0V and 3.3 V depending on which key is
pressed. If no key is pressed, the voltage at both lines is 3.3V. The key configuration can be thought
of as a matrix where the two lines represent one row and one column. Each line is connected to a
resistive divider powered by 3.3V. If a button is pressed, it will connect one specific resistor of each
divider line to ground level and thereby reduce the voltages on the analog lines. The voltages of the
lines are A/D converted inside the µP (ports PE 6 - 7) and specify the pressed button. To determine
which key is pressed, the voltage of both lines must be considered.
The same analog lines also support a keypad microphone. A microphone key press is processed in
the same manner like a control head key press.
3.4LCD Driver
The LCD (36 x 4 segemnts) is controlled by U3. It has an on onboard clock controlled by R28
(typically 20kHz measured on pin 2). U3 is operated from the 5V supply and is controlled over the
SPI bus (SPI_CLK J103-17, SPI_MOSI J103-16, LCD chip select J103-18). Chip select is active low.
U2 is used to provide level shifting between the 3.3V logic from the uP and the 5V required by U3.
3.5Status LED’s and Back Light Circuit
All indicator LEDs (red, yellow, and green) are driven by current sources. To change the LED status
the host radio sends a data message to the control head shift register via the SPI bus. The control
head shift register determines the LED status from the received data and switches the LEDs on or
off via Q8-Q10.
Backlighting for the LCD and keys is provided by a matrix of 21 LEDs arranged in 7 columns of 3
rows. The LEDs are driven from a constant current circuit (Q12, U1 and associated parts). There are
4 levels of baclight: off, low, medium and high, which are controlled by two outputs (pins 15, 1) from
the shift register (U8). The current is controlled by transistor Q12. The op amp U1 monitors the
current by measuring the voltage drop across R26, R27 and adjusting the bias of Q12 to achieve the
required level as set by the combined shift register o/ps. When in the off state, Q11 is also turned on
to clamp the base of Q12 so as to force it off. This ensures that the LEDs are fully off. Q11 is
controlled by pin 3 of the shift register U8.
3.6Microphone Connector Signals
The MIC_PTT line (J102-3) is grounded when the PTT button on the microphone is pressed. When
released, this line is pulled to 9.3V by R33. Two transistor stages (Q14, Q13 and associated parts)
are used to level shift between 9.3V and 3.3V required for the uP while keeping the same sense
(active low for PTT pressed).
Two of the mic socket lines (J102-2, 7) have dual functions depending on which type of microphone
or SCI lead that is connected. An electronic switch (U41) is used to switch these two lines between
mic keypad operation or SCI operation. The switch (mux) is controlled by the uP through J103-20
with level shifting (and inversion) provided by transistor Q41. When MUX_CTRL (103-20) is low the
electronic switch is in the mic keypad mode. The mic socket (J102) pin 2 is connected to the keypad
row line that goes to J103-13 and pin 7 is connected to the keypad column line that goes to 103-12.
When MUX_CTRL (103-20) is high the electronic switch is in the SCI mode. The mic socket (J102
pin 2) is connected to the SCI line that goes to J103-4 and pin 7 is connected to the BOOT_RES line
that goes to J103-11.
Page 38
2-6THEORY OF OPERATION
The HOOK line (J102-6) is used to inform the uP which type of microphone or SCI lead is connected
to the microphone socket. The voltage of the HOOK line is monitored by the uP (port PE0,
MIC_SENSE) through a resistor divider on the main board. When the HOOK line is grounded (on
hook condition) or floating (2.8V nominal), the uP sets the mux (U8) for keypad operation to allow the
use of microphones with a keypad. When the HOOK line is connected to 9.3V, the uP sets the mux
for SCI operation. This mode is also used to select low cost mic operation where the gain of the
microphone path is increased (on the main board) to compensate for not having a pre-amp in the low
cost mic.
If the BOOT_RES (J102-7) line is connected to >5V (e.g. 9.3V) at turn-on then the uP will start in
boot mode instead of normal operation. This mode is used to programme new firmware into the
FLASH memory (U404 mainboard).
3.7Speaker
The control head contains a speaker for the receiver audio. The receiver audio signal from the
differential audio output of the audio amplifier located on the radio’s controller is fed via connector
J103-1, 2 to the speaker connector P101 pin 1 and pin 2. The speaker is connected to the speaker
connector P101. The control head speaker must be disconnected if an external speaker, connected
on the accessory connector, is used.
3.8Electrostatic Transient Protection
Electrostatic transient protection is provided for the sensitive components in the control head by
diodes VR1 - VR4. The diodes limit any transient voltages to tolerable levels. The associated
capacitors provide Radio Frequency Interference (RFI) protection.
Page 39
TROUBLESHOOTING CHARTS
1.0Control Head CM200 Troubleshooting Chart
1.1Control Head Failure
Control Head Check
Chapter 3
Back light
OK ?
YES
Power-up
Alert Tone
OK ?
YES
Power-up
Red LED
Flash?
YES
Channel
Display
OK?
YES
No
No
No
No
Check 9.3V on
R808, R809
Check Speaker
Connection
Check
D801, Q806, U801
Check
DS801, U801, U802
Up/Down
P1 and P2
Alert Tone
Buttons OK?
YES
EXT
PTT
OK ?
Communication Ok
Control Head is OK
No
YES
No
Check R845, R846
R810, R811
Check Q801, Q802
No
Check Q803, Q812
Page 40
3-2TROUBLESHOOTING CHARTS
1.2Button/Tones Select Error (Page 1 of 2)
Button/Tones Check
Check Voltage Levels on
TP401 (Keypad Col)
and TP402 (Keypad Row)
(see table on next page)
Right
Voltage
Up Key
?
No
YES
Right
Voltage
on Down Key
?
No
YES
Right
Voltage
on P1/P2
Keys ?
No
YES
Connect DTMF Mic
to TELCO Connector
Check R846, R811
on Control Head
Check R845, R810
on Control Head
Check R813, R814
on Control Head
Is there
0.75 Vdc on
MIC_SENSE
R429, on radio
A
No
Check Control Head
connectivity continuity
and R429, R430, D401
(main board)
Page 41
Control Head CM200 Troubleshooting Chart3-3
1.3Button/Tones Select Error (Page 2 of 2)
A
Right
Voltage
on DTMF keys
?
Button/Tones Keys
Okay
Key_Col
No
YES
Does Q812
on Control Head
operates well
?
No
YES
Replace U803
on Control Head
Key_Column Voltage TP401
Replace
Q812
Voltage
(TP401)
0.008 VUp
0.008 V0.675 V1.346 V1.997 V2.650 V3.300 V
0.675 V123
1.346 V 4567
1.997 V890*
2.650 V#CBA
3.300 V
Down
Key_Row Voltage TP402
Left KeyP1Right Key
P2
Idle
Page 42
3-4TROUBLESHOOTING CHARTS
2.0Control Head CM300/PM400 Troubleshooting Chart
2.1Control Head Failure
Control Head Check
Back light
OK ?
YES
Power-up
Alert Tone
OK ?
YES
Indicator
LED’
OK ?
YES
Display
OK?
YES
No
Check 9.3V on
Q12, U1 and associated
parts and U8
No
Check Speaker
Connection
No
S
No
Q8-Q10, U8 and 9.3V
Check
Check LCD
connections, U3 for 5V,
Osc. pins 1 & 2 activity
SCI thru via U4
Communication Ok
Up/Down
P1 and P2
Alert Tone
Buttons
OK?
YES
EXT
PTT
No
OK ?
YES
Control Head is OK
No
Check keypad resistors
Check Q13, Q802
No
Check Q803, Q14 and
associated parts
Page 43
Control Head CM300/PM400 Troubleshooting Chart3-5
2.2Button/Tones Select Error (Page 1 of 2)
Button/Tones Check
Check Voltage Levels on
TP401 (Keypad Col)
and TP402 (Keypad Row)
(see table on next page)
Right
Voltage
Up Key?
No
YES
Right
Voltage
on Down
Key?
No
YES
Right
Voltage
on P1-P4
Keys ?
No
YES
Connect DTMF Mic
to TELCO Connector
Check R13, R45
on Control Head
Check R12, R49
on Control Head
Check R31, R29
R51, R11
on Control Head
Is there
0.75 Vdc on
MIC_SENSE
R429, on radio
A
No
Check Control Head
connectivity continuity
and R429, R430, D401
(Main Board)
Page 44
3-6TROUBLESHOOTING CHARTS
2.3Button/Tones Select Error (Page 2 of 2)
A
Right
Voltage
on DTMF keys
?
Button/Tones Keys
Okay
Key_Col
No
YES
Does Q41
on Control Head
operates well
?
No
YES
Replace U8
on Control Head
Key_Column Voltage TP401
Replace
Q41
Voltage
(TP401)
0.008 VUp
0.008 V0.675 V1.346 V1.997 V2.650 V3.300 V
0.675 V123
1.346 V 4567
1.997 V890*
2.650 V#CBA
3.300 V
Down
Key_Row Voltage TP402
Left KeyP1Right Key
P2
P3P4Idle
Page 45
CONTROLHEAD PCB / SCHEMATICS / PARTS LISTS
1.0Allocation of Schematics and Circuit Boards
Table 4-1 Control Head Diagrams and Parts Lists
PCB :
Control Head CM200
8488998U01 Main Board Top Side
8488998U01 Main Board Bottom Side
SCHEMATICS
Sheet 1 of 1
Parts List
8488998U01Page 4-5
Table 4-2 Control Head Diagrams and Parts Lists
PCB :
Control Head CM300/PM400
8489714U01 Main Board Top Side
8489714U01 Main Board Bottom Side
Page 4-3
Page 4-3
Page 4-4
Page 4-6
Page 4-6
Chapter 4
SCHEMATICS
Sheet 1 of 1
Parts List
8489714U01Page 4-8
Page 4-7
Page 46
4-2CONTROLHEAD PCB / SCHEMATICS / PARTS LISTS
Notes
Page 47
Control Head CM200 - PCB 8488998U01 / Schematics4-3
2.0 Control Head CM200 - PCB 8488998U01 / Schematics
SHOWN FROM SIDE 1
D801
S801
D805
J802
D804
SH1
DS801
S802
J805
J804
D806
D802
D803
1
1
1 1 1
1
1
1
M801
8488998u01_p3
SHOWN FROM SIDE 2
C801
C802
C803
C804
C805
C806
C807
C808
C809
C810
C811
C812
C813
C814
C815
C816
C817
C818
C819
C820
C821
C822
C823
C824
C825
C826
C827
C832
C833
C834
C836
M802
M803
M804
P801
Q802
Q803
Q804
Q805
Q806
Q811
Q812
R801
R802
R803
R804
R805
R806
R807
R808
R809
R810
R811
R813
R816
R818
R819
R820
R821
R822
R823
R824
R825
R826
R827
R829
R830
R831
R832
R833
R834
R839
R840
R841
R842
R843
R844
R845
R846
R847
R848
R849
R850
U801
VR802VR803
VR804
Q801
R842
J803
Control Head CM200 PCB 8488998U01
Top Side
Bottom Side
Page 48
4-4Control Head CM200 - PCB 8488998U01 / Schematics
DNP
Change to 1%
Change to 1%
COL
ROW
COL
DNP
DNPDNP
DNP
DNP
UP
DOWN
DNP
DNP
DNP
ROW
Change to 1%
Change to 1%
Change to 1%
Place under the 7-segment
MIC. PTT
MIC. AUDIO
SPI_MOSI
HOOK
RX. AUDIO
SPKR-
SPKR+
SPKR-
SPKR+
KEY_ROW
KEY_COL
COM/DATA_SEL
SPI_CLK
SH_R_CS
DISP_CS
DIS_RES
BOOT_RES
BOOT_RES
DNP
F1
F2
DNP
RED LED
GREEN LED
YELLOW LED
DNPDNPDNP
THESE ARE THE
ESD PROTECTION
MAIN BOARD CONNECTOR
MICROPHONE CONNECTOR
SPEAKER CONNECTOR
HOOK
9.3 V
MIC. AUDIO
MIC. PTT
SCI
RX. AUDIO
KEYPAD BACKLIGHT
CONTACTS (SPRINGS)
SCI
J803-22
220.p
R845
51.K
R846
VR803
G2
J803-21
G1
J803-10
18
10
BI
J803-18
19
J803-19
6
J803-6
J803-4
1
4
J803-1
J803-13
13
17
J803-17
7
9
J803-9
J803-7
12
DISPL_CS
J803-12
20
J803-20
J803-8
8
CH_PTT
J803-5
5
3
J803-3
J803-11
11
J803-15
OE
TELCO_PTT
CH_PTT
TELCO_PTT
COMM_CATH_2
ANODE_B
ANODE_A
HDSP-513G
15
16
S802
4
S801
6C65
C5
C4
2
J803-16
R809
3.3K
J803-2
D3_3V
SH1
432
1
SHIELD
0.
PIN2
2
R850
CONTACT
13K
PIN22PIN1
1
J804
CONTACT
R848
PIN1
1
J805
10.K
R849
R844
10.K
R847
D3_3VD3_3V
51.K
10.K
C836
9_3V
R843
10.K
Q812
9_3V
Q811
10.K
22.K
R840
R842
22.K
R839
9_3V9_3V
R832
20.K20.K
R831
R841
C833
100n
10.K
0.
0.
R834
100n
R833
13
X1
MC14053B
3
C832
C
9
B
10
11
Z1
Z0
5
Z
4
Y1
1
Y0
2
Y
15
X0
12
X
14
VEE
7
VCC
16
GND
8
EN
6
1
M804
A
U803
C834
1
M803
22.n
1
M801
C817
1
M802
20.
VDD
16
LT
3
LE
5
G
VR804220.p
C2
11
C1
2
BI4B2
U802
VSS
8
14
F
15
E
9
D2
10
D1
6
C824
12
B1
1
A2
13
A1
7
MC14511BFEL
220.p
C826
220.p
220.p220.p
C818C816
220.p
C819C821
220.p
C820
220.p
220.p
C822
C803
220.p
C801
220.p
C805
220.p220.p 220.p
C809C807C811
220.p
C813
220.p
220.p
C814
220.p
C812
220.p
C810C806
220.p
C808
220.p 220.p
220.p
9_3VD3_3V
9_3V
C804
9_3V
9_3V
9_3V
9_3V
D3_3V
D3_3V
C802
9_3V D3_3V
33.
33.
R827
33.
R825
R826
R824
R823
R822
33.
33.
33.
33.
R821
1n
C823
10.K
Q802
47.K
R807
R806
10.K
R805
47.K
47.K
R804
Q801
R803
680.
R802
R820
680.
3
C3
2
C2
1
C1
TOUCH_SW_MARLIN
3
C3
2C21
C1
TOUCH_SW_MARLIN
6
C65C5
4
C4
10u
0.
C815
R830
R810
470.
HSMG-C670
D806
R808
300.
0.
R801
HSMG-C670
D804
1
J802-1
5
J802-5
2
J802-2
4
J802-4
3
J802-3
7
J802-7
6
J802-6
8
J802-8
DS801
COMM_CATH_1
ANODE_G
ANODE_F
ANODE_E
ANODE_DP
ANODE_D
ANODE_C
OE
DISPL_CS
BI
R811
0.
22K
R813R816
D801
13K
D802
HSMH-C670
D803
HSMY-C670
Q804
HSMG-C670
Q805
Q806
1
P801-1
2
P801-2
R818R819
3.9K
C825
680.
CLK_L
12
U801
100n
Q4
4
Q3
3
Q2
2
Q1
1
Q0
15
GND
8
EN_OE
13
CLK_S
11
VCC
16
SEROUT9SERIN
14
RESET
10
Q7
7
Q6
6
Q5
5
MC74HC595A
C827
100n 10.K
R829
Q803
20.0
VR802
VR801
20.0
20.0
HSMG-C670
14
J803-14
D805
10K
47K
47K
10K
47K
10K
47K
10K
47K
10K
47K
10K
47K
73B02964C39-O
10K
Control Head CM200 Schematic
Page 49
Control Head CM200 - PCB 8488998U01 / Schematics4-5
2.1 Control Head PCB 8488998U01 Parts
List
Circuit
Ref
Motorola
Part No
Description
C8022113740F59 CAP CHIP REEL CL13
C8042113740F59 CAP CHIP REEL CL13
C8052113740F59 CAP CHIP REEL CL13
C8062113740F59 CAP CHIP REEL CL13
C8082113740F59 CAP CHIP REEL CL13
C8092113740F59 CAP CHIP REEL CL13
C8102113740F59 CAP CHIP REEL CL13
C8112113740F59 CAP CHIP REEL CL13
C8122113740F59 CAP CHIP REEL CL13
C8132113740F59 CAP CHIP REEL CL13
C8142113740F59 CAP CHIP REEL CL13
C8162113740F59 CAP CHIP REEL CL13
C8172113740F59 CAP CHIP REEL CL13
C8182113740F59 CAP CHIP REEL CL13
C8192113740F59 CAP CHIP REEL CL13
C8202113740F59 CAP CHIP REEL CL13
C8222113740F59 CAP CHIP REEL CL13
C8232113743K15 CER CHIP CAP .100uF
C8242113740F59 CAP CHIP REEL CL13
C8252113743K15 CER CHIP CAP .100uF
C8262113740F59 CAP CHIP REEL CL13
C8272113743K15 CER CHIP CAP .100uF
C8322113743K15 CER CHIP CAP .100uF
C8332113743K15 CER CHIP CAP .100uF
C8342113743E07 CER CHIP CAP .022uF
C8362113740F59 CAP CHIP REEL CL13
D8014805729G74 LED SMT RED HP
D8024805729G73 LED SMT YEL HP
D8034805729G75 LED SMT GREEN HP
D8044805729G75 LED SMT GREEN HP
D8054805729G75 LED SMT GREEN HP
D8064805729G75 LED SMT GREEN HP
DS801 5180353L02 7-SEGMENT DISPLAY
J8020908353Y02 MODULAR 8-PIN STR
J8030989241U02 FLEX 20-PIN 1mmTOP NON
M801 7588823L03 PAD GROUNFD LCD
M802 7588823L03 PAD GROUNFD LCD
M803 7588823L03 PAD GROUNFD LCD
M804 7588823L03 PAD GROUNFD LCD
P8012809926G01 CONN 1.25MM 2PIN SURMT
Q8014809940E02 TSTR NPN DIG DTC114YE
Q8024813824A10 TSTR NPN 40V .2A GEN P
Q8034809940E02 TSTR NPN DIG DTC114YE
Q8044809940E02 TSTR NPN DIG DTC114YE
Q8054809940E02 TSTR NPN DIG DTC114YE
Q8064809940E02 TSTR NPN DIG DTC114YE
Q8114809940E02 TSTR NPN DIG DTC114YE
Q8124809940E02 TSTR NPN DIG DTC114YE
R8010662057A01 CHIP RES 10 OHMS 5%
R8020662057A61 CHIP RES 330 OHMS 5%
R8030662057A89 CHIP RES 47K OHMS 5%
R8040662057A89 CHIP RES 47K OHMS 5%
R8050662057A73 CHIP RES 10K OHMS 5%
R8060662057A89 CHIP RES 47K OHMS 5%
R8070662057A73 CHIP RES 10K OHMS 5%
R8080662057A36 CHIP RES 300 OHMS 5%
R8090662057A45 CHIP RES 680 OHMS 5%
R8100662057B47 CHIP RES 0 OHMS +0.5
R8110662057B47 CHIP RES 0 OHMS +0.5
R8130662057D08 CHIP RES 22K OHMS 5%
R8160662057D03 CHIP RES 13K OHMS 5%
R8180662057A63 CHIP RES 3900 OHMS 5%
R8190662057A45 CHIP RES 680 OHMS 5%
R8200662057A45 CHIP RES 680 OHMS 5%
R8210662057A13 CHIP RES 33 OHMS 5%
R8220662057A13 CHIP RES 33 OHMS 5%
R8230662057A13 CHIP RES 33 OHMS 5%
R8240662057A13 CHIP RES 33 OHMS 5%
R8250662057A13 CHIP RES 33 OHMS 5%
R8260662057A13 CHIP RES 33 OHMS 5%
R8270662057A13 CHIP RES 33 OHMS 5%
R8290662057A73 CHIP RES 10K OHMS 5%
Circuit
Ref
Motorola
Part No
Description
R8300662057A41 CHIP RES 470 OHMS 5%
R8410662057A73 CHIP RES 10K OHMS 5%
R8420662057A73 CHIP RES 10K OHMS 5%
R8430662057A73 CHIP RES 10K OHMS 5%
R8440662057A73 CHIP RES 10K OHMS 5%
R8450662057A90 CHIP RES 51K OHMS 5%
R8460662057A90 CHIP RES 51K OHMS 5%
R8490662057D03 CHIP RES 13K OHMS 5%
Circuit
Ref
Motorola
Part No
Description
Page 50
4-6Control Head CM300/PM400 - PCB 8489714U01 / Schematics
3.0 Control Head CM300/PM400 - PCB 8489714U01 / Schematics
C40
4
3
2
1
Q12
R19
R26
R27
R20
R24
1
4
58
U1
C11
C26
Q11
C17
R18
C35 C36
2
P101
C19
C23
1
4
58
U18
C21
C22
R11
M4
12
24
37
48
U3
M3
R28
R39
R6R7R8
R9
C18
C30
C32
C33
R30
C16
C20
C25 R10
R15
C39
R29
R51
7
8
14
U2
1
J103
C4
C8
C27
C38
C44
C45
C46
C47
C48
C49
C50
C51
C52
C53
C54
C55
C24
R13
R25
R44
R45
R46
R21
R22
R23
Q8 Q9
Q10
16
1
8
9
U8
C7
C15
R14
R40
C1
C14
C58
R16
R17
R31
R54
R3
C56
M2
Q41
R41
16
1
8
9
U41
C2
C3
C5
C29
C34
C42
R42
R43
C6
VR1VR2VR3 VR4
C43
Q13
Q14
R33
R37
R38
M1
C41
R12
R34
R35
R36
R48
R49
R50
8756321
4
9
J102
1
S6
D2
1
S5
D4
1
S3
D26
1
S4
D9
1
S1
D20
1
S2
D10
D18
D19
D3
D14
D17
D24
D27
D5
D8
D11
D15
D16
D21
DS1
D12
D13
D22
D23
D25
Control Head CM300/PM400 PCB 8489714U01
Top Si de
Bottom Side
Page 51
Control Head CM300/PM400 - PCB 8489714U01 / Schematics4-7
10K
47K
10K
47K
10K
47K
10K
47K
10K
47K
10K
47K
9.3 V
F1
+
F2
MIC. AUDIO
MIC. PTT
KEY_ROW
KEY_COL
SPI_CLK
-
SPEAKER CONNECTOR
HOOK
MICROPHONE CONNECTOR
MAIN BOARD CONNECTOR
ESD CONTACTS
DIS_RES
DISP_CS
COM/DATA_SE
L
SH_R_CS
BOOT_RES
BOOT_RES
SCI
MIC. PTT
SPKR+
SPKR-
UP
DOWN
SPI_MOSI
HOOK
RX. AUDIO
SCI
SPKR+
SPKR-
MIC. AUDIO
F4F3
RX. AUDIO
0.1uF
C22
Y1C
ZA
14
ZB
15
ZC
4
C23
1000pF
VDD
16
VEE7VSS
8
YOA
12
Y0B
2
Y0C
5
13
Y1A
Y1B
1
3
U41
HEF4053B
EN
6
11
SA
SB
10
9
SC
R13
51K
D12
HSMG-C670
D3_3V
19
HSMG-C670
D10
J102-88
J103-19
10
J102-77
C43
J103-10
470pF
C54
0.1uF
R36
47K
HSMG-C670
9_3V
R28
D25
P101-22
680K
51K
R12
R27
10
R7
10K
HSMG-C670
D17
DNF
C55C6
6
10K
R34
S2
C11C2
2
C33C4
4
D23
HSMG-C670
TOUCH_SW
DNF
D14
HSMG-C670
0
R9
MC74HCT04A
U2-6
13 12
12
DNF
C4
1000pF
4
C4
5C56
C6
DNF
TOUCH_SW
S6
TOUCH_SW
S3
1C12
C2
3
C3
10K
R8
DNF
U2-5
MC74HCT04A
11 10
DNF
HSMG-C670
D8
C29
DNF
1000pF
8
DNF
0
R10
U2-4
MC74HCT04A
9
680
DNF
R20
10K
6
C6
9_3V
R23
1
C1 C2
2
3C34
C4
5
C5
D2
HSMG-C670
TOUCH_SW
DNF
S1
1K
R18
10K
R15
100pF
DNF
DNF
J103-1313
C33
220pF
C53
DNF
C35
M3
6
D3_3V
DNF
1000pF
C30
9_3V
J102-6
DNF
100pF
D19
HSMH-C670
12
5V_IN
DNF
C20
2.2uF
Q41
J103-12
2.2uF
MC74HCT04A
U2-2
34
C19
J103-1111
9_3V
HSMG-C670
D9
DNF
1000pF
C27
D18
HSMY-C670
DNF
1000pF
C41
4
47K
R38
2
3
1
8
4
9_3V
J102-4
4
V3
5
VDD
7
VREG
16
VSS
6
U1-1
LM2904
SEG421SEG522SEG623SEG724SEG8
25
26
SEG9
9
SI
V1
3
V2
42
43
SEG26
SEG2744SEG2845SEG29
46
SEG3
20
SEG30
47
48
SEG31
35
SEG19
36
SEG2
19
SEG2037SEG2138SEG2239SEG2340SEG2441SEG25
SEG1028SEG11
SEG1229SEG1330SEG1431SEG1532SEG1633SEG1734SEG18
COM2
14
COM3
15
CS10C_D
11
OSC11OSC2
2
SEG017SEG1
18
27
S1D15100
U3
CK
8
COM0
12
COM1
13
20V
VR3
VR2
20V
VR1
10uF
C1
DNF
20V
Q5
5
Q6
6
Q7
7
RESET
10
SERIN14SEROUT
9
VCC
16
CLK_S
11
EN_OE
13
GND
8
Q0
15
Q1
1
Q2
2
3
Q3
Q4
4
U8
MC74HC595A
CLK_L
12
DNF
22K
R46
R44
R45
0
J102-55
DNF
20K
3
J103-21G1
R54
13K
J102-3
10K
R39
220pF
DNF
C55
J103-1818
DNF
10K
R6
R29
22K
DNF
C47
220pF
47K
R37
R30
10K
DNF
3
J103-88
130K
J103-3
D4
HSMG-C670
R11
M2 M4
220pF
C46
220pF
DNF
DNF
9_3V
C45
D16
HSMG-C670
R35
D24
HSMG-C670
0
R43
3.3K
R41
DNF
DNF
S5
TOUCH_SW
21
10K
J103-1515
D3_3V
9_3V
1000pF
C24
Q8
9_3V
C32
D3_3V
D3_3V
5V_CH
DNF
100pF
0.1uF
5
7
8
4
9_3V 9_3V
9_3V
DNF
C14
U1-2
LM2904
6
C17
5V_CH
M1
J103-44
DNF
1000pF
1
J103-66
Q9
J103-1
C5
R50
22K
470pF
0
R49
DNF
R48
20K
R42
0
DNF
C48
DNF
DNF
C50
9_3V
220pF
J103-55
470pF
R33
10K
0.1uF
C56
MC74HCT04A
U2-3
56
HSMG-C670
D15
Q10
10K
R19
5V_CH
C3
470pF
9
_3V
470pF
43K
R51
C2
C18
HSMG-C670
D21
PWR_GND
U2-7
GND
7
VCC
14
0.1uF
J103-99
C36
1000pF
R40
DNF
220pF
C44
DNF
10K
C33C4
4
C55C6
6
9_3V
DNF
S4
TOUCH_SW
C11C2
2
C16
0.1uF
DNF
J103-1717
J103-77
1000pF
C42
1000pF
DNF
C38
3.9K
R24
R21
C25
5V_IN
2.2K
DNF
1000pF
Q12
J102-11
Q13
J103-2020
Q14
R16
27K
HSMG-C670
D5
HSMG-C670
D13
0
R25
9_3V
9_3V
VR4
20V
470pF
C49
R31
13K
DNF
4.7uF
C21
DNF
C51
220pF
D20
HSMG-C670
R17
13K
D27
HSMG-C670HSMG-C670
D26
1000pF
C34
DNF
SEG813SEG9
14
680
R22
SEG29
34
SEG3
8
SEG3035SEG31
36
SEG49SEG510SEG611SEG7
12
SEG2126SEG2227SEG2328SEG2429SEG25
30
31
SEG26
SEG2732SEG28
33
SEG1419SEG1520SEG1621SEG1722SEG1823SEG19
24
SEG2
7
SEG20
25
COM2
3
COM3
4
SEG05SEG1
6
SEG1015SEG1116SEG1217SEG13
18
DNF
LCD_36PIN
DS1
COM0
1
COM1
2
R14
10K
0.1uF
C15
D3_3V
C7
1000pF
16
J102-22
1000pF
C39
J103-16
Q11
DNF
0.1uF
C11
12
1
J103-22G2
U2-1
MC74HCT04A
C40
P101-1
J103-22
DNF
1000pF
J103-1414
9_3V
HSMG-C670
D3
C8
1000pF
9_3V
HSMG-C670
D22
SHUTDOWN
3
1000pF
C6
DNF
LP2951C
5V_TAP
6
5
ERRORFEEDBACK
7
GND
4
INPUT8OUTPUT
1
SENSE
2
9_3V
DNF
U18
HSMG-C670
D11
C26
1000pF
C58
.022uF
10
470pF
C52
R3
SI
CS
MUX_CTL
ROW
COL
10
R26
TELCO_PTT
CS
CK
MUX_CTL
CH_PTT
CH_PTT
TELCO_PTT
CK
SI
Control Head CM300/PM400 Schemati
c
Page 52
4-8Control Head CM300/PM400 - PCB 8489714U01 / Schematics
3.1 Control Head PCB 8489714U01 Parts List
Circuit
The Motorola products described in this manual may include copyrighted Motorola computer programs stored
in semiconductor memories or other media. Laws in the United States and other countries preserve for
Motorola certain exclusive rights for copyrighted computer programs, including the exclusive right to copy or
reproduce in any form, the copyrighted computer program. Accordingly, any copyrighted Motorola computer
programs contained in the Motorola products described in this manual may not be copied or reproduced in
any manner without the express written permission of Motorola. Furthermore, the purchase of Motorola
products shall not be deemed to grant, either directly or by implication, estoppel or otherwise, any license
under the copyrights, patents or patent applications of Motorola, except for the normal non-exclusive
royalty-free license to use that arises by operation of law in the sale of a product.
Page 55
Table of Contents
Chapter 1MODEL CHART AND TECHNICAL SPECIFICATIONS
1.0CM200/CM300/PM400 Model Chart....................................................................1-1
3.0Troubleshooting Flow Chart for Synthesizer........................................................3-7
4.0Troubleshooting Flow Chart for VCO...................................................................3-8
5.0Troubleshooting Flow Chart for DC Supply (1 of 2).............................................3-9
5.1Troubleshooting Flow Chart for DC Supply (2 of 2)...................................3-10
Chapter 4UHF2 PCB/ SCHEMATICS/ PARTS LISTS
1.0Allocation of Schematics and Circuit Boards .......................................................4-1
1.1UHF2 and Controller Circuits.......................................................................4-1
2.0UHF 1-25 W Band 2 PCB 8488978U01 (rev. P9) / Schematics ..........................4-3
UHF2 Interconnection between Main Board and
Power Amplifier Compartment ............................................................................4-3
UHF2 (438-470 MHz) 1-25 W 8488978U01 (rev. P9), Top Side ........................4-4
UHF2 (438-470 MHz) 1-25 W 8488978U01 (rev. P9), Bottom Side ...................4-5
UHF2 (438-470 MHz) 1-25 W Main Circuit (Sht 1 of 2) ......................................4-6
UHF2 (438-470 MHz) 1-25 W Main Circuit (Sht 2 of 2) ......................................4-7
UHF2 (438-470 MHz) 1-25 W Transmitter (Sht 1 of 2) ....................................... 4-8
UHF2 (438-470 MHz) 1-25 W Transmitter (Sht 2 of 2) ....................................... 4-9
UHF2 (438-470 MHz) 1-25 W Synthesiser and VCO (Sht 1 of 2) ....................4-10
UHF2 (438-470 MHz) 1-25 W Synthesiser and VCO (Sht 2 of 2) ....................4-11
UHF2 (438-470 MHz) 1-25 W Receiver Front and Back End (Sht 1 of 2) ........4-12
UHF2 (438-470 MHz) 1-25 W Receiver Front and Back End (Sht 2 of 2) ........4-13
UHF2 (438-470 MHz) 1-25 W DC and Audio Circuits (Sht 1 of 2) .................... 4-14
UHF2 (438-470 MHz) 1-25 W DC and Audio Circuits (Sht 2 of 2) .................... 4-15
UHF2 (438-470 MHz) 1-25 W Microprocessor and
Controller Circuits (Sht 1 of 2) ..........................................................................4-16
UHF2 (438-470 MHz) 1-25 W Microprocessor and
Controller Circuits (Sht 2 of 2) ..........................................................................4-17
Page 57
UHF2 (438-470 MHz) 1-25 W Power Control Circuit ........................................4-18
2.1UHF2 PCB 8488978U01 (rev. P9) Parts List 1-25 W ................................4-19
3.0UHF 1-25 W Band 2 PCB 8486684Z02 (Rev. A) / Schematics .........................4-30
UHF2 Interconnection between Main Board and
Power Amplifier Compartment ..........................................................................4-30
UHF2 (438-470 MHz) 1-25 W 848668Z02 (Rev. A), Top Side .........................4-31
UHF2 (438-470 MHz) 1-25 W 848668Z02 (Rev. A) , Bottom Side ..................4-32
UHF2 (438-470 MHz) 1-25 W Main Circuit (Sht 1 of 2) ....................................4-33
UHF2 (438-470 MHz) 1-25 W Main Circuit (Sht 2 of 2) ....................................4-34
UHF2 (438-470 MHz) 1-25 W Transmitter (Sht 1 of 2) .....................................4-35
UHF2 (438-470 MHz) 1-25 W Transmitter (Sht 2 of 2) .....................................4-36
UHF2 (438-470 MHz) 1-25 W Synthesiser and VCO (Sht 1 of 2) .....................4-37
UHF2 (438-470 MHz) 1-25 W Synthesiser and VCO (Sht 2 of 2) .....................4-38
UHF2 (438-470 MHz) 1-25 W Receiver Front and Back End (Sht 1 of 2) ........4-39
UHF2 (438-470 MHz) 1-25 W Receiver Front and Back End (Sht 2 of 2) ........4-40
UHF2 (438-470 MHz) 1-25 W DC and Audio Circuits (Sht 1 of 2) ....................4-41
UHF2 (438-470 MHz) 1-25 W DC and Audio Circuits (Sht 2 of 2) ....................4-42
UHF2 (438-470 MHz) 1-25 W Microprocessor and
Controller Circuits (Sht 1 of 2) ...........................................................................4-43
UHF2 (438-470 MHz) 1-25 W Microprocessor and
Controller Circuits (Sht 2 of 2) ...........................................................................4-44
UHF2 (438-470 MHz) 1-25 W Power Control Circuit ........................................4-45
3.1UHF2 PCB 8486684Z02 (Rev. A) Parts List 1-25 W .................................4-46
v
Page 58
vi
Notes
Page 59
MODEL CHART AND TECHNICAL SPECIFICATIONS
1.0CM200/CM300/PM400 Model Chart
UHF2, 1-25 W, 438-470 MHz
ModelDescription
AAM50RNC9AA1ACM200 438-470 MHz, 1-25 W, 4 CH
AAM50RNF9AA1ANCM300 438-470 MHz, 1-25 W, 32 CH
AAM50RNF9AA3ANPM400 438-470 MHz, 1-25 W, 64 CH
ItemDescription
XPMUE1996_CM200 Super Tanapa UHF2, 1-25 W, 4 CH
XPMUE1998_CM300 Super Tanapa UHF2, 1-25 W, 32 CH
XPMUE2090_PM400 Super Tanapa UHF2, 1-25 W, 64 CH
XFLE1620_CM200 Tanapa UHF2, 1-25 W, 4 CH
XPMUE2026_CM300 Tanapa UHF2, 1-25 W, 32 CH
XPMUE2026_PM400 Tanapa UHF2, 1-25 W, 64 CH
XPMLN4598_Control Head
XPMLN4599_Control Head
XFLN3108_ANControl Head
XFLE1620_SCM200 UHF2 Service Board
XPMUE2026_SCM300 UHF2 Service Board
XPMUE2026_SPM400 UHF2 Service Board
X6902966C30CM200 User Guide (bilingual)
X6881096C22CM300 User Guide (bilingual)
X6881096C32PM400 User Guide (bilingual)
XXHKLN4220CM200/CM300 User Guide CDROM (bilingual)
XHKLN4219PM400 User Guide CDROM (blilingual)
x = Indicates one of each is required.
Chapter 1
Page 60
1-2MODEL CHART AND TECHNICAL SPECIFICATIONS
2.0Technical Specifications
Data is specified for +25°C unless otherwise stated.
General
SpecificationUHF2
Frequency Range:438-470 MHz
Frequency Stability
(-30°C to +60°C, 25°C Ref.)
Channel Capacity:CM200 - 4
Channel Spacing:12.5/20/25 kHz
Power Supply:13.8 Vdc (11 Vdc - 16.6 Vdc) negative Vehicle
Dimensions (L x W x H)
Weight2.25 lbs (1.01 kg)
FCC DescriptionAZ492FT4856
Operating Temperature-30 to 60° C (Display only -20°C to 60°C)
Storage Temperature-40 to 85° C
Thermal Shock-40 to 80° C
High Humidity95% RH @ 50° C for 8 hrs
ESD15KV air discharge
(118mm X 169.5mm X 44mm)
±2.5 PPM
CM300 - 32
PM400 - 64
ground
4.65” X 6.67” X 1.73”
Packing TestImpact Test
Page 61
Technical Specifications1-3
Transmitter
SpecificationUHF2
Power Output1-25W
Conducted/Radiated
Emissions:
Audio Response: (from 6 dB/
oct. Pre-Emphasis, 300 to
3000Hz)
Tx Audio Distortion< 3%
Modulation Limiting:±2.5 kHz @ 12.5 kHz
FM Hum and Noise:-35 dB@12.5 kHz
-36 dBm < 1 GHz
-30 dBm > 1 GHz
TIA603 and CEPT
±4.0 kHz @ 20 kHz
±5.0 kHz @ 25 kHz
-40 dB@25 kHz
Receiver
SpecificationUHF2
Sensitivity (12 dB SINAD):0.35 μV @ 12.5 kHz
0.3 μV @ 25 kHz
Intermodulation:60 dB@12.5 kHz
70 dB@25 kHz
Adjacent Channel Selectivity:60 dB @ 12.5 kHz
70 dB @ 25 kHz
Spurious Response70 dB
Rated Audio Power4 W (typ.) Internal
7.5 W @ 5 % External
Audio Distortion< 5 %
Hum and Noise:-35 dB @ 12.5 kHz
-40 dB @ 25 kHz
Audio ResponseTIA603 and CEPT
Conducted Spurious Emission
per FCC Part 15:
Specifications subject to change without notice. All electrical specifications and methods
refer to EIA/TIA 603 standards.
*Availability subject to the laws and regulations of individual countries.
-57 dBm <1 Ghz
-47 dBm >1 Ghz
Page 62
1-4MODEL CHART AND TECHNICAL SPECIFICATIONS
Notes
Page 63
1.0Introduction
This Chapter provides a detailed theory of operation for the UHF circuits in the radio. Details of the
theory of operation and trouble shooting for the the associated Controller circuits are included in this
Section of the manual.
2.0UHF (438-470 MHz) Receiver
2.1Receiver Front-End
The received signal is applied to the radio’s antenna input connector and routed through the
harmonic filter and antenna switch. The insertion loss of the harmonic filter/antenna switch is less
than 1 dB. The signal is routed to the first filter (4-pole), which has an insertion loss of 2 dB typically.
The output of the filter is matched to the base of the LNA (Q303) that provides a 16 dB gain and a
noise figure of better than 2 dB. Current source Q301 is used to maintain the collector current of
Q303. Diode CR301 protects Q303 by clamping excessive input signals. Q303 output is applied to
the second filter (3-pole) which has an insertion loss of 1.5 dB. In Distance mode, Q304 turns on and
causes D305 to conduct, thus bypassing C322 and R337. In Local mode, the signal is routed
through C322 and R337, thus inserting 7 dB attenuation. Since the attenuator is located after the RF
amplifier, the receiver sensitivity is reduced only by 6 dB, while the overall third order input intercept
is raised.
Chapter 2
THEORY OF OPERATION
Antenna
Front Filter
The first mixer is a passive, double-balanced type, consisting of T300, T301 and U302. This mixer
provides all of the necessary rejection of the half-IF spurious response. Low-side injection at
+15 dBm is delivered to the first mixer. The mixer output is then connected to a duplex network
which matches its output to the XTAL filter input (FL300) at the IF frequency of 44.85 MHz. The
duplex network terminates into a 50 ohm resistor (R340) at all other frequencies.
LNA
Second Filter
First LO
Figure 2-1 UHF Receiver Block Diagram
Mixer
4- Pole
Xtal Filter
2nd LO Xtal Osc
12.5 kHzFilter
IF Amp
25 kHzFilter
12.5 kHzFilter
25 kHzFilter
IFIC
Phase Shift
Element
Controller
Page 64
2-2THEORY OF OPERATION
2.2Receiver Back End
The IF signal from the crystal filter enters the IF amplifier which provides 20 dB of gain and feeds
the IF IC at pin 1. The first IF signal at 44.85 MHz mixes with the second local oscillator (LO) at
44.395 MHz to produce the second IF at 455 kHz. The second LO uses the external crystal Y301.
The second IF signal is amplified and filtered by two external ceramic filters (FL303/FL302 for
12.5 kHz channel spacing and FL304/FL301 for 25 kHz channel spacing). The IF IC demodulates
the signal by means of a quadrature detector and feeds the detected audio (via pin 7) to the audio
processing circuits. At IF IC pin 5, an RSSI signal is available with a dynamic range of 70 dB.
3.0UHF Transmitter Power Amplifier (438-470 MHz)
The radio’s 25W PA is a three-stage amplifier used to amplify the output from the VCOBIC to the
radio transmit level. All three stages utilize LDMOS technology. The gain of the first stage (U101) is
adjustable and controlled by pin 7 of U103-2 via U103-3. It is followed by an LDMOS stage Q105
and LDMOS final stage Q100.
From VCO
Controlled
Stage
PA
Driver
PA- Final
Stage
ASFIC_CMP
SPI BUS
Coupler
Bias
PA
PWR
SET
Loop
Controller
U103-2
Forward
Pin Diode
Antenna
Switch
Harmonic
Filter
Temperature
Sense
RF Jack
Figure 2-2 UHF Transmitter Block Diagram
Devices U101, Q105 and Q100 are surface mounted. A metal clip ensures good thermal contact
between both the driver and final stage, and the chassis.
Antenna
3.1First Power Controller Stage
The first stage (U101) is a 20 dB gain integrated circuit containing two LDMOS FET amplifier
stages. It amplifies the RF signal from the VCO (TX_INJ). The output power of stage U101 is
controlled by a DC voltage applied to pin 1 from the op-amp U103-3, pin 8. The control voltage
simultaneously varies the bias of two FET stages within U101. This biasing point determines the
overall gain of U101 and therefore its output drive level to Q105, which in turn controls the output
Page 65
UHF Transmitter Power Amplifier (438-470 MHz)2-3
power of the PA.Op-amp U103-3 monitors the drain current of U101 via resistor R122 and adjusts
the bias voltage of U101.
In receive mode, the DC voltage from RX_EN line turns on Q101, which in turn switches off the
biasing voltage to U101.
3.2Power Controlled Driver Stage
The next stage is an LDMOS device (Q105) which provides a gain of 12 dB. This device requires a
positive gate bias and a quiescent current flow for proper operation. The bias is set during transmit
mode by the drain current control op-amp U102-1, and fed to the gate of Q105 via the resistive
network R175, R147.
Op-amp U102-1 monitors the drain current of Q105 via resistors R126-8 and adjusts the bias
voltage of Q105.
In receive mode the DC voltage from RX_EN line turns on Q102, which in turn switches off the
biasing voltage to Q105.
3.3Final Stage
The final stage is an LDMOS device (Q100) providing a gain of 12 dB. This device also requires a
positive gate bias and a quiescent current flow for proper operation. The voltage of the line PA_BIAS
is set in transmit mode by the ASFIC and fed to the gate of Q100 via the resistive network R134,
R131. This bias voltage is tuned in the factory. If the transistor is replaced, the bias voltage must be
tuned using the Tuner. Care must be taken not to damage the device by exceeding the maximum
allowed bias voltage. The device’s drain current is drawn directly from the radio’s DC supply voltage
input, B+, via L117 and L115.
A matching network consisting of C1004-5, C1008, C1021: and two striplines, transforms the
impedance to 50 ohms and feeds the directional coupler.
3.4Directional Coupler
The directional Coupler is a microstrip printed circuit, which couples a small amount of the forward
power of the RF power from Q100.The coupled signal is rectified to an output power which is
proportional to the DC voltage rectified by diode D105; and the resulting DC voltage is routed to the
power control section to ensure that the forward power out of the radio is held to a constant value.
3.5Antenna Switch
The antenna switch utilizes the existing dc feed (B+) to the last stage device (Q100). The basic
operation is to have both PIN diodes (D103, D104) turned on during key-up by forward biasing
them. This is achieved by pulling down the voltage at the cathode end of D104 to around 12.4 V (0.7
V drop across each diode). The current through the diodes needs to be set around 100 mA to fully
open the transmit path through resistor R108. Q106 is a current source controlled by Q103 which is
turned on in Tx mode by TX_EN. VR102 ensures that the voltage at resistor R107 never exceeds
5.6 V.
Page 66
2-4THEORY OF OPERATION
3.6Harmonic Filter
Inductors L111 and L113 along with capacitors C1011, C1023, C1020 and C1016 form a low-pass
filter to attenuate harmonic energy coming from the transmitter. Resistor R150 along with L126
drains any electrostatic charges that might otherwise build up on the antenna. The harmonic filter
also prevents high level RF signals above the receiver passband from reaching the receiver circuits
to improve spurious response rejection.
3.7Power Control
The output power is regulated by using a forward power detection control loop. A directional coupler
samples a portion of the forward and reflected RF power. The forward sampled RF is rectified by
diode D105, and the resulting DC voltage is routed to the operational amplifier U100. The error
output current is then routed to an integrator, and converted into the control voltage. This voltage
controls the bias of the pre-driver (U101 and driver (Q105) stages. The output power level is set by
way of a DAC, PWR_SET, in the audio processing IC (U504) which acts at the forward power
control loop reference.
The sampled reflected power is rectified by diode D107,The resulting DC voltage is amplified by an
operational amplifier U100 and routed to the summing junction. This detector protects the final stage
Q100 from reflected power by increasing the error current. The temperature sensor protects the
final stage Q100 from overheating by increasing the error current. A thermistor RT100 measures the
final stage Q100 temperature. The voltage divider output is routed to an operational amplifier U103
and then goes to the summing junction. The Zener Diode VR101 keeps the loop control voltage
below 5.6 V and eliminates the DC current from the 9.3 regulator U501.
Two local loops for the Pre Driver (U101) and for the Driver (Q105) are used in order to stabilize the
current for each stage.
In Rx mode, the two transistors Q101 and Q102 go to saturation and shut down the transmitter by
applying ground to the Pre Driver U101 and for the Driver Q105 control.
4.0UHF (438-470 MHz) Frequency Synthesis
The synthesizer consists of a reference oscillator (Y201), low voltage Fractional-N (LVFRAC-N)
synthesizer (U200), and a voltage controlled oscillator (VCO) (U201).
4.1Reference Oscillator
The reference oscillator is a crystal (Y201) controlled Colpitts oscillator and has a frequency of
16.8 MHz. The oscillator transistor and start-up circuit are located in the LVFRAC-N (U200) while
the oscillator feedback capacitors, crystal, and tuning varactors are external. An analog-to-digital (A/
D) converter internal to the LVFRAC-N (U200) and controlled by the microprocessor via SPI sets the
voltage at the warp output of U200 pin 25. This sets the frequency of the oscillator. Consequently,
the output of the crystal Y201 is applied to U200 pin 23.
The method of temperature compensation is to apply an inverse Bechmann voltage curve, which
matches the crystal’s Bechmann curve to a varactor that constantly shifts the oscillator back on
frequency. The crystal vendor characterizes the crystal over a specified temperature range and
codes this information into a bar code that is printed on the crystal package. In production, this
crystal code is read via a 2-dimensional bar code reader and the parameters are saved.
Page 67
UHF (438-470 MHz) Frequency Synthesis2-5
This oscillator is temperature compensated to an accuracy of +/-2.5 PPM from -30 to 60 degrees C.
The temperature compensation scheme is implemented by an algorithm that uses five crystal
parameters (four characterize the inverse Bechmann voltage curve and one for frequency accuracy
of the reference oscillator at 25 degrees C). This algorithm is implemented by the LVFRAC-N (U200)
at the power up of the radio.
TCXO Y200, along with its corresponding circuitry R204, R205, R210, and C2053, are not placed as
the temperature compensated crystal proved to be reliable.
4.2Fractional-N Synthesizer
The LVFRAC-N U200 consists of a pre-scaler, programmable loop divider, control divider logic,
phase detector, charge pump, A/D converter for low frequency digital modulation, balanced
attenuator used to balance the high and low frequency analog modulation, 13 V positive voltage
multiplier, serial interface for control, and a super filter for the regulated 5 volts.
DATA (U403 PIN 100)
CLOCK (U403 PIN 1)
CSX (U403 PIN 2)
MOD IN (U501 PIN 40)
+5 V (U503 PIN 1)
+5 V (U503 PIN 1)
REFERENCE
OSCILLATOR
VOLTAGE
MULTIPLIER
10
13, 30
5, 20, 34, 36
23
24
25
32
47
7
DATA
8
CLK
9
CEX
MODIN
VCC, DC5V
VDD, DC5V
XTAL1
XTAL2
WARP
PREIN
VCP
VMULT2VMULT1
14
U200
LOW VOLTAGE
FRACTIONAL-N
SYNTHESIZER
15
PRESCALER IN
FREFOUT
IADAPT
MODOUT
SFOUT
BIAS1
BIAS2
AUX1
48
LOCK
GND
IOUT
AUX4
AUX2
AUX3
4
19
6, 22, 33, 44
43
45
41
3
1 (NU)
2
28
40
39
BWSELECT
Figure 2-3 UHF Synthesizer Block Diagram
LOCK (U403 PIN 56)
FREF (U504 PIN 34)
LOOP
FILTER
VCO Bias
TRB
FILTERED 5V
To IF
Section
STEERING
LINE
LO RF INJECTION
VOLTAGE
CONTROLLED
OSCILLATOR
TX RF INJECTION
(1ST STAGE OF PA)
A voltage of 5 V applied to the super filter input (U200, pin 30) supplies an output voltage of 4.5 Vdc
(VSF) at U200, pin 28. This supplies 4.5 V to the VCO Buffer IC U201.
To generate a high voltage to supply the phase detector (charge pump) output stage at pin VCP
(U200, pin 47) while using a low voltage 3.3 Vdc supply, a 13 V positive voltage multiplier is used
(D200, D201, and capacitors C2024, 2025, 2026, 2055, 2027, 2001).
Output lock (U200, pin 4) provides information about the lock status of the synthesizer loop. A high
level at this output indicates a stable loop. A 16.8 MHz reference frequency is provided at U200, pin
19.
Page 68
2-6THEORY OF OPERATION
4.3Voltage Controlled Oscillator (VCO)
The Voltage Controlled Oscillator (VCO) consists of the VCO/Buffer IC (VCOBIC, U201), the TX and
RX tank circuits, the external RX buffer stages, and the modulation circuitry.
AUX3 (U200 Pin 2)
Steer Line
Voltage
(VCTRL)
(U200 Pin 28)
RX Tank
TX Tank
Rx-SW
Tx-SW
RX VCO
Circuit
TX VCO
Circuit
Pin7
Pin13
Vcc-Superfilter
Pin3
Collector/RF in
Pin4
RX
Pin5
Pin6
TX
Pin16
Pin15
Pin18
Vcc-Logic
Pin 20
Vsens
Circuit
TRB IN
TX/RX/BS
Switching Network
U201
VCOBIC
Rx
Active Bias
Tx
Active Bias
Pin2
Rx-I adjust
Prescaler Out
Pin1
Tx-I adjust
Pin 12Pin 19
Presc
RX
Pin8
Pin14
TX
Pin10
Pins 9,11,17
U200 Pin 32
Q200
Buffers
VCC Buffers
TX RF Injection
LO RF INJECTION
Low Pass
Filter
(U200 Pin28)
Attenuator
(U200 Pin 28)
Figure 2-4 UHF VCO Block Diagram
The VCOBIC together with the LVFRAC-N (U200) generate the required frequencies in both
transmit and receive modes. The TRB line (U201, pin 19) determines which VCO and buffer is
enabled (high being TX output at pin 10, low being RX output at pin 8). A sample of the signal from
the enabled output is routed from U201, pin 12 (PRESC_OUT), via a low pass filter to U200, pin 32
(PREIN).
A steering line voltage between 3.0 V and 10.0 V at varactor D204 tunes the TX VCO through the
frequency range of 438-470 MHz, and at D203 tunes the RX VCO through the frequency range of
393.15-425.15 MHz.
The external RX amplifier is used to increase the output from U201, pin 9 from 3-4 dBm to the
required 15 dBm for proper mixer operation. In TX mode, the modulation signal from the LVFRAC-N
(U200, pin 41) is applied to the VCO by way of the modulation circuit D205, R212, R211, C2073.
Page 69
UHF (438-470 MHz) Frequency Synthesis2-7
4.4Synthesizer Operation
The synthesizer consists of a low voltage FRAC-N IC (LVFRAC-N), reference oscillator, charge
pump circuits, loop filter circuit, and DC supply. The output signal (PRESC_OUT) of the VCOBIC
(U201, pin 12) is fed to the PREIN, pin 32 of U200 via a low pass filter which attenuates harmonics
and provides a correct input level to the LVFRAC-N in order to close the synthesizer loop.
The pre-scaler in the synthesizer (U200) is a dual modulus pre-scaler with selectable divider ratios.
The divider ratio of the pre-scaler is controlled by the loop divider, which in turn receives its inputs
via the SPI. The output of the pre-scaler is applied to the loop divider. The output of the loop divider
is connected to the phase detector, which compares the loop divider’s output signal with the
reference signal. The reference signal is generated by dividing down the signal of the reference
oscillator (Y201).
The output signal of the phase detector is a pulsed dc signal that is routed to the charge pump. The
charge pump outputs a current from U200, pin 43 (IOUT). The loop filter (consisting of R224, R217,
R234, C2074, C2075, C2077, C2078, C2079, C2080, C2028, and L205) transforms this current into
a voltage that is applied the varactor diodes D203 and D204 for RX and TX respectively. The output
frequency is determined by this control voltage. The current can be set to a value fixed in the
LVFRAC-N or to a value determined by the currents flowing into BIAS 1 (U200, pin 40) or BIAS 2
(U200, pin 39). The currents are set by the value of R200 or R206 respectively. The selection of the
three different bias sources is done by software programming.
To modulate the synthesizer loop, a two-spot modulation method is utilized via the MODIN (U200,
pin 10) input of the LVFRAC-N. The audio signal is applied to both the A/D converter (low frequency
path) and the balance attenuator (high frequency path). The A/D converter converts the low
frequency analog modulating signal into a digital code which is applied to the loop divider, thereby
causing the carrier to deviate. The balance attenuator is used to adjust the VCO’s deviation
sensitivity to high frequency modulating signals. The output of the balance attenuator is presented
at the MODOUT port of the LVFRAC-N (U200,pin 41) and connected to the VCO modulation
varactor D205.
Page 70
2-8THEORY OF OPERATION
5.0Controller Theory of Operation
This section provides a detailed theory of operation for the radio and its components. The main
radio is a single-board design, consisting of the transmitter, receiver, and controller circuits. A
control head is connected by an extension cable. The control head contains LED indicators, a
microphone connector, buttons, and speaker.
In addition to the power cable and antenna cable, an accessory cable can be attached to a
connector on the rear of the radio. The accessory cable enables you to connect accessories to the
radio, such as an external speaker, emergency switch, foot-operated PTT, and ignition sensing, etc.
16.8 MHz
Reference Clock
from Synthesizer
Disc Audio
To RF Section
To Synthesizer
Digital
Architecture
3.3 V
Regulator
Mod
Out
Audio/Signaling
Architecture
Audio
ASFIC_CMP
SPI
RAM
EEPROM
FLASH
.
PA
µP Clock
HC11FL0
Figure 2-5 Controller Block Diagram
External
Microphone
Internal
Microphone
External
Speaker
Internal
Speaker
SCI to
Accessory &
Control Head
Connector
Handset
5.1Radio Power Distribution
Voltage distribution is provided by five separate devices:
•U514 P-cH FET - Batt + (Ext_SWB+)
•U501 LM2941T - 9.3 V
•U503 LP2951CM - 5 V
•U508 MC 33269DTRK - 3.3 V
•U510 LP2986ILDX - 3.3 V Digital
Page 71
Controller Theory of Operation2-9
The DC voltage applied to connector P2 supplies power directly to the following circuitry:
•Electronic on/off control
•RF power amplifier
•12 volts P-cH FET -U514
•9.3 volt regulator
•Audio PA
Ignition
Auto
On/Off
Switch
Control
B+
Ferrite Bit
Filt_B+
FET
P-CH
On/Off
Control
11-16.6 V
0.9A
On/Off
Control
RF_PA
Audio_PA
Antenna Switch
Power Control
500mA
SW_Filt_B+
U501
9.3 V Regulator
Acces Conn
Audio PA_Soutdown
Power Loop Op_Amp
0.85A
9.3 V
45 mA
5 V RF Regulator
500 mA
Rx_Amp
PA_Pre-driver
PA D r iver
9.3 V
65 mA
U503
LVF RAC_N
IF_Amp
Mic Connector
Mic Bias
9 V, 5 mA
Status LEDs
7_Seg
DOT
Back
light
9.3 V
75 mA
U508
3.3 V RF Reg
ASFIC_CMP
IFIC
RX Cct
Control Head
9.3 V
162 mA
25 mA50 mA45 mA
Keypad
7_Seg
Bed
to
7-Seg
Shift
Reg
U510
3.3 V D Reg
micro P
RAM
Flash
EEPROM
3.2 V
72 mA
Reset
90 mA
Figure 2-6 DC Power Distribution Block Diagram
Regulator U501 is used to generate the 9.3 volts required by some audio circuits, the RF circuitry
and power control circuitry. Input and output capacitors are used to reduce high frequency noise.
Resistors R5001 / R5081 set the output voltage of the regulator. This regulator output is
electronically enabled by a 0 volt signal on pin 2. Q502, Q505 and R5038 are used to disable the
regulator when the radio is turned off.
Voltage regulator U510 provides 3.3 volts for the digital circuitry. Operating voltage is from the
regulated 9.3 V supply. Input and output capacitors are used to reduce high frequency noise and
provide proper operation during battery transients. U510 provides a reset output that goes to 0 volts
if the regulator output goes below 3.1 volts. This is used to reset the controller to prevent improper
operation.
Voltage regulator U508 provides 3.3 V for the RF circuits and ASFIC_CMP. Input and output
capacitors are used to reduce the high frequency noise and provide proper operation during battery
transients.
Page 72
2-10THEORY OF OPERATION
Voltage regulator U503 provides 5 V for the RF circuits. Input and output capacitors are used to
reduce the high frequency noise and provide proper operation during battery transients.
5.2Protection Devices
Diode VR500 acts as protection against ESD, wrong polarity of the supply voltage, and load dump.
VR692 - VR699 are for ESD protection.
5.3Automatic On/Off
The radio can be switched ON in any one of the following three ways:
•On/Off switch. (No Ignition Mode)
•Ignition and On/Off switch (Ignition Mode)
•Emergency
5.3.1No Ignition Mode
When the radio is connected to the car battery for the first time, Q500 will be in saturation, Q503 will
cut-off, Filt_B+ will pass through R5073, D500, and S5010-pin 6 (On/Off switch). When S5010 is
ON, Filt_B+ will pass through S5010-pin5, D511, R5069, R5037 and base of Q505 and move Q505
into saturation. This pulls U501-pin2 through R5038, D502 to 0.2 V and turns On U514 and U501
9.3 V regulator which supplies voltage to all other regulators and consequently turns the radio on,
When U504 (ASFIC_CMP) gets 3.3 V, GCB2 goes to 3.3 V and holds Q505 in saturation, for soft
turn off.
5.3.2Ignition Mode
When ignition is connected for the first time, it will force high current through Q500 collector, This
will move Q500 out of saturation and consequently Q503 will cut-off. S5010 pin 6 will get ignition
voltage through R601 (for load dump), R610, (R610 & C678 are for ESD protection), VR501,
R5074, and D500. When S5010 is ON, Filt_B+ passes through S5010-pin 5, D511, R5069, R5037
and base of Q505 and inserts Q505 into saturation. This pulls U501-pin 2 through R5038, D502 to
0.2 V and turns on U514 and U501 9.3 V regulator which supply voltage to all other regulators and
turns the radio on, When U504 (ASFIC_CMP) get 3.3 V supply, GCB2 goes to 3.3 V and holds
Q505 in saturation state to allow soft turn off,
When ignition is off Q500, Q503 will stay at the same state so S5010 pin 6 will get 0 V from Ignition,
Q504 goes from Sat to Cut, ONOFF_SENSE goes to 3.3 V and it indicates to the radio to soft turn
itself by changing GCB2 to ‘0’ after de registration if necessary.
5.3.3Emergency Mode
The emergency switch (P1 pin 9), when engaged, grounds the base of Q506 via EMERGENCY
_ACCES_CONN. This switches Q506 to off and consequently resistor R5020 pulls the collector of
Q506 and the base of Q506 to levels above 2 volts. Transistor Q502 switches on and pulls U501
pin2 to ground level, thus turning ON the radio. When the emergency switch is released R5030 pulls
the base of Q506 up to 0.6 volts. This causes the collector of transistor Q506 to go low (0.2 V),
thereby switching Q502 to off.
Page 73
Controller Theory of Operation2-11
While the radio is switched on, the µP monitors the voltage at the emergency input on the accessory
connector via U403-pin 62. Three different conditions are distinguished: no emergency kit is
connected, emergency kit connected (unpressed), and emergency press.
If no emergency switch is connected or the connection to the emergency switch is broken, the
resistive divider R5030 / R5049 will set the voltage to about 3.14 volts (indicates no emergency kit
found via EMERGENCY_SENSE line). If an emergency switch is connected, a resistor to ground
within the emergency switch will reduce the voltage on EMERGENCY _SENSE line, and indicate to
the µP that the emergency switch is operational. An engaged emergency switch pulls line
EMERGENCY _SENSE line to ground level. Diode VR503 limits the voltage to protect the µP input.
While EMERGENCY _ACCES_CONN is low, the µP starts execution, reads that the emergency
input is active through the voltage level of µP pin 64, and sets the DC POWER ON output of the
ASFIC CMP pin 13 to a logic high. This high will keep Q505 in saturation for soft turn off.
5.4Microprocessor Clock Synthesiser
The clock source for the µP system is generated by the ASFIC CMP (U504). Upon power-up the
synthesizer IC (FRAC-N) generates a 16.8 MHz waveform that is routed from the RF section to the
ASFIC CMP pin 34. For the main board controller the ASFIC CMP uses 16.8 MHz as a reference
input clock signal for its internal synthesizer. The ASFIC CMP, in addition to audio circuitry, has a
programmable synthesizer which can generate a synthesized signal ranging from 1200 Hz to
32.769 MHz in 1200 Hz steps.
When power is first applied, the ASFIC CMP will generate its default 3.6864 MHz CMOS square
wave UP CLK (on U504 pin 28) and this is routed to the µP (U403 pin 90). After the µP starts
operation, it reprograms the ASFIC CMP clock synthesizer to a higher UP CLK frequency (usually
7.3728 or 14.7456 MHz) and continues operation.
The ASFIC CMP may be reprogrammed to change the clock synthesizer frequencies at various
times depending on the software features that are executing. In addition, the clock frequency of the
synthesizer is changed in small amounts if there is a possibility of harmonics of the clock source
interfering with the desired radio receive frequency.
The ASFIC CMP synthesizer loop uses C5025, C5024 and R5033 to set the switching time and jitter
of the clock output. If the synthesizer cannot generate the required clock frequency it will switch
back to its default 3.6864 MHz output.
Because the ASFIC CMP synthesizer and the µP system will not operate without the 16.8 MHz
reference clock it (and the voltage regulators) should be checked first when debugging the system.
Page 74
2-12THEORY OF OPERATION
5.5Serial Peripheral Interface (SPI)
The µP communicates to many of the IC’s through its SPI port. This port consists of SPI TRANSMIT
DATA (MOSI) (U403-pin100), SPI RECEIVE DATA (MISO) (U403-pin 99), SPI CLK (U0403-pin1)
and chip select lines going to the various IC’s, connected on the SPI PORT (BUS). This BUS is a
synchronous bus, in that the timing clock signal CLK is sent while SPI data (SPI TRANSMIT DATA
or SPI RECEIVE DATA) is sent. Therefore, whenever there is activity on either SPI TRANSMIT
DATA or SPI RECEIVE DATA there should be a uniform signal on CLK. The SPI TRANSMIT DATA
is used to send serial from a µP to a device, and SPI RECEIVE DATA is used to send data from a
device to a µP.
There are two IC’s on the SPI BUS, ASFIC CMP (U504 pin 22)), and EEPROM (U400). In the RF
sections there is one IC on the SPI BUS, the FRAC-N Synthesizer. The chip select line CSX from
U403 pin 2 is shared by the ASFIC CMP and FRAC-N Synthesizer. Each of these IC’s check the
SPI data and when the sent address information matches the IC’s address, the following data is
processed.
When the µP needs to program any of these Is it brings the chip select line CSX to a logic “0” and
then sends the proper data and clock signals. The amount of data sent to the various IC’s are
different; e.g., the ASFIC CMP can receive up to 19 bytes (152 bits). After the data has been sent
the chip select line is returned to logic “1”.
5.6SBEP Serial Interface
The SBEP serial interface allows the radio to communicate with the Customer Programming
Software (CPS), or the Universal Tuner via the Radio Interface Box (RIB) or the cable with internal
RIB. This interface connects to the SCI pin via control head connector (J2-pin 17) and to the
accessory connector P1-6 and comprises BUS+. The line is bi-directional, meaning that either the
radio or the RIB can drive the line. The µP sends serial data and it reads serial data via pin 97.
Whenever the µP detects activity on the BUS+ line, it starts communication.
5.7General Purpose Input/Output
The controller provides six general purpose lines (PROG I/O) available on the accessory connector
P1 to interface to external options. Lines PROG IN 3 and 6 are inputs, PROG OUT 4 is an output
and PROG IN OUT 8, 12 and 14 are bi-directional. The software and the hardware configuration of
the radio model define the function of each port.
•PROG IN 3 can be used as external PTT input, or others, set by the CPS. The µP reads this
port via pin 72 and Q412.
•PROG OUT 4 can be used as external alarm output, set by the CPS. Transistor Q401 is
controlled by the µP (U403 pin 55)
•PROG IN 6 can be used as normal input, set by the CPS. The µP reads this port via pin 73
and Q411. This pin is also used to communicate with the RIB if resistor R421 is placed.
•DIG IN OUT 8,12,14 are bi-directional and use the same circuit configuration. Each port uses
an output Q416, Q404, Q405 controlled by µP pins 52, 53, 54. The input ports are read
through µP pins 74, 76, 77; using Q409, Q410, Q411
Page 75
Controller Theory of Operation2-13
5.8Normal Microprocessor Operation
For this radio, the µP is configured to operate in one of two modes, expanded and bootstrap. In
expanded mode the µP uses external memory devices to operate, whereas in bootstrap operation
the µP uses only its internal memory. In normal operation of the radio the µP is operating in
expanded mode as described below.
During normal operation, the µP (U403) is operating in expanded mode and has access to 3
external memory devices; U400 (EEPROM), U402 (SRAM), U404 (Flash). Also, within the µP there
are 3 Kilobytes of internal RAM, as well as logic to select external memory devices.
The external EEPROM (U400) space contains the information in the radio which is customer
specific, referred to as the codeplug. This information consists of items such as: 1) what band the
radio operates in, 2) what frequencies are assigned to what channel, and 3) tuning information.
The external SRAM (U402) as well as the µP’s own internal RAM space are used for temporary
calculations required by the software during execution. All of the data stored in both of these
locations is lost when the radio powers off.
The µP provides an address bus of 16 address lines (ADDR 0 - ADDR 15), and a data bus of 8 data
lines (DATA 0 - DATA 7). There are also 3 control lines; CSPROG (U403-38) to chip select U404-pin
30 (FLASH), CSGP2 (U403-pin 41) to chip select U404-pin 20 (SRAM) and PG7_R_W (U403-pin 4)
to select whether to read or to write. The external EEPROM (U400-pin1).
When the µP is functioning normally, the address and data lines should be toggling at CMOS logic
levels. Specifically, the logic high levels should be between 3.1 and 3.3 V, and the logic low levels
should be between 0 and 0.2 V. No other intermediate levels should be observed, and the rise and
fall times should be <30ns.
The low-order address lines (ADDR 0 - ADDR 7) and the data lines (DATA 0-DATA 7) should be
toggling at a high rate, e.g., you should set your oscilloscope sweep to 1us/div. or faster to observe
individual pulses. High speed CMOS transitions should also be observed on the µP control lines.
On the µP the lines XIRQ (U403-pin 48), MODA LIR (U403-pin 58), MODB VSTPY (U403-pin 57)
and RESET (U403-pin 94) should be high at all times during normal operation. Whenever a data or
address line becomes open or shorted to an adjacent line, a common symptom is that the RESET
line goes low periodically, with the period being in the order of 20ms. In the case of shorted lines you
may also detect the line periodically at an intermediate level, i.e. around 2.5 V when two shorted
lines attempt to drive to opposite rails.
The MODA LIR (U403-pin 58) and MODB VSTPY (U403-pin 57) inputs to the µP must be at a logic
“1” for it to start executing correctly. After the µP starts execution it will periodically pulse these lines
to determine the desired operating mode. While the Central Processing Unit (CPU) is running,
MODA LIR is an open-drain CMOS output which goes low whenever the µP begins a new
instruction. An instruction typically requires 2-4 external bus cycles, or memory fetches.
There are eight analog-to-digital coverter ports (A/D) on U403 labelled within the device block as
PEO-PE7. These lines sense the voltage level ranging from 0 to 3.3 V of the input line and convert
that level to a number ranging from 0 to 255 which is read by the software to take appropriate action.
Page 76
2-14THEORY OF OPERATION
5.9Static Random Access Memory (SRAM)
The SRAM (U402) contains temporary radio calculations or parameters that can change very
frequently, and which are generated and stored by the software during its normal operation. The
information is lost when the radio is turned off.
The device allows an unlimited number of write cycles. SRAM accesses are indicated by the CS
signal U402 (which comes from U403-CSGP2) going low. U402 is commonly referred to as the
external RAM as opposed to the internal RAM which is the 3 Kilobytes of RAM which is part of the
68HC11FL0. Both RAM spaces serve the purpose. However, the internal RAM is used for the
calculated values which are accessed most often.
Capacitor C402 and C411 serves to filter out any AC noise which may ride on +3.3 V at U402
6.0Control Board Audio and Signalling Circuits
6.1Audio Signalling Filter IC and Compander (ASFIC CMP)
The ASFIC CMP (U504) used in the controller has the following four functions:
1.RX/TX audio shaping, i.e. filtering, amplification, attenuation
2.RX/TX signaling, PL/DPL/HST/MDC
3.Squelch detection
4.µP clock signal generation
The ASFIC CMP is programmable through the SPI BUS (U504 pins-20/21/22), normally receiving
19 bytes. This programming sets up various paths within the ASFIC CMP to route audio and/or
signaling signals through the appropriate filtering, gain and attenuator blocks. The ASFIC CMP also
has 6 General Control Bits GCB0-5 which are CMOS level outputs and used for the following:
•GCBO - BW Select
•GCBI - switches the audio PA On/Off
•GCB2 - DC Power On switches the voltage regulator (and the radio) on and off
•GCB3 - Control on MUX U509 pin 9 to select between Low Cost Mic path to STD Mic Path
•GCB4 - Control on MUX U509 pin 11 to select between Flat RX path to filtered RX path on the
accessory connector.
•GCB5 - Control on MUX U509 pin 10 to select between Flat TX path mute and Flat TX path
Page 77
Transmit Audio Circuits2-15
7.0Transmit Audio Circuits
MIC
EXT MIC
FLAT TX
AUDIO
J2
15
CONTROL HEAD
CONNECTOR
P1
ACCESSORY
CONNECTOR
24kOhms
44
MIC
INT
GCB3
MIC
EXT
AUX
TX
GCB5
TX SND
MIC
ASFIC_CMP
IN
U504
HS SUMMER
LS SUMMER
LIMITER
SPLATTER
FILTER
U509
MUX
46
35
2
5
U509
MUX
AUDIO MUTE
48
42
38
FLAT TX
36
TX RTN
FILTERS AND
PREEMPHASIS
ATTENUATOR
VCO
ATN
MOD IN
40
TO
RF
SECTION
(SYNTHESIZER)
Figure 2-7 Transmit Audio Paths
7.1Microphone Input Path
The radio supports 2 distinct microphone paths known as internal (from control head J2-15) and
external mic (from accessory connector P1-2) and an auxiliary path (FLAT TX AUDIO, from
accessory connector P1-5). The microphones used for the radio require a DC biasing voltage
provided by a resistive network.
The two microphone audio input paths enter the ASFIC CMP at U504-pin 48 (external mic) and
U504-pin 46 (internal mic). The microphone is plugged into the radio control head and connected to
the audio DC via J2-pin 15. The signal is then routed via C5045 to MUX U509 that select between
two paths with different gain to support Low Cost Mic (Mic with out amplifier in it) and Standard Mic.
7.1.1Low Cost Microphone
Hook Pin is shorted to Pin 1(9.3 V) inside the Low Cost Mic, This routes 9.3 V to R429, and creates
2.6 V on MIC_SENSE (u.P U403-67) by Voltage Divider R429/R430. U403 senses this voltage and
sends command to ASFIC_CMP U504 to get GCB3 = ‘0’. The audio signal is routed from C5045 via
U509-5 (Z0), R5072, U507, R5026, C5091, R5014 via C5046 to U504- 46 int. mic (C5046 100nF
creates a159 Hz pole with U504- 46 int mic impedance of 16Kohm).
Page 78
2-16THEORY OF OPERATION
7.1.2Standard Microphone
Hook Pin is shorted to the hook mic inside the standard Mic, If the mic is out off hook, 3.3 V is routed
to R429 via R458, D401, and it create 0.7 V on MIC_SENSE (u.P U403-67) by Voltage Divider
R429/R430. U403 senses this voltage and sends command to ASFIC_CMP U504 to get GCB3 =‘1’.
The audio signal is routed from C5045 via U509-3 (Z1), R5072, U507, R5026, C5091, R5014 via
C5046 to U504- 46 int mic (C5046 100nF create a159 Hz pole with U504- 46 int mic impedance of
16Kohm). 9.3 Vdc is routed via R5077, R5075 to J2-15, It create 4.65V with Mic Impedance. C5010
supplies AC Ground to create AC impedance of 510 Ohms via R5075. and Filter 9.3 Vdc mic bias
supply.
Note: The audio signal at U504-pin 46 should be approximately 12 mV for 1.5 kHz or 3 kHz of
deviation with 12.5 kHz or 25 kHz channel spacing.
The external microphone signal enters the radio on accessory connector P1 pin 2 and is routed via
line EXT MIC to R5054. R5078 and R5076 provide the 9.3 Vdc bias. Resistive divider R5054/
R5070 divide the input signal by 5.5 and provide input protection for the CMOS amplifier input.
R5076 and C5009 provide a 510 ohm AC path to ground that sets the input impedance for the
microphone and determines the gain based on the emitter resistor in the microphone’s amplifier
circuit.
C5047 serves as a DC blocking capacitor. The audio signal at U504-pin 48 should be approximately
14 mV for 1.5 kHz or 3 kHz of deviation with 12.5 kHz or 25 kHz channel spacing.
The FLAT TX AUDIO signal from accessory connector P1-pin 5 is fed to the ASFIC CMP (U504 pin
42 through U509 pin 2 to U509 pin 15 via U506 OP-AMP circuit and C5057.
The ASFIC has an internal AGC that can control the gain in the mic audio path. The AGC can be
disabled / enabled by the µP. Another feature that can be enabled or disabled in the ASFIC is the
VOX. This circuit, along with Capacitor C5023 at U504-pin 7, provides a DC voltage that can allow
the µP to detect microphone audio. The ASFIC can also be programmed to route the microphone
audio to the speaker for public address operation.
7.2PTT Sensing and TX Audio Processing
Internal microphone PTT is sensed by µP U403 pin 71. Radio transmits when this pin is “0” and
selects inside the ASFIC_ CMP U504 internal Mic path. When the internal Mic PTT is “0” then
external Mic PTT is grounded via D402. External Mic PTT is sensed by U403 pin 72 via Q412
circuits. The radio transmits when this pin is “0” and selects inside the ASFIC _CMP U504 External
Mic path.
Inside the ASFIC CMP, the mic audio is filtered to eliminate frequency components outside the 3003000 Hz voice band, and pre-emphasized if pre-emphasis is enabled. The signal is then limited to
prevent the transmitter from over deviating. The limited mic audio is then routed through a summer,
which is used to add in signaling data, and then to a splatter filter to eliminate high frequency
spectral components that could be generated by the limiter. The audio is then routed to an
attenuator, which is tuned in the factory or the field to set the proper amount of FM deviation. The
TX audio emerges from the ASFIC CMP at U504-pin 40 MOD IN, at which point it is routed to the
RF section.
Page 79
Transmit Signalling Circuits2-17
8.0Transmit Signalling Circuits
HS
SUMMER
5-3-2 STATE
ENCODER
DTMF
ENCODER
ASFIC_CMP U504
PL
ENCODER
SPLATTER
FILTER
LS
SUMMER
ATTENUATOR
40
MOD IN
TO RF
SECTION
(SYNTHESIZER)
MICRO
CONTROLLER
U403
44
85
80
82
SPI
BUS
HIGH SPEED
19
CLOCK IN
(HSIO)
18
LOW SPEED
CLOCK IN
(LSIO)
Figure 2-8 Transmit Signalling Path
From a hardware point of view, there are 3 types of signaling:
•Sub-audible data (PL / DPL / Connect Tone) that gets summed with transmit voice or
signaling,
•DTMF data for telephone communication in trunked and conventional systems, and
•Audible signaling including MDC and high-speed trunking.
Note: All three types are supported by the hardware while the radio software determines which
signaling type is available.
8.1Sub-Audio Data (PL/DPL)
Sub-audible data implies signaling whose bandwidth is below 300 Hz. PL and DPL waveforms are
used for conventional operation and connect tones for trunked voice channel operation. The
trunking connect tone is simply a PL tone at a higher deviation level than PL in a conventional
system. Although it is referred to as “sub-audible data”, the actual frequency spectrum of these
waveforms may be as high as 250 Hz, which is audible to the human ear. However, the radio
receiver filters out any audio below 300 Hz, so these tones are never heard in the actual system.
Only one type of sub-audible data can be generated by U504 (ASFIC CMP) at any one time. The
process is as follows, using the SPI BUS, the µP programs the ASFIC CMP to set up the proper lowspeed data deviation and select the PL or DPL filters. The µP then generates a square wave which
strobes the ASFIC PL / DPL encode input LSIO U504-pin 18 at twelve times the desired data rate.
For example, for a PL frequency of 103 Hz, the frequency of the square wave would be 1236 Hz.
This drives a tone generator inside U504 which generates a staircase approximation to a PL sine
wave or DPL data pattern. This internal waveform is then low-pass filtered and summed with voice
or data. The resulting summed waveform then appears on U504-pin 40 (MOD IN), where it is sent to
the RF board as previously described for transmit audio. A trunking connect tone would be
generated in the same manner as a PL tone.
Page 80
2-18THEORY OF OPERATION
8.2High Speed Data
High speed data refers to the 3600 baud data waveforms, known as Inbound Signaling Words
(ISWs) used in a trunking system for high speed communication between the central controller and
the radio. To generate an ISW, the µP first programs the ASFIC CMP (U504) to the proper filter and
gain settings. It then begins strobing U504-pin 19 (HSIO) with a pulse when the data is supposed to
change states. U504’s 5-3-2 State Encoder (which is in a 2-state mode) is then fed to the postlimiter summer block and then the splatter filter. From that point it is routed through the modulation
attenuator and then out of the ASFIC CMP to the RF board. MDC is generated in much the same
way as trunking ISW. However, in some cases these signals may also pass through a data preemphasis block in the ASFIC CMP. Also these signaling schemes are based on sending a
combination of 1200 Hz and 1800 Hz tones only. Microphone audio is muted during high speed data
signaling.
8.3Dual Tone Multiple Frequency (DTMF) Data
DTMF data is a dual tone waveform used during phone interconnect operation. It is the same type
of tones which are heard when using a “Touch Tone” telephone.
There are seven frequencies, with four in the low group (697, 770, 852, 941 Hz) and three in the
high group (1209, 1336, 1477 Hz). The high-group tone is generated by the µP (U403-46) strobing
U504-19 at six times the tone frequency for tones less than 1440 Hz or twice the frequency for
tones greater than 1440 Hz. The low group tone is generated by the ASFIC CMP, controlled by the
µP via SPI bus. Inside U504 the low-group and high-group tones are summed (with the amplitude of
the high group tone being approximately 2 dB greater than that of the low group tone) and then preemphasized before being routed to the summer and splatter filter. The DTMF waveform then follows
the same path as was described for high-speed data.
Page 81
Receive Audio Circuits2-19
9.0Receive Audio Circuits
ACCESSORY
CONNECTOR
11
FLT RX AUDIO
SPKR +
SPKR -
INT
SPKR-
CONTROL HEAD
CONNECTOR
LS IO
SQ DET
17
83
P1
16
1
19
20
J2
18
HANDSET
AUDIO
18
80
85
EXTERNAL
SPEAKER
INTERNAL
SPEAKER
FROM
RF
SECTION
(IF IC)
DISC
AUDIO
43
37
2
GCB4
AUX RX
DISC
U509
U IO
DEEMPHASIS
1
9
MUTE
39
4110
AUDIO
URX OUT
VOLUME
ATTEN.
FILTER AND
LIMITER, RECTIFIER
FILTER, COMPARATOR
AUDIO
PA
U502
U505
CH ACT
4
6
INT
SPKR+
14
GCB1
ASFIC_CMP
U504
PL FILTER
LIMITER
SQUELCH
CIRCUIT
16
84
MICRO
CONTROLLER
U403
9.1Squelch Detect
The radio’s RF circuits are constantly producing an output at the discriminator (IF IC). This signal
(DISC AUDIO) is routed to the ASFIC CMP’s squelch detect circuitry input DISC (U504-pin 2). All of
the squelch detect circuitry is contained within the ASFIC CMP. Therefore from a user’s point of
view, DISC AUDIO enters the ASFIC CMP, and the ASFIC CMP produces two CMOS logic outputs
based on the result. They are CH ACT (U504-16) and SQ DET (U504-17).
The squelch signal entering the ASFIC CMP is amplified, filtered, attenuated, and rectified. It is then
sent to a comparator to produce an active high signal on CH ACT. A squelch tail circuit is used to
produce SQ DET(U504-17) from CH ACT. The state of CH ACT and SQ DET is high (logic “1”)
when carrier is detected, otherwise low (logic “0”).
CH ACT is routed to the µP pin 84 while SQ DET is routed to the µP pin 83.
SQ DET is used to determine all audio mute / unmute decisions except for Conventional Scan. In
this case CH ACT is a pre-indicator as it occurs slightly faster than SQ DET.
Figure 2-9 Receive Audio Paths
Page 82
2-20THEORY OF OPERATION
9.2Audio Processing and Digital Volume Control
The receiver audio signal (DISC AUDIO) enters the controller section from the IF IC where it is.DC
coupled to ASFIC CMP via the DISC input U504-pin 2. The signal is then applied to both the audio
and the PL/DPL paths
The audio path has a programmable amplifier, whose setting is based on the channel bandwidth
being received, an LPF filter to remove any frequency components above 3000 Hz, and a HPF to
strip off any sub-audible data below 300 Hz. Next, the recovered audio passes through a deemphasis filter (if it is enabled to compensate for Pre-emphasis which is used to reduce the effects
of FM noise). The IC then passes the audio through the 8-bit programmable attenuator whose level
is set depending on the value of the volume control. Finally the filtered audio signal passes through
an output buffer within the ASFIC CMP. The audio signal exits the ASFIC CMP at AUDIO output
(U504 pin 41).
The µP programs the attenuator, using the SPI BUS, based on the volume setting. The minimum /
maximum settings of the attenuator are set by codeplug parameters.
Since sub-audible signaling is summed with voice information on transmit, it must be separated
from the voice information before processing. Any sub-audible signaling enters the ASFIC CMP
from the IF IC at DISC U504-2. Once inside, it goes through the PL/DPL path. The signal first
passes through one of the two low-pass filters, either the PL low-pass filter or the DPL/LST low-pass
filter. Either signal is then filtered and goes through a limiter and exits the ASFIC CMP at LSIO
(U504-pin 18). At this point, the signal will appear as a square wave version of the sub-audible
signal which the radio received. The µP U403 pin 80 will decode the signal directly to determine if it
is the tone / code which is currently active on that mode.
9.3Audio Amplification Speaker (+) Speaker (-)
The output of the ASFIC CMP’s digital volume pot, U504-pin 41 is routed through DC blocking
capacitor C5049 to the audio PA (U502 pin 1 and 9).
The audio power amplifier has one inverted and one non-inverted output that produces the
differential audio output SPK+/SPK- (U502 pins 4 and 6)
The audio PA is enabled via the ASFIC CMP (U504-GCB1). When the base of Q501 is low, the
transistor is off and U502-pin 8 is high, using pull up resistor R5041, and the audio PA is ON. The
voltage at U502-pin 8 must be above 8.5 Vdc to properly enable the device.
If the voltage is between 3.3 and 6.4 V, the device will be active but has its input (U502-pins 1/9) off.
This is a mute condition which is used to prevent an audio pop when the PA is enabled.
The SPK+ and SPK- outputs of the audio PA have a DC bias which varies proportionately with B+
(U502- pin 7). B+ of 11 V yields a DC offset of 5 V, and B+ of 17 V yields a DC offset of 8.5 V. If
either of these lines is shorted to ground, it is possible that the audio PA will be damaged. SPK+ and
SPK- are routed to the accessory connector (P1-pin 1 and 16) and to the control head (connector
J2-pins 19 and 20).
Page 83
Receive Signalling Circuits2-21
9.4Handset Audio
Certain handheld accessories have a speaker within them which require a different voltage level
than that provided by U502. For these devices HANDSET AUDIO is available at control head
connector J2 pin18.
The received audio from the output of the ASFIC CMP’s digital volume attenuator is routed to U505
pin 2 where it is amplified. This signal is routed from the output of the op-amp U505 to J2-pin 18.
From the control head, the signal is sent directly to the microphone jack.
9.5Filtered Audio and Flat Audio
The ASFIC CMP output audio at U504-pin 39 is filtered and de-emphasized, but has not gone
through the digital volume attenuator. From ASFIC CMP U504-pin 39 the signal is routed via R5034
through gate U509-pin 12 and AC coupled to U505-pin 6. The gate controlled by ASFIC CMP port
GCB4 selects between the filtered audio signal from the ASFIC CMP pin 39 (URXOUT) or the
unfiltered (flat) audio signal from the ASFIC CMP pin 10 (UIO). Resistors R5034 and R5021
determine the gain of op-amp UU505-pin 6 for the filtered audio while R5032 and R5021 determine
the gain for the flat Audio. The output of U505-pin 7 is then routed to P1 pin 11 via DC blocking
capacitor C5003. Note that any volume adjustment of the signal on this path must be done by the
accessory.
10.0Receive Signalling Circuits
DET AUDIO
DISCRIMINATOR AUDIO
FROM RF SECTION
(IF IC)
DATA FILTER
AND DEEMPHASIS
DISC
2
FILTER
PLEAP
8
LIMITER
ASFIC_CMP
U504
LIMITER
PLCAP2
25
Figure 2-10 Receive Signalling Paths
10.1Sub-Audio Data (PL/DPL) and High Speed Data Decoder
The ASFIC CMP (U504) is used to filter and limit all received data. The data enters the ASFIC CMP
at input DISC (U504 pin 2). Inside U504 the data is filtered according to data type (HS or LS), then it
is limited to a 0-3.3 V digital level. The MDC and trunking high speed data appear at U504-pin 19,
where it connects to the µP U403 pin 80.
HSIO
LSIO
19
18
82
CONTROLLER
44
80
85
MICRO
U403
Page 84
2-22THEORY OF OPERATION
The low speed limited data output (PL, DPL, and trunking LS) appears at U504-pin18, where it
connects to the µP U403-pin 80.
The low speed data is read by the µP at twice the frequency of the sampling waveform; a latch
configuration in the ASFIC CMP stores one bit every clock cycle. The external capacitors C5028,
and C5026 set the low frequency pole for a zero crossings detector in the limiters for PL and HS
data. The hysteresis of these limiters is programmed based on the type of received data.
10.2Alert Tone Circuits
When the software determines that it needs to give the operator an audible feedback (for a good
key press, or for a bad key press), or radio status (trunked system busy, phone call, circuit failures),
it sends an alert tone to the speaker. It does so by sending SPI BUS data to U504 which sets up the
audio path to the speaker for alert tones. The alert tone itself can be generated in one of two ways:
internally by the ASFIC CMP, or externally using the µP and the ASFIC CMP.
The allowable internal alert tones are 304, 608, 911, and 1823 Hz. In this case a code contained
within the SPI BUS load to the ASFIC CMP sets up the path and determines the tone frequency,
and at what volume level to generate the tone. (It does not have to be related to the voice volume
setting.)
For external alert tones, the µP can generate any tone within the 100-3000 Hz audio band. This is
accomplished by the µP generating a square wave which enters the ASFIC CMP at U504 pin 19.
Inside the ASFIC CMP this signal is routed to the alert tone generator.
The output of the generator is summed into the audio chain just after the RX audio de-emphasis
block. Inside U504, the tone is amplified and filtered, then passed through the 8-bit digital volume
attenuator, which is typically loaded with a special value for alert tone audio. The tone exits at U504pin 41 and is routed to the audio PA like receive audio.
Page 85
Chapter 3
TROUBLESHOOTING CHARTS
This section contains detailed troubleshooting flowcharts. These charts should be used as a guide in
determining the problem areas. They are not a substitute for knowledge of circuit operation and
astute troubleshooting techniques. It is advisable to refer to the related detailed circuit descriptions
in the theory of operation sections prior to troubleshooting a radio.
Most troubleshooting charts end up by pointing to an IC to replace. It is not always noted, but it is
good practice to verify supplies and grounds to the affected IC and to trace continuity to the
malfunctioning signal and related circuitry before replacing any IC. For instance, if a clock signal is
not available at a destination, continuity from the source IC should be checked before replacing the
source IC.
Page 86
3-2TROUBLESHOOTING CHARTS
1.0Troubleshooting Flow Chart for Receiver RF (Sheet 1 of 2)
START
Yes
Problem in 12 KHz and
25 KHz channel spacing
Go to
DC Section
SW Problem
SW Problem
Go to SYN
Section
No
No
No
No
9V on
R310 (LNA)
OK
?
RX_EN
ON ?
LOC_DIST
ON
?
LO
POWER
OK ?
Yes
Yes
Yes
Yes
Check
RX_EN
Check
LOC_DIST
Check
TPI
Check 5V
on R337 (UHF),
R336 (VHF)
Go to
DC Section
No
3 V
to U301
Okay ?
Yes
Check D301-304
Replace IF Filters( FL304, FL301
If problem in 25 KHz spacing
Go to
DC Section
No
5V
(IF AMP)
OK ?
Go
to A
Yes
Check 3V
on R339
Page 87
Troubleshooting Flow Chart for Receiver RF (Sheet 1 of 2)3-3
1.1Troubleshooting Flow Chart for Receiver (Sheet 2 of 2)
From
A
Go to
DC Section
Check
the component
FE Problem
Replace
Q303, Q301
Check passive
components
No
No
No
3V
(IFIC -Vcc)
OK ?
Installation
OK ?
RF
Power
> -28 dBM
?
Check visually
Yes
Yes
Yes
Replace
Q305, Q300, U302
Check passive
components
FE and BE
components
installation ?
Inject - 40dBm (CW)
to RF connector
Check Power on
C335 (UHF) C332 (VHF)
Check Power on
C337 (UHF),
C336 (VHF)
No
RF
Power
> -28 dBM
?
Yes
Check Y301
44.395 MHz
Replace Y301
Go to DC Section
No
3V to
U301
OK
?
No
Yes
Y301
OK
?
Yes
Replace U300
Replace Q302, Y300
Check D301 - 304
Page 88
3-4TROUBLESHOOTING CHARTS
2.0Troubleshooting Flow TX RF (No Output Power)
START
Key the radio using
Radster (type k)
Press F6 and
read the ASFIC byte
Tune the
PA_BIAS
Replace
L108
Yes
Yes
Is
Byte
#04=0
?
Is
POUT
< 1 Watt
?
No
No
Put 80 Hex in byte #06
and measure the
Output Power
End
Page 89
Troubleshooting Flow TX RF (No Output Power)3-5
2.1Troubleshooting Flow TX RF (No Output Power/No Current)
START
Key the radio using
Radster (type k)
Put 80 Hex in byte #06
and measure the
Output Power
Tune the
PA_BIAS
Replace
the
PA
(Q100)
Replace
R122
Yes
POUT >
10 Watts
Yes
20kOhms
< R <40KOhms
Is
No
?
Is
No
Measure the
resistance from
R131 to ground
Replace the
PA (Q100)
Tune the
PA_BIAS
Page 90
3-6TROUBLESHOOTING CHARTS
2.2Troubleshooting Flow TX RF (Not Txing at Nominal power)
START
Key the radio using radster (type k)
Press F6 and read the ASFIC byte
Tune the PA_BIAS
Repalace PA (Q100)
Yes
Yes
Is byte
#04=0
?
Is R131
< 1K Ohm
?
No
Measure the resistance
from R131 to ground
No
Tune the K and M factors
using the Tuner tool
Page 91
Troubleshooting Flow Chart for Synthesizer3-7
3.0Troubleshooting Flow Chart for Synthesizer
Check D200, D201,
C2026, C2025, &
C2027
YES
5V
at pin 6 of
D200
NO
Check
R228
<40 mVDC in RX &
>4.5 VDC in TX?
(at VCO section)
NO
Is
U201 Pin 19
?
YES
Correct
Problem
Is
U200 Pin 47
at = 13VDC
?
YES
Check R201
NO
U200
Pin 2 >4.5 VDC in
Tx & <40 mVDC
in Rx
Star t
NO
Is
YES
?
Visual
check of the
Board
OK?
NO
Check 5V
Regulator
U503
YES
at U200
13 & 30
signals
at Pin’s 14 &15
of U200
YES
+5V
Pin’s
?
Are
YES
NO
?
5V
at U200
pins 5, 20, 34
& 36
YES
Is
16.8MHz
Signal at U200
Pin 19
?
YES
Waveforms
at Pins 14 & 15
triangular
YES
NO
NO
Y201 and associated
Are
?
NO
C h ec k 5 V
Regulator
U503
Is
16.8MHz
signal at
U200 Pin
23?
NO
Check
Parts
NO
Pins 7,8 & 9
of U200 toggle
when channel is
changed?
Replace
U200
YES
Do
Is
RF level at
U200 Pin 32
-12 < x <-25
dBm
?
YES
Replace U200
NO
NO
Replace U200
If C2052, R208,C2067,
C2068, L210 are OK, then
see VCO
troubleshooting chart
NO
Is
there a short
between Pin 47 and
Pins 14 & 15 of
U200
?
YES
Remove
Shorts
Check programming
lines between
U403 and U200
Pins 7,8 & 9
Check uP U403
Troubleshooting
Chart
NO
YES
Is
information
from mP U403
correct
?
YES
Replace U200
Page 92
3-8TROUBLESHOOTING CHARTS
4.0Troubleshooting Flow Chart for VCO
RX VCO
Low or no RF Signal
at TP1
Visual check
of board
OK?
YES
4.5V DC
at U201 Pin 14 & 18
OK ?
YES
35mV DC at
U201 Pin 19
OK?
YES
Is RF available
at base of Q200
YES
Are Q200
Base at 2.4V
Collector at 4.5V
Emitter at 1.7V
YES
NO
NO
NO
NO
Make sure Synthesizer is
working correctly and runner
between U200 Pin 28 and
U201 Pin 14 & and is OK
between U200 Pin 2
NO
Correct
Problem
Check runner
and U201 Pin 19
Replace U201
If all parts associated
with the pins are OK,
replace Q200
Low or no RF Signal
NO
NO
at U201 Pin 14&18
NO
Is RF available
at input to PA
Visual check
of board
OK?
YES
4.5V DC
OK ?
YES
4.8V DC at
U201 Pin 19
OK?
YES
Are U201 Pins
13 at 4.4V
15 at 1.1V
10 at 4.5V
16 at 1.9V
YES
at C2060
YES
NO
TX VCO
If all parts
NO
associated
with the pins
replace U201
If parts between
R109 & U201 Pin10
are OK, replace U201
are OK,
If all parts from collector
of Q200 to TP1 are
OK, replace Q200
Power OK but
no modulation
Check parts to pre-driver
Audio =180mVRMS
at “-” Side of
D205
YES
4.5VDC
at D205
YES
If R211 and R12 are OK,
then replace D205
NO
Replace R212
NO
Replace R211
Page 93
Troubleshooting Flow Chart for DC Supply (1 of 2)3-9
5.0Troubleshooting Flow Chart for DC Supply (1 of 2)
Since the failure of a critical voltage supply might cause the radio to automatically power down,
supply voltages should first be probed with a multimeter. If all the board voltages are absent, then
the voltage test point should be retested using a rising-edge-triggered oscilloscope. If the voltage is
still absent, then another voltage should be tested using the oscilloscope. If that voltage is present,
then the original voltage supply in question is defective and requires investigation of associated
circuitry.
5V
Check VDC on
C5006
Go to 3V
Replace U503
Go to D3_3V
Yes
Yes
Check VDC on
Yes
V=5V
?
9v<V<9.8v
?
3V
C5008
V=3.3V
?
No
No
No
Check Voltage on
C5042
Go to Start
Check Voltage on
C5043
Replace U508
Yes
9v<V<9.8v
?
No
Go to Start
Page 94
3-10TROUBLESHOOTING CHARTS
5.1Troubleshooting Flow Chart for DC Supply (2 of 2)
D3_3V
Check VDC on
C5007
Go to Digital Section
Replace U510
Yes
Yes
V=3.3V
?
9v<V<9.8v
?
No
No
Check Voltage on
C5041
Go to Start
Page 95
UHF2 PCB/ SCHEMATICS/ PARTS LISTS
1.0Allocation of Schematics and Circuit Boards
1.1UHF2 and Controller Circuits
The UHF circuits are contained on the printed circuit board (PCB) which also contains the Controller
circuits. This Chapter shows the schematics for both the UHF circuits and the Controller circuits. The
PCB component layouts and the Parts Lists in this Chapter show both the Controller and UHF circuit
components. The UHF and Controller schematics and the related PCB and parts list are shown in
the tables below.
Table 4-1 UHF2 1-25 W Diagrams and Parts Lists
PCB :
8488978U01 (P9) Main Board Top Side
8488978U01 (P9) Main Board Bottom Side
SCHEMATICS
Main Circuit
Transmitter
Synthesiser and VCO
Receiver Front and Back End
DC and Audio Ccts
Microprocessor and Controller Ccts
Power Control Cct