MITSMI PST575JM, PST575K, PST575KM, PST575L, PST575LM Datasheet
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MITSUMI |
System Reset PST575 |
System Reset
Monolithic IC PST575
Outline
This IC functions in a variety of CPU systems and other logic systems, to detect power supply voltage and reset the system accurately when power is turned on or interrupted. This ultra-low current consumption low reset type system reset IC has a built-in delay time generating circuit that can set the time by an external capacitor and resistor. It is ideal for use in multi-CPU systems because a fast-rising output waveform can be obtained.
Features
1. |
Ultra-low current consumption |
ICCH=7.5µA typ. ICCL=400µA typ. |
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2. |
Low operating limit voltage |
0.65V typ. |
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3. |
Output current high for ON |
30mA typ. |
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4. |
Hysteresis voltage provided in detection voltage |
50mV typ. |
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5. |
Delay time can set over a wide range using |
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external capacitor and resistor. |
10µS~10S |
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6. |
10 ranks of detection voltage |
PST575 C : 4.5V typ. |
H : 3.1V typ. |
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D : 4.2V typ. |
I : 2.9V typ. |
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E : 3.9V typ. |
J : 2.7V typ. |
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F : 3.6V typ. |
K : 2.5V typ. |
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G : 3.3V typ. |
L : 2.3V typ. |
Package
MMP-4A (PST575 
M) DIP-8A (PST575 
)
* 
contains detection voltage rank
Applications
1.Reset circuits in microcomputers, CPUs and MPUs (especially multi-CPU sets)
2.Logic circuit reset circuits.
3.Battery voltage check circuits.
4.Back-up power supply switching circuits.
5.Level detection circuits.
Pin Assignment
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3 |
GND |
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1 |
VCC |
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8 |
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4 |
3 |
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4 |
Cd |
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2 |
VOUT |
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5 |
VOUT |
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Cd |
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4 |
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1 |
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7 |
VCC |
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4 |
GND |
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DIP-8A |
MMP-4A |
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MITSUMI |
System Reset PST575 |
Equivalent Circuit Diagram
Absolute Maximum Ratings (Ta=25°C)
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Symbol |
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Rating |
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Units |
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Storage temperature |
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TSTG |
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-40~+125 |
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°C |
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Operating temperature |
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TOPR |
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-20~+75 |
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°C |
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Power supply voltage |
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VCC max. |
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-0.3~10 |
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V |
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Allowable loss |
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Pd |
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200 (MMP-3A) |
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mW |
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300 (TO-92A) |
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Electrical Characteristics |
(Ta=25°C) (Except where noted otherwise, resistance unit is Ω ) |
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Item |
Symbol |
Measuring circuit |
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Measurement conditions |
Min. |
Typ. |
Max. |
Units |
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PST575C |
4.3 |
4.5 |
4.7 |
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PST575D |
4.0 |
4.2 |
4.4 |
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PST575E |
3.7 |
3.9 |
4.1 |
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RL=470 |
PST575F |
3.4 |
3.6 |
3.8 |
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PST575G |
3.1 |
3.3 |
3.5 |
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Detection voltage |
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VS |
1 |
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< |
0.4V |
V |
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VOL = |
PST575H |
2.9 |
3.1 |
3.3 |
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VCC=H |
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L |
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PST575I |
2.75 |
2.90 |
3.05 |
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PST575J |
2.55 |
2.70 |
2.85 |
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PST575K |
2.35 |
2.50 |
2.65 |
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PST575L |
2.15 |
2.30 |
2.45 |
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Hysteresis voltage |
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VS |
1 |
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RL=470, VCC=L |
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H |
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L |
25 |
50 |
100 |
mV |
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Detection voltage |
VS/ T |
1 |
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RL=470, Ta=-20°C~+75°C |
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±0.01 |
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%/°C |
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temperature coefficient |
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Low-level output voltage |
VOL |
1 |
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VCC=Vs min.-0.05V, RL=470 |
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0.1 |
0.4 |
V |
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Output leakage current |
IOH |
1 |
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VCC=7.5V |
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±0.1 |
µA |
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Circuit current while on |
ICCL |
1 |
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VCC=Vs min.-0.05V, RL=∞ |
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400 |
650 |
µA |
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Circuit current while off |
ICCH |
1 |
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VCC=Vs typ./0.85V, RL=∞ |
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7.5 |
12.0 |
µA |
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"H" transport delay time |
tpLH |
2 |
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Rd=100k, Cd=0.01µF *1 |
0.75 |
1.25 |
1.75 |
mS |
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"L" transport delay time |
tpHL |
2 |
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Rd=100k, Cd=0.01µF< |
*1 |
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6 |
20 |
µS |
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Operating power supply voltage |
VopL |
1 |
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RL=4.7kΩ , VOL = 0.4V |
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0.65 |
0.85 |
V |
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Output current while on I |
IOL I |
1 |
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VCC=Vs min.-0.05V, RL=0 |
8 |
30 |
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mA |
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Output current while on II |
IOL II |
1 |
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Ta=-20°C~+75°C, RL=0 *2 |
5 |
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mA |
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Threshold voltage for delay |
Vtsh |
1 |
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VCC=5.0V, Rd=100k, Cd=0.01µF |
3.5 |
3.7 |
3.9 |
V |
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time setting comparator (CO2) |
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RL=4.7k, CL=100pF |
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*1 : tpLH : VCC= (VS typ.-0.4V) 
(VS typ.+0.4V), tpHL : VCC= (VS typ.+0.4V) 
(VS typ.-0.4V), CL=100pF
*2: VCC=VS min.-0.15V
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