Marantz PMD-340, PMD-331, PMD-330 Service Manual

Service
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Manual
PMD330 /N1M, /U1B, /F1B PMD331 /N1M, /U1B, /F1B
PMD330/331/340
CD Player
PMD330
CD PLAYER
IR
TIME
21
POWER
LEVELHEADPHONE
MAXMIN
3
TEXT
8
6
7
MODE
5
4
PROG
PRESET
9
0
A-B PITCH
END
INDEX PITCH
CLEAREXIT
ON/OFF
ENTER
CONTRAST
PMD331 / 340
CD PLAYER
IR
216TIME
POWER
LEVELHEADPHONE
MAXMIN
3
TEXT
8
7
MODE
-
4
5
PROG
9
PRESET
0
A-B PITCH
END
INDEX PITCH BEND
--+
CLEAREXIT
ON/OFF
+
ENTER
CONTRAST PITCH / SEARCH
TABLE OF CONTENTS
SECTION PAGE
1. TECHNICAL SPECIFICATIONS ................................................................................................................. 1
2. SERVICE HINTS ....................................................................................................................................... 2
3. SERVICE TOOLS ..................................................................................................................................... 2
4. ADJUSTMENT AND SERVICE MODE .................................................................................................. 3
5. MICROPROCESSOR AND IC DATA..................................................................................................... 5
6. WIRING DIAGRAM ................................................................................................................................. 13
7. BLOCK DIAGRAM .................................................................................................................................. 15
8. SCHEMATIC DIAGRAM......................................................................................................................... 17
9. PARTS LOCATIONS .............................................................................................................................. 24
10. EXPLODED VIEW AND MECHANISM PARTS LIST......................................................................... 28
11. TECHNICAL DESCRIPTION ..................................................................................................................... 31
12. ELECTRICAL PARTS LIST ................................................................................................................... 33
Please use this service manual with referring to the user guide ( D.F.U. ) without fail.
PMD330 / 331 / 340
R
371K855010 MIT 3120 785 22250 First Issue 1999.12
MARANTZ DESIGN AND SERVICE
MARANTZ AMERICA, INC.
WILDASH AUDIO SYSTEMS NZ
Using superior design and selected high grade components, MARANTZ company has created the ultimate in stereo sound. Only original MARANTZ parts can insure that your MARANTZ product will continue to perform to the specifications for which it is famous. Parts for your
MARANTZ equipment are generally available to our National Marantz Subsidiary or Agent.
ORDERING PARTS :
Parts can be ordered either by mail or by Fax.. In both cases, the correct part number has to be specified. The following information must be supplied to eliminate delays in processing your order :
1. Complete address
2. Complete part numbers and quantities required
3. Description of parts
4. Model number for which part is required
5. Way of shipment
6. Signature : any order form or Fax. must be signed, otherwise such part order will be considered as null and void.
USA
MARANTZ AMERICA, INC 440 MEDINAH ROAD ROSELLE, ILLINOIS 60172 USA PHONE : 630 - 307 - 3100 FAX : 630 - 307 - 2687
AMERICAS
SUPERSCOPE TECHNOLOGIES, INC. MARANTZ PROFESSIONAL PRODUCTS 2640 WHITE OAK CIRCLE, SUITE A AURORA, ILLINOIS 60504 USA PHONE : 630 - 820 - 4800 FAX : 630 - 820 - 8103
AUSTRALIA
JAMO AUSTRALIA PTY LTD 1 EXPO COURT, P.O. BOX 350 MT. WAVERLEY VIC 3149 AUSTRALIA PHONE : +61 - 3 - 9543 - 1522 FAX : +61 - 3 - 9543 - 3677
NEW ZEALAND
WILDASH AUDIO SYSTEMS NZ 14 MALVERN ROAD MT ALBERT AUCKLAND NEW ZEALAND PHONE : +64 - 9 - 8451958 FAX : +64 - 9 - 8463554
EUROPE / TRADING
MARANTZ EUROPE B.V. P.O.BOX 80002, BUILDING SFF2 5600 JB EINDHOVEN THE NETHERLANDS PHONE : +31 - 40 - 2732241 FAX : +31 - 40 - 2735578
AUSTRALIA
TECHNICAL AUDIO GROUP PTY, LTD 558 DARLING STREET, BALMAIN, NSW 2041, AUSTRALIA PHONE : 61 - 2 - 9810 - 5300 FAX : 61 - 2 - 9810 - 5355
THAILAND
MRZ STANDARD CO.,LTD 746 - 754 MAHACHAI ROAD., WANGBURAPAPIROM, PHRANAKORN, BANGKOK, 10200 THAILAND PHONE : +66 - 2 - 222 9181 FAX : +66 - 2 - 224 6795
TAIWAN
PAI- YUING CO., LTD. 6 TH FL NO, 148 SUNG KIANG ROAD, TAIPEI, 10429, TAIWAN R.O.C. PHONE : +886 - 2 - 25221304 FAX : +886 - 2 - 25630415
BRAZIL
PHILIP DA AMAZONIA IND. ELET. ITDA CENTRO DE INFORMACOES AO CEP 04698-970 SAO PAULO, SP, BRAZIL PHONE : 0800 - 123123 FAX : +55 11 534. 8988
(Discagem Direta Gratuita)
CANADA
LENBROOK INDUSTRIES LIMITED 633 GRANITE COURT, PICKERING, ONTARIO L1W 3K1 CANADA PHONE : 905 - 831 - 6333 FAX : 905 - 831 - 6936
SINGAPORE
WO KEE HONG (S) PTE LTD WO KEE HONG CENTRE NO.23, LORONG 8, TOA PAYOH SINGAPORE 319257 PHONE : +65 2544555 FAX : +65 2502213
MALAYSIA
WO KEE HONG ELECTRONICS SDN. BHD. SUITE 8.1, LEVEL 8, MENARA GENESIS, NO. 33, JALAN SULTAN ISMAIL, 50250 KUALA LUMPUR, MALAYSIA PHONE : +60 3 - 2457677 FAX : +60 3 - 2458180
JAPAN
Technical
MARANTZ JAPAN, INC. 35- 1, 7- CHOME, SAGAMIONO SAGAMIHARA - SHI, KANAGAWA JAPAN 228-8505 PHONE : +81 42 748 1013 FAX : +81 42 741 9190
KOREA
MK ENTERPRISES LTD. ROOM 604/605, ELECTRO-OFFICETEL, 16-58, 3GA, HANGANG-RO, YONGSAN-KU, SEOUL KOREA PHONE : +822 - 3232 - 155 FAX : +822 - 3232 - 154
SHOCK, FIRE HAZARD SERVICE TEST :
CAUTION : After servicing this appliance and prior to returning to customer, measure the resistance between either primary AC
cord connector pins ( with unit NOT connected to AC mains and its Power switch ON ), and the face or Front Panel of product and controls and chassis bottom. Any resistance measurement less than 1 Megohms should cause unit to be repaired or corrected before AC power is applied, and verified before it is return to the user/customer. Ref. UL Standard No. 813.
In case of difficulties, do not hesitate to contact the Technical Department at above mentioned address.
991207MIT
1. TECHNICAL SPECIFICATIONS
PMD330 PMD331 / PMD340
General specifications
System Compact Disc - Digital Audio Number of channels 2 Compatible discs CD-DA, CD-R, CD-RW (12 cm, 8 cm)
Audio characteristics
Channels 2 channels Frequency characteristics 20 Hz to 20 kHz +/- 0.3 dB Dynamic range 90 dB (1 kHz) S/N ratio 100 dB (1 kHz) Total harmonic distortion (THD) 0.005 % (1 kHz) Wow and flutter Quartz precision Error correction method Cross-interleave Read-Solomon code (CIRC) Analog output Pin jack,unbalanced (RCA) 2.0V RMS Stereo
XLR jack,balanced (XLR) +16 dBu /600 , @ 0 dB FS (variable range) (-11 dBu to +21 dBu, variable)
Digital output Pin jack (SPDIF) 0.5 Vp-p/75
XLR jack (SPDIF) 3.5 Vp-p/110
optical connector -19 dBm Search precision 1 frame Pitch control Maximum: +/-12% in 0.1% steps Pitch bend control +/- 8 % Strat timing 20 ms
Remote control
Infrared remote control input IN (IR sensor) RC5 remote control input/output RCA IN (INT/EXT switch)/OUT Remote control input/output D-SUB 25-Pin female
Optical anning method
Laser AlGaAs semiconductor Wavelength 780 nm
Signal system
Sampling frequency 44.1 kHz Quantization 16-bit linear/channel
Power supply section
AC power supply /F : 100V, AC 50/60Hz, /N : 230V, AC 50Hz, /U : 120V, AC 60Hz Power consumption 12 W 17 W
Cabinet, etc.
External dimensions (W x H x D) 483 x 100 x 325 mm (19 x 3-15/16 x 12- 13/16 inches) Weight 4.8 kg (10.6 lbs) 4.9 kg (10.8 lbs) Operating temperature range + 5°C to + 35°C Operating humidity range 5% to 90% (without dew)
Due to our continuing efforts to improve our products, the specifications and appearance of this product are subject to change without prior notice.
2. SERVICE HINTS
3. SERVICE TOOLS
Audio signals disc 4822 397 30184 Disc without errors (SBC444)+ Disc with DO errors, black spots and fingerprints (SBC444A) 4822 397 30245 Disc (65 min 1kHz) without no pause 4822 397 30155 Max. diameter disc (58.0 mm) 4822 397 60141 Torx screwdrivers
Set (straight) 4822 395 50145 Set (square) 4822 395 50132
13th order filter 4822 395 30204
1 2
4. ADJUSTMENT AND SERVICE MODE
FUNCTION
SW
Input
GPI * Input
RC5
Input
FUNCTION
SW
Input
GPI * Input
RC5
Input
Open/Close 28 -- 29 Preset 33 -- 34 Time 29 -- 30 Index + 17 8 18 CD-Text 30 -- 31 Index - 18 9 19 Mode 31 -- 32 0 1 -- 2 Stop *** -- -- -- 1 2 -- 3 Cue **** -- -- -- 2 3 -- 4 Play/Pause 11 -- -- 3 4 -- 5 Play -- 1 12 4 5 -- 6 Cue + Play 13 4 -- 5 6 -- 7 Pause -- 2 13 6 7 -- 8 Next 15 10 16 7 8 -- 9 Previous 16 11 17 8 9 -- 10 FF 19 6 20 9 10 -- 11 REW
20 7 21
Pitch Bend +*26 -- 27
END 22 -- 23 Pitch Bend - *27 -- 28 A-B Repeat 21 -- 22 Pitch + 24 ** 13 25
Service
-- -- 35
Pitch - 25 ** 14 26 Program 32 -- 33
Fader (Normal)
--
Fader Input
--
Pitch On/Off
23 15 24
Fader (Invert)
--
Fader Input
--
1.1. Digital Output (Coaxial) Check
On the preset menu, set "D.OUT" to "ON".(PMD331/PMD340) Do waveform observation with the oscilloscope, and confirm the digital output level of JT01 to be 0.5Vp-p, square wave within ±20% .
1.2. Balanced Output Adjustment (PMD331/PMD340)
1kHz, 0 dB are played back by using TEST disc. Turn RB01 on the rear panel, and adjust the output of JB53 (Balanced Out L-CH). Turn RB02 on the rear panel, and adjust the output of JB54 (Balanced Out R-CH). Adjust each output level to 16 dBu, within ±0.5dB.
1.3. Service Mode
1) With power off, simultaneously press the PLAY/PAUSE, MODE and TIME buttons, and at the same time, press the power button. At this time the LCD shows the model name and firmware version.
2) Next, press CUE button.
3) At this time the LCD shows " Test : Version ". (TEST MODE select menu)
4) The NEXT and PREVIOUS buttons change the TEST MODE(refer to the chart below). The PLAY button selects it.
5) Pressing the CUE button returns to the TEST MODE select menu.
6) Press the STOP button to exit the service mode.
INDEX
It is not usually necessary to confirm.
*
TEST MODE
MPU firmware version check LCD&LED test
Confirmation of Buttons, GPI Control I/O and RC5
Check of EEPROM Read/Write Manual moving of the pickup
1.3.1. Model name and firmware version check
When the LCD shows "Test : Version", press the PLAY button, to see the model name and the MPU firmware version. Pressing the CUE button returns to the TEST MODE select menu.
1.3.2. LCD and LED test
1) Set the LCD panel contrast adjustment screw to mechani­cal center. (you will feel a click.)
2) When the LCD shows "Test : Display", press the PLAY button.
3) The LCD and LED lights as the chart below.
4) Each time the PLAY/PAUSE button is pressed the LCD and
5) Pressing the CUE button returns to the TEST MODE select
LED change as shown in the chart below.
menu.
PATTERN 1
PATTERN 2
All light up
None light up
CONTENTS
: Light X : Not Light
3 4
*
Test mode
PATTERN 1
PATTERN 2
1.3.3. Confirmation of Buttons, GPI Control I/O and RC5
1) When the LCD shows "Test : Key&GPI", press the PLAY button.
2) The LCD shows "No Signal".
3) Press a button, GPI Control I/O and RC5 are input, and the LCD changes as shown in the chart below.
: PMD331, PMD340 only. ** : PMD330 only.
*
: The service mode is exited.
***
: The TEST MODE select menu is returned.
****
1.3.4. Check of EEPROM Read/Write
1) When the LCD shows "Test : EE-PROM", press the PLAY button.
2) Check of EEPROM Read/Write begins. The check takes about 1 minute. During the check pressing any button has no effect.
3) At this time the LCD shows as the following order.
"ADDR (LOW)"--->"WRITE (LOW)"--->"WRITE (HIGH)"
--->"PAGE WRITE"--->"EEPROM OK!"
4) If there is an error in the EEPROM, the LCD shows "EEPROM NG!".
5) Pressing the CUE button returns to the TEST MODE se­lect menu.
1.3.5. Manual moving of Pick up
1) When the LCD shows "Test : Pickup", press the PLAY button.
2) The LCD shows "Laser power". The laser diode turns on.
3) Press the NEXT button. The sled will move to the outside.
4) Press the PREVIOUS button. The sled will move to the inside.
5) Pressing the CUE button returns to the TEST MODE select menu.
Pin Name Function
CS
Chip Select
SCK Serial Data Clock
SI Serial Data Input
SO Serial Data Output
GND Ground
VCC Power Supply
WP
Write Protect
HOLD
Suspends Serial Input
NC No Connect
DC Dont Connect
1 2 3 4
8 7 6 5
CS SO WP
GND
VCC HOLD SCK SI
5. MICROPROCESSOR AND IC DATA
PIN
PORT NAME
No.
1Vcc sys --- -- -- -- VCC Connected to the system power supply (+5V).
PB0
2
/TP8/TMO0 PB1
3
/TP9/TMIO1 PB2
4
/TP10/TMO2 PB3
5
/TP11/TMIO3 PB4
6
/TP12 PB5
7
/TP13 PB6
8
/TP14 PB7
9
/TP15 RESO
10
/ /_FWE 11 Vss sys -- -- -- -- VSS Connected to the system power supply (0V). 12 P90/TxD0 O O -- Low -- DEBUG_TXD TXD for debug mode. 13 P91/TxD1 O O -- Low -- FLASH_TXD TXD for FLASH MPU program. 14 P92/RxD0 I I -- Low -- DEBUG_RXD RXD debug mode.
15 P93/RxD1 I I -- High
P94 16
/SCK0/IRQ4
P95 17
/SCK1/IRQ5 18 P40 I/O O -- High OPEN ESA_SDTI RL5C357 SDTI Serial data output for ESA. 19 P41 I/O O -- High OPEN ESA_SCK RL5C357 SCK Serial clock data output for ESA.
20 P42 I/O O -- High OPEN ESA_XLT RL5C357 XLT
21 P43 I/O O Low High OPEN ESA_XSOE RL5C357 XSOE
22 Vss sys -- -- -- -- VSS Connected to the system power supply (0V).
23 P44 I/O O Low High OPEN ESA_XRST RL5C357 XRST
24 P45 I/O O Low High OPEN ESA_XWRE RL5C357 XWRE
25 P46 I/O O Low High OPEN ESA_XQOK RL5C357 XQOK
26 P47 I/O ! - High EXT_DW ESA_SDTO RL5C357 SDTO Serial data input from ESA.
27 P30 I/O
28 P31 I/O I High Low EXT_DW ESA_CHDT RL5C357 CHDT
29 P32 I/O O High Low -- CXD_RW_SEL CXD2585Q LOCK 30 P33 I/O O High Low -- CXD_LDON Laser diode ON/OFF control.
31 P34 I/O I Low -- CXD_FOK CXD2585Q FOK Focus lock detect input.
PIN
PORT NAME
No.
32 P35 I/O I Low Low -- CXD_LOCK CXD2585Q LOCK GFS l ock input. 33 P36 I/O I Low -- CXD_SSTP CXD2585Q SSTP Disc inside detect i nput.
34 P37 I/O O Low High -- CXD_XRST CXD2585Q XRST
35 Vcc sys -- -- -- -- V CC
36 P10 I/O O High Low -- CXD_DOUT_OFF CXD2585Q MD2
37 P11 I/O O High High -- CXD_MUTE CXD2585Q MUTE 38 P12 I/O O -- High -- CXD_DATA CXD2585Q DATA Serial data output for CXD2585Q.
39 P13 I/O O -- High -- CXD_XLAT CXD2585Q XLAT Serial latch data ou tput for CXD2585Q. 40 P14 I/O O -- High -- CXD_CLOK CXD2585Q CLOK Serial cl ock data output. For CXD2585Q 41 P15 I/O O -- High -- CXD_SCLK CXD2585Q SCLK Clock outp ut for SENS serial dat a read. 42 P16 I/O I -- Low -- CXD_SENS CXD2585Q SENS SENS signal inp ut.
43 P17 I/O I -- Low EXT_DW CXD_EMPH CXD2585Q EMPH
44 Vss sys -- -- -- -- VSS 45 P20 I/O I Low High EXT_UP SW_DATA0 KEY INPUT Key matrix signal input.
46 P21 I/O I Low High EXT_UP SW_DATA1 KEY INPUT Ditto. 47 P22 I/O I Low High EXT_UP SW_DATA2 KEY INPUT Ditto. 48 P23 I/O I Low High EXT_UP SW_DATA3 KEY INPUT Ditto. 49 P24 I/O I Low High EXT_UP SW_DATA4 KEY INPUT Ditto. 50 P25 I/O I Low High EXT_UP SW_DATA5 KEY INPUT Ditto. 51 P26 I/O I Low High EXT_UP SW_DATA6 KEY INPUT Ditto. 52 P27 I/O I Low High EXT_UP SW_DATA7 KEY INPUT Ditto. 53 P50 I/O O -- High -- SW_SCAN0 KEY SCAN Key matrix signal output. 54 P51 I/O O -- High -- SW_SCAN1 KEY SCAN Ditto. 55 P52 I/O O -- High -- SW_SCAN2 KEY SCAN Ditto. 56 P53 I/O O -- High -- SW_SCAN3 KEY SCAN Ditto.
57 Vss sys -- -- -- -- VSS
58 P60 I/O O -- Low -- SIF_ST 74HC4094 STR
59 P61 I/O O
60 P62 I/O O
61 P67/ -- -- OPEN PAI System clock output.
62 STBY/ sys I High High EXT_UP STBY
63 RES/ sys I Low High EXT_UP RES
64 NMI sys I -- Low EXT_DW NMI Not used. 65 Vss sys -- -- -- -- VSS
66 EXTAL sys I -- -- -- EXTAL X'tal
67 XTAL sys I -- -- -- XTAL X'tal
68 Vcc sys -- -- -- -- VCC
69 P63 I/O O -- Low -- SIF_CK 70 P64 I/O O -- Low -- DAC_DATA PCM17 10 MD/DM1 Serial data out put for D/A converter IC. 71 P65 I/O O
72 P66 I/O O
DEV
ICE
I/O
I/O O -- Low -- LCD_RS HD66712 RS
I/O O -- High -- LCD_RW HD66712 RW
I/O O -- Low -- LCD_E HD66712 E
I/O O Low High -- LCD_RESET HD66712 RESET
I/O I/O -- Low -- LCD_DB4 HD66712 DB4 LCD driver data bit 0.
I/O I/O -- Low -- LCD_DB5 HD66712 DB5 LCD driver data bit 1.
I/O I/O -- Low -- LCD_DB6 HD66712 DB6 LCD driver data bit 2.
I/O I/O -- Low -- LCD_DB7 HD66712 DB7 LCD driver data bit 3.
sys I Low Low EXT_DW FE W 74HC00
I/O I -- Low EXT_DW SIF_SO 74HC165 Parallel to serial IC (74HC165) data inpu t.
I/O O -- High
DEV
ICE
I/O
Φ
I/O ACTIVE INITIAL
!
Low High EXT_DW ESA_XWIH RL5C357 XWIH
I/O ACTIVE INITIAL
--
--
-- --
--
--
PULL
SIGNAL NAME
UP/DOWN
CXD_SQSO
INT UP
/FLASH_RXD
CXD_SQCK CXD2585Q SQCK Read out clock output for SQSO.
INT UP
PULL
UP/DOWN
Low OPEN SIF_LD 74HC165 LS/
Low -- SIF_SI 74HC4094 DA
Low -- DAC_CLK PCM1710 MC/DM2
Low -- DAC_LAT PCM1710 ML/DSD
SIGNAL NAME
CXD2585Q /74HC00
CONNECT
DEVICE
NAME
CONNECT
DEVICE
NAME
74HC4094 74HC165CKCK
CONNECT
DEVICE
PORT NAME
SQSO
CONNECT
DEVICE
PORT
FUNCTION
LCD driver register select. Instruction “L”, Data register “H” LCD driver READ/WRITE. READ “H”, WRITE “ L” LCD driver enable. Data READ/WRITE active signal. LCD driver reset. Normal “H” , Reset “L”
FLASH MPU program enable signal. Enabled “H”
Sub-Q 80bit/PCM peak level data input & CD-TEXT data input./RXD for FLASH MPU program.
Serial latch data output for ESA.
Enabled signal for ESA serial data. Enable “L ”
System reset output for ESA. Reset “L ” Write enable output for ESA. Enable “L ” Sub-code Q signal output for ESA. OK “L”
Write enable signal from ESA. Disable “L” Data monitor input from ESA. Monitoring “H ” RF gain select for CD-RW CD-RW “H”, CD-DA & CD-R “L”
FUNCTION
System reset output. Reset “L”
Connected to the system power supply (+5V). Digital audio data output ON/OFF. ON “H” Mute control output. Mute “H”
Emphasis enable/disable input. Enable “H”, Disable “L” Connected to the system power supply (0V).
Connected to the system power supply (0V). Serial strobe data out put for serial to parallel IC (74HC4094) . Serial load data output for s erial to parallel IC (74HC4094) . Serial data output for serial to parallel IC (74HC4094) .
Standby mode input for MPU. Normal mode “H” System reset input for MPU. Reset “L ”
Connected to the system power supply (0V). System clock input. Connected to 20MHz X' tal. System clock output. Connected to 20MHz X' tal. Connected to the system power supply (+5V). Serial clock data output for por ts expand IC
Serial clock data output for D/A c onverter IC. Serial latch data outpu t for D/A converter IC.
PIN
PORT NAME
No.
73 MD0 sys I -- High EXT_UP MD0
74 MD1 sys I -- High EXT_UP MD1
75 MD2 sys I -- High EXT_UP MD2
76 Avcc sys I -- -- -- AV CC 77 Vref sys I -- -- -- VREF Ditto.
P70
78
/AN0
79 P71/AN1 I I Low High EXT_UP SW_SP1 KEY INPUT
80 P72/AN2 I I Low High EXT_UP SW_FADER KEY INPUT 81 P73/AN3 I I -- High EXT_UP EEPROM_SO AT 2 5 6 4 0 SO Serial data input for EEPROM. 82 P74/AN4 I I -- Low EXT_UP TRAY_SW_OPEN
83 P75/AN5 I I -- Low EXT_UP TRAY_SW_CLOSE
P76
84
/AN6/DA0
P77
85
/AN7/DA1
86 Avss sys I -- Low -- AVSS
P80
87
/IRQ0/ P81
88
/IRQ1/
P82
89
/IRQ2/
P83
90
/IRQ3/
91 P84 I/O O Low Low -- AUDIO_MUTE
92 Vss sys -- -- -- -- VSS
PA 0
93
/TP0/TCLKA
PA 1
94
/TP1/TCLKB PA 2
95
/TP2/TIOCA0 PA 3
96
/TP3/TIOCB0 PA 4
97
/TP4/TIOCA1 PA 5
98
/TP5/TIOCB1 PA 6
99
/TP6/TIOCA2 PA 7
100
/TP7/TIOCB2
DEV
ICE
I/O ACTIVE INITIAL
I/O
I I Low High EXT_UP SW_SP0 KEY INPUT
I I -- Low UP/DW SYS_MODEL_SEL0 RU09,RU 05
I I -- Low UP/DW SYS_MODEL_SEL1 RU10,RU 11
I/O I -- Low -- CXD_SCOR CXD2585Q SCOR
I/O O Low High EXT_UP MONI_MUTE
I/O O High Low EXT_UP TRAY_DRV_OPEN LB1641 IN2
I/O O High Low EXT_UP TRAY_DRV_CLOSE LB1641 IN1
I/O I Low High EXT_DW ROT_DIAL_A DIAL(+)
I/O I Low High EXT_DW ROT_DIAL_B DIAL(-)
I/O O Low High -- RC5_MASK IR signal mas k SW.
I/O O -- Low -- RC5_OUTPUT RC5 signal output.
I/O I -- Low -- RC5_INPUT SPS-446-4 RC5 signal input.
I/O O High High EXT_UP EEPROM_CS AT2 5 6 4 0 CS
I/O O -- High EXT_UP EEPROM_SI
I/O O -- High EXT_UP EEPROM_CLK
QY01 : HD66712
Reset circuit
ACL
*
RESET
IM
System
*
RS/CS R/SCLK RW/SID
DB4~DB7
DB3~DB0
DB0~SOD
Vci
C1 C2
V5OUT2
V5OUT3
V
CC
GND
interface
Serial
4 bits 8 bits
output
buffer
Booster
8
PULL
Address counter
8
3
RAM
SIGNAL NAME
Instruction decoder
Character
generator
RAM
(CGRAM)
64 bytes
UP/DOWN
Instruction register
(IR)
8
7
7
Data
register
(DR)
Busy
flag
Segment
(SGRAM) 16 bytes
V1 V2 V3 V4 V5
OSC1 OSC2
7
CONNECT
DEVICE
NAME
TRAY OPEN SW TRAY CLOSE SW
AT2 5 6 4 0
AT2 5 6 4 0
CPG
Timing generator
Display data RAM
(DDRAM)
80x8 bits
7
8
8
Character
generator
ROM (CGROM) 9,600 bits
5
5/6
Parallel/serial
converter
8
8
and smooth scroll circuit
CONNECT
DEVICE
PORT
Mode select input for MPU. Mode7 “H” Mode select input for MPU. Mode7 “H” Mode select input for MPU. Mode7 “H” , FLASH MPU program “L” Connected to the system power supply (+5V).
PLAY/PAUSE button input. Active “L CUE button input. Active “L” FADER SW input. Active “L”
Tray Open SW input. Open “L” Tray Close SW input. Close “L” ( SEL0,SEL1); PMD330=(0,0), PMD331=(0,1) PMD340=(1,0)
Connected to the system power supply (0V). Detected from Sub code think signal. Detected “H” Audio pre-mute control output. MUTE “L”
(IN1,IN2), (1,0) CW LOAD, (0,1) CCW UNLOAD, (0,0) or (1,1) STOP
Audio mute control output. MUTE “L” Connected to the system power supply (0V).
Rotary encoder input. CW (Froward) “H ”, CCW (Reverse) “L” 24puls/360˚
Chip select output for EEPROM.
60-bit
shift
register
Enable “H”, Disable “L”
34bit
shift
register
60-bit latch
circuit
SI Serial data output for EEPROM.
SCK Serial clock data output for EEPROM.
EXT
7
Cursor and
blink
controller
FUNCTION
Common
signal driver
Segment
signal driver
LCD drive
voltage selector
CL1 CL2
M
COM0~ COM33
SEG1~ SEG60
D
5 6
Q201/Q202 : TDA7073AQU01 : H8/3062
PIN SYMBOL DESCRIPTION
1 IN1- negative input 1 2 IN1+ positive input 1 3 n.c. not connected 4 n.c. not connected 5 VP positive supply voltage 6 IN2+ positive input 2 7 IN2- negative input 2 8 n.c. not connected 9 OUT2+ positive output 2 10 GND2 ground 2 11 n.c. not connected 12 OUT2- negative output 2 13 OUT1- negative output 1 14 GND1 ground 1 15 n.c. not connected 16 OUT1+ positive output 1
QU03 : AT2560
Pin NO.
37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58
59
60 61 62 63 64 65 66 67 68
69
70
71
72
I I I I I I I
O
­I
O
I I
I
O
I
O
I I
I/O
O
I
I O O O O O
I
I
O
Analog
-
1, 0
Analog
1, Z, 0
1, 0
1, Z, 0
1, 0 1, 0 1, 0 1, 0 1, 0
Test. Normally, GND. Center voltage input. Focus error signal input. Sled error signal input. Tracking error signal input. Center servo analog input. RF signal input. Test. No connected. Analog GND. Constant current input for operational amplifier. Analog power supply. EFM full-swing output. (Iow = Vss, high = VDD) Asymmetry comparator voltage input. EFM signal input. Analog GND. Multiplier VCO1 control voltage input. Master PLL filter output (slave = digital PLL). Master PLL filter input. Master PLL charge pump output. Analog power supply. Asymmetry circuit constant current input. Wide-band EFM PLL VC02 control voltage input. Wide-band EFM PLL VC02 oscillation output. Serves as
wide-band EFM PLL clock input by switching with the command. Wide-band EFM PLL charge pump output. Digital power supply. Asymmetry circuit on/off (low = oft, high = on). Digital Out on/oft control (low = off, high = on). Digital Out output. D/A interface. LR clock output. f = Fs D/A interface. Serial data output (two's complement, MSB first). D/A interface. Bit clock output. Outputs a high signal when the playback disc has emphasis, and a low
signal when there is no emphasis.
Crystal selection input. Low when the crystal is 16.9344MHz; high when it is
33.8688MHZ. Digital GND. Crystal oscillation circuit input. When the master clock is input externally,
input it from this pin. Crystal oscillation circuit output.
TES1 VC FE SE TE CE RFDC ADIO AV
SS
0 IGEN AV
DD
0 ASYO ASYI RFAC AV
SS
1 CLTV FILO FILI PCO AV
DD
1 BIAS VCTL
V16M
VPCO DV
DD
2 ASYE MD2 DOUT LRCK PCMD BCK EMPH
XTSL
DV
SS
2
XTAI
XTAO
Symbol I/O Description
-
-
-
-
-
-
-
-
Pin NO.
73 74 75 76 77 78 79 80
O O O O
I I
O
I
1, 0 1, 0 1, 0 1, 0
1, 0
Serial data output in servo block. Serial data readout clock output in servo block. Serial data latch output in servo block. Sub-Q 80-bit, PCM peak or level data outputs. CD TEXT data output. SQSO readout clock input. GRSCOR resynchronization input. Sub-Q P to W serial output. SBSO readout clock input.
SOUT SOCK XOLT SQSO SQCK SCSY SBSO EXCK
Symbol I/O Description
Notes) * PCMD is a MSB first, two's complement output. * GTOP is used to monitor the frame sync protection status. (High: sync protection window released.) * XUGF is the frame sync obtained from the EFM signal, and is negative pulse. It is the signal before sync protection. * XPCK is the inverse of the EFM PLL clock. The PLL is designed so that the falling edge and the EFM signal Atransition point coincide. * The GFS signal goes high when the frame sync and the insertion protection timing match. * RFCK is derived from the crystal accuracy, and has a cycle of 136us. (during normal speed) * C2PO represents the data error status. * XROF is generated when the 32K RAM exceeds the +-28F jitter margin.
QD01 : CXD2585Q
Pin
Symbol I/O Description
V16M
XTAI
XTSL
VCTL
VPCO
XTAO
69
60
72
71
27
FSTO
C4M
16
50
RFAC
ASYI
49
ASYO
48
ASYE
62
BIAS
57
12
XPCK
53
FILO
FILI
54
PCO
55 52
CLTV
25
MDP
LOCK
24
PWMI
23
7
SENS
4
DATA
5
XLAT
6
CLOK SCOR
15
SBSO
79 80
EXCK SCSY
78
SQSO
76
SQCK
77
RFDC
43
CE
42
TE
41
SE
40
FE
39
VC
38
IGEN
46
QT52 : SN75158
3
1A
5
2A
Generator
Asymmetry
Corrector
Interface
OPAmp
Analog SW
58
Clock
Digital
PLL
Digital
CLV
CPU
59
11
demodurator
Sequencer
A/D
Converter
44
ADIO
XUGF
13
EFM
Servo
Auto
EMPH
GFS
68
10
Sub Code Processor
FOCUS SERVO
SLED SERVO
2 1 6 7
WFCK
Corrector
SERVO
Interface
MIRR DFCT
FOK
SERVO DSP
TRACKING
SERVO
1Y 1Z 2Y 2Z
Error
32K
RAM
17
1Z 1Y 1A
GND
WDCK
C2PO
LRCK
65
66
14
D/A
Interface
Digital
OUT
Signal processor biock
PWM GENERATOR
FOCUS PWM
GENERATOR
TRACKING PWM
GENERATOR
GENERATOR
1 2 3 4
MUTE
BCK
PCMD
67
3
Servo block
SLED PWM
8 7 6 5
TES1
37
TEST
36
XRST
2
63
MD2
DOUT
64
73
SOUT
74
SOCK XOLT
75
SCLK
8
COUT
19
SSTP
26
ATSK
9
MIRR
20
21
DFCT
22
FOK
33
FFDR
34
FRDR
31
TFDR
32
TRDR
29
SFDR
30
SRDR
1A
V
CC
2Z 2Y
2A 7
2A
7 8
No.
1
DV
2
XRST
3
MUTE
4
DATA
5
XLAT
6
CLOK
7
SENS
8
SCLK
9
ATSK
10
WFCK
11
XUGF
12
XPCK
13
GFS
14
C2PO
15
SCOR
16
C4M
17
WDCK
18
DV
19
COUT
20
MIRR
21
DFCT
22
FOK
23
PWMI
24
LOCK
25
MDP
26
SSTP
27
FSTO
28
DV
29
SFDR
30
SRDR
31
TFDR
32
TRDR
33
FFDR
34
FRDR
35
DV
36
TEST
3
5
DD
0
­I I I I I
O
I
I/O
O O O O O O O
Power supply. System reset. Reset when low. Mute input (low: off, high: on) Serial data input from CPU. Latch input from CPU. Serial data is latched at the falling edge. Serial data transfer clock input from CPU. SENS output to CPU.
1, 0
SENS serial data readout clock input. Anti-shock input/output.
1, 0
WFCK output.
1, 0
XUGF output. MNTO or RFCK is output by switching with the command.
1, 0
XPCK output. MNTI is output by switching with the command.
1, 0
GFS output. MNT2 or XROF is output by switching with the command.
1, 0
C2P0 output. MNT3 or GTOP is output by switching with the command.
1, 0
Outputs a high signal when either subcode sync SO or S1 is detected.
1, 0
4.2336MHz output. 1/4 frequency division output for V16M in CAV-W mode
1, 0
or variable pitch mode. Word clock output. f = 2Fs. GRSCOR is output by the command switching.
1, 0
O
-
SS
0
I/O I/O I/O I/O
I
I/O
1, Z, 0
O
I
O
-
DD
1
O O O O O O
-
SS
1
I
1Y
1
1Z
6
2Y
Digital GND.
­Track count ,signal I/O.
1, 0
Mirror signal I/O.
1, 0
Detect signal I/O.
1, 0
Focus OK signal I/O.
1, 0
Spindle motor external control input. GFS is sampled at 460Hz; when GFS is high, this pin outputs a high signal.
1, 0
If GFS is low eight consecutive samples, this pin outputs low. Input when LKIN=1. Spindle motor servo control output. Disc innermost track detection signal input. 2/3 frequency division output for XTAI pin.
1, 0
Digital power supply.
­Sled drive output.
1, 0
Sled drive output.
1, 0
Tracking drive output.
1, 0
Tracking drive output.
1, 0
Focus drive output.
1, 0
Focus drive output.
1, 0
Digital GND.
­Test. Normally, GND.
2Z
Q501 : PCM1710
DIN
CLKO
XTI
XTO
V
2R
CC
OUT
1
2
3
4
5
6
7
8
DD
9
10
11
12
13
R
14
LRCIN
BCKIN
DGND
V
AGND2R
EXT1R
EXT2R
V
AGND1
Input
Interface
Timing
Control
5-Level ∆Σ DAC
Right
Digital
Filter
Noise
Shaper
Mode
Control
5-Level ∆Σ DAC
Left
Low-Pass
Filter-Left
Output
Amplifier
Left
28
27
26
25
24
23
22
21
20
19
18
17
16
15
ML/DSD
MC/DM2
MD/DM1
MUTE
MODE
CKSL
DGND
V
DD
2L
V
CC
AGND2L
EXT1L
EXT2L
L
V
OUT
1
V
CC
PIN NAME NUMBER FUNCTION
Input Interface Pins
LRCIN 1 Sample Rate Clock Input. Controls the update rate (fs). DIN 2 Serial Data Input. MSB first, right justified format contains a frame of 16-bit or 20-bit data. BCKIN 3 Bit Clock Input. Clocks in the data present on DIN input.
Mode Controls and Clock Signals
CLKO 4 Buffered Output of Oscillator. Equivalent to fs. XTI 5 Oscillator Input (External Clock Input). For an internal clock, tie XTI to one side of the crystal oscillator. For an external clock,
tie XTI to the output of the chosen external clock.
XTO 6 Oscillator Output. When using the internal clock, tie to the opposite side (from pin 5) of the crystal oscillator. When using an
external clock, leave XTO open. CKSL 23 System Clock Select. For 384fs, tie CKSL High. For 256fs, tie CKSL Low”. MODE 24 Operation Mode Select. For serial mode, tie MODE High. For parallel mode, tie MODE Low”. MUTE 25 Mute Control. To disable soft mute, tie MUTE High. To enable soft mute, tie MUTE Low”. MD/DM1 26 Mode Control for Data/De-emphasis. See Mode Control Functions on page 11. MC/DM2 27 Mode Control for BCKIN/De-emphasis. See Mode Control Functions on page 11. ML/DSD 28 Mode Control for WDCK/Double speed dubbing. See Mode Control Functions on page 11.
Analog Functions
V
R 13 Right Channel Analog Output.
OUT
L 16 Left Channel Analog Output.
V
OUT
Power Supply Connections
DGND 7, 22 Digital Ground. V
DD
2R 9 Analog Power Supply (+5V), Right Channel DAC.
V
CC
AGND2R 10 Analog Ground (DAC), Right Channel. EXT1R 11 Output Amplifier Common, Right Channel. Bypass to ground with a 10µF capacitor. EXT2R 12 Output Amplifier Bias, Right Channel. Connect to EXT1R. AGND 14 Analog Ground. V
CC
EXT2L 17 Output Amplifier Bias, Left Channel. Connect to EXT1L. EXT1L 18 Output Amplifier Common, Left Channel. Bypass to ground with a 10µF capacitor. AGND2L 19 Analog Ground (DAC), Left Channel.
2L 20 Analog Power Supply (+5V), Left Channel DAC.
V
CC
8, 21 Digital Power Supply (+5V).
15 Analog Power Supply (+5V).
Q101 : TZA1022
AP5S
AP1S
AP4C
AP3C
AP2C
LG
MI
VGAP
Q251 : BA6856FP
OD5
SYMBOL PIN DESCRIPTION
OD2 1 output photo diode amplifier 2 OD3 2 output photo diode amplifier 3
I/V
FTC
OD4 3 output photo diode amplifier 4 OD5 4 output photo diode amplifier 5 OD1 5 output photo diode amplifier 1
OD1
PWRON 6 power on switch RF 7 output data signal
OD4
V V
DDRF
DD
8 RF ampliÞer supply voltage 9 supply voltage
GND 10 ground
OD3
GND V
DDL
RF
11 ground RF amplifier 12 laser supply voltage
LO 13 current output for the laser diode
OD2
MI 14 Monitor input n.c. 15 not connected n.c. 16 not connected
I/V
1k5
RF
AP1S 17 Input photo diode amplifier (satellite) AP2C 18 Input photo diode amplifier (central) n.c. 19 not connected
V
DDL
V/I
V/I
V/I
LO
FTC 20 output fast track counting LG 21 CD/CDRW gain switch AP3C 22 Input photo diode amplifier (central) AP5S 23 Input photo diode amplifier (satellite) AP4C 24 Input photo diode amplifier (central)
V
DDRF
GND
V
DD
GND
RF
PWRON
9 10
Q301 : RL5C357
LOGIC
Pin PIN NAME I/O FUNCTION
HL 1 VCC -- POWER SUPPLY -- -­2 XQOK Ipu SUB CODE-Q OK SIGNAL FROM CPU -- OK 3 XWRE Ipu WRITE ENABLE SIGNAL FROM CPU -- PERMIT 4 XEMP O READ INHIBIT SIGNAL TO CPU -- INHIBIT 5 XWIH O WRITE INHIBIT SIGNAL TO CPU -- INHIBIT 6 XCAS2 O DRAM CAS2 CONTROL -- --
7 CHDT
O
DATA COMPARATIVE MONITOR SIGNAL OUTPUT TO CPU
COMPARE
-­8 A10 O DRAM ADDRESS 10 -- -­9 CLK I 16.9344MHz CLOCK INPUT -- --
10 GND -- GROUND -- -­11 DATI Ics AUDIO DATA INPUT -- -­12 LRCI Ics AUDIO L/R CLOCK INPUT Lch Rch 13 BCKI Ics AUDIO BIT CLOCK INPUT -- -­14 BCKO O AUDIO BIT CLOCK OUTPUT -- -­15 LRCO O AUDIO L/R CLOCK OUTPUT Lch Rch 16 DATO O AUDIO DATA OUTPUT -- --
17 XROF Ics RAM OVERFLOW FROM SIGNAL PROCESSOR IC --
OVER FLOW
18 RFCK Ipu
FRAME CLOCK FROM SIGNAL PROCESSOR IC, DERIVED FROM THE CRYSTAL ACCURACY
-- --
19 SCOR I
SUB CODE SYNC DETECT SIGNAL FROM SIGNAL PROCESSOR IC
-- --
20 XRST Ics SYSTEM RESET -- RESET 21 SDTO O SERIAL DATA OUTPUT TO CPU -- --
22 XSOE Ipu
SERIAL DATA OUTPUT PERMISSION SIGNAL INPUT FROM CPU
--
PERMIT
23 TEST Ipd TEST MODE -- -­24 XLT Ics LATCH INPUT FROM CPU -- -­25 SDTI Ics SERIAL DATA INPUT FROM CPU -- --
26 SCK Ics
SERIAL DATA TRANSFER CLOCK INPUT FROM CPU
-- --
27 XCAS1/XOE O DRAM CAS1/OE CONTROL -- -­28 XCAS0 O DRAM CAS0 CONTROL -- -­29 D2 I/O DRAM DATA 2 -- -­30 D3 I/O DRAM DATA 3 -- -­31 D0 I/O DRAM DATA 0 -- -­32 D1 I/O DRAM DATA 1 -- -­33 XWE O DRAM WE CONTROL -- -­34 XRAS O DRAM RAS CONTROL -- -­35 A9 O DRAM ADDRESS 9 36 A8 O DRAM ADDRESS 8 37 A7 O DRAM ADDRESS 7 38 A6 O DRAM ADDRESS 6 39 A5 O DRAM ADDRESS 5 40 A4 O DRAM ADDRESS 4 41 A0 O DRAM ADDRESS 0 42 A1 O DRAM ADDRESS 1 43 A2 O DRAM ADDRESS 2 44 A3 O DRAM ADDRESS 3
PIN NO. SYMBOL NAME AND FUNCTION 1 STR strobe input
2 D serial input 3 CP clock input 4, 5, 6, 7,14, 13, 12, 11 QP
0
to QP
7
parallel outputs
8 GND ground (0 V) 9, 10 QS
1
,Q S
2
serial outputs
15 OE output enable input 16 V
CC
positive supply voltage
SCK XROF XLT BCKI XSOE
LRCI SDTI
DATI SDTO
SIGNAL
PROCESSOR
CPU I/F
I/F
XQOK ADPCM ADPCM
XWRE
ENCODER DECODER CHDT CPU XEMP I/F
XWIH DRAM CONTROLLER
DAC
I/F
DATO LRCO BCKO
CLK XRST TEST
XRAS XCASO
XCAS1/XOE
XCAS2
XWE
A0 - A10
D0 - D3
Q302 : HY5117400BJ-60
11 12
QU57 QU58 : 74HC165
11 12 13
14
3 4 5
6
1
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
PL
D
CP
215
10
S
CE
QU04 QU56 : 74HC4094
PIN NUMBER SYMBOL FUNCTION
1
2 CP
7 Q
9
Q
7
Q
7
8 GND Ground (0 V)
7
9 Q 10 D 11, 12, 13, 14, 3, 4, 5, 6 D0 to D7Parallel data inputs
15 CE
16 V
PL
Asynchronous parallel load input (active LOW)
Clock input (LOW to HIGH, edge-triggered)
Complementary output from
7
the last stage
Serial output from last stage
7
Serial data input
S
Clock enable input (active LOW)
Positive supply voltage
CC
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