2013 LED/LCD TV Engineering guide
< Applicable Model : Mid-end Platform >
XXLA74*-Z*
XXLA71*-Z*
XXLA69/66*-Z*
XXLA64/62/61*-Z*
XXLN57*-Z*
Copyright © 2013 LG Electronics. Inc. All rights reserved. |
1 / 88 |
LGE Internal Use Only |
Only for training and service purposes |
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CONTENT
1.New features
2.Main PCBs
3.Block Diagrams, IIC Map
4.Structure of TV set and connection of sub ass’ys
5.New sub ass’ys
-Instruction of new sub ass’ys
6.Adjust way of new features
7.Repair guide
Copyright © 2013 LG Electronics. Inc. All rights reserved. |
2 / 88 |
LGE Internal Use Only |
Only for training and service purposes |
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EPI Interface
EPI(Embedded Point-Point Interface)
Features
•Point-Point topology (support 2 Pair option)
•CDR (Clock Data Recovery)
•Bandwidth up to 1.85Gbps/pair
at FHD 120Hz 10 bit application
•Lock signal cascading and feedback to T-Con
•Embedded Control Data
Merits
•Better reliability on common noise
•No data skew and better EMI margin
•Fewer lines than mini-LVDS
•Slim PCB design
TCON
LOCK
2
VCC 1
Figure1. Topology
Copyright © 2013 LG Electronics. Inc. All rights reserved. |
3 / 88 |
LGE Internal Use Only |
Only for training and service purposes |
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EPI Interface (mini-LVDS vs. EPI)
Comparison
HF mini-LVDS
HF mini- |
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FHD (10bit) |
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LVDS |
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60Hz |
120Hz |
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240Hz |
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No. of Signal |
36 |
36 |
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72 |
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Connector |
60pin |
60pin |
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80pin |
(2ea) |
(2ea) |
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(2ea) |
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-Difficult to upgrade bandwidth limit
-Multiple number of wires needed for higher bandwidth
EPI (Embedded clock P-to-P Interface)
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FHD (10bit) |
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EPI |
60Hz |
120Hz |
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240Hz |
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960ch |
960ch |
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720ch |
No. of Signal |
12 |
12 |
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32 |
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Connector |
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50 pin |
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70pin |
(2ea) |
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(2ea) |
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-Better reliability on common noise -No data skew. Better EMI margin -Lower cost ( Cable, Connector )
-Slim S-PCB design (14mm Æ 10mm) helps slimmer TV
What to change
LCM (T-con to S-Driver IC)
HF mini-LVDS TCON
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18 |
18 |
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VCC 1
(FHD 120Hz)
EPI TCON
LOCK
2
VCC 1
(FHD 120Hz)
*Bandwidth Capability
-FHD 120Hz 10Bit : 594Mbps@36Lines → 1.65Gbps@12Lines
-FHD 240Hz 10Bit : 594Mbps@72Lines → 1.25Gbps@32Lines
Copyright © 2013 LG Electronics. Inc. All rights reserved. |
4 / 88 |
LGE Internal Use Only |
Only for training and service purposes |
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EPI Interface (mini-LVDS vs. EPI)
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HF mini-LVDS |
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EPI |
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TCON |
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TCON |
Lock |
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Topology |
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2 |
1 |
Protocol
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Features |
• Multi Drop |
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• Point to Point |
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• Data rate: 660Mbps |
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• Data rate : 1.8Gbps |
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@10bit, FHD120 |
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• External clock |
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• Embedded clock, Control |
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• Fewer Lines : 12 |
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Merit |
• Simple structure |
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• Embedded clock |
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• Standardization |
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: low EMI, Clock skew free |
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• Easy to PCB design |
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• Too many lines : 36 |
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Demerit |
• Clock skew |
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• Transmission Overhead |
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• EMI due to clock lines |
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: 4bit delimiter |
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• Bandwidth limit |
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Copyright © 2013 LG Electronics. Inc. All rights reserved. |
5 / 88 |
LGE Internal Use Only |
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Only for training and service purposes |
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NFC (Near field communication)
Near field communication (NFC) is a set of standards for smartphones and similar devices to establish radio communication with each other by touching them together or bringing them into close proximity, usually no more than a few centimetres. Present and anticipated applications include contactless transactions, data exchange, and simplified setup of more complex communications such as Wi-Fi. Communication is also possible between an NFC device and an unpowered NFC chip, called a "tag".
User Action Area
From Smart phone to TV
Samrt phone close to |
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NFC Tag |
Player choose |
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From TV to Smart phone
Copyright © 2013 LG Electronics. Inc. All rights reserved. |
6 / 88 |
LGE Internal Use Only |
Only for training and service purposes |
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Main PCB for Broadband
xxLA660S-Zx |
Chassis : LD33B |
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To PSU PCB P/No : EAX64797003 |
3
5
To module |
1 |
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6 |
WIFI/BT |
1 |
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2 |
Key+IR |
2 |
Front Spk 
4
Main + TCON all in one
1
S model
2 |
LNB IC Block |
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Only S model |
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1Main processor, DDR Memory eMMC Memory
2Micom for Key/IR sensing
3PMIC
4Audio AMP
5EPI Wafer
6Level shifter
Copyright © 2013 LG Electronics. Inc. All rights reserved. |
7 / 88 |
LGE Internal Use Only |
Only for training and service purposes |
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1. LGE2122 Block Diagram
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Air/ |
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R |
Cable |
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E |
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A |
DVB-S |
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R |
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(H) |
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MHL 1A
SIL1392
MHL : I2C 4
T/C/S2 Without ATV
TUNER (T/C/A)
TUNER |
DEMOD |
(S2) |
(S2) |
DVB-S : I2C 4 
LNB
MHL
Tuner : I2C 6
SUSB1
(HDD)
I |
USB2 |
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D |
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USB3 |
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E |
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S |
HDMI1 |
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I |
HDMI2 |
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D |
HDMI3 |
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E |
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H/P
AV/COMP
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SCART |
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E |
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A |
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R |
OPTIC |
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LAN |
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Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
CI Slot
P_TS
P_TS
IF (+/-)
P_TS
OCP 2.5A
OCP 1A
AMP
TI
X_TAL |
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DDR3 1600 X 16 |
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27MHz |
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(512MB X 2EA) |
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A |
B |
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T/C Demod |
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Analog Demod |
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I2C 5 |
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P_TS |
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USB |
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I2C 1 |
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51P |
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LVDS |
41P |
HDMI |
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EPI |
50P |
MUX |
LGE 2122 |
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I2C 2 |
50P |
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I2S Out |
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I2C 1 |
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CVBS/YPbPr |
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I2C 1 |
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CVBS/RGB |
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UART |
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IR |
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SPDIF OUT |
KEY |
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ETHERNET |
USB_WIFI |
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I2C 3
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DDR3 1600 X 16 |
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(256MB X 1EA) |
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SYSTEM EEPROM |
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(256Kb) |
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HDCP EEPROM |
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(16Kb) |
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eMMC |
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(4GB) |
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PM |
LEVEL |
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IC |
SHIFTER |
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Audio AMP |
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(NTP7513) |
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LOCAL DIMMING |
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BLUTOOTH |
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IR / NFC |
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KEY |
SUB |
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WIFI |
ASSY |
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LOGO LIGHT |
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Sub Micom
(RENESAS R5F1000G)
X_TAL 32.768KHz
LGE Internal Use Only
2. LGE 2122 I2C Block Diagram
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+3.3V_Normal |
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+3.5V_ST |
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2.7KΩ |
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3.3KΩ |
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IC3000 |
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33Ω |
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Renesas MICOM |
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+3.3V_Normal |
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2.7KΩ |
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IC7700 |
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33Ω |
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PMIC |
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+3.3V_Normal |
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1.2KΩ |
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IC8101 |
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100Ω |
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33Ω |
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NTP7513(AMP) |
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P7600 |
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33Ω |
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Local dimming |
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IC101 |
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22Ω |
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HDCP EEPROM |
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IC105
LGE 2122
I2C_SDA3
I2C_SCL3
I2C_SDA4
I2C_SCL4
I2C_SDA2
I2C_SCL2
I2C_SDA5
I2C_SCL5
I2C_SDA1
I2C_SCL1
I2C_SDA6
I2C_SCL6
+3.3V_Normal
33Ω
2.7KΩ
33Ω 
22Ω
+3.3V_Normal
2.7KΩ
33Ω 
33Ω
+3.3V_Normal
2.7KΩ
33Ω 
33Ω
IC3304
MHL
LNB
TUNER(S)
IC100
NVRAM
TUNER(D)
Copyright © 2013 LG Electronics. Inc. All rights reserved. |
LGE Internal Use Only |
Only for training and service purposes |
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3. Power Block Diagram
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1.5V DDR |
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MICOM(VDD) |
3A |
3.5V |
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IR A'ssy |
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1.23V
2A
12V |
PANEL_VCC |
+12V_LNB |
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PANEL_POWER |
LNB option |
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NTP_7400(PVDD1)
NTP_7400(PVDD2)
24V |
AMP |
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5V USB 3A |
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MTK (DDRV)
DDR(VDD)
DDR(VDDQ)
TUNER(+1.23V)
HDMI_EEPROM
RGB_EEPROM
CI (+5V_CI_ON)
5V Normal |
TUNER(+5V_TU) |
3.3V DAC |
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3A |
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MTK(AVDD33_DAC) |
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1.2V Core
6A
3.3V Noraml
4A
5V USB
1CH DCDC 4A 2CH OCP 1.2A
USB1(DVR Max 1.5A)
MTK(AVDD12_LVDS)
MTK(AVDD_)
MTK(VCCK)
USB_WIFI
USB2(Max 1.2A)
USB3(Max 1.2A)
1.8V_TU
SPDIF
IR A'ssy
M_REMOTE
HDCP EEPROM
NVRAM
MTK (DVDD3V3)
MTK (AVDD33_AADC)
MTK (AVDD3V3)
MTK(AVDD3V3_MEMPL
MTK(AVDD3V3_LVDS)
MTK(AVDD33_STB)
AUDIO AMP
EARPHONE AMP
EMMC(VCC)
EMMC(VCCQ)
TUNER(+3.3V_TU)
Copyright © 2013 LG Electronics. Inc. All rights reserved. |
LGE Internal Use Only |
Only for training and service purposes |
|
4. Tuner/CI Block Diagram
TDSQ-
G501D
[+3.3V_S2_DEMOD] 32
[+3.3V_TUNER] 5
[+.1.8V_TUNER] 7
[+1.23V_S2_DEMOD] 30
[S2_F22_OUTPUT] 33 [LNB] 36 [S2_SCL] 34 [S2_SDA] 35
[RESET] 2
[SLC] 3
[SDA] 4
[ERROR] 16 [SYNC] 17 [VALID] 18 [MCLK] 19
[D0-7] 20-27
[S2_RESET] 31
[T/C_DIF[P]] 10 [T/C_DIF[N]] 11
+3.3V_D_Demod
+3.3V_TU
+1.8_TU
+1.23V_D_Demod
+3.3V_NORMAL
3.3K Ω
LNB_TX
LNB_OUT
22 Ω I2C_SCL4
I2C_SDA4
/TU_RESET1
33Ω |
33 Ω |
IC2_SDA6
IC2_SCL6
FE_DEMOD1_TS_SYNC
FE_DEMOD1_TS_VAL
FE_DEMOD1_TS_CLK
FE_DEMOD1_TS_DATA [0-7]
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/S2_RESET |
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IF_P |
Attenuator |
ADCINP_DEMOD |
IF_N |
ADCINN_DEMOD |
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TUNER_SIF(for T2/C/S) |
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TU_CVBS(for |
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T2/C/S) IF_AGC |
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CI Slot
10 [TONECTRL] |
LNB |
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2 [LNB] |
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IC6900 |
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7 [SCL] A8303SESTR-TB |
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8 [SDA]
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LGE 2122 |
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F28[TCON12] |
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AP6 |
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L33[SPI_CLK] |
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[SCL3] |
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AR6 [SDA3] |
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L30[SPI_CLK1] |
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AG24 [ADIN6_SRV] |
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M27[PVR_TS_VAL] |
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AF19[OPCTRL1] |
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M31[CI_TSCLK] |
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AJ19 [OPCTRL0] |
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R29 [DEMOD_TSSYNC] |
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N34[SPI_DATA] |
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N35[SPI_CLE] |
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P27 [DEMOD_TSVAL] |
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P30 [DEMOD_TSCLK] |
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[GPIO0-14] |
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[GPIO26-33] |
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T34[DEMOD_RST] |
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[DEMOD_TSDATA0-7] |
P34[PVR_TSDATA1] |
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N36[CI_INT] |
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P33[PVR_TSDATA0] |
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AM18 [ADIN7_SRV] |
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R36[CI_TSVAL] |
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R37[CI_TSSYNC] |
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R33[PVR_TSSYNC] |
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AM27 [ADCINP_DEMOD] |
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R3[PVR_TSCLK] |
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AN27 [ADCINN_DEMOD] |
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R35[CI_TSDATA0] |
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[GPIO34-41] [GPIO18-25]
PCM_5V_CTL |
CI 5V |
+5V_CI_ON |
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Power detect |
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+5V_CI_ON |
+3.3V_NORMAL |
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10K Ω |
47K Ω |
/CI_CD1
/CI_CD2 CI_VS1
/PCM_CE1 /PCM_CE2 /PCM_IOWR /PCM_IORD
CI_ADDR[0-14] |
CI_A_ADDR[0-14] |
CI_DATA[0-7] |
CI_A_DATA[0-7] |
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PCM_RST |
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/PCM_WAIT |
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PCM_INPACK |
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/PCM_A_REG |
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/PCM_IRQA |
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/PCM_OE |
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/PCM_WE |
MTK5398_TS_CLK MTK5398_TS_VAL MTK5398_TS_SYNC
MT5398_TS_IN[0-7]
MT5398_TS_OUT[0-7]
47 Ω
47 Ω
CI_TS_CLK
CI_TS_VAL
CI_TS_SYNC
CI_TS_DATA[0-7]
CI_MDI[0-7]
VCC
CI_DET1
CI_DET2
VS1
CARD_EN1
CARD_EN2
IOWD
IORD
ADDR[0-14]
DAT[0-7]
CI_RESET
CI_WAIT
INPACK REG /IRQA O_EN WR_EN
TS_OUT_CLK TS_OUT_VAL TS_OUT_SYNC
TS_OUT[0-7]
TS_IN[0-7]
Copyright © 2013 LG Electronics. Inc. All rights reserved. |
LGE Internal Use Only |
Only for training and service purposes |
|
5. Video/Audio In Block Diagram
Jack Side |
SoC Side |
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JK501 |
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COMP1_Y/AV1_CVBS |
COMP1_Y/AV1_CVBS_SOC |
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[CVBS2P] |
COMP1_Pb |
COMP1_Pb_SOC |
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[PB0P] |
COMP1_Pr |
COMP1_Pb_SOC |
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[PR0P] |
COMP1/AV1/DVI_L_IN |
COMP1/AV1/DVI_L_IN_SOC |
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[AIN4_L_AADC] |
COMP1/AV1/DVI_R_IN |
COMP1/AV1/DVI_R_IN_SOC |
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[AIN4_R_AADC] |
LGE 2122
SCART
SC_CVBS_IN |
SC_CVBS_IN_SOC |
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[CVBS3P] |
SC_ID/FB |
SC_FB_SOC |
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[ADIN0_SRV, SOY1] |
SC_R/G/B |
SC_R/G/B_SOC |
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[PR1P, PB1P, Y1P] |
SC_L/R_IN |
SC_L/R_IN_SOC |
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[AIN1_L/R_AADC] |
JK4600
Tuner |
TU_CVBS |
TU_CVBS |
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[CVBS1P] |
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TUNER_SIF, IF_P/N |
TUNER_SIF, IF_P/N |
[MPXP, ADCINP_DEMOD, ADCINN_DEMOD]
Parallel TS / ERROR,VAL,SYNC,CLK |
Parallel TS / ERROR,VAL,SYNC,CLK |
Copyright © 2013 LG Electronics. Inc. All rights reserved. |
LGE Internal Use Only |
Only for training and service purposes |
|
6. Audio Out Block Diagram
COMP1/AV1/DVI_L_IN_SOC
COMP1/AV1/DVI_R_IN_SOC
JK501
SCART
SC_L_IN / SC_R_IN
JK4600 |
DVB only |
Tuner
TUNER_SIF
TR BUF
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SCART |
[AL1_ADAC] |
SCART_L/Rout |
IC6000 |
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DTV/MNT_L/R_OUT |
AZ4580MTR |
LPF |
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[AR1_ADAC] |
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OP AMP |
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[AIN4_L_AADC] |
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[AIN4_R_AADC] |
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Mute CTRL |
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(TR) |
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JK4600 |
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MUTE SCART |
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DVB only |
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[AOMCLK] |
AUD_MASTER_CLK |
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AUD_LRCH |
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[AIN1_L_AADC] |
[AOSDATA0] |
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[AIN1_R_AADC] |
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AUD_LRCK |
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[AOLRCK] |
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4P WAFER |
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[AOBCK] |
AUD_SCK |
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IC8101 |
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LPF |
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[STB_SDA] |
I2C_SDA1 |
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Audio AMP |
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NTP7513 |
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LPF |
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I2C_SCL1 |
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[STB_SCL] |
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AMP_RESET_N |
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[OPCTRL4] |
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AMP_MUTE |
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LGE 2122 |
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IC3000 |
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MICOM |
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[MPXP] |
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SIDE_HP_MUTE |
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[AL0_ADAC] |
HP_L/ROUT_MAIN |
IC6100 |
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HP_L/ROUT_AMP |
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HEAD PHONE |
||||||
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TPA6138A2PWR |
LPF |
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[AR0_ADAC] |
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HP AMP |
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JK3700 |
|||||||
SPDIF_OUT
[ASPDIF0]
JK3602
SPEAKER_L
SPEAKER_R
WOOFER
Copyright © 2013 LG Electronics. Inc. All rights reserved. |
LGE Internal Use Only |
Only for training and service purposes |
|
7. HDMI
|
DDC_SCL_1_SOC |
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DDC_SDA_1_SOC |
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HDMI_ARC |
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TMDS Link 8bits |
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HDMI1 |
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DDC_SCL_2_JACK |
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DDC_SDA_2_JACK |
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TMDS Link 8bits |
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LGE 2122 |
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HDMI2 |
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I2C_SCL4 |
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DDC_SCL_3_JACK |
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I2C_SDA4 |
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DDC_SDA_3_JACK |
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TMDS Link 8bits |
SIL1292 |
|
TMDS Link or MHL Link |
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5V_BUS |
HDMI3 |
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5V_MHL |
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OCP |
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MHL_DET
X-tal 32.768kHz
REMOTE_CEC
Q3001
HDMI_CEC
RENESAS WOL_CTL MICOM
Copyright © 2013 LG Electronics. Inc. All rights reserved. |
LGE Internal Use Only |
Only for training and service purposes |
|
8. Panel Interface Block Diagram
PANEL_VCC (+12V)
LGE 2122
EPI Tx
Block
|
|
VCC |
|
||
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VCC1.8 |
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PMIC |
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VDD |
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H_VDD |
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TPS65178 |
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VCOM_P |
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VCOM_N |
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SWP |
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TR/ |
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CTRLP |
|
Diode |
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SWN |
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6 |
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TR/ |
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CTRLN |
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||
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Diode |
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||
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GMA4/GMA5/GAM7/GMA12/GMA14/ GMA15 |
|||
|
2 |
EPI CH1 +/- |
||
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2 |
EPI CH2 +/- |
||
|
2 |
EPI CH3 +/- |
||
|
VCOM_DYN |
VCOMLFB |
||
|
VCOMRFB |
2 |
EPI CH4 +/- |
2 |
EPI CH5 +/- |
2 |
EPI CH6 +/- |
EPI_LOCK6
GMA4/GMA5/GAM7/GMA12/GMA14/GMA15
VCOM_LOOP
VGH
VGL
I_VGL
VCOM
EO
GST
GCLK
MCLK
Level Shift
TPS65198
RSTGIP VST |
II~CLK6CLK1 |
|
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2 |
2 |
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6 |
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50Pin X 2 |
||
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6 |
|
VGH_EVEN/VGH_ODD |
LOCK3EPI |
GMA1/GMA3/GAM9/GMA10/GMA16/GMA18 |
|
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VGH_F/VGH_R |
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Z_Out |
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EPI_LOCK6_SOURCE |
|
|
Copyright © 2013 LG Electronics. Inc. All rights reserved. |
LGE Internal Use Only |
Only for training and service purposes |
|
9. PMIC & Level Shift Bloc Diagram
PANEL_VCC
Boost Converter
Buck 1 converter(VCC)
Buck 2 converter(Vcore)
Buck 3 converter(HVdd)
Buck 4 converter(VCC18)
Positive Charge Pump Controller
Negative Charge Pump Controller
6-Ch Gamma Buffer(DAC output)
Vcom reference & gain
Reset
PMIC
TPS65178
Vdd
VCC
Vcore
HVdd
VCC18
SWN
CTRLN
SWP
CTRLP
GAM4/5/7/12/14/15
VCOM_P
VCOM_N
VCOM_LOOP
PMIC_RESET
TR/ VGL
Diode
TR/ VGH
Diode
Level Shift
TPS65198
Copyright © 2013 LG Electronics. Inc. All rights reserved. |
LGE Internal Use Only |
Only for training and service purposes |
|
10. USB / WIFI / M-REMOTE / UART
[USB_DM_P2] [USB_DP_P2]
[GPIO43]
[GPIO46]
[USB_DM_P1] [USB_DP_P1]
[GPIO42]
[TCON12]
[USB_DM_P0] [USB_DP_P0]
[GPIO44] [ADIN2_SRV]
[USB_DM_P3] [USB_DP_P3]
[U1RX]
[U1TX] [ADIN4_SRV] [OPCTRL49] [OPCTRL50]
[U0TX]
[U0RX]
LGE 2122
USB_DM1 |
USB1 |
+5V_USB_1 |
USB_DP1 |
|
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/USB_OCD1 |
|
|
USB_CTL1 |
|
|
USB_DM2 |
USB2 |
+5V_USB_2 |
|
||
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USB_DP2 |
|
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/USB_OCD2 |
|
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USB_CTL2 |
|
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USB_DM3 USB_DP3 /USB_OCD3 USB_CTL3
WIFI_DM
WIFI_DP
SOC_TX
SOC_RX
USB3
+5V_USB_3
M_REMOTE_RX
M_REMOTE_TX
M_RFModule_RESET RTS
CTS
RENESAS MICOM
OCP
OCP
USB_WIFI
Motion Remote
Receiver
HDMI2
4Pin debugging wafer
HDMI3
Copyright © 2013 LG Electronics. Inc. All rights reserved. |
LGE Internal Use Only |
Only for training and service purposes |
|
Interconnection - 1
47LA660S-ZA
3
2
1
1
2
5
4
6
3
4 |
5 |
Copyright © 2013 LG Electronics. Inc. All rights reserved. |
1 / 88 |
Only for training and service purposes |
[PCBs]
1Main PCB
2Power Board
3Local key Assy
4RF Assy
5WIFI Assy
[Cables]
1Main / LPB 24Pin + Local Dimming Cable
Main / Module EPI Cable
250& 50Pin
3LED driver / PSU
4IR 8Pin Cable
5WiFi 6Pin + RF 8Pin Cable
6SPK Cable
LGE Internal Use Only
Interconnection - 2
47LA660S-ZA
[PCBs]
6 IR Assy
[Cables]
7 IR to Local Key 3Pin Cable
8 IR to Logo Assy 4Pin Cable
7
8 6
Copyright © 2013 LG Electronics. Inc. All rights reserved. |
2 / 88 |
LGE Internal Use Only |
Only for training and service purposes |
|
Introductions of 13Y RF ass’y + Magic Remote control
1.System
2.Remote Buttons
3.MR13 Block Diagram
4.Function List
5.Pairing/Un-pairing Method
Copyright © 2013 LG Electronics. Inc. All rights reserved. |
3 / 88 |
LGE Internal Use Only |
Only for training and service purposes |
|
1. System
|
UART |
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RF |
or USB |
|
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|
RF Receiver |
|
|
Remote |
TV |
||
|
Pairing Information Transmission (Send to TV after Paired)
•Static Calibration Data (Bypass only)
•Remote FW ver. (Save also in Receiver)
•BD_ADDR (Save also in Receiver)
•Pairing Information Transmission Sequence
•When it is paired, the remote sends packets(pairing success, F/W version, BD_ADDR) to the receiver.
•The receiver sends the pairing success packet to TV directly.
•F/W version and BD_ADDR packets are just saved on the receiver.
•The receiver sends F/W version or BD_ADDR packet to TV when it is required.
Motion Data Transmission
•Period : 7.5msec
•Motion Data : gyro, accelerometer
Voice Data Transmission
•Period : 10msec
•Voice sampling : 16khz 16bit
Copyright © 2013 LG Electronics. Inc. All rights reserved. |
4 / 88 |
LGE Internal Use Only |
Only for training and service purposes |
|
2. Remote Buttons (M4 vs. MR13)
POWER
BACK HOME
↑
←OK →
↓
VOL MUTE CH
3D MYAPPS
M4 Remote
POWER
↑
BACK ← OK → SMART
↓
VOICE
3D |
Screen RMT |
|
Q.MENU |
||
|
||
VOL MUTE CH |
||
MR13 Remote
|
BUTTON |
RF Unpaired |
RF Paired |
IR continuous |
ETC. |
|
|
IR_CODE |
RF_CODE |
repeat |
|||
|
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|||
|
|
POWER |
0x08 |
NONE |
Y |
IR only |
|
|
BACK |
0x28 |
0x8028 |
Y |
|
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SMART |
0x7C |
0x807C |
Y |
|
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|
← |
0x07 |
0x8007 |
Y |
|
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→ |
0x06 |
0x8006 |
Y |
|
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|
↑ |
0x40 |
0x8040 |
Y |
|
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↓ |
0x41 |
0x8041 |
Y |
|
Phsical |
|
OK |
0x75 |
0x8044 |
Y |
|
|
VOICE |
0xDE |
0x808B |
Y |
= VOICE_START |
|
Buttons |
|
|||||
|
|
3D |
0xDC |
0x80DC |
Y |
|
|
|
Screen RMT |
0xDE |
0x80DE |
Y |
|
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|
/ Q.MENU |
|
|||
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CH + |
0x00 |
0x8000 |
Y |
|
|
|
CH - |
0x01 |
0x8001 |
Y |
|
|
|
VOL + |
0x02 |
0x8002 |
Y |
|
|
|
VOL - |
0x03 |
0x8003 |
Y |
|
|
|
MUTE |
0x09 |
0x8009 |
Y |
|
|
|
AUTO_WAKEUP |
X |
0x800C |
|
|
Logical |
|
VOICE_START |
X |
0x800A |
|
|
|
VOICE_STOP |
X |
0x800D |
|
|
|
Buttons |
|
|
|
|||
|
POINT_START |
X |
0x803E |
|
|
|
|
|
|
|
|||
|
|
POINT_STOP |
X |
0x803F |
|
|
Copyright © 2013 LG Electronics. Inc. All rights reserved. |
5 / 88 |
LGE Internal Use Only |
Only for training and service purposes |
|
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