The Intel Next Unit of Computing Board D33217CK may contain design defects or errors known as errata that may cause the product to deviate from
published specifications. Current characterized errata are documented in the Intel Next Unit of Computing Board D33217CK Specification Update.
Revision History
Revision Revision History Date
001 First release of the Intel® Next Unit of Computing Board D33217CK
Technical Product Specification
002 Specification Clarification October 2012
Disclaimer
This product specification applies to only the standard Intel® Next Unit of Computing Board with
BIOS identifier GKPPT10H.86A.
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WHERE PERSONAL INJURY OR DEATH MAY OCCUR.
®
All Intel
use in personal computers (PC) for installation in homes, offices, schools, computer rooms, and similar
locations. The suitability of this product for other PC or embedded non-PC applications or other
environments, such as medical, industrial, alarm systems, test equipment, etc. may not be supported
without further evaluation by Intel.
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conflicts or incompatibilities arising from future changes to them.
Intel Next Unit of Computing Boards may contain design defects or errors known as errata, which may
cause the product to deviate from published specifications. Current characterized errata are available on
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Contact your local Intel sales office or your distributor to obtain the latest specifications before placing your
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Copyright 2012, Intel Corporation. All rights reserved.
Next Unit of Computing Boards are evaluated as Information Technology Equipment (I.T.E.) for
October 2012
Board Identification Information
AA Revision
BIOS Revision
Notes
Device
Stepping
S-Spec Numbers
Basic Intel® Next Unit of Computing Board D33217CK
Identification Information
G69977-201 GKPPT10H.86A.0020 1,2
G69977-301 GKPPT10H.86A.0025 1,2
Notes:
1. The AA number is found on a small label on the component side of the board.
2. The Intel
of the following components:
Intel Core I3-3217U L1 SR0N9
Intel BD82QS77 C1 SLI8B
®
QS77 PCH and Intel® Core™ i3-3217U processor used on this AA revision consists
Specification Changes or Clarifications
Table 1 indicates the Specification Changes or Specification Clarifications that apply to
the Intel
®
Desktop Board D33217CK.
Table 1. Specification Changes or Clarifications
Date Type of Change Description of Changes or Clarifications
October 2012 Spec Change Corrected a typo in the Table 1 Audio section.
Errata
Current characterized errata, if any, are documented in a separate Specification
Update. See http://developer.intel.com/products/desktop/motherboard/index.htm
for the latest documentation.
A description of the hardware used on Intel Next Unit of Computing Board
2
A map of the resources of the Intel Next Unit of Computing Board
3
The features supported by the BIOS Setup program
4
A description of the BIOS error messages, beep codes, and POST codes
5
Regulatory compliance and battery disposal information
This Technical Product Specification (TPS) specifies the board layout, components,
connectors, power and environmental requirements, and the BIOS for Intel
of Computing Board D33217CK.
Intended Audience
The TPS is intended to provide detailed, technical information about Intel Next Unit of
Computing Board D33217CK and its components to the vendors, system integrators,
and other engineers and technicians who need this level of information. It is
specifically not intended for general audiences.
What This Document Contains
Chapter Description
D33217CK
®
Next Unit
Typographical Conventions
This section contains information about the conventions used in this specification. Not
all of these symbols and abbreviations appear in all specifications of this type.
Notes, Cautions, and Warnings
NOTE
Notes call attention to important information.
CAUTION
Cautions are included to help you avoid damaging hardware or losing data.
Audio Intel® High Definition Audio via the HDMI v1.4a interface
Peripheral
Interfaces
Expansion
Capabilities
BIOS
(SO-DIMM) sockets
• Support for DDR3 1600 MHz, DDR3 1333 MHz, and DDR3 1066 MHz
SO-DIMMs
• Support for 1 Gb, 2 Gb, and 4 Gb memory technology
• Support for up to 16 GB of system memory with two SO-DIMMs using 4 Gb
memory technology
• Support for non-ECC memory
• Support for 1.35 V low voltage JEDEC memory
Controller Hub (PCH)
― One High Definition Multimedia Interface* (HDMI*) back panel connector
― Three front panel ports (via one dual-port internal header and one front
panel connector)
― Two ports are implemented with vertical back panel connectors
― One port is reserved for the PCI Express* Half-Mini Card
― One port is reserved for the PCI Express Full-Mini Card
• SATA port:
― One internal mSATA port (PCI Express Full-Mini Card) for SSD support
• One PCI Express Full-Mini Card connector
• Support for Advanced Configuration and Power Interface (ACPI), Plug and
The board has a soldered-down Intel Core i3-3217U processor with Integrated
Graphics Technology and integrated memory controller.
NOTE
This board has specific requirements for providing power to the processor. Refer to
Section 2.5.1 on page 47 for information on power supply requirements for this board.
18
Product Description
Version
Capacity
Technology
Organization
Devices
1.4 System Memory
The board has two 204-pin SO-DIMM sockets and supports the following memory
features:
• 1.5 V DDR3 SDRAM SO-DIMMs with gold plated contacts
• Support for 1.35 V Low Voltage DDR3 (new JEDEC specification)
• Two independent memory channels with interleaved mode support
• Unbuffered, single-sided or double-sided SO-DIMMs
• 16 GB maximum total system memory (with 4 Gb memory technology). Refer to
Section 2.1.1 on page 33 for information on the total amount of addressable
memory.
• Minimum recommended total system memory: 1024 MB
To be fully compliant with all applicable DDR SDRAM memory specifications, the board
should be populated with SO-DIMMs that support the Serial Presence Detect (SPD)
data structure. This allows the BIOS to read the SPD data and program the chipset to
accurately configure memory settings for optimum performance. If non-SPD memory
is installed, the BIOS will attempt to correctly configure the memory settings, but
performance and reliability may be impacted or the SO-DIMMs may not function under
the determined frequency.
Table 5 lists the supported SO-DIMM configurations.
Table 5. Supported Memory Configurations
Raw Card
A
B
C
F
Note: System memory configurations are based on availability and are subject to change.
The processor supports the following types of memory organization:
•Dual channel (Interleaved) mode. This mode offers the highest throughput for
real world applications. Dual channel mode is enabled when the installed memory
capacities of both SO-DIMM channels are equal. Technology and device width can
vary from one channel to the other but the installed memory capacity for each
channel must be equal. If different speed SO-DIMMs are used between channels,
the slowest memory timing will be used.
•Single channel (Asymmetric) mode. This mode is equivalent to single channel
bandwidth operation for real world applications. This mode is used when only a
single SO-DIMM is installed or the memory capacities are unequal. Technology and
device width can vary from one channel to the other. If different speed SO-DIMMs
are used between channels, the slowest memory timing will be used.
Intel QS77 Express Chipset with Direct Media Interface (DMI) interconnect provides
interfaces to the processor and the USB, SATA, LPC, LAN, and PCI Express interfaces.
The Intel QS77 Express Chipset is a centralized controller for the board’s I/O paths.
For information about Refer to
The Intel QS77 chipset http://www.intel.com/products/desktop/chipsets/index.htm
Resources used by the chipset Chapter 2
1.5.1 Direct Media Interface (DMI)
Direct Media Interface (DMI) is the chip-to-chip connection between the processor and
PCH. This high-speed interface integrates advanced priority-based servicing allowing
for concurrent traffic and true isochronous transfer capabilities.
1.5.2 Display Interfaces
Display is divided between the processor and the PCH. The processor houses the
memory interface, display planes, and pipes while the PCH has transcoder and display
interface or ports. The PCH receives the display data over Intel
Interface (Intel
and sends the data through the display interface.
1.5.2.1 Intel
Intel FDI connects the display engine in the processor with the display interfaces on
the PCH. The display data from the frame buffer is processed in the display engine of
the processor and sent to the PCH over the Intel FDI where it is transcoded as per the
display protocol and driven to the display monitor.
®
FDI) and transcodes the data as per the display technology protocol
®
Flexible Display Interconnect (Intel
®
Flexible Display
®
FDI)
1.5.2.2 High-bandwidth Digital Content Protection (HDCP)
HDCP is the technology for protecting high definition content against unauthorized
copy or unreceptive between a source (computer, digital set top boxes, etc.) and the
sink (panels, monitor, and TVs). The PCH supports HDCP 1.4 for content protection
over wired displays (HDMI).
1.6 Graphics Subsystem
The board supports graphics through Intel Graphics Technology.
1.6.1 Integrated Graphics
The board supports integrated graphics through Intel FDI.
22
1.6.1.1 Intel® High Definition (Intel® HD) Graphics
The Intel HD graphics controller features the following:
• 3D Features
DirectX* 10.1 and OpenGL* 3.0 compliant
DirectX 11.0 CS4.0 only
Shader Model 4.0
• Video
High-Definition content at up to 1080p resolution
Hardware accelerated MPEG-2, VC-1/WMV and H.264/AVC Hi-Definition video
formats
Intel HD Technology with Advanced Hardware Video Transcoding
Blu-ray* S3D via HDMI 1.4a
Dynamic Video Memory Technology (DVMT) 5.0 support
Support of up to 1.7 GB Video Memory with 4 GB and above system memory
configuration
Product Description
1.6.1.2 Video Memory Allocation
Intel® Dynamic Video Memory Technology (DVMT) is a method for dynamically
allocating system memory for use as graphics memory to balance 2D/3D graphics and
system performance. If your computer is configured to use DVMT, graphics memory is
allocated based on system requirements and application demands (up to the
configured maximum amount). When memory is no longer needed by an application,
the dynamically allocated portion of memory is returned to the operating system for
other uses.
1.6.1.3 High Definition Multimedia Interface* (HDMI*)
The HDMI port supports standard, enhanced, or high definition video, plus multichannel digital audio on a single cable. The port is compatible with all ATSC and DVB
HDTV standards and supports eight full range channels at 24-bit/96 kHz audio of
lossless audio formats such as Dolby* TrueHD or DTS* HD Master Audio. The
maximum supported resolution is 1920 x 1200 (WUXGA). The HDMI port is compliant
with the HDMI 1.4a specification.
1.6.1.3.1 Integrated Audio Provided by the HDMI Interface
The following audio technologies are supported by the HDMI 1.4a interface directly
from the PCH:
The board supports seven USB 2.0 ports. The port arrangement is as follows:
•Three front panel ports (via one dual-port internal header and one front panel
connector)
• Two ports are implemented with vertical back panel connectors
• One port is reserved for the PCI Express Half-Mini Card
• One port is reserved for the PCI Express Full-Mini Card
All seven USB 2.0 ports are high-speed, full-speed, and low-speed capable.
NOTE
Computer systems that have an unshielded cable attached to a USB port may not meet
FCC Class B requirements, even if no device is attached to the cable. Use a shielded
cable that meets the requirements for full-speed devices.
For information about Refer to
The location of the USB connectors on the back panel Figure 8, page 36
The location of the front panel USB headers Figure 2, page 15
1.7 SATA Interface
The board provides one internal mSATA port (PCI Express Full-Mini Card connector) for
SSD support.
The PCH provides independent SATA ports with a theoretical maximum transfer rate of
6 Gb/s. A point-to-point interface is used for host to device connections.
The underlying SATA functionality is transparent to the operating system. The SATA
controller can operate in both legacy and native modes. In legacy mode, standard IDE
I/O and IRQ resources are assigned (IRQ 14 and 15). In Native mode, standard PCI
Conventional bus resource steering is used. Native mode is the preferred mode for
configurations using Windows operating systems.
1.7.1 AHCI Mode
The board supports AHCI storage mode via the Intel QS77 Express Chipset.
NOTE
In order to use AHCI mode, AHCI must be enabled in the BIOS. Also, during Microsoft
Windows XP installation, F6 must be pressed to install the AHCI drivers. See your
Microsoft Windows XP documentation for more information about installing drivers
during installation. Microsoft Windows 7 includes the necessary AHCI drivers without
the need to install separate AHCI drivers during the operating system installation
process, however, it is always good practice to update the AHCI drivers to the latest
available by Intel.
24
Product Description
For information about
Refer to
1.8 Real-Time Clock Subsystem
A coin-cell battery (CR2032) powers the real-time clock and CMOS memory. When the
computer is not plugged into a wall socket, the battery has an estimated life of three
years. When the computer is plugged in, the standby current from the power supply
extends the life of the battery. The clock is accurate to ± 13 minutes/year at 25 ºC
with 3.3 VSB applied via the power supply 5 V STBY rail.
NOTE
If the battery and AC power fail, date and time values will be reset and the user will be
notified during the POST.
When the voltage drops below a certain level, the BIOS Setup program settings stored
in CMOS RAM (for example, the date and time) might not be accurate. Replace the
battery with an equivalent one. Figure 1 on page 13 shows the location of the battery.
1.9 Connectivity
1.9.1 Thunderbolt™ Technology Interface
The board’s Thunderbolt Technology Interface is supported by an Intel® L3310 CIO
10 Gb Controller.
The Thunderbolt controller connects a PC and other devices, transmitting and receiving
information for both PCI Express and DisplayPort* protocols. The Thunderbolt
controller switches between the two protocols to support communications over a single
cable.
Thunderbolt technology is implemented on Intel Desktop Board D33217CK as a plug
and play interface. No software drivers are required.
1.10 Hardware Management Subsystem
The hardware management features enable the board to be compatible with the Wired
for Management (WfM) specification. The board has several hardware management
features, including thermal and voltage monitoring.
Wired for Management (WfM) Specification www.intel.com/design/archives/wfm/
The hardware monitoring and fan control subsystem is based on a Nuvoton NPCE791C
embedded controller, which supports the following:
• Processor and system ambient temperature monitoring
• Chassis fan speed monitoring
• Voltage monitoring of +12 V, +5 V, +3.3 V, Memory Vcc (V_SM), +Vccp, PCH Vcc
• SMBus interface
1.10.2 Fan Monitoring
Fan monitoring can be implemented using third-party software.
1.10.3 Thermal Solution
Figure 5 shows the location of the thermal solution and processor fan header.
Figure 5. Thermal Solution and Fan Header
26
Item Description
A Processor fan header
B Thermal solution
Product Description
state…
pressed for
…the system enters this state
(ACPI G0 – working state)
(ACPI G1 – sleeping state)
(ACPI G0 – working state)
(ACPI G2/G5 – Soft off)
(ACPI G1 – sleeping state)
(ACPI G0 – working state)
(ACPI G1 – sleeping state)
(ACPI G2/G5 – Soft off)
1.11 Power Management
Power management is implemented at several levels, including:
• Software support through Advanced Configuration and Power Interface (ACPI)
• Hardware support:
Power Input
Instantly Available PC technology
LAN wake capabilities
Wake from USB
WAKE# signal wake-up support
Wake from S5
+5 V Standby Power Indicator LED
1.11.1 ACPI
ACPI gives the operating system direct control over the power management and Plug
and Play functions of a computer. The use of ACPI with this board requires an
operating system that provides full ACPI support. ACPI features include:
• Plug and Play (including bus and device enumeration)
• Power management control of individual devices, add-in boards (some add-in
boards may require an ACPI-aware driver), video displays, and hard disk drives
•Methods for achieving less than 15-watt system operation in the power-on/standby
sleeping state
• A Soft-off feature that enables the operating system to power-off the computer
• Support for multiple wake-up events (see Table 8 on page 29)
• Support for a front panel power and sleep mode switch
Table 6 lists the system states based on how long the power switch is pressed,
depending on how ACPI is configured with an ACPI-aware operating system.
Table 6. Effects of Pressing the Power Switch
If the system is in this
Off
(ACPI G2/G5 – Soft off)
On
On
Sleep
Sleep
Note: Depending on power management settings in the operating system.
Under ACPI, the operating system directs all system and device power state
transitions. The operating system puts devices in and out of low-power states based
on user preferences and knowledge of how devices are being used by applications.
Devices that are not being used can be turned off. The operating system uses
information from applications and user settings to put the system as a whole into a
low-power state.
Table 7 lists the power states supported by the board along with the associated system
power targets. See the ACPI specification for a complete description of the various
system and power states.
Table 7. Power States and Targeted System Power
Global States Sleeping States
G0 – working
state
G1 – sleeping
state
G1 – sleeping
state
G2/S5 S5 – Soft off.
G3 –
mechanical off
AC power is
disconnected
from the
computer.
Notes:
1. Total system power is dependent on the system configuration, including add-in boards and peripherals
powered by the system chassis’ power supply.
2. Dependent on the standby power consumption of wake-up devices used in the system.
S0 – working C0 – working D0 – working
S3 – Suspend to
RAM. Context
saved to RAM.
S4 – Suspend to
disk. Context
saved to disk.
Context not saved.
Cold boot is
required.
No power to the
system.
Processor
States
No power D3 – no power
No power D3 – no power
No power D3 – no power
No power D3 – no power for
Device States
state.
except for
wake-up logic.
except for
wake-up logic.
except for
wake-up logic.
wake-up logic,
except when
provided by
battery or
external source.
Targeted System
Power
Full power > 30 W
Power < 5 W
Power < 5 W
Power < 5 W
No power to the system.
Service can be performed
safely.
(Note 1)
(Note 2)
28
Product Description
Note 1)
(Note 1)
(Note 3)
(Note 1)
(Note 3)
(Note 1)
(Note 3)
1.11.1.2 Wake-up Devices and Events
Table 8 lists the devices or specific events that can wake the computer from specific
states.
Table 8. Wake-up Devices and Events
Devices/events that wake up the system… …from this sleep state …from this global state
Power switch S3, S4, S5
RTC alarm S3, S4, S5
LAN S3, S4, S5
USB S3 G1
WAKE# S3, S4, S5
Notes:
1. S4 implies operating system support only.
2. Wake from S4 and S5 is recommended by Microsoft.
3. Wake from device/event not supported immediately upon return from AC loss.
(
G1, G2, G3
G1, G2
G1, G2
G1, G2
NOTE
The use of these wake-up events from an ACPI state requires an operating system that
provides full ACPI support. In addition, software, drivers, and peripherals must fully
support ACPI wake events.
1.11.2 Hardware Support
The board provides several power management hardware features, including:
• Wake from Power Button signal
• Instantly Available PC technology
• LAN wake capabilities
• Wake from USB
• WAKE# signal wake-up support
• Wake from S5
• +5 V Standby Power Indicator LED
NOTE
The use of Wake from USB from an ACPI state requires an operating system that
provides full ACPI support.
When resuming from an AC power failure, the computer returns to the power state it
was in before power was interrupted (on or off). The computer’s response can be set
using the Last Power State feature in the BIOS Setup program’s Boot menu.
For information about Refer to
The location of the internal power connector Figure 10, page 42
The signal names of the internal power connector Table 13, page 41
1.11.2.2 Instantly Available PC Technology
Instantly Available PC technology enables the board to enter the ACPI S3 (Suspend-toRAM) sleep-state. While in the S3 sleep-state, the computer will appear to be off (the
power supply is off, and the front panel LED is amber if dual colored, or off if single
colored.) When signaled by a wake-up device or event, the system quickly returns to
its last known wake state. Table 8 on page 29 lists the devices and events that can
wake the computer from the S3 state.
The use of Instantly Available PC technology requires operating system support and
drivers for any installed PCI Express add-in card.
1.11.2.3 LAN Wake Capabilities
LAN wake capabilities enable remote wake-up of the computer through a network. The
LAN subsystem monitors network traffic at the Media Independent Interface. Upon
detecting a Magic Packet* frame, the LAN subsystem asserts a wake-up signal that
powers up the computer.
1.11.2.4 Wake from USB
USB bus activity wakes the computer from an ACPI S3 state.
NOTE
Wake from USB requires the use of a USB peripheral that supports Wake from USB.
1.11.2.5 WAKE# Signal Wake-up Support
When the WAKE# signal on the PCI Express bus is asserted, the computer wakes from
an ACPI S3, S4, or S5 state.
1.11.2.6 Wake from S5
When the RTC Date and Time is set in the BIOS, the computer will automatically wake
from an ACPI S5 state.
30
Product Description
1.11.2.7 +5 V Standby Power Indicator LED
The standby power indicator LED shows that power is still present even when the
computer appears to be off. Figure 6 shows the location of the standby power LED.
CAUTION
If AC power has been switched off and the standby power indicator is still lit,
disconnect the power cord before installing or removing any devices connected to the
board. Failure to do so could damage the board and any attached devices.
The board utilizes 16 GB of addressable system memory. Typically the address space
that is allocated for PCI Conventional bus add-in cards, PCI Express configuration
space, BIOS (SPI Flash device), and chipset overhead resides above the top of DRAM
(total system memory). On a system that has 16 GB of system memory installed, it is
not possible to use all of the installed memory due to system address space being
allocated for other system critical functions. These functions include the following:
• BIOS/SPI Flash device (16 Mbit)
• Local APIC (19 MB)
• Direct Media Interface (40 MB)
• PCI Express configuration space (256 MB)
• PCH base address registers PCI Express ports (up to 256 MB)
• Memory-mapped I/O that is dynamically allocated for PCI Express add-in cards
(256 MB)
The board provides the capability to reclaim the physical memory overlapped by the
memory mapped I/O logical address space. The board remaps physical memory from
the top of usable DRAM boundary to the 4 GB boundary to an equivalent sized logical
address range located just above the 4 GB boundary. Figure 7 shows a schematic of
the system memory map. All installed system memory can be used when there is no
overlap of system addresses.
Address Range (decimal) Address Range (hex) Size Description
1024 K - 16777216 K 100000 – 400000000 16382 MB Extended memory
960 K - 1024 K F0000 - FFFFF 64 KB Runtime BIOS
896 K - 960 K E0000 - EFFFF 64 KB Reserved
800 K - 896 K C8000 - DFFFF 96 KB Potential available high DOS
640 K - 800 K A0000 - C7FFF 160 KB Video memory and BIOS
639 K - 640 K 9FC00 - 9FFFF 1 KB Extended BIOS data (movable by
512 K - 639 K 80000 - 9FBFF 127 KB Extended conventional memory
0 K - 512 K 00000 - 7FFFF 512 KB Conventional memory
Technical Reference
memory (open to the PCI
Conventional bus). Dependent on
video adapter used.
memory manager software)
2.2 Connectors and Headers
CAUTION
Only the following connectors and headers have overcurrent protection: back panel
and front panel USB.
The other internal connectors and headers are not overcurrent protected and should
connect only to devices inside the computer’s chassis, such as fans and internal
peripherals. Do not use these connectors or headers to power devices external to the
computer’s chassis. A fault in the load presented by the external devices could cause
damage to the computer, the power cable, and the external devices themselves.
Furthermore, improper connection of USB header single wire connectors may
eventually overload the overcurrent protection and cause damage to the board.
This section describes the board’s connectors and headers. The connectors and
headers can be divided into these groups:
• Back panel I/O connectors
• On-board I/O connectors and headers (see page 37)
The board has the following add-in card connectors:
• One PCI Express Half-Mini Card
• One PCI Express Full-Mini Card
40
Technical Reference
For information about
Refer to
Pin
Signal Name
Description
Pin
Signal Name
Description
2.2.2.3 Power Supply Connectors
The board has the following power supply connectors:
•External Power Supply – the board can be powered through a 19 V DC connector
on the back panel. The back panel DC connector is compatible with a 5.5 mm/OD
(outer diameter) and 2.5 mm/ID (inner diameter) plug, where the inner contact is
+19 (±10%) V DC and the shell is GND. The maximum current rating is 10 A.
•Internal Power Supply – the board can alternatively be powered via the internal
19 V DC 1 x 2 power connector, where pin 1 is GND and pin 2 is +19 (±10%) VDC.
Table 13. 19 V Internal Power Supply Connector
Pin Signal Name
1 Ground
2 +19 V (±10%)
Power supply considerations Section 2.5.1, page 47
2.2.2.4 Front Panel Header
This section describes the functions of the front panel header. Table 14 lists the signal
names of the front panel header. Figure 10 is a connection diagram for the front panel
header.
Figure 10. Connection Diagram for Front Panel Header
2.2.2.4.1 Hard Drive Activity LED Header
Pins 1 and 3 can be connected to an LED to provide a visual indicator that data is
being read from or written to a hard drive. Proper LED function requires a SATA hard
drive or optical drive connected to an onboard SATA connector.
2.2.2.4.2 Reset Switch Header
Pins 5 and 7 can be connected to a momentary single pole, single throw (SPST) type
switch that is normally open. When the switch is closed, the board resets and runs the
POST.
2.2.2.4.3 Power/Sleep LED Header
Pins 2 and 4 can be connected to a one- or two-color LED. Table 15 shows the
possible LED states.
Table 15. States for a One-Color Power LED
LED State Description
Off Power off
Blinking Standby
Steady Normal operation
NOTE
The LED behavior shown in Table 15 is default – other patterns may be set via BIOS
setup.
42
Technical Reference
2.2.2.4.4 Power Switch Header
Pins 6 and 8 can be connected to a front panel momentary-contact power switch. The
switch must pull the SW_ON# pin to ground for at least 50 ms to signal the power
supply to switch on or off. (The time requirement is due to internal debounce circuitry
on the board.) At least two seconds must pass before the power supply will recognize
another on/off signal.
2.2.2.5 Front Panel USB 2.0 Header
Figure 11 is a connection diagram for the front panel USB 2.0 header.
NOTE
• The +5 V DC power on the USB header is fused.
• Use only a front panel USB connector that conforms to the USB 2.0 specification for
Do not move a jumper with the power on. Always turn off the power and unplug the
power cord from the computer before changing a jumper setting. Otherwise, the board
could be damaged.
Figure 12 shows the location of the BIOS Setup Configuration jumper.
Table 16 describes the BIOS Setup configuration jumper settings for the three modes:
normal, configure, and recovery. When the jumper is set to configure mode and the
computer is powered-up, the BIOS compares the processor version and the microcode
version in the BIOS and reports if the two match.
Figure 12. Location of the BIOS Configuration Setup Jumper
Normal 1-2 The BIOS uses current configuration information and passwords
for booting.
Configure 2-3 After the POST runs, Setup runs automatically. The maintenance
menu is displayed.
Note that this Configure mode is the only way to clear the
BIOS/CMOS settings. Press F9 (restore defaults) while in
Configure mode to restore the BIOS/CMOS settings to their
default values.
Recovery None The BIOS attempts to recover the BIOS configuration. A
The board is designed to fit into a custom chassis. Figure 13 illustrates the mechanical
form factor for the board. Dimensions are given in inches [millimeters]. The outer
dimensions are 4.0 inches by 4.0 inches [101.60 millimeters by 101.60 millimeters].
46
Figure 13. Board Dimensions
Technical Reference
2.5 Electrical Considerations
2.5.1 Power Supply Considerations
CAUTION
The external 19 V DC jack is the primary power input connector of Intel Next Unit of
Computing Board D33217CK. However, the board also provides an internal 1 x 2
power connector that can be used in custom-developed systems that have an internal
power supply.
There is no isolation circuitry between the external 19 V DC jack and the internal 1 x 2
power connector. It is the system integrator’s responsibility to ensure no more than
one power supply unit is or can be attached to the board at any time and to ensure the
external 19 V DC jack is covered if the internal 1 x 2 power connector is to be used. A
plastic lid for the external 19 V DC jack is provided in the accessories box shall it be
useful to the system integrator for this purpose.
Simultaneous connection of both external and internal power supply units could result
in potential damage to the board, power supplies, or other hardware.
System power requirements will depend on actual system configurations chosen by the
integrator, as well as end user expansion preferences. It is the system integrator’s
responsibility to ensure an appropriate power budget for the system configuration is
properly assessed based on the system-level components chosen.
Table 17 lists the current capability of the fan headers.
Table 17. Fan Header Current Capability
Fan Header Maximum Available Current
Processor fan .1 A
2.6 Thermal Considerations
CAUTION
A chassis with a maximum internal ambient temperature of 58 oC at the processor fan
inlet is a requirement. Whenever possible, use of a processor heat sink that provides
omni-directional airflow to maintain required airflow across the processor voltage
regulator area is recommended.
CAUTION
Failure to ensure appropriate airflow may result in reduced performance of both the
processor and/or voltage regulator or, in some instances, damage to the board.
All responsibility for determining the adequacy of any thermal or system design
remains solely with the system integrator. Intel makes no warranties or
representations that merely following the instructions presented in this document will
result in a system with adequate thermal performance.
CAUTION
Ensure that the ambient temperature does not exceed the board’s maximum operating
temperature. Failure to do so could cause components to exceed their maximum case
temperature and malfunction. For information about the maximum operating
temperature, see the environmental specifications in Section 2.8.
CAUTION
The processor voltage regulator area (shown in Figure 14) can reach a temperature of
up to 97.5
processor voltage regulator circuit. Failure to do so may result in shorter than
expected product lifetime.
o
C in an open chassis. Ensure that proper airflow is maintained in the
48
Technical Reference
Item
Description
A
Processor voltage regulator area
B
Thermal solution
Figure 14 shows the locations of the localized high temperature zones.
Table 18 provides maximum case temperatures for the components that are sensitive
to thermal changes. The operating temperature, current load, or operating frequency
could affect case temperatures. Maximum case temperatures are important when
considering proper airflow to cool the board.
Table 18. Thermal Considerations for Components
Component Maximum Case Temperature
Processor For processor case temperature, see processor datasheets and
processor specification updates
Intel QS77 Express Chipset 104 oC
To ensure functionality and reliability, the component is specified for proper operation
when Case Temperature is maintained at or below the maximum temperature listed in
Table 19. This is a requirement for sustained power dissipation equal to Thermal
Design Power (TDP is specified as the maximum sustainable power to be dissipated by
the components). When the component is dissipating less than TDP, the case
temperature should be below the Maximum Case Temperature. The surface
temperature at the geometric center of the component corresponds to Case
Temperature.
It is important to note that the temperature measurement in the system BIOS is a
value reported by embedded thermal sensors in the components and does not directly
correspond to the Maximum Case Temperature. The upper operating limit when
monitoring this thermal sensor is Tcontrol.
Table 19. Tcontrol Values for Components
Processor For processor case temperature, see processor datasheets and
processor specification updates
Intel QS77 Express Chipset 104 oC
Processor datasheets and specification updates Section 1.2, page 18
Intel® 7 Series Chipset Thermal Mechanical Specifications and
Design Guidelines
The Mean Time Between Failures (MTBF) prediction is calculated using component and
subassembly random failure rates. The calculation is based on the Telcordia SR-332
Issue 2, Method I, Case 3, 55 ºC ambient. The MTBF prediction is used to estimate
repair rates and spare parts requirements. The MTBF for the board is 62,504 hours.
2.8 Environmental
Table 20 lists the environmental specifications for the board.
Table 20. Environmental Specifications
Parameter Specification
Temperature
Non-Operating
Operating
Unpackaged 50 g trapezoidal waveform
Velocity change of 170 inches/s²
Packaged Half sine 2 millisecond
Product Weight (pounds) Free Fall (inches) Velocity Change (inches/s²)
<20 36 167
21-40 30 152
41-80 24 136
81-100 18 118
Vibration
Unpackaged 5 Hz to 20 Hz: 0.01 g² Hz sloping up to 0.02 g² Hz
20 Hz to 500 Hz: 0.02 g² Hz (flat)
Packaged 5 Hz to 40 Hz: 0.015 g² Hz (flat)
40 Hz to 500 Hz: 0.015 g² Hz sloping down to 0.00015 g² Hz
The board uses a Intel Visual BIOS that is stored in the Serial Peripheral Interface
Flash Memory (SPI Flash) and can be updated using a disk-based program. The SPI
Flash contains the Visual BIOS Setup program, POST, the PCI auto-configuration
utility, LAN EEPROM information, and Plug and Play support.
The BIOS displays a message during POST identifying the type of BIOS and a revision
code. The initial production BIOSs are identified as GKPPT10H.86A.
When the BIOS Setup configuration jumper is set to configure mode and the computer
is powered-up, the BIOS compares the CPU version and the microcode version in the
BIOS and reports if the two match.
The Visual BIOS Setup program can be used to view and change the BIOS settings for
the computer. The BIOS Setup program is accessed by pressing the <F2> key after
the Power-On Self-Test (POST) memory test begins and before the operating system
boot begins.
NOTE
The maintenance menu is displayed only when the board is in configure mode.
Section 2.3 on page 44 shows how to put the board in configure mode.
The Serial Peripheral Interface Flash Memory (SPI Flash) includes a 64 Mb (8192 KB)
flash memory device.
3.3 System Management BIOS (SMBIOS)
SMBIOS is a Desktop Management Interface (DMI) compliant method for managing
computers in a managed network.
The main component of SMBIOS is the Management Information Format (MIF)
database, which contains information about the computing system and its
components. Using SMBIOS, a system administrator can obtain the system types,
capabilities, operational status, and installation dates for system components. The MIF
database defines the data and provides the method for accessing this information. The
BIOS enables applications such as third-party management software to use SMBIOS.
The BIOS stores and reports the following SMBIOS information:
• BIOS data, such as the BIOS revision level
• Fixed-system data, such as peripherals, serial numbers, and asset tags
• Resource data, such as memory size, cache size, and processor speed
• Dynamic data, such as event detection and error logging
Non-Plug and Play operating systems require an additional interface for obtaining the
SMBIOS information. The BIOS supports an SMBIOS table interface for such operating
systems. Using this support, an SMBIOS service-level application running on a
non-Plug and Play operating system can obtain the SMBIOS information. Additional
board information can be found in the BIOS under the Additional Information header
under the Main BIOS page.
3.4 Legacy USB Support
Legacy USB support enables USB devices to be used even when the operating system’s
USB drivers are not yet available. Legacy USB support is used to access the BIOS
Setup program, and to install an operating system that supports USB. By default,
Legacy USB support is set to Enabled.
Legacy USB support operates as follows:
1. When you apply power to the computer, legacy support is disabled.
2. POST begins.
3. Legacy USB support is enabled by the BIOS allowing you to use a USB keyboard to
enter and configure the BIOS Setup program and the maintenance menu.
4. POST completes.
5. The operating system loads. While the operating system is loading, USB keyboards
and mice are recognized and may be used to configure the operating system.
(Keyboards and mice are not recognized during this period if Legacy USB support
was set to Disabled in the BIOS Setup program.)
54
Error Messages and Beep Codes
For information about
Refer to
6. After the operating system loads the USB drivers, all legacy and non-legacy USB
devices are recognized by the operating system, and Legacy USB support from the
BIOS is no longer used.
7. Additional USB legacy feature options can be access by using Intel® Integrator
Toolkit.
To install an operating system that supports USB, verify that Legacy USB support in
the BIOS Setup program is set to Enabled and follow the operating system’s
installation instructions.
3.5 BIOS Updates
The BIOS can be updated using either of the following utilities, which are available on
the Intel World Wide Web site:
• Intel
• Intel
• Intel
Both utilities verify that the updated BIOS matches the target system to prevent
accidentally installing an incompatible BIOS.
®
Express BIOS Update utility, which enables automated updating while in the
Windows environment. Using this utility, the BIOS can be updated from a file on a
hard disk, a USB drive (a flash drive or a USB hard drive), or a CD-ROM, or from
the file location on the Web.
®
Flash Memory Update Utility, which requires booting from DOS. Using this
utility, the BIOS can be updated from a file on a hard disk, a USB drive (a flash
drive or a USB hard drive), or a CD-ROM.
®
F7 switch during POST allows a user to select where the BIOS .bio file is
located and perform the update from that location/device. Similar to performing a
BIOS Recovery without removing the BIOS configuration jumper.
NOTE
Review the instructions distributed with the upgrade utility before attempting a BIOS
update.
During POST, an Intel® splash screen is displayed by default. This splash screen can
be augmented with a custom splash screen. The Intel Integrator’s Toolkit that is
available from Intel can be used to create a custom splash screen.
NOTE
If you add a custom splash screen, it will share space with the Intel branded logo.
It is unlikely that anything will interrupt a BIOS update; however, if an interruption
occurs, the BIOS could be damaged. Table 21 lists the drives and media types that
can and cannot be used for BIOS recovery. The BIOS recovery media does not need to
be made bootable.
Table 21. Acceptable Drives/Media Types for BIOS Recovery
Hard disk drive (connected to SATA or USB) Yes
CD/DVD drive (connected to SATA or USB) Yes
USB flash drive Yes
USB diskette drive (with a 1.4 MB diskette) No (BIOS update file is bigger than 1.4 MB size limit)
NOTE
Supported file systems for BIOS recovery:
• NTFS (sparse, compressed, or encrypted files are not supported)
In the BIOS Setup program, the user can choose to boot from a hard drive, optical
drive or a removable drive. The default setting is for the optical drive to be the first
boot device, the hard drive second and removable drive third.
3.7.1 Booting Without Attached Devices
For use in embedded applications, the BIOS has been designed so that after passing
the POST, the operating system loader is invoked even if the following devices are not
present:
• Video adapter
• Keyboard
• Mouse
3.7.2 Changing the Default Boot Device During POST
Pressing the <F10> key during POST causes a boot device menu to be displayed. This
menu displays the list of available boot devices. Table 22 lists the boot device menu
options.
Table 22. Boot Device Menu Options
Boot Device Menu Function Keys Description
Selects a default boot device
<Enter> Exits the menu, and boots from the selected device
<Esc> Exits the menu and boots according to the boot priority
The Hard Disk Drive Password Security feature blocks read and write accesses to the
hard disk drive until the correct password is given. Hard Disk Drive Passwords are set
in BIOS SETUP and are prompted for during BIOS POST. For convenient support of S3
resume, the system BIOS will automatically unlock drives on resume from S3.
The User hard disk drive password, when installed, will be required upon each powercycle until the Master Key or User hard disk drive password is submitted.
The Master Key hard disk drive password, when installed, will not lock the drive. The
Master Key hard disk drive password exists as an unlock override in the event that the
User hard disk drive password is forgotten. Only the installation of the User hard disk
drive password will cause a hard disk to be locked upon a system power-cycle.
Table 23 shows the effects of setting the Hard Disk Drive Passwords.
Table 23. Master Key and User Hard Drive Password Functions
Neither None
Master only None
User only User only
Master and User Set Master or User
During every POST, if a User hard disk drive password is set, POST execution will
pause with the following prompt to force the user to enter the Master Key or User hard
disk drive password:
Enter Hard Disk Drive Password:
Upon successful entry of the Master Key or User hard disk drive password, the system
will continue with normal POST.
If the hard disk drive password is not correctly entered, the system will go back to the
above prompt. The user will have three attempts to correctly enter the hard disk drive
password. After the third unsuccessful hard disk drive password attempt, the system
will halt with the message:
Hard Disk Drive Password Entry Error
A manual power cycle will be required to resume system operation.
NOTE
As implemented on D33217CK, Hard Disk Drive Password Security is only supported on
SATA port 0. The passwords are stored on the hard disk drive so if the drive is
relocated to another computer that does not support Hard Disk Drive Password
Security feature, the drive will not be accessible.
58
Error Messages and Beep Codes
3.9 BIOS Security Features
The BIOS includes security features that restrict access to the BIOS Setup program
and who can boot the computer. A supervisor password and a user password can be
set for the BIOS Setup program and for booting the computer, with the following
restrictions:
•The supervisor password gives unrestricted access to view and change all the Setup
options in the BIOS Setup program. This is the supervisor mode.
•The user password gives restricted access to view and change Setup options in the
BIOS Setup program. This is the user mode.
•If only the supervisor password is set, pressing the <Enter> key at the password
prompt of the BIOS Setup program allows the user restricted access to Setup.
•If both the supervisor and user passwords are set, users can enter either the
supervisor password or the user password to access Setup. Users have access to
Setup respective to which password is entered.
•Setting the user password restricts who can boot the computer. The password
prompt will be displayed before the computer is booted. If only the supervisor
password is set, the computer boots without asking for a password. If both
passwords are set, the user can enter either password to boot the computer.
•For enhanced security, use different passwords for the supervisor and user
passwords.
•Valid password characters are A-Z, a-z, and 0-9. Passwords may be up to
16 characters in length.
•To clear a set password, enter a blank password after entering the existing
password.
Table 24 shows the effects of setting the supervisor password and user password. This
table is for reference only and is not displayed on the screen.
Table 24. Supervisor and User Password Functions
Password
Set
Neither Can change all
Supervisor
only
User only N/A Can change all
Supervisor
and user set
Note: If no password is set, any user can change all Setup options.
Whenever a recoverable error occurs during POST, the BIOS causes the board’s front
panel power LED to blink an error message describing the problem (see Table 25).
Table 25. Front-panel Power LED Blink Codes
Type Pattern Note
BIOS update in progress Off when the update begins, then on for
0.5 seconds, then off for 0.5 seconds. The
pattern repeats until the BIOS update is
complete.
Video error
Memory error On-off (1.0 second each) three times, then
Thermal trip warning Each beep will be accompanied by the following
Note: Disabled per default BIOS setup option.
On-off (1.0 second each) two times, then
2.5-second pause (off), entire pattern repeats
(blink and pause) until the system is powered
off.
2.5-second pause (off), entire pattern repeats
(blinks and pause) until the system is powered
off.
blink pattern: .25 seconds on, .25 seconds off,
.25 seconds on, .25 seconds off. This will result
in a total of 16 blinks.
When no VGA option ROM is
found.
4.2 BIOS Error Messages
Table 26 lists the error messages and provides a brief description of each.
Table 26. BIOS Error Messages
Error Message Explanation
CMOS Battery Low The battery may be losing power. Replace the battery soon.
CMOS Checksum Bad The CMOS checksum is incorrect. CMOS memory may have
Memory Size Decreased Memory size has decreased since the last boot. If no memory
No Boot Device Available System did not find a device to boot.
During the POST, the BIOS generates diagnostic progress codes (POST codes) to I/O
port 80h. If the POST fails, execution stops and the last POST code generated is left at
port 80h. This code is useful for determining the point where an error occurred.
Displaying the POST codes requires a POST card that can interface with the Debug
header. Refer to the location of the Debug header in Figure 1.
The following tables provide information about the POST codes generated by the BIOS:
• Table 27 lists the Port 80h POST code ranges
• Table 28 lists the Port 80h POST codes themselves
• Table 29 lists the Port 80h POST sequence
NOTE
In the tables listed above, all POST codes and range values are listed in hexadecimal.
Table 27. Port 80h POST Code Ranges
0x00 – 0x05 Entering SX states S0 to S5.
0x10, 0x20, 0x30,
0x40, 0x50
0x01 – 0x0F Security (SEC) phase
0x11 – 0x1F PEI phase pre MRC execution
0x21 – 0x29 MRC memory detection
0x2A – 0x2F PEI phase post MRC execution
0x31 – 0x35 Recovery
0x36 – 0x3F Platform DXE driver
0x41 – 0x4F CPU Initialization (PEI, DXE, SMM)
0x50 – 0x5F I/O Buses: PCI, USB, ATA etc. 0x5F is an unrecoverable error. Start with PCI.
0x60 – 0x6F BDS
0x70 – 0x7F Output devices: All output consoles.
0x80 – 0x8F For future use
0x90 – 0x9F Input devices: Keyboard/Mouse.
0xA0 – 0xAF For future use
0xB0 – 0xBF Boot Devices: Includes fixed media and removable media. Not that critical since
0xC0 – 0xCF For future use
0xD0 – 0xDF For future use
Resuming from SX states (0x10 –0x20 – S2, 0x30 – S3, etc.)
consoles should be up at this point.
62
Error Messages and Beep Codes
Port 80 Code
Progress Code Enumeration
Table 28. Port 80h POST Codes
ACPI S States
0x00,0x01,0x02,0x03,0x04,0x05 Entering S0, S2, S3, S4, or S5 state
0x10,0x20,0x30,0x40,0x50 Resuming from S2, S3, S4, or S5 state
Security Phase (SEC)
0x08 Starting BIOS execution after CPU BIST
0x09 SPI prefetching and caching
0x0A Load BSP microcode
0x0B Load APs microcode
0x0C Platform program baseaddresses
0x0D Wake Up All APs
0x0E Initialize NEM
0x0F Pass entry point of the PEI core
PEI before MRC
PEI Platform driver
0x11 Set bootmode, GPIO init
0x12 Early chipset register programming including graphics init
This section contains the following regulatory compliance information for Intel Next
Unit of Computing Board D33217CK:
• Safety standards
• European Union Declaration of Conformity statement
• Product Ecology statements
• Electromagnetic Compatibility (EMC) standards
• Product certification markings
5.1.1 Safety Standards
Intel Next Unit of Computing Board D33217CK complies with the safety standards
stated in Table 30 when correctly installed in a compatible host system.
Table 30. Safety Standards
Standard Title
CSA/UL 60950-1 Information Technology Equipment – Safety - Part 1: General
Requirements (USA and Canada)
EN 60950-1 Information Technology Equipment – Safety - Part 1: General
Requirements (European Union)
IEC 60950-1 Information Technology Equipment – Safety - Part 1: General
Requirements (International)
69
5.1.2 European Union Declaration of Conformity
Statement
We, Intel Corporation, declare under our sole responsibility that the products Intel®
Next Unit of Computing Board D33217CK is in conformity with all applicable essential
requirements necessary for CE marking, following the provisions of the European
Council Directive 2004/108/EC (EMC Directive), 2006/95/EC (Low Voltage Directive),
and 2002/95/EC (ROHS Directive).
The product is properly CE marked demonstrating this conformity and is for
distribution within all member states of the EU with no restrictions.
This product follows the provisions of the European Directives 2004/108/EC,
2006/95/EC, and 2002/95/EC.
ČeštinaTento výrobek odpovídá požadavkům evropských směrnic 2004/108/EC,
2006/95/EC a 2002/95/EC.
Dansk Dette produkt er i overensstemmelse med det europæiske direktiv
2004/108/EC, 2006/95/EC & 2002/95/EC.
Dutch Dit product is in navolging van de bepalingen van Europees Directief
2004/108/EC, 2006/95/EC & 2002/95/EC.
Eesti Antud toode vastab Euroopa direktiivides 2004/108/EC, ja 2006/95/EC ja
2002/95/EC kehtestatud nõuetele.
Suomi Tämä tuote noudattaa EU-direktiivin 2004/108/EC, 2006/95/EC & 2002/95/EC
määräyksiä.
Français Ce produit est conforme aux exigences de la Directive Européenne
2004/108/EC, 2006/95/EC & 2002/95/EC.
Deutsch Dieses Produkt entspricht den Bestimmungen der Europäischen Richtlinie
2004/108/EC, 2006/95/EC & 2002/95/EC.
Ελληνικά ΤοπαρόνπροϊόνακολουθείτιςδιατάξειςτωνΕυρωπαϊκώνΟδηγιών
2004/108/EC, 2006/95/EC και 2002/95/EC.
Magyar E termék megfelel a 2004/108/EC, 2006/95/EC és 2002/95/EC Európai
Irányelv előírásainak.
Icelandic Þessi vara stenst reglugerð Evrópska Efnahags Bandalagsins númer
2004/108/EC, 2006/95/EC, & 2002/95/EC.
Italiano Questo prodotto è conforme alla Direttiva Europea 2004/108/EC,
2006/95/EC & 2002/95/EC.
LatviešuŠis produkts atbilst Eiropas Direktīvu 2004/108/EC, 2006/95/EC un
2002/95/EC noteikumiem.
LietuviųŠis produktas atitinka Europos direktyvų 2004/108/EC, 2006/95/EC, ir
2002/95/EC nuostatas.
Malti Dan il-prodott hu konformi mal-provvedimenti tad-Direttivi Ewropej
2004/108/EC, 2006/95/EC u 2002/95/EC.
Norsk Dette produktet er i henhold til bestemmelsene i det europeiske direktivet
2004/108/EC, 2006/95/EC & 2002/95/EC.
Polski Niniejszy produkt jest zgodny z postanowieniami Dyrektyw Unii Europejskiej
2004/108/EC, 206/95/EC i 2002/95/EC.
70
Regulatory Compliance and Battery Disposal Information
中文
Portuguese Este produto cumpre com as normas da Diretiva Européia 2004/108/EC,
2006/95/EC & 2002/95/EC.
Español Este producto cumple con las normas del Directivo Europeo 2004/108/EC,
2006/95/EC & 2002/95/EC.
Slovensky Tento produkt je v súlade s ustanoveniami európskych direktív
2004/108/EC, 2006/95/EC a 2002/95/EC.
SlovenščinaIzdelek je skladen z določbami evropskih direktiv 2004/108/EC,
2006/95/EC in 2002/95/EC.
Svenska Denna produkt har tillverkats i enlighet med EG-direktiv 2004/108/EC,
2006/95/EC & 2002/95/EC.
TürkçeBu ürün, Avrupa Birliği’nin 2004/108/EC, 2006/95/EC ve 2002/95/EC
yönergelerine uyar.
5.1.3 Product Ecology Statements
The following information is provided to address worldwide product ecology concerns
and regulations.
5.1.3.1 Disposal Considerations
This product contains the following materials that may be regulated upon disposal:
lead solder on the printed wiring board assembly.
5.1.3.2 Recycling Considerations
As part of its commitment to environmental responsibility, Intel has implemented the
Intel Product Recycling Program to allow retail consumers of Intel’s branded products
to return used products to selected locations for proper recycling.
Please consult the http://www.intel.com/intel/other/ehs/product_ecology for the
details of this program, including the scope of covered products, available locations,
shipping instructions, terms and conditions, etc.
作为其对环境责任之承诺的部分,英特尔已实施 Intel Product Recycling Program
(英特尔产品回收计划),以允许英特尔品牌产品的零售消费者将使用过的产品退还至指定地点作恰
当的重复使用处理。
Als Teil von Intels Engagement für den Umweltschutz hat das Unternehmen das Intel
Produkt-Recyclingprogramm implementiert, das Einzelhandelskunden von Intel
Markenprodukten ermöglicht, gebrauchte Produkte an ausgewählte Standorte für
ordnungsgemäßes Recycling zurückzugeben.
Details zu diesem Programm, einschließlich der darin eingeschlossenen Produkte,
verfügbaren Standorte, Versandanweisungen, Bedingungen usw., finden Sie auf der
Como parte de su compromiso de responsabilidad medioambiental, Intel ha
implantado el programa de reciclaje de productos Intel, que permite que los
consumidores al detalle de los productos Intel devuelvan los productos usados en los
lugares seleccionados para su correspondiente reciclado.
Consulte la http://www.intel.com/intel/other/ehs/product_ecologypara ver los detalles
del programa, que incluye los productos que abarca, los lugares disponibles,
instrucciones de envío, términos y condiciones, etc.
Français
Dans le cadre de son engagement pour la protection de l'environnement, Intel a mis
en œuvre le programme Intel Product Recycling Program (Programme de recyclage des
produits Intel) pour permettre aux consommateurs de produits Intel de recycler les
produits usés en les retournant à des adresses spécifiées.
Visitez la page Web http://www.intel.com/intel/other/ehs/product_ecology pour en
savoir plus sur ce programme, à savoir les produits concernés, les adresses
disponibles, les instructions d'expédition, les conditions générales, etc.
Sebagai sebahagian daripada komitmennya terhadap tanggungjawab persekitaran,
Intel telah melaksanakan Program Kitar Semula Produk untuk membenarkan
pengguna-pengguna runcit produk jenama Intel memulangkan produk terguna ke
lokasi-lokasi terpilih untuk dikitarkan semula dengan betul.
Sila rujuk http://www.intel.com/intel/other/ehs/product_ecology untuk mendapatkan
butir-butir program ini, termasuklah skop produk yang dirangkumi, lokasi-lokasi
tersedia, arahan penghantaran, terma & syarat, dsb.
Portuguese
Como parte deste compromisso com o respeito ao ambiente, a Intel implementou o
Programa de Reciclagem de Produtos para que os consumidores finais possam enviar
produtos Intel usados para locais selecionados, onde esses produtos são reciclados de
maneira adequada.
Consulte o site http://www.intel.com/intel/other/ehs/product_ecology (em Inglês)
para obter os detalhes sobre este programa, inclusive o escopo dos produtos cobertos,
os locais disponíveis, as instruções de envio, os termos e condições, etc.
72
Regulatory Compliance and Battery Disposal Information
Regulation
Title
Russian
В качестве части своих обязательств к окружающей среде, в Intel создана
программа утилизации продукции Intel (Product Recycling Program) для
предоставления конечным пользователям марок продукции Intel возможности
возврата используемой продукции в специализированные пункты для должной
утилизации.
Пожалуйста, обратитесь на веб-сайт
http://www.intel.com/intel/other/ehs/product_ecology за информацией об этой
программе, принимаемых продуктах, местах приема, инструкциях об отправке,
положениях и условиях и т.д.
Türkçe
Intel, çevre sorumluluğuna bağımlılığının bir parçası olarak, perakende tüketicilerin
Intel markalı kullanılmış ürünlerini belirlenmiş merkezlere iade edip uygun şekilde geri
dönüştürmesini amaçlayan Intel Ürünleri Geri Dönüşüm Programı’nı uygulamaya
koymuştur.
Bu programın ürün kapsamı, ürün iade merkezleri, nakliye talimatları, kayıtlar ve
şartlar v.s dahil bütün ayrıntılarını ögrenmek için lütfen
Intel Next Unit of Computing Board D33217CK complies with the EMC regulations
stated in Table 31 when correctly installed in a compatible host system.
Table 31. EMC Regulations
FCC 47 CFR Part 15,
Subpart B
ICES-003 Interference-Causing Equipment Standard, Digital Apparatus. (Canada)
EN55022 Limits and methods of measurement of Radio Interference Characteristics
EN55024 Information Technology Equipment – Immunity Characteristics Limits and
EN55022 Australian Communications Authority, Standard for Electromagnetic
CISPR 22 Limits and methods of measurement of Radio Disturbance Characteristics
CISPR 24 Information Technology Equipment – Immunity Characteristics – Limits
VCCI V-3, V-4 Voluntary Control for Interference by Information Technology Equipment.
KN-22, KN-24 Korean Communications Commission – Framework Act on
CNS 13438 Bureau of Standards, Metrology, and Inspection (Taiwan)
Title 47 of the Code of Federal Regulations, Part 15, Subpart B, Radio
Frequency Devices. (USA)
of Information Technology Equipment. (European Union)
methods of measurement. (European Union)
Compatibility. (Australia and New Zealand)
of Information Technology Equipment. (International)
and Methods of Measurement. (International)
(Japan)
Telecommunications and Radio Waves Act (South Korea)
73
FCC Declaration of Conformity
This device complies with Part 15 of the FCC Rules. Operation is subject to the
following two conditions: (1) this device may not cause harmful interference, and (2)
this device must accept any interference received, including interference that may
cause undesired operation.
For questions related to the EMC performance of this product, contact:
Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124
1-800-628-8686
This equipment has been tested and found to comply with the limits for a Class B
digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to
provide reasonable protection against harmful interference in a residential installation.
This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the instructions, may cause harmful interference
to radio communications. However, there is no guarantee that interference will not
occur in a particular installation. If this equipment does cause harmful interference to
radio or television reception, which can be determined by turning the equipment off
and on, the user is encouraged to try to correct the interference by one or more of the
following measures:
• Reorient or relocate the receiving antenna.
• Increase the separation between the equipment and the receiver.
• Connect the equipment to an outlet on a circuit other than the one to which the
receiver is connected.
•Consult the dealer or an experienced radio/TV technician for help.
Any changes or modifications to the equipment not expressly approved by Intel
Corporation could void the user’s authority to operate the equipment.
Tested to comply with FCC standards for home or office use.
Canadian Department of Communications Compliance Statement
This digital apparatus does not exceed the Class B limits for radio noise emissions from
digital apparatus set out in the Radio Interference Regulations of the Canadian
Department of Communications.
Le présent appareil numerique német pas de bruits radioélectriques dépassant les
limites applicables aux appareils numériques de la classe B prescrites dans le
Réglement sur le broullage radioélectrique édicté par le ministére des Communications
du Canada.
74
Regulatory Compliance and Battery Disposal Information
Japan VCCI Statement
Japan VCCI Statement translation: This is a Class B product based on the standard of
the Voluntary Control Council for Interference from Information Technology Equipment
(VCCI). If this is used near a radio or television receiver in a domestic environment, it
may cause radio interference. Install and use the equipment according to the
instruction manual.
Korea Class B Statement
Korea Class B Statement translation: This equipment is for home use, and has
acquired electromagnetic conformity registration, so it can be used not only in
residential areas, but also other areas.
75
For information about
Refer to
5.1.5 ENERGY STAR* 5.2, e-Standby, and ErP
Compliance
The US Department of Energy and the US Environmental Protection Agency have
continually revised the ENERGY STAR requirements. Intel has worked directly with
these two governmental agencies in the definition of new requirements.
Intel Next Unit of Computing Board D33217CK meets the following program
requirements in an adequate system configuration, including appropriate selection of
an efficient power supply:
• Energy Star v5.2, category B
• EPEAT*
• Korea e-Standby
• European Union Energy-related Products Directive 2013 (ErP) Lot 6
NOTE
Energy Star compliance is based at the system level not the board level. Use of an
Intel Next Unit of Computing Board alone does not guarantee Energy Star compliance.
ENERGY STAR requirements and recommended configurations http://www.intel.com/go/energystar
Regulatory Compliance and Battery Disposal Information
Description
Mark
5.1.6 Regulatory Compliance Marks (Board Level)
Intel Next Unit of Computing Board D33217CK has the regulatory compliance marks
shown in Table 32.
Table 32. Regulatory Compliance Marks
UL joint US/Canada Recognized Component mark. Includes adjacent UL file
number for Intel Next Unit of Computing Boards: E210882.
FCC Declaration of Conformity logo mark for Class B equipment.
CE mark. Declaring compliance to the European Union (EU) EMC directive,
Low Voltage directive, and RoHS directive.
Australian Communications Authority (ACA) and New Zealand Radio
Spectrum Management (NZ RSM) C-tick mark. Includes adjacent Intel
supplier code number, N-232.
Japan VCCI (Voluntary Control Council for Interference) mark.
Korea Certification mark. Includes an adjacent KCC (Korean
Communications Commission) certification number:
KCC-REM-CPU-D33217CK.
Taiwan BSMI (Bureau of Standards, Metrology and Inspections) mark.
Includes adjacent Intel company number, D33025.
Printed wiring board manufacturer’s recognition mark. Consists of a unique
UL recognized manufacturer’s logo, along with a flammability rating (solder
side).
China RoHS/Environmentally Friendly Use Period Logo: This is an example of
the symbol used on Intel Next Unit of Computing Boards and associated
collateral. The color of the mark may vary depending upon the application.
The Environmental Friendly Usage Period (EFUP) for Intel Next Unit of
Computing Boards has been determined to be 10 years.
V-0
77
PRÉCAUTION
FORHOLDSREGEL
OBS!
VIKTIGT!
VARO
VORSICHT
AVVERTIMENTO
5.2 Battery Disposal Information
CAUTION
Risk of explosion if the battery is replaced with an incorrect type. Batteries should be
recycled where possible. Disposal of used batteries must be in accordance with local
environmental regulations.
Risque d'explosion si la pile usagée est remplacée par une pile de type incorrect. Les
piles usagées doivent être recyclées dans la mesure du possible. La mise au rebut des
piles usagées doit respecter les réglementations locales en vigueur en matière de
protection de l'environnement.
Eksplosionsfare, hvis batteriet erstattes med et batteri af en forkert type. Batterier bør
om muligt genbruges. Bortskaffelse af brugte batterier bør foregå i overensstemmelse
med gældende miljølovgivning.
Det kan oppstå eksplosjonsfare hvis batteriet skiftes ut med feil type. Brukte batterier
bør kastes i henhold til gjeldende miljølovgivning.
Risk för explosion om batteriet ersätts med felaktig batterityp. Batterier ska kasseras
enligt de lokala miljövårdsbestämmelserna.
Räjähdysvaara, jos pariston tyyppi on väärä. Paristot on kierrätettävä, jos se on
mahdollista. Käytetyt paristot on hävitettävä paikallisten ympäristömääräysten
mukaisesti.
Bei falschem Einsetzen einer neuen Batterie besteht Explosionsgefahr. Die Batterie
darf nur durch denselben oder einen entsprechenden, vom Hersteller empfohlenen
Batterietyp ersetzt werden. Entsorgen Sie verbrauchte Batterien den Anweisungen des
Herstellers entsprechend.
Esiste il pericolo di un esplosione se la pila non viene sostituita in modo corretto.
Utilizzare solo pile uguali o di tipo equivalente a quelle consigliate dal produttore. Per
disfarsi delle pile usate, seguire le istruzioni del produttore.
78
Regulatory Compliance and Battery Disposal Information
PRECAUCIÓN
WAARSCHUWING
ATENÇÃO
AŚCIAROŽZNAŚĆ
UPOZORNÌNÍ
Προσοχή
VIGYÁZAT
Existe peligro de explosión si la pila no se cambia de forma adecuada. Utilice
solamente pilas iguales o del mismo tipo que las recomendadas por el fabricante del
equipo. Para deshacerse de las pilas usadas, siga igualmente las instrucciones del
fabricante.
Er bestaat ontploffingsgevaar als de batterij wordt vervangen door een onjuist type
batterij. Batterijen moeten zoveel mogelijk worden gerecycled. Houd u bij het
weggooien van gebruikte batterijen aan de plaatselijke milieuwetgeving.
Haverá risco de explosão se a bateria for substituída por um tipo de bateria incorreto.
As baterias devem ser recicladas nos locais apropriados. A eliminação de baterias
usadas deve ser feita de acordo com as regulamentações ambientais da região.
Існуе рызыка выбуху, калі заменены акумулятар неправільнага тыпу.
Акумулятары павінны, па магчымасці, перепрацоўвацца. Пазбаўляцца ад старых
акумулятараў патрэбна згодна з мясцовым заканадаўствам па экалогіі.
V případě výměny baterie za nesprávný druh může dojít k výbuchu. Je-li to možné,
baterie by měly být recyklovány. Baterie je třeba zlikvidovat v souladu s místními
předpisy o životním prostředí.
Υπάρχει κίνδυνος για έκρηξη σε περίπτωση που η μπαταρία αντικατασταθεί από μία
λανθασμένου τύπου. Οι μπαταρίες θα πρέπει να ανακυκλώνονται όταν κάτι τέτοιο είναι
δυνατό. Η απόρριψη των χρησιμοποιημένων μπαταριών πρέπει να γίνεται σύμφωνα με
τους κατά τόπο περιβαλλοντικούς κανονισμούς.
Ha a telepet nem a megfelelő típusú telepre cseréli, az felrobbanhat. A telepeket
lehetőség szerint újra kell hasznosítani. A használt telepeket a helyi környezetvédelmi
előírásoknak megfelelően kell kiselejtezni.
79
AWAS
OSTRZEŻENIE
PRECAUŢIE
ВНИМАНИЕ
UPOZORNENIE
POZOR
UYARI
OСТОРОГА
Risiko letupan wujud jika bateri digantikan dengan jenis yang tidak betul. Bateri
sepatutnya dikitar semula jika boleh. Pelupusan bateri terpakai mestilah mematuhi
peraturan alam sekitar tempatan.
Istnieje niebezpieczeństwo wybuchu w przypadku zastosowania niewłaściwego typu
baterii. Zużyte baterie należy w miarę możliwości utylizować zgodnie z odpowiednimi
przepisami ochrony środowiska.
Risc de explozie, dacă bateria este înlocuită cu un tip de baterie necorespunzător.
Bateriile trebuie reciclate, dacă este posibil. Depozitarea bateriilor uzate trebuie să
respecte reglementările locale privind protecţia mediului.
При использовании батареи несоответствующего типа существует риск ее взрыва.
Батареи должны быть утилизированы по возможности. Утилизация батарей должна
проводится по правилам, соответствующим местным требованиям.
Ak batériu vymeníte za nesprávny typ, hrozí nebezpečenstvo jej výbuchu.
Batérie by sa mali podľa možnosti vždy recyklovať. Likvidácia použitých batérií sa musí
vykonávať v súlade s miestnymi predpismi na ochranu životného prostredia.
Zamenjava baterije z baterijo drugačnega tipa lahko povzroči eksplozijo.
Če je mogoče, baterije reciklirajte. Rabljene baterije zavrzite v skladu z lokalnimi
okoljevarstvenimi predpisi.
Yanlış türde pil takıldığında patlama riski vardır. Piller mümkün olduğunda geri
dönüştürülmelidir. Kullanılmış piller, yerel çevre yasalarına uygun olarak atılmalıdır.
Використовуйте батареї правильного типу, інакше існуватиме ризик вибуху.
Якщо можливо, використані батареї слід утилізувати. Утилізація використаних
батарей має бути виконана згідно місцевих норм, що регулюють охорону довкілля.
80
Regulatory Compliance and Battery Disposal Information
81
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