The Intel® Desktop Board D850GB may contain design defects or errors known as errata that may cause the product to deviate from published specifications. Current characterized
errata are documented in the Intel Desktop Board D850GB Specification Update.
Order Number A26080-002
Revision History
Revision Revision History Date
-001 First release of the Intel® Desktop Board D850GB Technical Product
Specification.
-002 Second release of the Intel Desktop Board D850GB Technical Product
Specification. Changes include (but not limited to) the following:
• Added caution statement in processor section regarding the use of
ATX12V-compliant power supplies
• Changed Firmware Hub component to SST 49LF004A
• Added AD1885 analog codec as an option to audio subsystem
• Listed Diagnostic LEDs as a manufacturing option
• Updated fan connector section
• Updated BIOS Setup program chapter to reflect latest version of BIOS
• Included document changes from the most recent specification update
This product specification applies to only standard D850GB boards with BIOS identifier
GB85010A.86A.
Changes to this specification will be published in the Intel Desktop Board D850GB Specification
Update before being incorporated into a revision of this document.
September 2000
April 2001
Information in this doc um ent is provided in connection wi t h Intel
otherwise, to any intell ectual property rights is granted by this document. E x cept as provided in Intel’s Terms and
Conditions of Sale for such products, Intel assumes no liability whatsoever, and I nt el dis claims any express or implied
warranty, relating to sale and/or use of I ntel products including liability or warranties relat i ng t o f i t ness for a particular
purpose, merchantability, or infringement of any patent, copyright or other int ellec t ual propert y right. Intel products are not
intended for use in medical, l i f e saving, or life sustai ni ng appl i cations.
Intel may make changes t o specifications and produc t descriptions at any tim e, without notice.
®
The Intel
deviate from published spec i fications. Current charac terized errata are available on request.
Contact your local Int el sales office or your distributor to obtain the latest specifications before pl acing your product order.
Copies of documents whic h hav e an orderi ng number and are referenced in this document, or other Intel literature, may be
obtained from:
Intel Corporation
P.O. Box 5937
Denver, CO 80217-9808
or call in North America 1-800-548-4725, Europe 44-0-1793-431-155, France 44-0-1793-421-777,
Germany 44-0-1793-421-333, other Countries 708-296-9333.
†
Third-party brands and names are the property of their respective owners.
Copyright 2000, 2001, Intel Corporat i on. All rights reserved.
Desktop Board D850GB may contain design defects or errors k nown as errata that may cause the produc t to
®
products. No license, express or implied, by est oppel or
Preface
This Technical Product Specification (TPS) specifies the board layout, components, connectors,
power and environmental requirements, and the BIOS for the Intel Desktop Board D850GB. It
describes the standard product and available manufacturing options.
Intended Audience
The TPS is intended to provide detailed, technical information about the D850GB board and its
components to the vendors, system integrators, and other engineers and technicians who need this
level of information. It is specifically not intended for general audiences.
What This Document Contains
Chapter Description
1 A description of the hardware used on the D850GB board
2 A map of the resources of the board
3 The features supported by the BIOS Setup program
4 The contents of the BIOS Setup program’s menus and submenus
5 A description of the BIOS error messages, beep codes, POST codes, and diagnostic
LEDs
Typographical Conventions
This section contains information about the conventions used in this specification. Not all of these
symbols and abbreviations appear in all specifications of this type.
Notes, Cautions, and Warnings
NOTE
✏
Notes call attention to important information.
CAUTION
Cautions are included to help you avoid damaging hardware or losing data.
WARNING
Warnings indicate conditions, which if not observed, can cause personal injury.
# Used after a signal name to identify an active-low signal (such as USBP0#)
(NxnX) When used in the description of a component, N indicates component type, xn are the relative
coordinates of its location on the D850GB board, and X is the instance of the particular part at
that general location. For example, J5J1 is a connector, located at 5J. It is the first connector
in the 5J area.
GB Gigabyte (1,073,741,824 bytes)
GB/sec Gigabytes per second
KB Kilobyte (1024 bytes)
Kbit Kilobit (1024 bits)
kbits/sec 1000 bits per second
MB Megabyte (1,048,576 bytes)
MB/sec Megabytes per second
Mbit Megabit (1,048,576 bits)
Mbit/sec Megabits per second
xxh An address or data value ending with a lowercase h indicates a hexadecimal value.
x.x V Volts. Voltages are DC unless otherwise specified.
†
This symbol is used to indicate third-party brands and names that are the property of their
Table 1 summarizes the D850GB board’s major features.
Table 1. Feature Summary
Form Factor
Processor
Memory
Chipset
I/O Control
Video
Peripheral
Interfaces
Expansion
Capabilities
BIOS
Instantly Available
PC
Wake on LAN†
Technology
Connector
Hardware
Monitoring features
Enhanced thermal
monitor and fan
control device
For information about Refer to
The board’s compliance level with APM, ACPI, Plug and Play, and SMBIOS. Section 1.3, page 16
ATX (12.0 inches by 9.6 inches)
• Support for an Intel
• 400 MHz system data bus
• Two Direct-RDRAM banks with two RIMM
• Support for up to 2 GB of system memory using PC600 or PC800 RDRAM
Intel® 850 Chipset, consisting of:
®
• Intel
• Intel
• SST 49LF004A 4 Mbit Firmware Hub (FWH)
SMSC LPC47M102 LPC bus I/O controller
• AGP connector supporting 1.5 V 4X AGP cards
• Four Universal Serial Bus (USB) ports
• One serial port
• One parallel port
• Two IDE interfaces with Ultra DMA, ATA-33/66/100 support
• One diskette drive interface
• PS/2
• Five PCI bus add-in card connectors (SMBus routed to PCI bus connector 2)
• Intel/AMI BIOS (resident in the SST 49LF004A 4 Mbit FWH)
• Support for Advanced Power Management (APM), Advanced Configuration and
• Support for
• Suspend to RAM support
• Wake on PCI, CNR, RS-232, front panel, PS/2 keyboard, and USB ports
Support for system wake up using an add-in network interface card with remote
wake up capability
Two fan sense inputs used to monitor fan activity
• Two additional fan sense inputs
• Two additional thermal sense inputs
82850 Memory Controller Hub (MCH)
®
82801BA I/O Controller Hub (ICH2)
†
keyboard and mouse ports
Power Interface (ACPI), Plug and Play, and SMBIOS
PCI Local Bus Specification Revision 2.2
®
Pentium® 4 processor
†
s per bank (four RIMM sockets)
12
Product Description
1.1.2 Manufacturing Options
Table 2 describes the D850GB board’s manufacturing options. Not every manufacturing option is
available in all marketing channels. Please contact your Intel representative to determine which
manufacturing options are available to you.
Table 2. Manufacturing Options
Audio (Integrated)
Video
LAN
Hardware Monitor
Subsystem
CNR
Diagnostic LEDs
Audio subsyst em that uses the Analog Devices AD1881/AD1885 analog codec for
AC 97 processing
AGP Pro50 interface (50 W maximum); backward compatible with 1.5 V AGP video
cards.
This option uses an AGP Pro 1.5 V connector, also known as an AGP Pro50
connector.
®
Intel
82562EM 10/100 Mbit/sec Platform LAN Connect (PLC) device
Heceta 4 Hardware Monitor:
• Voltage sense to detect out of range power supply voltages
• Thermal sense to detect out of range thermal values
One Communication and Networking Riser (CNR) connector (slot shared with PCI
bus connector 5, J4A1)
Figure 1 shows the location of the major components on the D850GB board.
B
C
DA
E
V
U
F
G
T
S
H
I
R
Q
PLJO
N
M
K
A AD1881/AD1885 audio codec (optional) L Diskette drive connector
B AGP connector (AGP Pro 1.5V connector
optional)
C Intel 82850 Memory Controller Hub (MCH) O SMSC LPC47M102 I/O Controller
D Back panel connectors P Front panel connector
E +12V power connector (ATX12V) Q Enhanced thermal monitor and fan control device
F Pentium 4 Processor socket R Battery
G Hardware monitor S SST 49LF004A 4 Mbit Firmware Hub (FWH)
†
H RAMBUS
I RAMBUS Bank 1 (RIMM3 and RIMM4) U PCI bus add-in card connectors
J K Power connector
Auxiliary Power connector
Bank 0 (RIMM1 and RIMM2) T Speaker
M N IDE connectors
Intel 82801BA I/O Controller Hub (ICH2)
V Communication and Networking Riser (CNR)
connector (optional)
OM10441
Figure 1. D850GB Board Components
14
1.1.4 Block Diagram
Figure 2 is a block diagram of the major functional areas of the D850GB board.
Version 2.3.1,
March 16, 1999,
American Megatrends Inc.,
Award Software International Inc.,
Compaq Computer Corporation
Dell Computer Corporation,
Hewlett-Packard Company,
Intel Corporation,
International Business Machines
Corporation,
Phoenix Technologies Limited,
and SystemSoft Corporation.
Version 1.1,
March 1996,
Intel Corporation
Version 1.1,
September 23, 1998,
Compaq Computer Corporation,
Intel Corporation,
Microsoft Corporation, and
NEC Corporation
Version 2.0,
December 18, 1998,
Intel Corporation
The information is
available from…
http://developer.intel.com/
ial/wfm/design/smbios
http://www.usb.org/
developers
http://www.usb.org/
developers
http://developer.intel.com/
ial/WfM/wfmspecs.htm
18
Product Description
1.4 Processor
CAUTION
Use only the processors listed below. Use of unsupported processors can damage the D850GB
®
board, the processor, and the power supply. See the Intel
Update for the most up-to-date list of supported processors for the D850GB board.
The D850GB board supports a single Pentium 4 processor with a system bus of 400 MHz. The
D850GB board supports the processors listed in Table 4. All supported onboard memory can be
cached, up to the cachability limit of the processor. See the processor’s data sheet for cachability
Use only an ATX12V-compliant power suppIy with this board. ATX12V power supplies have two
additional power leads that provide required supplemental power for the Intel Pentium
processor and the Intel 850 chipset. Always connect both additional power supply leads of the
ATX12V power supply, otherwise the board and the processor could be damaged.
Desktop Board 850GB Specification
4
Do not use a standard ATX power supply. Doing so could damage the board and the processor.
For information about Refer to
Processor support Section 1.2, page 16
Processor usage Section 1.2, page 16
Power supply connectors Section 2.8.2.3, page 56
Turn off the power and unplug the power cord before installing or removing RIMM modules.
Failure to do so could damage the memory and the D850GB board. (After removing AC power the
standby power indicator LED should not be lit. See Figure 7 on page 40 for the location of the
standby power indicator LED.)
NOTE
✏
The board supports combinations of no more than 32 RDRAM components per RDRAM bank. If
the total number of RDRAM components installed in all RIMM sockets exceeds 64, the computer
will not boot.
1.5.1 Memory Features
The 82850 Memory Controller Hub integrates two lock-stepped Direct Rambus banks, providing a
processor-to-memory bandwidth up to 3.2 GB/sec. The D850GB board has four RIMM sockets
(two sockets for each bank) and supports the following memory features:
• Single- or double-sided RIMM configurations
• Maximum of 32 Direct Rambus devices per bank
• Memory configurations from 128 MB (minimum) to 2 GB (maximum) utilizing 128 Mbit or
256 Mbit technology PC600 or PC800 compliant RDRAM
• Serial Presence Detect (SPD) based configuration for optimal memory operation
• Suspend to RAM support
• ECC and non-ECC support
1.5.2 Continuity RIMM Modules
All RIMM sockets must be populated to achieve continuity for termination at the Rambus
interface. Continuity RIMMs (or “pass-through” modules) must be installed in the second
RDRAM bank if memory is not installed. If any of the RIMM sockets are not populated, the
computer will not complete the Power-On Self-Test (POST) and the BIOS beep codes will not be
heard.
20
Product Description
1.5.3 RDRAM Memory Configuration
When installing memory, note the following:
• The four RIMM sockets are grouped into two banks:
Bank 0 (labeled on the board as RIMM1 and RIMM2)
Bank 1 (labeled on the board as RIMM3 and RIMM4)
• Bank 0 must be populated first ensuring that the RDRAM installed in RIMM1 and RIMM2 is
identical in speed, size, and density. For example, the minimum system configuration would
use two 64 MB RIMM modules of PC600 or PC800 RDRAM.
• If the desired memory configuration has been achieved by populating Bank 0, then Bank 1
should be filled with two Continuity RIMMs.
• If memory is to be installed in Bank 1, the RIMM modules installed in RIMM3 and RIMM4
must be identical in size and density to each other, and match the speed of the RIMM modules
in Bank 0. The RIMM modules do not, however, need to match those in Bank 0 in size and
density. For example, if Bank 0 has two 128 MB RIMMs of PC800 RDRAM, Bank 1 would
require PC800 RDRAM also, however, any other supported RIMM modules such as 64 MB or
192 MB could be used.
• If ECC functionality is required, all installed RIMM modules must be ECC-compliant
Table 5 gives examples of RDRAM component density for various RIMM modules. Component
density (counts) can be identified on the RIMM label.
The Intel 850 chipset consists of the following devices:
• 82850 Memory Controller Hub (MCH) with Accelerated Hub Architecture (AHA) bus
• 82801BA I/O Controller Hub (ICH2) with AHA bus
• SST 49LF004A Firmware Hub (FWH)
The MCH is a centralized controller for the system bus, the memory bus, the AGP bus, and the
Accelerated Hub Architecture interface. The ICH2 is a centralized controller for the board’s I/O
paths. The FWH provides the nonvolatile storage of the BIOS. The component combination
provides the chipset interfaces as shown in Figure 3.
ATA-33/66/100
System Bus
Network
USB
850 Chipset
82850
Memory Controller
Hub (MCH)
Dual RAMBUS
Channels
AHA
Bus
AGP
Interface
82801BA
I/O Controller Hub
(ICH2)
SST 49LF004A
Firmware Hub
(FWH)
LPC Bus
AC LinkPCI BusSMBus
OM11732
Figure 3. Intel 850 Chipset Block Diagram
For information about Refer to
The Intel 850 chipset http://developer.intel.com
The SST 49LF004A Firmware Hub http://www.ssti.com
Chipset resources Section 1.3, page 16
22
Product Description
1.6.1 AGP
NOTE
✏
The AGP connector is keyed for 1.5 V AGP cards only. Do not attempt to install a legacy 3.3 V
AGP card. The AGP connector is not mechanically compatible with legacy 3.3 V AGP cards.
The AGP connector supports AGP add-in cards with 1.5 V Switching Voltage Level (SVL). An
AGP Pro50 interface is available (for a 50 W maximum power draw) as a manufacturing option.
Legacy 3.3 V AGP cards are not supported and will prevent the system from booting if installed.
For information about Refer to
The location of the AGP connector Figure 1, page 14
The signal names of the AGP connector Table 40, page 62
AGP is a high-performance interface for graphics-intensive applications, such as 3D applications.
While based on the PCI Local Bus Specification, Rev. 2.1, AGP is independent of the PCI bus and
is intended for exclusive use with graphical display devices. AGP overcomes certain limitations of
the PCI bus related to handling large amounts of graphics data with the following features:
• Pipelined memory read and write operations that hide memory access latency
• Demultiplexing of address and data on the bus for nearly 100 percent efficiency
For information about Refer to
Obtaining the
Accelerated Graphics Port Interface Specification
Section 1.3, page 16
1.6.2 USB
The ICH2 contains two separate USB controllers supporting four USB ports. One USB peripheral
can be connected to each port. For more than four USB devices, an external hub can be connected
to any of the ports. Two of the USB ports are implemented with stacked back panel connectors.
The other two are accessible via the front panel USB connector at location J9C1. One of the front
panel USB connectors can be routed to the optional CNR connector. The D850GB board fully
supports UHCI and uses UHCI-compatible software drivers.
NOTE
✏
Computer systems that have an unshielded cable attached to a USB port may not meet FCC
Class B requirements, even if no device is attached to the cable. Use shielded cable that meets the
requirements for full-speed devices.
For information about Refer to
The location of the USB connectors on the back panel Figure 8, page 50
The signal names of the back panel USB connectors Table 18, page 51
The location of the front panel USB connector Figure 12, page 65
The signal names of the front panel USB connector Table 44, page 66
The USB specification and UHCI Section 1.3, page 16
The ICH2’s IDE controller has two independent bus-mastering IDE interfaces that can be
independently enabled. The IDE interfaces support the following modes:
• Programmed I/O (PIO): processor controls data transfer.
• 8237-style DMA: DMA offloads the processor, supporting transfer rates of up to 16 MB/sec.
• Ultra DMA: DMA protocol on IDE bus supporting host and target throttling and transfer rates
of up to 33 MB/sec.
• ATA-66: DMA protocol on IDE bus supporting host and target throttling and transfer rates of
up to 66 MB/sec. ATA-66 protocol is similar to Ultra DMA and is device driver compatible.
• ATA-100: DMA protocol on IDE bus allows host and target throttling. The ICH2’s ATA-100
logic can achieve read transfer rates up to 100 MB/sec and write transfer rates up to
88 MB/sec.
✏ NOTE
ATA-66 and ATA-100 are faster timings and require a specialized cable to reduce reflections,
noise, and inductive coupling.
The IDE interfaces also support ATAPI devices (such as CD-ROM drives) and ATA devices using
the transfer modes listed in Section 4.4.3.1 on page 98.
The BIOS supports Logical Block Addressing (LBA) and Extended Cylinder Head Sector (ECHS)
translation modes. The drive reports the transfer rate and translation mode to the BIOS.
The D850GB board supports Laser Servo (LS-120) diskette technology through its IDE interfaces.
An LS-120 drive can be configured as a boot device by setting the BIOS Setup program’s Boot
menu to one of the following:
• ARMD-FDD (ATAPI removable media device – floppy disk drive)
• ARMD-HDD (ATAPI removable media device – hard disk drive)
For information about Refer to
The location of the IDE connectors Figure 11, page 59
The signal names of the IDE connectors Table 41, page 63
BIOS Setup program’s Boot menu Table 73, page 105
24
Product Description
1.6.3.2 SCSI Hard Drive Activity LED Connector
The SCSI hard drive activity LED connector is a 1 x 2-pin connector that allows an add-in
SCSI controller to use the same LED as the onboard IDE controller. For proper operation, this
connector should be wired to the LED output of the add-in SCSI controller. The LED indicates
when data is being read from, or written to, both the add-in SCSI controller and the IDE controller.
For information about Refer to
The location of the SCSI hard drive activity LED connector Figure 12, page 65
The signal names of the SCSI hard drive activity LED connector Table 43, page 66
1.6.4 Real-Time Clock, CMOS SRAM, and Battery
The real-time clock provides a time-of-day clock and a multicentury calendar with alarm features.
The real-time clock supports 256 bytes of battery-backed CMOS SRAM in two banks that are
reserved for BIOS use.
A coin-cell battery (CR2032) powers the real-time clock and CMOS memory. When the computer
is not plugged into a wall socket, the battery has an estimated life of three years. When the
computer is plugged in, the standby current from the power supply extends the life of the battery.
The clock is accurate to ± 13 minutes/year at 25 ºC with 3.3 VSB applied.
The time, date, and CMOS values can be specified in the BIOS Setup program. The CMOS values
can be returned to their defaults by using the BIOS Setup program.
✏ NOTE
If the battery and AC power fail, custom defaults, if previously saved, will be loaded into CMOS
RAM at power-on.
For information about Refer to
Proper date access in systems with D850GB boards Section 1.2, page 16
1.6.5 SST 49LF004A 4 Mbit Firmware Hub (FWH)
The FWH provides the following:
• System BIOS program
• System security and manageability logic that enables protection for storing and updating of
The SMSC LPC47M102 I/O controller provides the following features:
• 3.3 V operation
• One serial port
• One parallel port with Extended Capabilities Port (ECP) and Enhanced Parallel Port
(EPP) support
• Serial IRQ interface compatible with serialized IRQ support for PCI systems
• PS/2-style mouse and keyboard interfaces
• Interface for one 1.2 MB or 1.44 MB diskette drive
• Intelligent power management, including a programmable wake up event interface
• PCI power management support
• One fan tachometer input
The BIOS Setup program provides configuration options for the I/O controller.
For information about Refer to
SMSC LPC47M102 I/O controller http://www.smsc.com
1.7.1 Serial Port
The D850GB board has one serial port connector on the back panel. The serial port’s NS16C550compatible UART supports data transfers at speeds up to 115.2 kbits/sec with BIOS support. The
serial port can be assigned as COM1 (3F8h), COM2 (2F8h), COM3 (3E8h), or COM4 (2E8h).
For information about Refer to
The location of the serial port connector Figure 8, page 50
The signal names of the serial port connector Table 20, page 52
1.7.2 Parallel Port
The 25-pin D-Sub parallel port connector located on the back panel. In the BIOS Setup program,
the parallel port can be set to the following modes:
†
• Output only (PC AT
• Bi-directional (PS/2 compatible)
• EPP
• ECP
For information about Refer to
The location of the parallel port connector Figure 8, page 50
The signal names of the parallel port connector Table 19, page 51
Setting the parallel port’s mode Table 65, page 95
-compatible mode)
26
Product Description
1.7.3 Diskette Drive Controller
The I/O controller supports one diskette drive that is compatible with the 82077 diskette drive
controller and supports both PC-AT and PS/2 modes.
For information about Refer to
The location of the diskette drive connector Figure 11, page 59
The signal names of the diskette drive connector Table 42, page 64
The supported diskette drive capacities and sizes Table 68, page 100
1.7.4 Keyboard and Mouse Interface
PS/2 keyboard and mouse connectors are located on the back panel. The +5 V lines to these
†
connectors are protected with a PolySwitch
connection after an overcurrent condition is removed.
NOTE
✏
The keyboard is supported in the bottom PS/2 connector and the mouse is supported in the top
PS/2 connector. Power to the computer should be turned off before a keyboard or mouse is
connected or disconnected.
circuit that, like a self-healing fuse, reestablishes the
The keyboard controller contains the AMI keyboard and mouse controller code, provides the
keyboard and mouse control functions, and supports password protection for power-on/reset. A
power-on/reset password can be specified in the BIOS Setup program.
For information about Refer to
The location of the keyboard and mouse connectors Figure 8, page 50
The signal names of the keyboard and mouse connectors Table 17, page 51
The pins on both the legacy-style 2-mm and the ATAPI CD-ROM connectors are wired to the same
inputs on the audio mixer. Do not attach CD-ROM drives to both connectors, otherwise, the board
or drives could be damaged.
The audio subsystem includes these features:
• Split digital/analog architecture for improved S/N (signal-to-noise) ratio: ≥ 85 dB
• Power management support for APM 1.2 and ACPI 1.0 (driver dependant)
• 3-D stereo enhancement
Even though all connectors may not appear on all boards, the audio subsystem supports the
following audio interfaces:
• CD-ROM (legacy-style 2-mm connector)
• ATAPI-style connectors:
CD-ROM
Auxiliary line in
• Back panel audio connectors:
Line out
Line in
Mic in
The audio subsystem consists of the following devices:
• Intel 82801BA I/O Controller Hub (ICH2)
• Analog Devices AD1881/AD1885 analog codec
Figure 4 is a block diagram of the audio subsystem.
82801BA
I/O Controller Hub
(ICH2)
Figure 4. Audio Subsystem Block Diagram
For information about Refer to
The back panel audio connectors Section 2.8.1, page 50
The Network Interface Controller subsystem consists of the ICH2 (with integrated LAN Media
Access Controller) and a physical layer interface device. Features of the LAN subsystem include:
• PCI Bus Master interface
• CSMA/CD Protocol Engine
• Serial CSMA/CD unit interface that supports the following physical layer interface devices:
82562EM onboard LAN
82562ET/EM (10/100 Mbit/sec Ethernet) on CNR bus
†
82562EH (1 Mbit/sec HomePNA
• PCI Power Management
Supports APM
Supports ACPI technology
Supports Wake up from suspend state (Wake on LAN
1.9.1 Intel® 82562EM Platform LAN Connect Device (Optional)
) on CNR bus
†
technology)
The Intel 82562EM component provides an interface to the back panel RJ-45 connector with
integrated LEDs. This physical interface may alternately be provided through the CNR connector.
The Intel 82562EM provides the following functions:
• Basic 10/100 Ethernet LAN connectivity
• Supports RJ-45 connector with status indicator LEDs on the back panel
• Full device driver compatibility
• Advanced Power Management and ACPI support
• Programmable transit threshold
• Configuration EEPROM that contains the MAC address
• Remote monitoring (alerting)
1.9.2 RJ-45 LAN Connector with Integrated LEDs (Optional)
Two LEDs are built into the RJ-45 LAN connector. Table 6 describes the LED states when the
board is powered up and the LAN subsystem is operating.
Table 6. LAN Connector LED States
LED Color LED State Condition
Off 10 Mbit/sec data rate is selected. Green
On 100 Mbit/sec data rate is selected.
Yellow
Off LAN link is not established.
On (steady state) LAN link is established.
On (brighter and pulsing) The computer is communicating with another computer on
the LAN.
30
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