Intel 440BX Schematics

A
g
g
g
g
g
g
(
B
C
D
E
Intel 100 MHz Pentium
tm) II processor/440BX AGPset Dual
Processor Customer Reference Schematics
4 4
3 3
2 2
1 1
Revision 1.0
TITLE
COVER SHEET BLOCK DIAGRAM SLOT 1 CONNECTOR CLK SYNTHESIZER 7 82443BX 8,9,10 FET SWITCHES 11,12 DIMM SOCKETS 13,14,15,16 PIIX4E 17.18 IOAPIC 19 ULTRA I/O 20 AGP CONNECTOR 21 PCI CONNECTORS 22,23 ISA CONNECTORS 24 IDE CONNECTORS 25 USB CONNECTORS 26 FLASH BIOS 27 PARALLEL 28 SERIAL/FLOPPY 29 KEYBOARD/MOUSE 30 VRM 31 POWER CONNECTOR 32 PROCESSOR BUS/CORE FREQ. 33 PCI/AGP PULL-UPS & PULL-DOWNS 34 ISA PULL-UPS 35 82443BX/DRAM DECOUPLING 36 BULK DECOUPLING 37 TERMINATION DECOUPLING 38 LM79 39 REVISION HISTORY 40
A
B
PAGE
1 2 3,4,5,6
** Please note that these schematics are subject to c hange.
THIS SCHEMATIC IS PROVIDED "AS IS" WITH NO WARRANTIES WHATSOEVER, INCLUDING ANY WARRANTY OF MERCHANTABILITY, FITNESS FOR ANY PARTICULAR PURPOSE, OR ANY WARRANTY OTHERWISE ARISING OUT OF PROPOSAL, SPECIFICATION OR SAMPLE.
Intel disclaims all liability, includin any proprietary ri specification. Intel does not warrant or represent that such use will not infrin
I2C is a two-wire communications bus/protocol developed by Philips. SMBus is a subset of the I2C bus/protocol and was developed by Intel. Implementations of the I2C bus/protocol or the SMBus bus/protocol may require licenses from various entities, includin N.V. and North American Philips Corporation.
*Third-party brands and names are the property of their respective owners.
ht * Intel Corporation 1997, 1998
Copyri
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
Intel Pentium(tm) II processor/440BX AGPset Dual Processor Cover Sheet
Size Document Number Rev Custom
C
Date: Sheet of
hts, relating to use of information in this
e such rights.
D
hts is granted herein.
liability for infringement of
Philips Electronics
Intel(R) 440BX AGPset 1.0
140Thursday, April 09, 1998
E
1
2
3
4
5
6
7
8
APIC BUS
VRM
VTT GEN.
A A
B B
PG. 31
IOAPIC
82093A A
PG. 19
MAX1617 ME
PG. 3
SMBus Interface
PENTIUM(tm) II
Processor
(SLOT 1)
PG. 3,4
ADDR
CNTL
DATA
SY STEM BUS
AGP
CONN.
PG. 21
ADDR/DATA
AGP SIDEBAND
CNTL
CK100
&
ITP CON.
PG. 7
ADDR
CNTL
82443BX
492 BGA
PG. 8-10
ADD/DATA
DATA
CNTL
PENTIUM(tm) II
Processor
(SLOT 1)
PG. 5,6
ADDR
CNTL
DATA
SYSTEM BUS
CNTL
ADDR
CKBF
PG. 8
DATA
MEMORY
4 SDRAM DIMM
MODULES
PG. 13-16
VRM
VTT GEN.
PG. 31
MAX1617 ME
PG. 5
SMBus Interface
PCI BUS
ADD/DATA
USB
USB
2 USB CONN.
PG. 26
CONTROL
C C
INTERRUPTS
CONTROL
ADDR
CNTL
82371EB
324 BGA
PG. 17-18
CNTL
DATA
CNTL
ADDR/DATA
2 PCI IDE CONNECTORS
PG. 25
PRIMARY
IDE
SECONDARY
IDE
CNTL
ADDR/DATA
PG. 22-23
PCI CONN
PCI CONN
PCI CONN
PCI CONN
ISA BUS
CNTL
PG.14
DATA
CNTL
ADDR
PG 35
ISA CONN
ISA CONN
ADDR
FLASH
BIOS
PG. 27
DATA
X-BUS
KEYBOARD
PG. 30
ADDR
ULTRA I/O
THIS DRAWING CONTAINS INFORMATION WHICH HAS NOT BEEN VERIFIED FOR MANUFACTURING AN END USER PRODUCT. iNTEL ISNOT RESPONSIBLE FOR THE MISUSE OF THIS INFORMATION.
DEVICE TABLE
DEVICE
TYPE
FUSES F1,F2,F3,F4 26,30
Slot 1 Connectors J1A,B J2A,B ITP Connector J 3 DIMM Sockets J4,J5,J6,J7 13,14,15,16 AGP Connector J8 21 PCI Connector J9,J10,J11,J12 ISA Connector J13, J14 35 IDE Connector J15, J16 25 USB Connector J17,J18 VRM8.2 J25,J26 31
BLM31A700S L1-L13 26,30
CK100 U1 7 82443BX U2 - 1,2,3 8,9,10 CKBF U3 FET SWITCHES
(74CBT16212) 82371EB (PIIX4E) U10A,B 17,18
82093AA (IOAPIC) U12 19 74LVC125 U13A,B,C,D 19,35 FDC37C932FR
(Ultra I/O) 74AS07 U15A,B,C,D,E,F 21,35
74HCT14 U16 A,B,C,D,E,F 27,32,35 E28F002BC-T(FLASH) U17 27 74ALS08 U20 A,B,C,D 32,35 74ALS05 U21 A,B,C,D,E,F 32,33,35 74HC10 U22 A,B,C 18,32 74F07 U23A,B,C,D,E,F 32,33 74FCT3244 U24 33 LM79 U25 39
MAX 1617 ME U28,U29 3,5 74HCT14 74HC112 74F07 U36A,B,C,D,E,F 18, 32, 35 LT1575
REFERENCE DESIGNATOR
U4,5,6,7,8,9 11,12
3VSB
U11A,B,C,D,E,F74LVC14 18, 32, 33
3VSB
U14 20
5VSB
5VSB
U30 U32
5VSB
PAGE #
3,4,5,6
22,23
26
8
18,35 18
31VR1 31VR2LT1585
LM79
D D
1
PG. 38
2
MOUSE PG. 30
FLOPPY
CONN.
PG. 29
3
PARA. CONN.
PG. 28
SER.
CONN.
PG .29 SER.
CONN.
4
DATA
RESET, POWER CONNECTORS
PCI, AGP, & ISA RESISTORS
DECOUPLING CAPACITORS
5
PG. 32
PG. 34-35
PG. 36-37
6
Crystal (14.318 MHz)
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
Size Document Number Rev Custom
Date: Sheet of
Y1 7
Intel 100MHz Pentium(tm) II processor/440BX AGPset Block Diagram
Intel(R) 440BX AGPset
7
240Thursday, April 09, 1998
8
1.0
A
(R)
(
)
y
]
B
C
D
E
VTT
GND
GND
GND TDO
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
VTTVCCCORE1
A03 A04 A05 A06 A07 A08 A09
TDI
A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73
HD#61 HD#55
HD#60 HD#53 HD#57
HD#46 HD#49 HD#51
HD#42 HD#45 HD#39
HD#43 HD#37
HD#33 HD#35 HD#31
HD#30 HD#27 HD#24
HD#23 HD#21 HD#16
HD#13 HD#11 HD#10
HD#14 HD#9
HD#8 HD#5
HD#3
HD#1
A20M# 5,33,34 FERR# 5,1 8,34
IGNNE# 5,33,34 TDI_1 7
TDO_1 5,7 PWRGOOD 5,27,32 TES THI 5,34
THERMTRIP# 5,34 LINT0 5,33,34 PICD0 5,19,34
ITPREQ#0 7
VCC3
4 4
SM B SLAVE ADDRESS = 0011000b
3 3
2 2
VCC3
FLUSH#5,34 HSMI#5,19 HINIT#5,1 8,34
STPCLK#5,1 8,34 TCK_17 SLP#5,1 8,34
TMS_17 TRST#5,7
LINT15,33,34
PICCLK_P17
100/66#5,7,16 PICD15 ,19,34 PRDY#07
THERM# 5, 18,34
C198
2200pF
HD#62 HD#58 HD#63
HD#56
HD#50
HD#54
HD#59
HD#48
HD#52
HD#41
HD#47
HD#44 HD#36
HD#40 HD#34
HD#38 HD#32 HD#28
HD#29 HD#26 HD#25
HD#22 HD#19 HD#18
HD#20 HD#17
HD#15 HD#12
HD#7 HD#6
HD#4 HD#2 HD#0
EMI_PD3
EMI_PD2
6
1 5 9
U28
STBY#
ADD1 ADD0
SM BDATA SMBCLK
RESV RESV RESV RESV RESV
C111
0.1 uF 2
V+
MAX1617 ME
16p QSOP
SMB_ALERT#
3
D+
4
D-
11
R281
4.7K
15
10
SM BDATA5,8,15,16,18,34,39 SMBCLK5,8,15,16,18,34,39
12 14
13 16
GND7GND
MAX1617_2
8
HD#[63:0
5,10
J1A
B01 A01
EMI
B02 A02
FLUSH#
B03
SMI#
B04
INIT#
B05
VCC_VTT
B06
STPCLK#
B07
TCK
B08
SLP#
B09
VCC_VTT
B10
TMS
B11
TRST#
B12
RESERVED
B13
VCC_CORE
B14
RESERVED
B15
RESERVED
B16
LINT[1]
B17
VCC_CORE
B18
PICCLK
B19
BP#[2]
B20
RESERVED
B21
100/66#
B22
PICD[1]
B23
PRDY#
B24
BPM#[1]
B25
VCC_CORE
B26
DEP#[2]
B27
DEP#[4]
B28
DEP#[7]
B29
VCC_CORE
B30
D#[62]
B31
D#[58]
B32
D#[63]
B33
VCC_CORE
B34
D#[56]
B35
D#[50]
B36
D#[54]
B37
VCC_CORE
B38
D#[59]
B39
D#[48]
B40
D#[52]
B41
EMI
B42
D#[41]
B43
D#[47]
B44
D#[44]
B45
VCC_CORE
B46
D#[36]
B47
D#[40]
B48
D#[34]
B49
VCC_CORE
B50
D#[38]
B51
D#[32]
B52
D#[28]
B53
VCC_CORE
B54
D#[29]
B55
D#[26]
B56
D#[25]
B57
VCC_CORE
B58
D#[22]
B59
D#[19]
B60
D#[18]
B61
EMI
B62
D#[20]
B63
D#[17]
B64
D#[15]
B65
VCC_CORE
B66
D#[12]
B67
D#[7]
B68
D#[6]
B69
VCC_CORE
B70
D#[4]
B71
D#[2]
B72
D#[0]
B73
VCC_CORE
EMI_PD1
SLOT1_0.8
VCC_VTT
VCC_VTT
A20M#
FERR#
IGNNE#
PWRGOOD
TESTHI1
THERMTRIP#
RESERVED
LINT[0]
PICD[0] PREQ#
BPM#[0]
BINIT#
DEP#[0]
DEP#[1] DEP#[3] DEP#[5]
DEP#[6]
RESERVED
SLOT 1a
IERR#
BP#[3]
D#[61] D#[55]
D#[60] D#[53] D#[57]
D#[46] D#[49] D#[51]
D#[42] D#[45] D#[39]
D#[43] D#[37]
D#[33] D#[35] D#[31]
D#[30] D#[27] D#[24]
D#[23] D#[21] D#[16]
D#[13] D#[11] D#[10]
D#[14]
D#[9]
D# [8] D# [5]
D# [3] D# [1]
1 1
R1 0
R3 0R20
* Please place as close to the connector as possible
A
B
C
D
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
FIRST SLOT 1
Size Document Number Rev Custom
Date: Sheet of
PART I
Intel
, April 09, 1998
440BX AGPset 1.0
340Thursda
E
A
(
)
y
]
]
]
B
C
D
E
VCCCORE1
VA3 VA0
VCC3
J1B
B74 A74
RESET#
B75 A75
BREQ1#
B76
FRCERR#
B77
VCC_CORE
B78
A#[35]
B79
A#[32]
B80
A#[29]
B81
EMI
B82
A#[26]
B83
A#[24]
B84
A#[28]
B85
VCC_CORE
B86
A#[20]
B87
A#[21]
B88
A#[25]
B89
VCC_CORE
B90
A#[15]
B91
A#[17]
B92
A#[11]
B93
VCC_CORE
B94
A#[12]
B95
A#[8]
B96
A#[7]
B97
VCC_CORE
B98
A#[3]
B99
A#[6]
B100
EMI
B101
SLOTOCC#
B102
REQ#[0]
B103
REQ#[1]
B104
REQ#[4]
B105
VCC_CORE
B106
LOCK#
B107
DRDY#
B108
RS#[0]
B109
VCC_5
B110
HIT#
B111
RS#[2]
B112
RESERVED
B113
VCC_3
B114
RP#
B115
RSP#
B116
AP#[1]
B117
VCC_3
B118
AERR#
B119
VID[3]
B120
VID[0]
B121
VCC_3
BCLK
BREQ0#
BERR#
A#[33] A#[34] A#[30]
A#[31] A#[27] A#[22]
A#[23]
RESERVED
A#[19]
A#[18] A#[16] A#[13]
A#[14] A#[10]
BNR#
BPRI#
TRDY#
DEFER#
REQ#[2] REQ#[3]
HITM#
DBSY#
RS#[1]
RESERVED
ADS#
RESERVED
AP#[0]
VID[2] VID[1] VID[4]
A#[5]
A#[9] A#[4]
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
A76 A77 A78 A79 A80 A81 A82 A83 A84 A85 A86 A87 A88 A89 A90 A91 A92 A93 A94 A95 A96 A97 A98 A99 A100 A101 A102 A103 A104 A105 A106 A107 A108 A109 A110 A111 A112 A113 A114 A115 A116 A117 A118 A119 A120 A121
VA2 VA1 VA4
R5 0 R7 0 R8 0
HREQ#2 HREQ#3
VID_A2 VID_A1 VID_A4
HA#30
HA#27 HA#22
HA#23 HA#19 HA#18
HA#16 HA#13
HA#14HA#8 HA#10 HA#5
HA#9 HA#4
CPUHCLK1 7 BREQ0# 6,8
BNR# 6,8 BP RI# 6 ,8
HTRDY# 6,8 DEFER# 6,8
HITM# 6,8 DBSY# 6,8
RS#1 6,8
ADS# 6,8
4 4
HRE SET#6,7,8
BREQ1#6
VCC
HA#29 HA#26
HA#24 HA#31 HA#28
HA#20 HA#21 HA#25
HA#15
HA#17
HA#11 HA#12
HA#7
3 3
A_SLOTOCC#32 ,34
HLOCK#6,8 DRDY#6,8 RS#06,8
HIT#6,8 RS#26,8
HA#3
HA#6
HREQ#0
HREQ#1
HREQ#4
VID_A3 VID_A0
R4 0 R6
0
R11 0
SLOT1_0.8
VID_A0
VID_A1
VID_A2
VID_A3
VID_A4
SLOT 1b
JP1
SE L _VID_A0
1
2
3
JP2
SE L _VID_A1
1
2
3
JP3
SE L _VID_A2
1
2
3
JP4
SE L _VID_A3
1
2
3
JP5
SE L _VID_A4
1
2
3
C
R9
8.2K
R12
8.2K
R13
8.2K
R14
8.2K
R15
8.2K
VCC
VRM optional override jumpers & resistors
Jumper position 1-2 is stuffed as the default. To override, R4-R8 must be removed.
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
FIRST SLOT 1
Size Document Number Rev Custom
Date: Sheet of
D
PART II
Intel(R) 440BX AGPset 1.0
, April 09, 1998
E
440Thursda
2 2
HA#[31:3
6,8
HREQ#[4:0
6,8
VID_A[4:0
31
* Please place as close to the connector as possible
1 1
A
B
EMI_PD5
R10 0
EMI_PD4
A
(R)
(
)
y
]
B
C
D
E
VTT
GND
GND
GND TDO
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
VTTVCCCORE2
A03 A04 A05 A06 A07 A08 A09
TDI
A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73
HD#61 HD#55
HD#60 HD#53 HD#57
HD#46 HD#49 HD#51
HD#42 HD#45 HD#39
HD#43 HD#37
HD#33 HD#35 HD#31
HD#30 HD#27 HD#24
HD#23 HD#21 HD#16
HD#13 HD#11 HD#10
HD#14 HD#9
HD#8 HD#5
HD#3
HD#1
A20M# 3,33,34 FERR# 3,18,34
IGNNE# 3,33,34 TDO_1 3,7
TDO_2 7 PW RGOOD 3,27,32 TESTHI 3,34
THERMTRIP# 3,34 LINT0 3 ,3 3,34 PICD0 3,19,34
ITPREQ#1 7
VCC3
SMB SLAVE ADDRESS = 0011010b
SM BDATA3,8,15,16,18,34,39 SMBCLK3,8,15,16,18,34,39
VCC3
R282
4.7K
15
6
10
12 14
1 5
9 13 16
U29
STBY#
ADD1 ADD0
SM BDATA SMBCLK
RESV RESV RESV RESV RESV
MAX1617_2
C112
0.1 uF 2
V+
MAX1617 ME
16p QSOP
SMB_ALERT#
GND7GND
8
FLUSH#3,34 HSMI#3,19 HINIT#3,18,34
STPCLK#3,18,34 TCK_27 SLP#3,18,34
TMS_27 TRST#3,7
3
D+
4
D-
PICCLK_P27
11
C199
2200pF
LINT13,3 3,34
100/66#3,7,16 PICD13,19,34 PRDY#17
THERM# 3,18,34
HD#62 HD#58 HD#63
HD#56
HD#50 HD#54
HD#59 HD#48 HD#52
HD#41
HD#47 HD#44
HD#36 HD#40 HD#34
HD#38 HD#32 HD#28
HD#29 HD#26 HD#25
HD#22 HD#19 HD#18
HD#20 HD#17
HD#15 HD#12
HD#7 HD#6
HD#4 HD#2 HD#0
EMI_PD8
EMI_PD7
HD#[63:0
3,10
4 4
3 3
2 2
J2A
B01 A01
EMI
B02 A02
FLUSH#
B03
SMI#
B04
INIT#
B05
VCC_VTT
B06
STPCLK#
B07
TCK
B08
SLP#
B09
VCC_VTT
B10
TMS
B11
TRST#
B12
RESERVED
B13
VCC_CORE
B14
RESERVED
B15
RESERVED
B16
LINT[1]
B17
VCC_CORE
B18
PICCLK
B19
BP#[2]
B20
RESERVED
B21
100/66#
B22
PICD[1]
B23
PRDY#
B24
BPM#[1]
B25
VCC_CORE
B26
DEP#[2]
B27
DEP#[4]
B28
DEP#[7]
B29
VCC_CORE
B30
D#[62]
B31
D#[58]
B32
D#[63]
B33
VCC_CORE
B34
D#[56]
B35
D#[50]
B36
D#[54]
B37
VCC_CORE
B38
D#[59]
B39
D#[48]
B40
D#[52]
B41
EMI
B42
D#[41]
B43
D#[47]
B44
D#[44]
B45
VCC_CORE
B46
D#[36]
B47
D#[40]
B48
D#[34]
B49
VCC_CORE
B50
D#[38]
B51
D#[32]
B52
D#[28]
B53
VCC_CORE
B54
D#[29]
B55
D#[26]
B56
D#[25]
B57
VCC_CORE
B58
D#[22]
B59
D#[19]
B60
D#[18]
B61
EMI
B62
D#[20]
B63
D#[17]
B64
D#[15]
B65
VCC_CORE
B66
D#[12]
B67
D# [7]
B68
D# [6]
B69
VCC_CORE
B70
D# [4]
B71
D# [2]
B72
D# [0]
B73
VCC_CORE
EMI_PD6
SLOT1_0.8
VCC_VTT
VCC_VTT
IGNNE#
PWRGOOD
TES THI1
THERMTRIP#
RESERVED
LINT[0]
PICD[0] PREQ#
BPM#[0]
DEP#[0]
DEP#[1] DEP#[3] DEP#[5]
DEP#[6]
RESERVED
SLOT 1a
IERR#
A20M#
FERR#
BP#[3]
BINIT#
D#[61] D#[55]
D#[60] D#[53] D#[57]
D#[46] D#[49] D#[51]
D#[42] D#[45] D#[39]
D#[43] D#[37]
D#[33] D#[35] D#[31]
D#[30] D#[27] D#[24]
D#[23] D#[21] D#[16]
D#[13] D#[11] D#[10]
D#[14]
D# [9]
D#[8] D#[5]
D#[3] D#[1]
1 1
R16 0
R17 0
R18 0
* P lease place as close to the connector as possible
A
B
C
D
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
SECOND SLOT 1
Size Document Number Rev Custom
Date: Sheet of
Intel
, April 09, 1998
PART I
440BX AGPset 1.0
540Thursda
E
A
(
)
y
]
]
]
B
C
D
E
VCCCORE2
VB3 VB0VID_B0
VCC3
J2B
B74 A74
RESET#
B75 A75
BREQ1#
B76
FRCERR#
B77
VCC_CORE
B78
A#[35]
B79
A#[32]
B80
A#[29]
B81
EMI
B82
A#[26]
B83
A#[24]
B84
A#[28]
B85
VCC_CORE
B86
A#[20]
B87
A#[21]
B88
A#[25]
B89
VCC_CORE
B90
A#[15]
B91
A#[17]
B92
A#[11]
B93
VCC_CORE
B94
A#[12]
B95
A#[8]
B96
A#[7]
B97
VCC_CORE
B98
A#[3]
B99
A#[6]
B100
EMI
B101
SLOTOCC#
B102
REQ#[0]
B103
REQ#[1]
B104
REQ#[4]
B105
VCC_CORE
B106
LOCK#
B107
DRDY#
B108
RS#[0]
B109
VCC_5
B110
HIT#
B111
RS#[2]
B112
RESERVED
B113
VCC_3
B114
RP#
B115
RSP#
B116
AP#[1]
B117
VCC_3
B118
AERR#
B119
VID[3]
B120
VID[0]
B121
VCC_3
BCLK
BREQ0#
BERR#
A#[33] A#[34] A#[30]
A#[31] A#[27] A#[22]
A#[23]
RESERVED
A#[19]
A#[18] A#[16] A#[13]
A#[14] A#[10]
BNR#
BPRI#
TRDY#
DEFER#
REQ#[2] REQ#[3]
HITM#
DBSY#
RS#[1]
RESERVED
ADS#
RESERVED
AP#[0]
VID[2] VID[1] VID[4]
A#[5]
A#[9] A#[4]
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
A76 A77 A78 A79 A80 A81 A82 A83 A84 A85 A86 A87 A88 A89 A90 A91 A92 A93 A94 A95 A96 A97 A98 A99 A100 A101 A102 A103 A104 A105 A106 A107 A108 A109 A110 A111 A112 A113 A114 A115 A116 A117 A118 A119 A120 A121
VB2 VB1 VB4
R20 0 R22 0 R23 0
HREQ#2 HREQ#3
VID_B2 VID_B1 VID_B4
HA#30 HA#31
HA#27 HA#22
HA#23 HA#19 HA#18
HA#16 HA#13
HA#14 HA#10 HA#5
HA#9 HA#4
CPUHCLK2 7
BREQ1# 4
BNR# 4,8 BP RI# 4 ,8
HTRDY# 4,8 DEFER# 4,8
HITM# 4,8 DBSY# 4,8
RS#1 4,8
ADS# 4,8
4 4
HRE SET#4,7,8
BREQ0#4,8
VCC
HA#29 HA#26
HA#24 HA#28
HA#20 HA#21 HA#25
HA#15
HA#17
HA#11 HA#12
HA#8
HA#7
3 3
B_SLOTOCC#32 ,34
HLOCK#4,8 DRDY#4,8 RS#04,8
HIT#4,8 RS#24,8
HA#3
HA#6
HREQ#0
HREQ#1
HREQ#4
VID_B3
R19 0 R21
0
R26 0
SLOT1_0.8
VID_B0
VID_B1
VID_B2
VID_B3
VID_B4
SLOT 1b
JP6
SE L_VID_B0
1
2
3
JP7
SE L_VID_B1
1
2
3
JP8
SE L_VID_B2
1
2
3
JP9
SE L_VID_B3
1
2
3
JP10
SE L_VID_B4
1
2
3
C
R24
8.2K
R27
8.2K
R28
8.2K
R29
8.2K
R30
8.2K
VCC
VRM optional override jumpers & resistors
Jumper position 1-2 is stuffed as the default. To override, R19-R23 must be removed.
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
SECOND SLOT 1
Size Document Number Rev Custom
Date: Sheet of
D
PART II
Intel(R) 440BX AGPset 1.0
, April 09, 1998
E
640Thursda
2 2
HA#[31:3
4,8
HREQ#[4:0
4,8
VID_B[4:0
31
* Please place as close to the connector as possible
1 1
A
EMI_PD10
B
R25 0
EMI_PD9
A
g
g
L15
FBHS01L
CD85
0.01 uF 16V
4 4
*NOTE* Override to 66MHz only.
JP11
100/66#3,5,16
PCI_STP#18
3 3
CPU_STP#18
SUSA#18
Stuffing option to enable the
of the CPUCLKs,
stoppin PCICLKs, and the powerdown of the CK100. Please note that the resistors are not stuffed.
2 2
1 1
VCC3
R31 200
R38
8.2K
R381 0
R382 0
R383 0
DO NOT STUFF
A
VCC3
R40
R39
8.2K
8.2K
option to enable Spread#
Stuffin function for possible EMI reduction.
R54 0
R283 10K
HRESET#4,6,8
DBRESET#32
VCC3
TCK_13
TCK_25
TMS_13
TMS_25
CD86
0.01 uF 16V
R284 10K
B
CLOCK SYNTHESIZER
21
CD88
CD89
C2 10pF
R64
R65
47
47
42 28
27 26 25
31 30 29
100pF 16V
U1
4
XTALIN
5
XTALOUT RESV
RESV SEL0
SEL1 SEL_100/66#
PCI_STP# CPU_STP# PWRDWN#
CK100_05
ITP_RST
47
47
CD90
C168
+
100pF
22uF
16V
9
15
19
33
48
21
VDDPCI0
VDDPCI1
VDD48MHZ
VDDCORE0
VDDCORE1
CK100
VSSREF
VS S PCI0
3
6
12
VCC2.5 VTT
R55
1K
ITPCLK
TDO_JMP TDI_JMP
1 - 2 1 - 2
2 - 3 2 - 3
46
41
37
VDDAPIC
VDDCPU0
VDDQREF
VDDCPU1
APICCLK_0 APICCLK_1
VSSCORE1
VSS48MHZ
VSS CORE0
VSSPCI1
VSSPCI2
VSSCPU0
VSSCPU1
18
38
34
32
24
20
R56
R57
OPTIONAL ITP
1K
1K
TEST
5%
CONNECTOR
ITP_JMP CONFIG
CD87
0.01uF 16V
R285 10K
100pF 16V
Y1
14.318MHz
C1 10pF
R60 240
R66
R69
B
C
CPUCLK0 CPUCLK1 CPUCLK2 CPUCLK3
PCICLK_F PCICLK_1 PCICLK_2 PCICLK_3 PCICLK_4 PCICLK_5 PCICLK_6 PCICLK_7
48MHZ_0 48MHZ_1
REF0 REF1 REF2
VSSAPIC
43
J3 1 2
3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
ITP CONN
1 - 22 - 3
C
C172
100pF 16V
40 39 36 35
7 8 10 11 13 14 16 17
R47
22 23
R48 22
45 44
R51
1
R52
2 47
R53
SINGLE CPU1
DUAL CPU
SINGLE CPU2
C173
100pF 16V
R32 R33 22 R34 22 R35 22
R36 22 R37 22 R41 22 R42 22 R43 22 R44 22 R45 22
22
22 22 22
R_PRDY0 R_PRDY1
CPU
CONFIGJP12 JP13
C174
0.01uF 16V
22
R68 240
L14
2 1
FBHS01L
C175
C176
C177
0.01uF 16V
CPUHCLK1 4 CPUHCLK2 6 BXHCLK 8
ITPCLK
PXPCLK 18 PCLK1 22 PCLK2 22 PCLK3 23 PCLK4 23 BXPCLK 9 PCLKAPIC 19
48Mhz_0 18
APICCLK 19
OSC1 24 OSC2 18 OSC3 20
+
0.01uF 16V
22uF
HPICCLK
VCC2.5 VTT VTT
R61 330
R67 240
R70 680
TDO_13,5 TDO_25
D
VCC2.5VCC3
*NOTE* For power managed systems, the PIIX4 must be connected t PCICLK_F of the CKE100 which is a free running PCLK not affected by the assertion of PCISTOP#.
E
STU FFING OPTION
*NOTE* 10-15 pF caps to ground may be desirable to reduce the effects of EMI.
R58
R59
56
R63 330
D
56
VCC2.5
R71
R72 150
150
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
CLOCK SYNTHESIZER
Size Document Number Rev Custom
Date: Sheet of
TR ST# 3,5 ITPREQ#0 3
PRDY#0 3 ITPREQ#1 5
PRDY#1 5
JP12
1
2
3
TDO_JMP
Intel(R) 440BX AGPset
R46 10
R50 10
JP13
2
TDI_JMP
PICCLK_P1 3
PICCLK_P2 5
VCC2.5
1 3
E
740Thursday, April 09, 1998
R73 330
TDI_1 3
1.0
A
y
y
g
[
y
]
]
]
HA#[31:3
4,6
HA#3 HA#4 HA#5 HA#6 HA#7 HA#8
HREQ#0 HREQ#1 HREQ#2 HREQ#3
CRESET#
HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31
RS#0 RS#1 RS#2
HREQ#4
4 4
HRE SET#4,6,7 ADS#4,6
3 3
VCC3
2 2
1 1
BNR#4,6 BPRI#4,6
DBSY#4,6 DEFER#4,6 DRDY#4,6 HIT#4,6 HITM#4,6 HLOCK#4,6 HTRDY#4,6
BREQ0#4,6
RS#[2:0
4,6
HREQ#[4:0
4,6
R75
8.2K
**TESTIN# pullup ma removed after validation has been completed.
BXHCLK7
CR ESET#33
PCI RST#17 ,21,22,23
A
be
G25
H22
G23
H23
G24
F26 G26 G22
F22
F23
F24
F25
E23
E26
E25 D25 D26
B25 C26
A25 C25
A24 D24 C23
B24 C24
A23
E22 D23
B23
K21
H24
H26
L23
J26 K23 L24 L22 K22 H25 B26
K26 L26 L25
J22
J23 K24 K25
J25
N23
M25 M26
AE22 AE23
P22
A3
U2-1
HA3# HA4# HA5# HA6# HA7# HA8# HA9# HA10# HA11# HA12# HA13# HA14# HA15# HA16# HA17# HA18# HA19# HA20# HA21# HA22# HA23# HA24# HA25# HA26# HA27# HA28# HA29# HA30# HA31#
CPURST# ADS# BNR# BPRI#
DBSY# DEFER# DRDY# HIT# HITM# HLOCK# HTRDY# BREQ0#
RS#0 RS#1 RS#2
HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4
HCLKIN TE S TIN#
CRESET# PCI RST#
RESVA RE SVB RESVC
443 BX_10
B
VCC3
V21
Y21
F18
F20
G21
J21
AA7
VDD
VDD
VDDF7VDDF9VDD
VDD
VDDG6VDD
VDDJ6VDD
VDD
82443BX
492 BGA
SYSTEM INTERFACE
VSSA1VSS
VSS
VSSC5VSSC9VSS
VSS
VSSE3VSS
VSS
VSS
VSSF6VSSF8VSS
A14
A26
C18
C22
B
E12
E15
E24
F19
F21
AA9
VSS
AA18
AA20
VDD
VDD
VSSH6VSS
H21
VDD
CKE2/CSA6# CKE3/CSA7#
DRAM INTERFACE
CKE4/CSB6# CKE5/CSB7#
CKE0/FENA
CKE1/GCKE
VSSJ3VSS
J24
MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8
MAA9 MAA10 MAA11 MAA12 MAA13
MAB0# MAB1# MAB2# MAB3# MAB4# MAB5# MAB6# MAB7# MAB8# MAB9#
MAB10 MAB11# MAB12#
MAB13
CSA0# CSA1# CSA2# CSA3# CSA4# CSA5#
CSB0# CSB1# CSB2# CSB3# CSB4# CSB5#
DQMA0 DQMA1 DQMA2 DQMA3 DQMA4 DQMA5 DQMA6 DQMA7
DQMB1 DQMB5
SRAS_A# SRAS_B# SCAS_A# SCAS_B#
WE_A#
WE_B# DCLKO
DCLKWR
DCLKRD
C
AF17 AB16 AE17 AC17 AF18 AE19 AF19 AC18 AC19 AE20 AD20 AF21 AC21 AF25
AD16 AC16 AD17 AB17 AE18 AD19 AB18 AB19 AF20 AC20 AB20 AE21 AD21 AF22
AB14 AF15 AE15 AC15 AD15 AE16 AE24 AD23
AE25 AD24 AD26 AC24 AC26 AB23 AC23 AF24
AD13 AC13 AC25 AB26 AE14 AC14 AA22 AA24
AE13 AD14
AC22 AF23
**On 4-DIMM solutions that don't support self-refresh mode, GCKE should be N/C.
AF16 AA17 AF12 AB13
AE12 AC12
AB21 AD25 AB22
**Locate R398 close to CKBF and R399 close to 443BX. **Locate "T" and cap close to BX.
** Pl ea se make DCLKREF trace length equal to 2.5" more than the DCLK outputs to the DIMMs. DCLK outputs to the DIMMs should all be the same recommended len
MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13
MAB#0 MAB#1 MAB#2 MAB#3 MAB#4 MAB#5 MAB#6 MAB#7 MAB#8 MAB#9 MAB10 MAB#11 MAB#12 MAB13
CS_A#0 CS_A#1 CS_A#2 CS_A#3 CS_A#4 CS_A#5 CS_A#6 CS_A#7
CS_B#0 CS_B#1 CS_B#2 CS_B#3 CS_B#4 CS_B#5 CS_B#6 CS_B#7
DQMA0 DQMA1 DQMA2 DQMA3 DQMA4 DQMA5 DQMA6 DQMA7
DQMB1 DQMB5
R399 22
Example: if DCLK then DCLKREF = 2.5" + 2.5".
C
SRA S_A# 13,14 SR AS_B# 15,16 SCA S_A# 13,14 SC AS_B# 15,16
WE_A# 13,14 WE_ B# 15,16
DCLKREF
C3 20pF
DQMB1 15,16 DQMB5 15,16 FENA 11,12 GCKE 10
0-11] = 2.5"
R398 47
R74
4.7k
VCC3
38 11 25
24
47 48
1 2
CKBF
U3
OE BUF_IN SCLOCK
SD ATA
RESV RESV RESV RESV
D
MAA[13:0]13 ,14
MAB#[13:0]15,16
CS_A#[1:0]13 CS_A#[3:2]14 CS_A#[5:4]15 CS_A#[7:6]16
CS_B#[1:0]13 CS_B#[3:2]14 CS_B#[5:4]15 CS_B#[7:6]16
DQMA[7:0]13 ,14,15,16
3
23
VDD
VDDIIC
CKBF
VSS6VSS10VSS
VSSIIC
26
th.
D
E
L16
2 1
FBHS01L
100pF
.01uF
C184
100pF
.01uF
C186
100pF
.01uF
C188
100pF
.01uF
C190
100pF
.01uF
C192
22uF
46
VDD7VDD12VDD16VDD20VDD29VDD33VDD37VDD42VDD
SDRAM0 SDRAM1 SDRAM2 SDRAM3 SDRAM4 SDRAM5 SDRAM6 SDRAM7 SDRAM8
SDRAM9 SDRAM10 SDRAM11 SDRAM12 SDRAM13 SDRAM14 SDRAM15 SDRAM16 SDRAM17
VSS19VSS22VSS27VSS30VSS34VSS39VSS
15
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
Size Document Number Rev
Custom
Date: Sheet of
R76 0
4
R77
5
R78 0
8
R79 0
9
R80 0
13
R81 0
14
R82 0
17
R83 0
18
R84 0
31
R85 0
32
R86 0
35
R87 0
36
R88 0
40
R89 0
41
R90 0
44
R92 0
45
R93 0
21
R385 0
28
43
slave address = 1101001b
82443BX SYSTEM AND DRAM INTERFACES
, April 09, 1998
DCLK10
0
DCLK11 DCLK6 DCLK7 DCLK0 DCLK1 DCLK14 DCLK15 DCLK13 DCLK12 DCLK3 DCLK2 DCLK5 DCLK4 DCLK9 DCLK8 DCLKREF
*The unused SDRAM clocks ma SMBus interface.
SMBCLK 3,5,15,16,18,34,39 SM BDATA 3,5,15,16,18,34,39
Intel(R) 440BX AGPset 1.0
VCC3
C183
C185
C187
C189
C191
+
C193
DCLK[15:0]13, 14,15,16
**PLEASE NOTE** These clock assignments may not be optimum.
SRCLK 10
be disabled using the
840Thursda
E
A
y
]
]
]
]
B
VCC3
C
D
E
AD[31:0
17 ,22,23
4 4
3 3
C/BE#[3:0
17 ,22,23
FRAME#17, 22,23,34 DE VSEL#17, 22,23,34 IRDY#17, 22,23,34 TRDY#17, 22,23,34 STOP#17,22,23,34 PAR17,22,23
PHLD#17,34 PHLDA#17,34
17, 22,23,34
22 ,23,34
SERR#17, 22,23,34 PLOCK#22,23,34
WSC#19
PREQ#[3:0
PREQ#434
PGNT#[3:0
VCC3
R95 10K
2 2
SUSTAT#18
R400 0
DO NOT STUFF
Stuffing option to enable and test the POS state.
1 1
A
PGNT#434
PWROK18,32
VREF5V18 BXPCLK7
R294
100
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C/BE#0 C/BE#1 C/BE#2 C/BE#3
PREQ#0 PREQ#1 PREQ#2 PREQ#3 PREQ#4
PGNT#0 PGNT#1 PGNT#2 PGNT#3 PGNT#4
U2-2
K6
AD0
K2
AD1
K4
AD2
K3
AD3
K5
AD4
J1
AD5
J2
AD6
H2
AD7
H1
AD8
J5
AD9
H3
AD10
H5
AD11
H4
AD12
G1
AD13
G2
AD14
G4
AD15
D1
AD16
D3
AD17
D2
AD18
C1
AD19
A2
AD20
C3
AD21
B3
AD22
D4
AD23
E5
AD24
A4
AD25
D5
AD26
B4
AD27
B5
AD28
A5
AD29
E6
AD30
C6
AD31
J4
C/BE0#
G3
C/BE1#
E4
C/BE2#
C4
C/BE3#
E2
FRAME#
F3
DEVSEL#
E1
IRDY#
F5
TRDY#
F4
STOP#
G5
PAR
F1
SERR#
F2
PLOCK#
B6
PHOLD#
D6
PHLDA#
AE3
WSC#
A6
PR EQ0#/IOREQ#
C7
PREQ1#
F10
PREQ2#
D8
PREQ3#
D10
PREQ4#
AD4
SUSTAT#
E7
PGNT0#/IOGNT#
D7
PGNT1#
E10
PGNT2#
E8
PGNT3#
E9
PGNT4#
AF3
BX-PWROK
AC4
CLKRUN#
C2
REFVCC5
B2
PCLKIN
443BX
B
M12
L16
L14
L13
L11
VDD
VDD
VDD
VDD
PCI INTERFACE
PCI ARB & PWR MGT
VSSN1VSSM5VSS
VSS
VSS
VSS
VSS
VSS
L12
L15
M11
M13
M14
M16
M22
N11
N16
P11
P16
R12
M15
VDD
VDD
VDD
VDD
VDD
VDD
82443BX
492 BGA
VSS
VSS
VSS
VSS
VSS
VSS
N12
N13
N14
N15
P12
P13
R15
VDD
VSS
P14
T11
VDD
VSS
P15
T13
VDD
VSS
P26
T14
VDD
VSS
T12
T16
VDD
VSS
T15
N26
VDD
VSS
VDD
VSSR5VSS
R11
C
P1
VDD
VSS
R13
AE1
VDD
VSS
R14
V6
VDD
VSS
R16
Y6
VDD
GDEVSEL#
AGP INTERFACE
GADSTB-A GADSTB-B
VSS
VSSV3VSS
R22
GAD0 GAD1 GAD2 GAD3 GAD4 GAD5 GAD6 GAD7 GAD8
GAD9 GAD10 GAD11 GAD12 GAD13 GAD14 GAD15 GAD16 GAD17 GAD18 GAD19 GAD20 GAD21 GAD22 GAD23 GAD24 GAD25 GAD26 GAD27 GAD28 GAD29 GAD30 GAD31
GC/BE0# GC/BE1# GC/BE2# GC/BE3#
GFRAME#
GIRDY# GTRDY# GSTOP#
GPAR
GREQ#
GGNT#
GCLKOUT
GCLKIN
PIPE#
SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7
RBF#
ST0 ST1 ST2
SB-STB
AGPREFV
VSSW6VSS
V24
W21
AB5 AE2 AD3 AD2 AD1 AC3 AC1 AB4 AB1 AA5 AA3 AA4 AA2 AA1 Y5 Y3 W1 V2 W2 U5 V1 U4 U3 U1 T3 T4 T2 T1 U6 R3 R4 R2
AB2 Y4 V4 U2
W3 W5 V5 W4 Y1 Y2
L5 L3
P5 N5
M3 K1 M2 M1 N2 P2 P4 P3 R1
M4 L4
L2 L1
AC2 T5 N3
N4
GAD0 GAD1 GAD2 GAD3 GAD4 GAD5 GAD6 GAD7 GAD8 GAD9 GAD10 GAD11 GAD12 GAD13 GAD14 GAD15 GAD16 GAD17 GAD18 GAD19 GAD20 GAD21 GAD22 GAD23 GAD24 GAD25 GAD26 GAD27 GAD28 GAD29 GAD30 GAD31
GCBE#0 GCBE#1 GCBE#2 GCBE#3
R98 22
SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7
ST0 ST1 ST2
R97 22
**NOTE** Locate circuitry close to 443BX.
D
GAD[31:0]21
GC/BE#[3:0]21
GFRAME# 21,34 GD EVSEL# 21 ,34 GIRDY# 21,34 GTRDY# 21,34 GSTOP# 21,34 GPAR 21,34
GR EQ# 21,34 GGNT# 21,34
GC L KOUT 21
** Note** Please make the GCLKIN trace length 3.3"
PIPE# 21,34
more than the GCLKOUT recommended trace length. Stub to tee should be 1" MAX.
SBA[7:0]21 RB F# 21,34
ST[2:0]21 ADSTB-A 21,34 AD S TB-B 21,34 SBSTB 21,34
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
82443BX PCI AND AGP INTERFACES
Size Document Number Rev
Custom
Date: Sheet of
Intel(R) 440BX AGPset 1.0
, April 09, 1998
C5
0.001uF
VCC3
R99
**NOTE: It is
150
recommended
1%
that the tolerance on these resistors be 1%
R101
in order to meet
100 1%
the margins of this reference voltage.
940Thursda
E
A
g
g
y
]
]
MD[63:0
11,12
4 4
3 3
2 2
MECC[7:0
12
MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63
MECC0 MECC1 MECC2 MECC3 MECC4 MECC5 MECC6 MECC7
U2-3
AF4
MD0
AE4
MD1
AF5
MD2
AD6
MD3
AE6
MD4
AB7
MD5
AC7
MD6
AF7
MD7
AB8
MD8
AB9
MD9
AC9
MD10
AE9
MD11
AB10
MD12
AC10
MD13
AF10
MD14
AD11
MD15
Y24
MD16
Y25
MD17
W23
MD18
W24
MD19
W26
MD20
W25
MD21
V26
MD22
U24
MD23
U23
MD24
T22
MD25
T23
MD26
T26
MD27
R24
MD28
R25
MD29
P23
MD30
N25
MD31
AC5
MD32
AE5
MD33
AB6
MD34
AC6
MD35
AF6
MD36
AD7
MD37
AE7
MD38
AC8
MD39
AD8
MD40
AF8
MD41
AE8
MD42
AF9
MD43
AD10
MD44
AE10
MD45
AB11
MD46
AC11
MD47
Y23
MD48
Y26
MD49
W22
MD50
V22
MD51
V23
MD52
V25
MD53
U22
MD54
U25
MD55
U26
MD56
T24
MD57
T25
MD58
U21
MD59
R23
MD60
R26
MD61
P24
MD62
P25
MD63
AE11
MECC0
AA10
MECC1
AA23
MECC2
AA26
MECC3
AF11
MECC4
AD12
MECC5
AA25
MECC6
Y22
MECC7
443BX_10
VTT VTT
B
VCC3
MEMORY DATA BUS
VSS
VSS
VSS
VSS
VSS
AA8
AA6
N24
AA19
AB25
AF2
AE26
N22
AF14
VDDB1VDD
VDD
VDD
82443BX
492 BGA
VSS
VSS
VSS
VSS
VSS
VSS
AB3
AD5
AB12
AB15
AB24
AD9
AA21
VDD
VSS
AD18
VSS
AD22
VSS
AF1
VSS
AF13
VSS
AF26
VSS
HD0# HD1# HD2# HD3# HD4# HD5# HD6# HD7# HD8#
HD9# HD10# HD11# HD12# HD13# HD14# HD15# HD16# HD17# HD18# HD19# HD20# HD21# HD22# HD23# HD24# HD25# HD26# HD27# HD28# HD29# HD30# HD31# HD32# HD33# HD34# HD35# HD36# HD37# HD38# HD39# HD40# HD41#
HOST DATA BUS
HD42# HD43# HD44# HD45# HD46# HD47# HD48# HD49# HD50# HD51# HD52# HD53# HD54# HD55# HD56# HD57# HD58# HD59# HD60# HD61# HD62# HD63#
GTLREFA
GTLREFB
VTTA
VTTB
B22 D22 E21 A22 D21 C21 A21 C20 B21 E20 A20 E19 B20 E18 D20 D19 D18 C19 B19 A18 A19 B18 C17 E17 D17 B17 C16 A17 C15 B16 D16 A16 B15 A15 D14 D15 B13 C14 E14 D13 A13 D12 B12 B14 C13 E13 D11 A12 B11 A11 B7 C12 C8 B10 A10 A9 A7 E11 D9 C11 C10 B8 A8 B9
M23 E16 M24 F17
C
HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63
VTT
D
HD#[63:0]3,5
4.7K
SRCLK8
GCKE8 B_CKE7 16
**NOTE** GCKE trace length from the 443BX to the shift register should be between 1" MIN and 4" MAX.
**NOTE** If GCKE is not used then each CKE requires a 22K pullup to VCC3.
GTLREF2 GTLREF1
R386
R396
4.7K C194 27pF
U33
1
1EN
48
C1
24
2EN
25
C2
47
1D1
46
1D2
44
1D3
43
1D4
41
1D5
40
1D6
38
1D7
37
1D8
36
2D1
35
2D2
33
2D3
32
2D4
30
2D5
29
2D6
27
2D7
26
2D8
SN74LVCH16374
**NOTE** The seven outputs that circle around to b ec ome inputs on the SN74LVCH16374 should have trace len
er than 2".
lon
2
1
1Q1
3
1Q2
5
1Q3
6
1Q4
8
1Q5
9
1Q6
11
1Q7
12
1Q8
13
2
2Q1
14
2Q2
16
2Q3
17
2Q4
19
2Q5
20
2Q6
22
2Q7
23
2Q8
ths no
E
**NOTE** The trace lengths of BCKE[7:0] should be 3.0"
B_CKE6 16
B_CKE5 15
B_CKE4 15
B_CKE3 14
B_CKE2 14
B_CKE1 13
B_CKE0 13
R102 75 1%
1 1
R103 150 1%
A
C6
0.001uF
B
R104 75 1%
R105 150 1%
C7
0.001uF
GTLREF2GTLREF1
C
D
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
82443BX MD/HD BUS
Size Document Number Rev Custom
Date: Sheet of
Intel(R) 440BX AGPset 1.0
, April 09, 1998
10 40Thursda
E
A
(
)
y
[
]
]
]
]
]
[
]
]
FET-SWITCHES (MEMORY DATA LINES & ECC)
VCC
4 4
FENA8,12
MD[63:0
10,12 MD_A[63:0]12 ,13,14
R299 500
R301 500
R303 500
R305 500
R307 500
R309 500
R311 500
MD
R320 500
R322 500
R324 500
R326 500
R328 500
R330 500
R313 500
R316 500
R318 500
FENA
63:0
R315 500
R317 500
R319 500
R321 500
R323 500
R325 500
R327 500
R329 500
A
3 3
2 2
1 1
MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8 MD9 MD10 MD11
MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 MD32 MD33 MD34 MD35
VCC
R108
4.7K
R107
4.7K
1 56 55
2
3
4
5
6
7
9 10 11 12 13 14 15 16 18 20 21 22 23 24 25 26 27 28
U6
1 56 55
2
3
4
5
6
7
9 10 11 12 13 14 15 16 18 20 21 22 23 24 25 26 27 28
PI5C16212A
U5
S0 S1 S2
1A1 1A2 2A1 2A2 3A1 3A2 4A1 4A2 5A1 5A2 6A1 6A2 7A1 7A2 8A1 8A2 9A1 9A2 10A1 10A2 11A1 11A2 12A1 12A2
PI5C16212A
S0 S1 S2
1A1 1A2 2A1 2A2 3A1 3A2 4A1 4A2 5A1 5A2 6A1 6A2 7A1 7A2 8A1 8A2 9A1 9A2 10A1 10A2 11A1 11A2 12A1 12A2
10B1 10B2 11B1 11B2 12B1 12B2
VCC
1B1 1B2 2B1 2B2 3B1 3B2 4B1 4B2 5B1 5B2 6B1 6B2 7B1 7B2 8B1 8B2 9B1
9B2 10B1 10B2 11B1 11B2 12B1 12B2
GND GND GND GND
VCC
GND GND GND GND
1B1 1B2 2B1 2B2 3B1 3B2 4B1 4B2 5B1 5B2 6B1 6B2 7B1 7B2 8B1 8B2 9B1 9B2
B
VCC
17
54 53
MD_B0 52 51
MD_B1 50 48
MD_B2 47 46
MD_B3 45 44
MD_B4 43 42
MD_B5 41 40
MD_B6 39 37
MD_B7 36 35
MD_B8 34 33
MD_B9 32 31
MD_B10 30 29
MD_B11 8
19 38 49
MD_A0 MD_A1 MD_A2 MD_A3 MD_A4 MD_A5 MD_A6 MD_A7 MD_A8 MD_A9 MD_A10 MD_A11
MD_B[63:0]12 ,15,16
C
VCC
R106
4.7K
FENA
63:0
MD
MD12 MD_A12 MD13 MD14 MD15 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23
R296 500
R298 500
R302 500
R306 500
R310 500
R314 500
R295 500
R297 500
R300 500
R304 500
R308 500
R312 500
U4
1
S0
56
S1
55
S2
2
1A1
3
1A2
4
2A1
5
2A2
6
3A1
7
3A2
9
4A1
10
4A2
11
5A1
12
5A2
13
6A1
14
6A2
15
7A1
16
7A2
18
8A1
20
8A2
21
9A1
22
9A2
23
10A1
24
10A2
25
11A1
26
11A2
27
12A1
28
12A2
PI5C16212A
D
VCC
17
VCC
54
1B1
53
1B2 2B1 2B2 3B1 3B2 4B1 4B2 5B1 5B2 6B1 6B2 7B1 7B2 8B1 8B2 9B1
9B2 10B1 10B2 11B1 11B2 12B1 12B2
GND GND GND GND
MD_B12 52 51
MD_B13 50 48
MD_B14 47 46
MD_B15 45 44
MD_B16 43 42
MD_B17 41 40
MD_B18 39 37
MD_B19 36 35
MD_B20 34 33
MD_B21 32 31
MD_B22 30 29
MD_B23 8
19 38 49
MD_A13 MD_A14 MD_A15 MD_A16 MD_A17 MD_A18 MD_A19 MD_A20 MD_A21 MD_A22 MD_A23
E
MD_A[63:0
MD_B[63:0
FET ENABLE TRUTH TABLE
VCC
17
54 53
MD_B24 52 51
MD_B25 50 48
MD_B26 47 46
MD_B27 45 44
MD_B28 43 42
MD_B29 41 40
MD_B30 39 37
MD_B31 36 35
MD_B32 34 33
MD_B33 32 31
MD_B34 30 29
MD_B35 8
19 38 49
B
MD_A24 MD_A25 MD_A26 MD_A27 MD_A28 MD_A29 MD_A30 MD_A31 MD_A32 MD_A33 MD_A34 MD_A35
MD_A[63:0
MD_B[63:0
C
FUNCTION S2 S1
A1 TO B1, A2 TO B2
HH
A1 TO B1, A2 TO B2
Title
Size Document Number Rev Custom
Date: Sheet of
D
S0
A1 A2[FENA]
LB1B2
HHH
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA. 95630
FET SWITCHES
B2 B1
DP/4 DIMM Design
Intel(R) 440BX AGPset 1.0
, April 09, 1998
A1 = D RA M DATA LINES A2 = GND
B1 = D I MM 0,1 DATA LINES B2 = D I MM 2,3 DATA LINES
11 40Thursda
E
A
(
)
y
[
]
]
[
]
]
[
]MD[
]
]
]
B
C
D
E
FET-SWITCHES (DRAM DATA LINES & ECC)
VCC
VCC
VCC
17
54 53
MD_B36 52 51
MD_B37 50 48
MD_B38 47 46
MD_B39 45 44
MD_B40 43 42
MD_B41 41 40
MD_B42 39 37
MD_B43 36 35
MD_B44 34 33
MD_B45 32 31
MD_B46 30 29
MD_B47 8
19 38 49
MD_A36 MD_A37 MD_A38 MD_A39 MD_A40 MD_A41 MD_A42 MD_A43 MD_A44 MD_A45 MD_A46 MD_A47
MD_B[63:0]11 ,15,16
FENA
R334 500
R338 500
R342 500
R346 500
R350 500
R354 500
63:0
R332 500
R336 500
R340 500
R344 500
R348 500
R352 500
MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 MD56 MD57 MD58 MD59
R110
4.7K U8
1
S0
56
S1
55
S2
2
1A1
3
1A2
4
2A1
5
2A2
6
3A1
7
3A2
9
4A1
10
4A2
11
5A1
12
5A2
13
6A1
14
6A2
15
7A1
16
7A2
18
8A1
20
8A2
21
9A1
22
9A2
23
10A1
24
10A2
25
11A1
26
11A2
27
12A1
28
12A2
PI5C16212A
VCC
1B1 1B2 2B1 2B2 3B1 3B2 4B1 4B2 5B1 5B2 6B1 6B2 7B1 7B2 8B1 8B2 9B1
9B2 10B1 10B2 11B1 11B2 12B1 12B2
GND GND GND GND
VCC
17
54 53
MD_B48 52 51
MD_B49 50 48
MD_B50 47 46
MD_B51 45 44
MD_B52 43 42
MD_B53 41 40
MD_B54 39 37
MD_B55 36 35
MD_B56 34 33
MD_B57 32 31
MD_B58 30 29
MD_B59 8
19 38 49
MD_A48 MD_A49 MD_A50 MD_A51 MD_A52 MD_A53 MD_A54 MD_A55 MD_A56 MD_A57 MD_A58 MD_A59
63:0
MD_A
MD_B[63:0
FET ENABLE TRUTH TABLE
VCC
MD_B
63:0
17
54 53
MD_B60 52 51
MD_B61 50 48
MD_B62 47 46
MD_B63 45 44
MECC_B0 43 42
MECC_B1 41 40
MECC_B2 39 37
MECC_B3 36 35
MECC_B4 34 33
MECC_B5 32 31
MECC_B6 30 29
MECC_B7 8
19 38 49
B
MD_A60 MD_A61 MD_A62 MD_A63
ME CC_A0 ME CC_A1 ME CC_A2 ME CC_A3 ME CC_A4 ME CC_A5 ME CC_A6 ME CC_A7
MD_A[63:0
MECC_A[7:0]13 ,14,15,16
MECC_B[7:0]13 ,14,15,16
C
FUNCTION S2 S1
A1 TO B1, A2 TO B2
HH
A1 TO B1, A2 TO B2
D
S0
A1 A2[ FENA]
LB1B2
HHH
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA. 95630
Title
Size Document Number Rev Custom
Date: Sheet of
B2 B1
FET SWITCHES
, April 09, 1998
DP/4 DIMM Design
Intel(R) 440BX AGPset 1.0
A1 = DRAM DATA LINES A2 = GND
B1 = D I MM 0,1 DATA LINES B2 = D I MM 2,3 DATA LINES
12 40Thursda
E
MD36 MD37 MD38 MD39 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47
VCC
MD60 MD61 MD62 MD63 MECC0 MECC1 MECC2 MECC3 MECC4 MECC5 MECC6 MECC7
R109
4.7K
R111
4.7K
U7
1
S0
56
S1
55
S2
2
1A1
3
1A2
4
2A1
5
2A2
6
3A1
7
3A2
9
4A1
10
4A2
11
5A1
12
5A2
13
6A1
14
6A2
15
7A1
16
7A2
18
8A1
20
8A2
21
9A1
22
9A2
23
10A1
24
10A2
25
11A1
26
11A2
27
12A1
28
12A2
PI5C16212A
U9
1
S0
56
S1
55
S2
2
1A1
3
1A2
4
2A1
5
2A2
6
3A1
7
3A2
9
4A1
10
4A2
11
5A1
12
5A2
13
6A1
14
6A2
15
7A1
16
7A2
18
8A1
20
8A2
21
9A1
22
9A2
23
10A1
24
10A2
25
11A1
26
11A2
27
12A1
28
12A2
PI5C16212A
VCC
1B1 1B2 2B1 2B2 3B1 3B2 4B1 4B2 5B1 5B2 6B1 6B2 7B1 7B2 8B1 8B2 9B1
9B2 10B1 10B2 11B1 11B2 12B1 12B2
GND GND GND GND
VCC
1B1
1B2
2B1
2B2
3B1
3B2
4B1
4B2
5B1
5B2
6B1
6B2
7B1
7B2
8B1
8B2
9B1
9B2 10B1 10B2 11B1 11B2 12B1 12B2
GND GND GND GND
4 4
FENA8,11
MD[63:0
10,11 MD_A[63:0]11 ,13,14
R331 500
R333 500
R335 500
R337 500
R339 500
R341 500
R343 500
R345 500
3 3
2 2
1 1
10
R349 500
R353 500
FENA MD
R356 500
R358 500
R360 500
R362 500
R364 500
R366 500
MECC[7:0
R347 500
R351 500
63:0
R355 500
R357 500
R359 500
R361 500
R363 500
R365 500
A
A
y
B
C
D
E
DIMM SOCKET 0
VCC3 VCC3
MD_A[63:0]11,12,14
4 4
MD_A0 MD_A1 MD_A2 MD_A3
MD_A5 MD_A6 MD_A7
MD_A8 MD_A9 MD_A10 MD_A11 MD_A12 MD_A13 MD_A14 MD_A15
MD_A32 MD_A33 MD_A34 MD_A35 MD_A36 MD_A37 MD_A38
3 3
MAA[13:0]8,14
DQMA[7:0]8,14,15,16
2 2
MD_A39 MD_A40
MD_A41 MD_A42 MD_A43 MD_A44 MD_A45 MD_A46 MD_A47
MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA13
DQMA0 DQMA1 DQMA2 DQMA3 DQMA4 DQMA5 DQMA6 DQMA7
MAA11 MAA12
J4
2
DQ0
3
DQ1
4
DQ2
5
DQ3
7
DQ4
8
DQ5
9
DQ6
10
DQ7
11
DQ8
13
DQ9
14
DQ10
15
DQ11
16
DQ12
17
DQ13
19
DQ14
20
DQ15
86
DQ32
87
DQ33
88
DQ34
89
DQ35
91
DQ36
92
DQ37
93
DQ38
94
DQ39
95
DQ40
97
DQ41
98
DQ42
99
DQ43
100
DQ44
101
DQ45
103
DQ46
104
DQ47
33
A0
117
A1
34
A2
118
A3
35
A4
119
A5
36
A6
120
A7
37
A8
121
A9
38
A10 (AP)
123
A11
126
A12
132
A13
28
DQMB0
29
DQMB1
46
DQMB2
47
DQMB3
112
DQMB4
113
DQMB5
130
DQMB6
131
DQMB7
122
BA0
39
BA1
24
NC
25
NC
31
NC
44
NC
48
NC
50
NC
51
NC
61
NC
80
NC
81
NC
109
NC
108
NC
145
NC
SDRAM DIMM
40
102
18
VCC6VCC26VCC
VCC41VCC90VCC
VCC
VSS1VSS
VSS23VSS32VSS85VSS96VSS
VSS43VSS54VSS64VSS68VSS78VSS
12
124
110
VCC
VCC
VCC49VCC59VCC73VCC84VCC
VSS
VSS
107
116
127
138
143
157
168
133
VCC
VSS
VSS
148
152
162
VSS
VCC
VCC
DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23
DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55
DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
REGE
CKE0 CKE1
CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7
SDA SCL
/WE0 /CAS
/RAS
CK0 CK1 CK2 CK3
SA0 SA1 SA2
55
MD_A16 MD_A17
56
MD_A18
57 58
MD_A19 MD_A20MD_A4
60 65
MD_A21
66
MD_A22
67
MD_A23 MD_A24
69
MD_A25
70 71
MD_A26 MD_A27
72 74
MD_A28 MD_A29
75 76
MD_A30
77
MD_A31 MD_A48
139
MD_A49
140 141
MD_A50
142
MD_A51
144
MD_A52
149
MD_A53 MD_A54
150 151
MD_A55 MD_A56
153 154
MD_A57 MD_A58
155 156
MD_A59
158
MD_A60
159
MD_A61
160
MD_A62 MD_A63
161 134
NC
135
NC
146
NC
164
NC
62
NC
147 128 63
MECC_A0
21
MECC_A1
22
MECC_A2
52
MECC_A3
53
MECC_A4
105
MECC_A5
106
MECC_A6
136
MECC_A7
137
165
SLA VE ADDRESS
166
= 1010000b
167 82
83
CS_A#0
30
/S0 /S1 /S2 /S3
CS_A#1
114
CS_B#0
45
CS_B#1
129 27 111 115
42 125 79 163
DCLK12 DCLK13 DCLK14 DCLK15
**NOTE ON ALL DIMM SOCKETS** Pin 147 should be pulled to a high state to accommodate registered DIMMs.
VCC3
R367 0 ohm
**NOTE** If GCKE is not used
B_CKE0 10
then each CKE requires a
B_CKE1 10
22K pullup to VCC3.
MECC_A[7:0] 12,14,15,16
SMBDATA 3,5,8,15,16,18,34,39 SMBCLK 3,5,8,15,16,18,34,39
CS_A#[1:0] 8 CS_B#[1:0] 8
WE_A# 8,14 SCAS_A# 8,14 SRAS_A# 8,14
DCLK[15:0] 8,14,15,16
1 1
A
B
C
D
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
DIMM SOCKET 0
Size Document Number Rev Custom
Date: Sheet of
Intel(R) 440BX AGPset
, April 09, 1998
13 40Thursda
E
1.0
A
y
B
C
D
E
DIMM SOCKET 1
VCC3 VCC3
MD_A[63:0]11,12,13
4 4
MD_A0 MD_A16 MD_A1 MD_A17 MD_A2 MD_A18 MD_A3 MD_A19 MD_A4 MD_A20 MD_A5 MD_A21 MD_A6 MD_A22 MD_A7 MD_A23
MD_A8 MD_A24 MD_A9 MD_A25 MD_A10 MD_A26 MD_A11 MD_A27 MD_A12 MD_A28 MD_A13 MD_A29 MD_A14 MD_A30 MD_A15 MD_A31
MD_A32 MD_A48 MD_A33 MD_A49 MD_A34 MD_A50 MD_A35 MD_A51 MD_A36 MD_A52 MD_A37 MD_A53 MD_A38 MD_A54
3 3
MAA[13:0]8,13
DQMA[7:0]8,13,15,16
2 2
MD_A39 MD_A55 MD_A40 MD_A56
MD_A41 MD_A57 MD_A42 MD_A58 MD_A43 MD_A59 MD_A44 MD_A60 MD_A45 MD_A61 MD_A46 MD_A62 MD_A47 MD_A63
MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA13
DQMA0 DQMA1 DQMA2 DQMA3 DQMA4 DQMA5 DQMA6 DQMA7
MAA11 MAA12
J5
2
DQ0
3
DQ1
4
DQ2
5
DQ3
7
DQ4
8
DQ5
9
DQ6
10
DQ7
11
DQ8
13
DQ9
14
DQ10
15
DQ11
16
DQ12
17
DQ13
19
DQ14
20
DQ15
86
DQ32
87
DQ33
88
DQ34
89
DQ35
91
DQ36
92
DQ37
93
DQ38
94
DQ39
95
DQ40
97
DQ41
98
DQ42
99
DQ43
100
DQ44
101
DQ45
103
DQ46
104
DQ47
33
A0
117
A1
34
A2
118
A3
35
A4
119
A5
36
A6
120
A7
37
A8
121
A9
38
A10 (AP)
123
A11
126
A12
132
A13
28
DQMB0
29
DQMB1
46
DQMB2
47
DQMB3
112
DQMB4
113
DQMB5
130
DQMB6
131
DQMB7
122
BA0
39
BA1
24
NC
25
NC
31
NC
44
NC
48
NC
50
NC
51
NC
61
NC
80
NC
81
NC
109
NC
108
NC
145
NC
SDRAM DIMM
40
102
18
VCC6VCC26VCC
VCC41VCC90VCC
VCC
VSS1VSS
VSS23VSS32VSS85VSS96VSS
VSS43VSS54VSS64VSS68VSS78VSS
12
110
VCC
124
VCC
VCC49VCC59VCC73VCC84VCC
VSS
VSS
107
116
127
138
148
VSS
143
157
168
133
VCC
VSS
152
162
VSS
VCC
VCC
DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23
DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55
DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
REGE CKE0 CKE1
CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7
SA0 SA1 SA2
SDA SCL
/WE0 /CAS /RAS
CK0 CK1 CK2 CK3
55 56 57 58 60 65 66 67
69 70 71 72 74 75 76 77
139 140 141 142 144 149 150 151
153 154 155 156 158 159 160 161
134
NC
135
NC
146
NC
164
NC
62
NC
147 128 63
MECC_A0
21
MECC_A1
22
MECC_A2
52
MECC_A3
53
MECC_A4
105
MECC_A5
106
MECC_A6
136
MECC_A7
137
R_SA0
165 166 167
82 83
CS_A#2
30
/S0 /S1 /S2 /S3
CS_A#3
114
CS_B#2
45
CS_B#3
129 27 111 115
DCLK8
42
DCLK9
125
DCLK10
79
DCLK11
163
**NOTE ON ALL DIMM SOCKETS** Pin 147 should be pulled to a high state to accommodate registered DIMMs.
VCC3
R368 0 ohm
**NOTE** If GCKE is not used then each CKE requires a 22K pullup to VCC3.
B_CKE2 10 B_CKE3 10 MECC_A[7:0] 12,13,15,16
VCC3
R114
4.7K
SLAVE ADDRESS = 1010001b
SMBDATA 3,5,8,15,16,18,34,39 SMBCLK 3,5,8,15,16,18,34,39
CS_A#[3:2] 8 CS_B#[3:2] 8
WE_A# 8,13 SCAS_A# 8,13 SRAS_A# 8,13
DCLK[15:0] 8,13,15,16
1 1
A
B
C
D
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
DIMM SOCKET 1
Size Document Number Rev Custom
Date: Sheet of
Intel(R) 440BX AGPset
, April 09, 1998
14 40Thursda
E
1.0
A
B
C
D
E
DIMM SOCKET 2
VCC3VCC3
4 4
3 3
2 2
MD_B[63:0]11,12,16
J6
40
102
18
MD_B0 MD_B1 MD_B17 MD_B2 MD_B3 MD_B4 MD_B5 MD_B6 MD_B7
MD_B8 MD_B9 MD_B10 MD_B11 MD_B12 MD_B13 MD_B14 MD_B15
MD_B32 MD_B33 MD_B34 MD_B35 MD_B36 MD_B37 MD_B38 MD_B39
MD_B40 MD_B41 MD_B42 MD_B43 MD_B44 MD_B45 MD_B46
DQMA0 DQMA2
DQMA3 DQMA4
DQMA6 DQMA7
MAB#11 MAB#12
MD_B47
MAB#0 MAB#1 MAB#2 MAB#3 MAB#4 MAB#5 MAB#6 MAB#7 MAB#8 MAB#9 MAB10 MAB13
MAB#[13:0]8,16
DQMA[7:0]8,13,14,16
DQMB18,16
DQMB58,16
2
DQ0
3
DQ1
4
DQ2
5
DQ3
7
DQ4
8
DQ5
9
DQ6
10
DQ7
11
DQ8
13
DQ9
14
DQ10
15
DQ11
16
DQ12
17
DQ13
19
DQ14
20
DQ15
86
DQ32
87
DQ33
88
DQ34
89
DQ35
91
DQ36
92
DQ37
93
DQ38
94
DQ39
95
DQ40
97
DQ41
98
DQ42
99
DQ43
100
DQ44
101
DQ45
103
DQ46
104
DQ47
33
A0
117
A1
34
A2
118
A3
35
A4
119
A5
36
A6
120
A7
37
A8
121
A9
38
A10 (AP)
123
A11
126
A12
132
A13
28
DQMB0
29
DQMB1
46
DQMB2
47
DQMB3
112
DQMB4
113
DQMB5
130
DQMB6
131
DQMB7
122
BA0
39
BA1
24
NC
25
NC
31
NC
44
NC
48
NC
50
NC
51
NC
61
NC
80
NC
81
NC
109
NC
108
NC
145
NC
SDRAM DIMM
VCC6VCC26VCC
VCC
VSS1VSS
124
110
VCC41VCC90VCC
VCC
VCC
VSS23VSS32VSS85VSS96VSS
VSS43VSS54VSS64VSS68VSS78VSS
12
VCC49VCC59VCC73VCC84VCC
VSS
VSS
107
116
127
138
148
133
VSS
152
143
VCC
VSS
162
VSS
157
VCC
168
DQ16 DQ17
VCC
DQ18 DQ19 DQ20 DQ21 DQ22 DQ23
DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55
DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
REGE
CKE0 CKE1
/WE0 /CAS /RAS
NC NC NC NC NC
CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7
SA0 SA1 SA2
SDA SCL
/S0 /S1 /S2 /S3
CK0 CK1 CK2 CK3
55 56 57 58 60 65 66 67
69 70 71 72 74 75 76 77
139 140 141 142 144 149 150 151
153 154 155 156 158 159 160 161
134 135 146 164 62
147 128 63
21 22 52 53 105 106 136 137
165 166 167
82 83
30 114 45 129 27 111 115
42 125 79 163
MD_B16 MD_B18
MD_B19 MD_B20 MD_B21 MD_B22 MD_B23
MD_B24 MD_B25 MD_B26 MD_B27 MD_B28 MD_B29 MD_B30 MD_B31
MD_B48 MD_B49 MD_B50 MD_B51 MD_B52 MD_B53 MD_B54 MD_B55
MD_B56 MD_B57 MD_B58 MD_B59 MD_B60 MD_B61 MD_B62 MD_B63
MECC_B0 MECC_B1 MECC_B2 MECC_B3 MECC_B4 MECC_B5 MECC_B6 MECC_B7
R_SA1
CS_A#4 CS_A#5 CS_B#4 CS_B#5
DCLK4 DCLK5 DCLK6 DCLK7
R116
4.7K
**NOTE ON ALL DIMM SOCKETS**
VCC3
Pin 147 should be pulled to a high state to accommodate registered DIMMs.
R369 0 ohm
**NOTE** If GCKE is not used then each CKE requires a 22K pullup to VCC3.
B_CKE4 10 B_CKE5 10 MECC_B[7:0] 12,13,14,16
VCC3
Slave address = 1010010b
SMBDATA 3,5,8,16,18,34,39 SMBCLK 3,5,8,16,18,34,39
CS_A#[5:4] 8 CS_B#[5:4] 8
WE_B# 8,16 SCAS_B# 8,16 SRAS_B# 8,16
DCLK[15:0] 8,13,14,16
1 1
A
B
C
D
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
DIMM SOCKET 2
Size Document Number Rev Custom
Date: Sheet of
Intel(R) 440BX AGPset
15 40Thursday, April 09, 1998
E
1.0
A
B
C
D
E
DIMM SOCKET 3
VCC3VCC3
4 4
3 3
100/66#3,5,7
R119 10K
2 2
R120 10K
JP16
IOQ DEPTH SEL
MAB#12
MAB#11
MAB#11: 1 = IOQ depth of 4 (default), 0 = IOQ depth of 1
MD_B[63:0]11,12,15
J7
40
102
18
MD_B0 MD_B1 MD_B2 MD_B3 MD_B4 MD_B5 MD_B6 MD_B7
MD_B8 MD_B9 MD_B10 MD_B11 MD_B12 MD_B13 MD_B14 MD_B15
MD_B32 MD_B33
MD_B35 MD_B36 MD_B37 MD_B38 MD_B39
MD_B40 MD_B41 MD_B42 MD_B43 MD_B44 MD_B45 MD_B46
DQMA0 DQMA2
DQMA3 DQMA4
DQMA6 DQMA7
MAB#11 MAB#12
MD_B47
MAB#0 MAB#1 MAB#2 MAB#3 MAB#4 MAB#5 MAB#6 MAB#7 MAB#8 MAB#9 MAB10 MAB13
MAB#[13:0]8,15
DQMA[7:0]8,13,14,15
DQMB18,15
DQMB58,15
2
DQ0
3
DQ1
4
DQ2
5
DQ3
7
DQ4
8
DQ5
9
DQ6
10
DQ7
11
DQ8
13
DQ9
14
DQ10
15
DQ11
16
DQ12
17
DQ13
19
DQ14
20
DQ15
86
DQ32
87
DQ33
88
DQ34
89
DQ35
91
DQ36
92
DQ37
93
DQ38
94
DQ39
95
DQ40
97
DQ41
98
DQ42
99
DQ43
100
DQ44
101
DQ45
103
DQ46
104
DQ47
33
A0
117
A1
34
A2
118
A3
35
A4
119
A5
36
A6
120
A7
37
A8
121
A9
38
A10 (AP)
123
A11
126
A12
132
A13
28
DQMB0
29
DQMB1
46
DQMB2
47
DQMB3
112
DQMB4
113
DQMB5
130
DQMB6
131
DQMB7
122
BA0
39
BA1
24
NC
25
NC
31
NC
44
NC
48
NC
50
NC
51
NC
61
NC
80
NC
81
NC
109
NC
108
NC
145
NC
SDRAM DIMM
VCC6VCC26VCC
VCC
VSS1VSS
124
110
VCC41VCC90VCC
VCC
VCC
VSS23VSS32VSS85VSS96VSS
VSS43VSS54VSS64VSS68VSS78VSS
12
VCC49VCC59VCC73VCC84VCC
VSS
VSS
107
116
127
138
148
133
VSS
152
143
VCC
VSS
162
VSS
157
VCC
168
DQ16 DQ17
VCC
DQ18 DQ19 DQ20 DQ21 DQ22 DQ23
DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55
DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
REGE
CKE0 CKE1
/WE0 /CAS /RAS
NC NC NC NC NC
CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7
SA0 SA1 SA2
SDA SCL
/S0 /S1 /S2 /S3
CK0 CK1 CK2 CK3
55 56 57 58 60 65 66 67
69 70 71 72 74 75 76 77
139 140 141 142 144 149 150 151
153 154 155 156 158 159 160 161
134 135 146 164 62
147 128 63
21 22 52 53 105 106 136 137
165 166 167
82 83
30 114 45 129 27 111 115
42 125 79 163
MD_B16 MD_B17 MD_B18 MD_B19 MD_B20 MD_B21 MD_B22 MD_B23
MD_B24 MD_B25 MD_B26 MD_B27 MD_B28 MD_B29 MD_B30 MD_B31
MD_B48 MD_B49 MD_B50MD_B34 MD_B51 MD_B52 MD_B53 MD_B54 MD_B55
MD_B56 MD_B57 MD_B58 MD_B59 MD_B60 MD_B61 MD_B62 MD_B63
MECC_B0 MECC_B1 MECC_B2 MECC_B3 MECC_B4 MECC_B5 MECC_B6 MECC_B7
CS_A#6 CS_A#7 CS_B#6 CS_B#7
DCLK0 DCLK1 DCLK2 DCLK3
VCC3
**NOTE ON ALL DIMM SOCKETS** Pin 147 should be pulled to a high state to accommodate
R370
registered DIMMs.
0 ohm
**NOTE** If GCKE is not used then each CKE requires a 22K pullup to
B_CKE6 10 B_CKE7 10
MECC_B[7:0] 12,13,14,15
VCC3
VCC3.
R121
Slave address =
4.7K
1010011b
SMBDATA 3,5,8,15,18,34,39 SMBCLK 3,5,8,15,18,34,39
CS_A#[7:6] 8 CS_B#[7:6] 8
WE_B# 8,15 SCAS_B# 8,15 SRAS_B# 8,15
DCLK[15:0] 8,13,14,15
1 1
A
B
C
D
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
DIMM SOCKET 3
Size Document Number Rev Custom
Date: Sheet of
Intel(R) 440BX AGPset
16 40Thursday, April 09, 1998
E
1.0
A
(
)
y
]
]
]
]
]
]
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9
R_ AD18
AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C/BE#0 C/BE#1 C/BE#2 C/BE#3
PREQ#1 PREQ#2 PREQ#3
SDA0 SDA1 SDA2
PDA0 PDA1 PDA2
PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15
4 4
AD[31:0
9,22,23
3 3
2 2
1 1
C/BE#[3:0
9,22,23
DE VSEL#9,22,23,34
FRAME#9,2 2,23,34
9,2 2,23,34
25
25
A
IRDY#9, 2 2,23,34 PCIRST#8,2 1,22,23
PHLD#9,34
PHLDA#9,34
SERR#9,2 2,23,34 STOP#9 , 2 2,23,34
TRDY#9,22,23,34
PREQ#[3:0
SDA[2:0
25
PDDACK#25 SDDACK#25 PDREQ25 SDREQ25 PDIOR#25
PDIOW#25 PIORDY25 SDIOR#25 SDIOW#25 SIORDY25
PDA[2:0
PDD[15:0
PAR9 ,22,23
R371 100
R122 100
AD18 PREQ#0
B10
A10
C10
B12
A12
E10
A11 B11 C11
C17 B17
A18 G19
A17
F18
A16
F17
F16 G20 C16 B16 D16 G16 G18 G17
F20 E18 E20 D18 D20 C20 B20
A20
A19 B19 C19 D19 D17 E19 E17
F19
D9 C9 B9
A9 D8 E8 B8
A8 D7 C7 B7
A7 D6 E6 E4 C4 B4
A4 D3 E3 C3 B3 E2 C2 B2
A2 D1 E1 C1 B1
C8 C6 D4 D2
E5
A5
A3 B5 B6
A1
A6 D5 C5
B
U10A
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C/BE#0 C/BE#1 C/BE#2 C/BE#3
CLOCKRUN# DE VSEL# FRAME# IDSEL IRDY# PAR PCIRST# PHOLD# PHOLDA# SERR# STOP# TRDY#
REQ0# REQ1# REQ2# REQ3#
SDA0 SDA1 SDA2 PDDACK# SDDACK# PDREQ SDREQ PDIOR# PDIOW# PIORDY SDIOR# SDIOW# SIORDY PDA0 PDA1 PDA2
PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15
PIIX4_15
B
PCI BUS INTERFACE
82371EB
IDE SIGNALS
C
E15
SDD0
B15
SDD1
D14
SDD2
C14
SDD3
A14
SDD4
C13
SDD5
A13
SDD6
C12
SDD7
D12
SDD8
B13
SDD9
D13
SDD10
B14
SDD11
E14
SDD12
A15
SDD13
C15
SDD14
D15
SDD15
IDE SIGNALS
ISA/EIO SIGNALS
MEMCS16#
REFRESH#
ZEROWS#
C
SCS3# PCS3# SCS1# PCS1#
SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8
SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19
SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 SD8
SD9 SD10 SD11 SD12 SD13 SD14 SD15
LA17 LA18 LA19 LA20 LA21 LA22 LA23
MEMR#
MEMW#
SMEMR#
SMEMW#
SYSCLK
BALE
IOCHK#
IOCS16#
SBHE#
RSTDRV
IOR#
IOW#
IOCHRDY
AEN
C18 H16 B18 H17
U11 T11 W11 Y11 T10 W10 U9 V9 Y9 T8 W8 U7 V7 Y7 V6 Y6 T5 W5 U4 V4
V3 W3 U2 T2 W2 Y2 T1 V1 W16 T16 Y17 V17 Y18 W18 Y19 W19
Y15 T14 W14 U13 V13 Y13 T12
Y12 V15 U15 W4
U3 T7 U10 Y1
W7 V12 Y3
W12 W1 Y5 T4 T3 Y4
SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19
SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 SD8 SD9 SD10 SD11 SD12 SD13 SD14 SD15
LA17 LA18 LA19 LA20 LA21 LA22 LA23
D
SDD0 SDD1 SDD2 SDD3 SDD4 SDD5 SDD6 SDD7 SDD8 SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15
SA[19:0]19,20,24,27,35,39
SD[15:0]20 ,24,35
LA[23:17]24,35 MEMCS16# 24,35 MEMR# 1 9,24,27,35 MEMW# 19 ,24,27,35 SMEMR# 24
SMEMW# 24 SY S CLK 24,39 BALE 24 IOCHK# 24,35
REFRESH# 24,35 IOCS16# 24,35 ZEROWS# 24,35
SBHE# 24 RSTDRV 20,32 IOR# 20, 24,35,39 IOW# 20, 24,35,39 IOCHRDY 20,24,35 AEN 20,24
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
Size Document Number Rev Custom
Date: Sheet of
D
82371EB
PART I
, April 09, 1998
SDD[15:0]25 SCS3# 25 PCS3# 25 SCS1# 25 PCS1# 25
Intel(R) 440BX AGPset 1.0
E
17 40Thursda
E
A
B
3VSB
VCC3
VCC3
VCC3
C
D
E
DACK#[3:0]20,24
4 4
3 3
2 2
R129
VB2
1K
D3 SCHOTTKY
BAR43
VB1 12
BT1
1 1
1 -2 NORMAL
DACK#[7:5]24
APICACK#19 APICCS#19,34
APICREQ#19,34
3VSB
D2 SCHOTTKY
BAR43
C15
0.1 uF
R131
1K
CLEAR CMOS
JP6 CONFIG
DRQ020,24,35 DRQ120,24,35 DRQ220,24,35 DRQ320,24,35 DRQ524,35 DRQ624,35 DRQ724,35
REQ#A34 REQ#B34 REQ#C34
TC20,24
IRQ019 IRQ119,20,35 IRQ319,20,24,35 IRQ419,20,24,35 IRQ519,20,24,35 IRQ619,20,24,35 IRQ719,20,24,35 IRQ#819,35 IRQ919,20,24,35 IRQ1019,20,24,35
IRQ1119,20,24,35 IRQ1219,20,24,35 IRQ1419,20,24,25,35 IRQ1519,20,24,25,35
GPI734
PIRQ#A19,21,22,23,34 PIRQ#B19,21,22,23,34 PIRQ#C19,22,23,34 PIRQ#D19,22,23,34
PX4_IGNNE#33,34
1 3
CMOS_CLR
PX4_INTR19,33,34 A20GATE20,34 PX4_NMI33,34 PX4_SMI#19,34
PX4_A20M#33,34
JP17
2
FERR#3,5,34 HINIT#3,5,34
KBRST#20,34 PWROK9,32
SPKR32
TEST#34
RTC_BAT
R287 0
32.768KHz
Y2
C16 18pF
PIRQ#A PIRQ#B PIRQ#C PIRQ#D
BIOSCS#27
DACK#0 DACK#1 DACK#2 DACK#3 DACK#5 DACK#6 DACK#7
XOE#20 XDIR#20
RTCX2 RTCX1
48Mhz_07
OSC27
PXPCLK7
12
C17 18pF
U10B
U14
DACK0#
W6
DACK1#
Y10
DACK2#
V5
DACK3#
T15
DACK5#
V16
DACK6#
W17
DACK7#
W15
DREQ0
U6
DREQ1
V2
DREQ2
U5
DREQ3
Y16
DREQ5
U16
DREQ6
U17
DREQ7
M1
REQA#/GPI2
N2
REQB#/GPI3
P3
REQC#/GPI4
N1
GNTA#/GPO9
P2
GNTB#/GPO10
P4
GNTC#/GPO11
V10
TC
J17
APICACK#/GPO12
H18
APICCS#/GPO13
K18
APICREQ#/GPI5
H20
IRQ0/GPO14
J20
IRQ1
T9
IRQ3
W9
IRQ4
U8
IRQ5
V8
IRQ6
Y8
IRQ7
Y20
IRQ8/GPI6
U1
IRQ9
U12
IRQ10
W13
IRQ11
T13
IRQ12
V14
IRQ14
Y14
IRQ15
J19
SERIRQ/GPI7
R3
PIRQA#
R4
PIRQB#
P5
PIRQC#
G1
PIRQD#
M19
CPURST
K19
FERR#
L17
IGNNE#
L18
INIT
L19
INTR
P1
A20GATE
L20
NMI
P20
PX4_SMI#
N20
RCIN#
M20
A20M#
M18
PWROK
K17
SPKR
V18
TEST#
M4
XOE#/GPO23
M3
XDIR#/GPO22
M2
BIOSCS#
L1
RTCALE/GPO25
K2
RTCCS#/GPO24
K1
KBCCS#/GPO26
L16
VBAT
R20
RTCX2
N19
RTCX1
L3
48Mhz
V11
OSC
D11
PCICLK
PIIX4_15
F6
DMA SIGNALS
IRQ SIGNALS
CPU INTERFACE
X-BUS
VSS
VSSE7VSS
VSSJ9VSS
J10
E13
D10
E12
VCC
F15
VCC
R15
VCCR6VCC
E16
VCCPE9VCCP
VCCP
E11
VCC
82371EB
VSS
VSS
VSSK9VSS
VSS
VSS
VSSL9VSS
J11
J12
L10
K10
K11
K12
VCCPF5VCCP
VSS
L11
2 - 3 CLEAR CMOS
A
B
F14
VCCPG6VCCPR7VCCP
VSS
VSSM9VSS
L12
M10
P15
M11
VSS
T6
VCCP
VSS
M12
R16
N16
K5
VCCSUS
VCCSUS
VSS_USB
J5
VCCUSB
USBP1+
USBP1-
USBP0+
USBP0-
USB
EXTSMI#
SUSA#
GPO15/SUSB#
GPO16/SUSC#
GPO17/CPU_STP#
GPO18/PCI_STP#
GPO19/ZZ
GPI8/THERM#
GPI9/BATLOW#
RSMRST#
PWRBT#
GPI10/LID
SMBDATA
SMBCLK
GPI11/SMBALERT#
GPI12/RI#A
POWER MANAGEMENT
SUSCLK GPO20/SUS_STAT1# GPO21/SUS_STAT2#
STPCLK#
SLP#
VREF
GPI1 GPI13 GPI14 GPI15 GPI16 GPI17 GPI18 GPI19 GPI20 GPI21
GPO0
GPO8 GPO27 GPO28 GPO29 GPO30
GPO/GPI/GPIO/SCAN
MCCS#
PGCS0# PGCS1#
CONFIG1 CONFIG2
C
OC0 OC1
N/C N/C N/C N/C N/C N/C
F1 H2 G2 H3 J1 J2
V20 W20 V19 U18
R1 R2 K16
H19 U19 M17 U20 P16 T20 R19 N17 P18
P17 T17 T18 J18 K20
J16
P19 L2 J3 L5 K3 K4 H1 H4 H5 G3
G4 T19 G5 F2 F3 F4
N4 L4
N5 J4
N18 N3 M5 M16 R5
R17 R18
GPI13 GPI14 GPI15 GPI16 GPI17 GPI18 GPI19 GPI20
GPO0 GPO8 GPO27 GPO28
PGCS#0 PGCS#1
R130
8.2K
SUSC#
PS_POK32
PX4_CFG1 34
USBP1+ 26 USBP1- 26 USBP0+ 26 USBP0- 26 OC#0 26 OC#1 26
EXTSMI# 34,39 SUSA# 7
CPU_STP# 7 PCI_STP# 7
THERM# 3,5,34 BATLOW# 34 RSMRST# 32 PWRBT# 32 LID 32,34 SMBDATA 3,5,8,15,16,34,39 SMBCLK 3,5,8,15,16,34,39 SMBALERT# 34 AGP_PME# 21,34
SUSTAT# 9 STPCLK# 3,5,34
SLP# 3,5,34
PCI_PME# 22,23,34
GPI[20:13] 34
GPI21 29
FAN_LED 32
1
TP3
1
TP4
IRQ9OUT 19
1
TP5
PGCS#1 34,39
R388
1K
R389
1.5K
5VSB
14
U30B
3 4
7
74HCT14
+
5VSB
SUSC#
3VSB 5VSB
U11F
14
13 12
C12
7
0.01 uF
RTC_BAT
C13
1.0 uF
GPO8#
D
VCC3
C113
0.1uF
74LVC14
D1 SCHOTTKY
BAR43
C14
0.1 uF
5VSB
U22C
14
9 10 11
7
74HC10
16
VCC
3
J
1
CLK
2
K
8
GND
5VSB
JP29 CONFIG.
JP29
3 1
JMP_3P
3
1
3
1
Q
PR
Q
CL
74HC112
U32B
9
7
1-2
2-3
2
Q8
Q6
E
2N7002 2
2N7002 2
SAVE STATE ON POWER DOWN.
PIIX4 POWERS ON SYS. AT POWER-UP.
R413 10K
U36A
14 1 2
7
74F07
**External logic shown is used to handle power loss condition.
VCC
R128 1K
VREF5V 9
5VSB
SPS2
8.2K R414
4
PR
CL
15
SPS3
8
U32A
5
Q
6
Q
74HC112
JK_CLR
R288
8.2K
RTC_BAT
R286 10K
10K R387
10
16
VCC
11
J
13
CLK
12
K
8
GND
14
RSMRST#
INTEL CORPORATION PL A TFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
82371EB (PART II)
Size Document Number Rev Custom
Date: Sheet of
Intel(R) 440BX AGPset
B_SUSC 32
WOLLID 32
POWER-ON 32
2
18 40Thursday, April 09, 1998
5VSB
10K R415
3
1
Q5 2N7002
1.0
A
y
]
B
C
D
E
IOAPIC
4 4
U34
2
PCLKAPIC7 APICCLK7
CRESET33 APICCS#18,34
APICACK#18 WSC#9 MEMR#17,24,27,35 MEMW#17, 24,27,35
SA017,20,24,27,35,39 SA117,20,24,27,35,39
3 3
VCC
1
2 2
PU
4.7K
RP1
18 ,20,24,35
2
R1
3
R2
4
R3
5
R4
6
R5
7
R6
8
R7
9
R8
10
R9
CR S T_STBY33
IRQ#818,35
SA41 7 , 20,24,27,35
PX 4_INTR1 8 ,33,34 IRQ[7:1 IRQ018
IRQ918,20,24,35
IRQ1018 , 20,24,35
IRQ1118 , 20,24,35
IRQ1218 , 20,24,35
IRQ1418, 20,24,25,35
IRQ1518,20,24,25,35
PIRQ#A18, 21,22,23,34
PIRQ#B18 ,21,22,23,34
PIRQ#C18, 22,23,34
PIRQ#D18, 22,23,34
IRQ9OUT18
PX4_SMI#18,34
PU_I13PU_I13 PU_TSTIN
3VSB
1
14
2 3
7
U13A
74LVC125
IRQ1 IRQ3
IRQ4 IRQ5 IRQ6 IRQ7
APC_I8
PU_I21 PU_I22
APC_I8
62 60
61 10
8 12 11
13 14 15
17 34 35 25 26 27 28 29 31 30 24 23 22 16 18 21
37 38 39 40 41 42 43 44
3
CLK APICCLK
RESET CS-
APICACK1­APICACK2­RD­WR-
A0 A1 D/I-
INTIN0 INTIN1 INTIN2 INTIN3 INTIN4 INTIN5 INTIN6 INTIN7 INTIN8 INTIN9 INTIN10 INTIN11 INTIN12 INTIN13 INTIN14 INTIN15
INTIN16 INTIN17 INTIN18 INTIN19 INTIN20 INTIN21 INTIN22 INTIN23
TESTIN-
82093AA
82093AA
VCC
51
VCC19VCC
VCC PINS :
19, 51, 64
GND PINS :
1, 33, 52
GND
GND
1
33
64
52
VCC
GND
APICREQ-
SMIOUT-
NC NC NC NC NC NC NC NC NC NC
APICD0 APICD1
D0 D1 D2 D3 D4 D5 D6 D7
9 6 7
20 32
PX4_SMI# 36 45 46 47 48 49 63
4 5
59 58 57 56 55 54 53 50
JP19 SMI SOURCE 1 - 2 3 - 4
XD0 XD1 XD2 XD3 XD4 XD5 XD6 XD7
1 3
APICREQ# 18,34 APC_SMI# 34
JP18
2
APIC SMI PIIX4 SMI
PIC D0 3,5,34 PIC D1 3,5,34
XD[7:0]20 ,27,39
HSMI# 3,5
**NOTE** JP18 is used for validation purposes and will not be necessary on production boards.
1 1
A
B
C
D
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
IOAPIC
Size Document Number Rev Custom
Thursda
Date: Sheet of
Intel(R) 440BX AGPset 1.0
, April 09, 1998
E
19 40
1
(
)
y
(
)
y
]
]
]
]
]
]
A A
18 ,24,35
18,24
VCC
18, 19,24,35
B B
17,19,24,27,35,39
C C
D D
19 ,27,39
R374 10K
SA[19:0
VCC
R133
8.2K
VCC
1 8 2 7 3 6 4 5
KBCLK#30 KB DAT#30 MSCLK#30 MSDAT#30
XD[7:0
XOE#18
XD IR#18
1
DRQ[7:0
DACK#[3:0
IRQ[7:0
IRQ918,19,24,35 IRQ1018 , 19,24,35 IRQ1118 , 19,24,35 IRQ1218 , 19,24,35 IRQ1418,19,24,25,35 IRQ1518,19,24,25,35
RP2
4.7K
2
17,24,35
TC18,24
2
OSC37 IOR#17,24,35,39 IOW#1 7 ,24,35,39
AEN17,24
RSTDRV17,32 IOCHRDY17,24,35 SD[15:0
Stuff for 93XFR
VCC
R405 0
TP10 TP11 TP12 TP14 TP16
TP17 TP19
TP21
3
3
4
U14
121
VBAT
122
XTAL1
124
XTAL2
22
14C LOCKI
68
IOR#
69
IOW#
70
AEN
80
RSTDRV
90
IOCHRDY
R406
1K
111 112 113 114 115 116 117 118
119 120
72 73 74 75 76 77 78 79
89 82
84 86 88
81 83 85 87
67 66 65 64 63 62 61 59 58 57 56 55 54
41 42 43 44 45 46 47 48 49 50 51 52 53 27 28 29
26 23 24 25 30 31
34 33 32
92 91 94 93
SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7
TC DRQ0
DRQ1 DRQ2 DRQ3
DACK0 DACK1 DACK2 DACK3
IRQ1 IRQ3
FDC37C932FR
IRQ4 IRQ5
160 PIN QFP
IRQ6 IRQ7 IRQ8# IRQ9 IRQ10 IRQ11 IRQ12 IRQ14 IRQ15
SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA1 2/CS SA13/HDCS2# SA14/HDCS3# SA15/IDE2_IRQ
IDE1_IRQ IDE1_OE# HDCS0# HDCS1# IOROP# IOWOP#
IDE_A0 IDE_A1 IDE_A2
KCLK KDAT MSCLK MSDAT
RD0 RD1 RD2 RD3 RD4 RD5 RD6 RD7
ROMCS# RO M DIR#
FDC37C932FR_1.3
SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7
DRQ0 DRQ1 DRQ2 TP090 DRQ3
DACK#0 DACK#1 DACK#2 DACK#3
IRQ1 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 B_IRQ#8 IRQ9 IRQ10 IRQ11 IRQ12 IRQ14 IRQ15
SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15
SIO _PU2
1
TP080
1
TP081
1
TP082 TP092
1
TP083 TP091
1
TP084
1
TP079 TP073
1
TP078 TP072
1
TP085 TP087
XD0 XD1 XD2 XD3 XD4 XD5 XD6 XD7
Stuff for 93XFR
VCC21VCC60VCC
101
125
1
139
VCC
5
VCC
14CLK01 14CLK02
VCC
14CLK03
WDATA# WGATE#
DSKCHG#
DRVSEL0# DRVSEL1#
DRVDEN0 DRVDEN1
GP10/IRQIN GP11/IRQIN
GP12/IRRX
GP13/IRTX
GP14/RS
GP15/WS
GP16/JOYRS
GP17/JSWS
GP20/IDE2_OE
GP21/EEDIN GP22/EDOUT GP23/EECLK
GP24/EEEN
GP25/8042_P21
VSS
VSS
VSS95VSS71VSS40VSS8VSS
130
123
16CLK 24CLK
INDEX#
STEP#
TRK0#
WPT#
RDATA#
SIDE1#
MTR0# MTR1#
MEDID0 MEDID1
SLIN#
AFD# STB#
BUSY
ACK#
ERR#
RXD1
TXD1 RTS1# CTS1# DTR1#
DSR1#
DCD1#
RXD2
TXD2 RTS2# CTS2# DTR2#
DSR2#
DCD2#
ULTRA I/O
4
5
DIR#
PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7
INIT#
PE
SLCT
RI1#
RI2#
37 38 39
36 35
14 9 10 11 12 15 16 17 13 18 4 7 6 5 2 3 20 19
138 137 136 135 134 133 132 131
140 141 143 144 128 129 127 126 142
145 146 148 149 150 147 152 151
155 156 158 159 160 157 154 153
96 97 98 99 100 102 103
104 105 106 107 108 109 110
TP076 TP077
TP088
IRR4_MODE
PDR0 PDR1 PDR2 PDR3 PDR4 PDR5 PDR6 PDR7
IRRX IRTX
TP075 R_GP21
TP071 TP070 TP069
6
1
TP6
1
TP7
1
TP8
INDEX# 29 DIR# 29 STEP# 29 W D ATA# 29 WGATE# 29 TRK0# 29 WPT# 29 RDATA# 29 SIDE1# 29 DSKCHG# 29 MOTEA# 29 MOTEB# 29 DRVSA# 29 DRVSB# 29 REDWC# 29 DR ATE0 29
PDR[7:0]28
SLIN#R 28 INIT#R 28 AFD#R 28 STB#R 28 BUSY 28 ACK# 28 PE 28 SLCT 28 ERR# 28
RX0 29 TX0 29
CTS0# 29 DTR0# 29 DSR0# 29 RLSD0# 29 RI0# 29
RX1 29 TX1 29 RTS1# 29 CTS1# 29 DTR1# 29 DSR1# 29 RLSD1# 29 RI1# 29
1
TP13
1
TP15
1
TP18
1
TP20
1
TP22
1
TP23
KBRST# 18,34
1
TP24
1
TP25
1
TP26
A20GATE 18,34
R134
8.2K
6
VCC
INTEL CORPORATION
PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
I/O CONTROLLER
Size Document Number Rev Custom
Date: Sheet of
7
R401
1K
R402
1K
Stuff for 93X onl
TP9
Stuff for 93XFR
R403
0
1
Config Port Address
R404
10K
R132
1K
C21
0.1 uF
ULTRA I/O
VCC
C18
47 0pF
C20
470pF
RTS0# 29
VCC
KEY
C22
0.1 uF
20 40Thursda
370h I/O Decode
3F0h I/O Decode
DEFAULT
C19
470pF
Intel(R) 440BX AGPset 1.0
, April 09, 1998
7
8
JP19
6 5 4 3 2 1
INFRARED HDR
8
A
B
C
D
E
AGP CONNECTOR
VCC3
SBA[7:0]9
U15C
74AS07
ST[2:0]9
AGP_OC#26
VCC3
R136
4.7K
USBAGP+26
56
PIRQ3#B GCLKOUT9 GREQ#9,34
ST0
RBF#9,34
ST2
SBA0
SBSTB9,34
SBA2
SBA4 SBA6
J8
VCC
B1
OVRCNT#
B2
5V
B3
5V
B4
USB+
B5
GND
B6
INTB#
B7
CLK
B8
REQ#
B9
VCC3.3
B10
ST0
B11
ST2
B12
RBF#
B13
GND
B14
SPARE
B15
SBA0
B16
VCC3.3
B17
SBA2
B18
SB_STB
B19
GND
B20
SBA4
B21
SBA6
SPARE
RESERVED
VCC3.3
RESERVED
PIPE#
SPARE
VCC3.3
RESERVED
4 4
PIRQ#B18,19,22,23,34
3 3
USB­GND
INTA#
RST#
GNT#
GND
SBA1
SBA3
GND SBA5 SBA7
VCC3
ST1
SBA1
SBA3
SBA5 SBA7
VCC3
R135
4.7K
PIRQ3#A
USBAGP- 26
3 4
74AS07
U15B PCIRST# 8,17,22,23 GGNT# 9,34
PIPE# 9,34
PIRQ#A 18,19,22,23,34
+12V
A1
12V
A2 A3 A4 A5 A6 A7 A8 A9 A10
ST1
A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21
GAD31 GAD29
GAD27 GAD25
ADSTB-B9,34
2 2
GIRDY#9,34
GAD23
GAD21 GAD19
GAD17
GC/BE#2
GDEVSEL#9,34
GPERR#34
GSERR#34
ADSTB-A9,34
1 1
GC/BE#1
GAD14 GAD12
GAD10 GAD8
GAD7
GAD5 GAD3
GAD1
B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B50 B51 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 B63 B64 B65 B66
AD31 AD29 VCC3.3 AD27 AD25 GND AD_STB1 AD23 Vddq3.3 AD21 AD19 GND AD17 C/BE2# Vddq3.3 IRDY# SPARE GND SPARE VCC3.3 DEVSEL# Vddq3.3 PERR# GND SERR# C/BE1# Vddq3.3 AD14 AD12 GND AD10 AD8 Vddq3.3 AD_STB0 AD7 GND AD5 AD3 Vddq3.3 AD1 RESERVED
AGP_CONN_1.3
GAD[31:0]9
GC/BE#[3:0]
A
B
C
AD30 AD28
VCC3.3
AD26 AD24 GND
RESERVED
GC/BE3#
Vddq3.3
AD22 AD20 GND AD18
AD16 Vddq3.3 FRAME#
SPARE
GND
SPARE
VCC3.3
TRDY# STOP#
PME#
GND
PAR
AD15 Vddq3.3
AD13
AD11
GND
AD9
C/BE0#
Vddq3.3
RESERVED
AD6
GND
AD4 AD2
Vddq3.3
AD0
RESERVED
A26
GAD30
A27
GAD28 A28 A29
GAD26 A30
GAD24 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A63 A64 A65 A66
GC/BE#3
GAD22
GAD20
GAD18
GAD16
GAD15
GAD13
GAD11
GAD9
GC/BE#0
GAD6
GAD4
GAD2
GAD0
GFRAME# 9,34
GTRDY# 9,34 GSTOP# 9,34 AGP_PME# 18,34
GPAR 9,34
D
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
ACCELERATED GRAPHICS PORT (AGP) CONNECTOR
Size Docu me nt Number Rev Custom
Date: Sheet of
Intel(R) 440BX AGPset
E
21 40Thursday, April 09, 1998
1.0
1
2
3
4
5
6
7
8
PCI CONNECTORS
VCC3
VCC-12V
A A
PTCK23
PIRQ#B18,19,21,23,34 PIRQ#D18,19,23,34
PREQ#09,17,34
B B
IRDY#9,17,23,34
DEVSEL#9,17,23,34
PLOCK#9,23,34
PERR#23,34
SERR#9,17,23,34
C C
PRSNT#11 PRSNT#21 PRSNT#12 PRSNT#22
AD31 AD30 AD31 AD30 AD29 AD29
AD27 AD26 AD27 AD26 AD25 AD25
C/BE#3 R_AD26 C/BE#3 R_AD27
AD23 AD23AD22 AD22 AD21 AD20 AD21 AD20 AD19 AD19
AD17 AD16 AD17 AD16
C/BE#2 C/BE#2
C/BE#1 AD15 C/BE#1 AD15
AD14 AD14AD13 AD13 AD12 AD11 AD12 AD11 AD10 AD10
AD8 C/BE#0 AD8 C/BE#0 AD7 AD7
AD5 AD4 AD5 AD4 AD3 AD3
AD1 AD0 AD1 AD0
PU1_REQ64# PU1_ACK64# PU2_REQ64# PU2_ACK64#
B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49
B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62
B1 B2 B3 B4 B5 B6 B7 B8 B9
J9
-12V TCK GND TDO +5V +5V INTB# INTD# PRSNT1# RSV PRSNT2# GND GND RSV GND CLK GND REQ# +5V AD(31) AD(29) GND AD(27) AD(25) +3.3V C/BE#3) AD(23) GND AD(21) AD(19) +3.3V AD(17) C/BE#(2) GND IRDY# +3.3V DEVSEL# GND LOCK# PERR# +3.3V SERR# +3.3V C/BE#(1) AD(14) GND AD(12) AD(10) GND
AD(8) AD(7) +3.3V AD(5) AD(3) GND AD(1) +5V ACK64# +5V +5V
PCI_CONN
TRST#
+12V
INTA# INTC#
RESET#
GNT#
PME#
AD(30)
+3.3V AD(28) AD(26)
AD(24)
IDSEL
+3.3V AD(22) AD(20)
AD(18) AD(16)
+3.3V
FRAME#
TRDY#
STOP#
+3.3V
SDONE
SBO#
AD(15)
+3.3V AD(13) AD(11)
AD(09)
C/BE#(0)
+3.3V AD(06) AD(04)
AD(02) AD(00)
REQ64#
TMS
+5V
+5V
RSV
+5V RSV GND GND RSV
+5V GND
GND
GND
GND GND
GND PAR
GND
GND
+5V
+5V
+5V
VCC3
VCC
+12V
A1 A2 A3 A4
TDI
A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49
A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62
AD28 AD28
AD24 AD24
AD18 AD18
AD9 AD9
AD6 AD6
AD2
1 AND 2
PTRST# 23 PTMS 23
PTDI 23 PIRQ#A 18,19,21,23,34
PIRQ#C 18,19,23,34
PCIRST# 8,17,21,23
PCI_PME#
FRAME# 9,17,23,34 TRDY# 9,17,23,34 STOP# 9,17,23,34
SDONE_P1 SBO_P1
PAR 9,17,23
PTCK
R139
5.6K
PCLK27PCLK17
PREQ#19,17,34
VCC3
VCC
-12V
J10
B1
-12V
B2
TCK
B3
GND
B4
TDO
B5
+5V
B6
+5V
B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49
B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62
B7 B8 B9
INTB# INTD# PRSNT1# RSV PRSNT2# GND GND RSV GND CLK GND REQ# +5V AD(31) AD(29) GND AD(27) AD(25) +3.3V C/BE#3) AD(23) GND AD(21) AD(19) +3.3V AD(17) C/BE#(2) GND IRDY# +3.3V DEVSEL# GND LOCK# PERR# +3.3V SERR# +3.3V C/BE#(1) AD(14) GND AD(12) AD(10) GND
AD(8) AD(7) +3.3V AD(5) AD(3) GND AD(1) +5V ACK64# +5V +5V
PCI_CONN
PIRQ#C PIRQ#D PIRQ#A
IRDY# DEVSEL# PLOCK#
PERR# SERR#
TRST#
+12V
TMS
INTA# INTC#
RSV RSV
GND GND RSV
RESET#
GNT#
GND
PME#
AD(30)
+3.3V AD(28) AD(26)
GND
AD(24)
IDSEL
+3.3V AD(22) AD(20)
GND AD(18) AD(16)
+3.3V
FRAME#
GND TRDY#
GND STOP#
+3.3V
SDONE
SBO#
GND
PAR AD(15)
+3.3V AD(13) AD(11)
GND
AD(09)
KEYKEY
C/BE#(0)
+3.3V AD(06) AD(04)
GND AD(02) AD(00)
REQ64#
+5V
+5V +5V
+5V
+5V +5V
+5V
VCC3
+12V
VCC
A1 A2 A3 A4
TDI
A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49
A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62
PTRST# PTMS
PTDI
PIRQ#B
PCIRST#
FRAME# TRDY# STOP#
PAR
AD2
VCC VCC
R137
5.6K
R140
5.6K
PGNT#1 9,34PGNT#0 9,34 PCI_PME# 18,23,34
SDONE_P2 SBO_P2
R138
5.6K
C/BE#[3:0]9,17,23
AD[31:0]9,17,23
PRSNT#11
SDONE_P1 SDONE_P2 SBO_P1 SBO_P2
D D
1
RP3
1 8 2 7 3 6 4 5
5.6K
2
VCC
PRSNT#12 PU1_ACK64#
PRSNT#21
PRSNT#22
3
C23
0.1 uF C24
0.1 uF C25
0.1 uF C26
0.1 uF
4
PU1_REQ64#
PU2_ACK64#
PU2_REQ64#
5
R142
2.7KR144
2.7K R145
2.7KR146
2.7K
VCC
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
PCI CONNECTORS 1 & 2
Size Document Number Rev Custom
6
Date: Sheet of
7
R141
100 R143
100
R_AD26
R_AD27
22 40Thursday, April 09, 1998
8
AD26
AD27
Intel(R) 440BX AGPset 1.0
1
2
3
4
5
6
7
8
VCC3
VCC
-12V
A A
PTCK22
PIRQ#B18,19,21,22,34
PCLK37 PCLK47
PREQ#29,17,34 PREQ#39,17,34
B B
IRDY#9,17,22,34
DEVSEL#9,17,22,34
PLOCK#9,22,34
PERR#22,34
SERR#9,17,22,34
C C
PRSNT#31 PRSNT#41 PRSNT#32 PRSNT#42
AD31 AD30 AD31 AD30 AD29 AD29
AD27 AD26 AD27 AD26 AD25 AD25
C/BE#3 R_AD29 C/BE#3 R_AD31
AD23 AD23AD22 AD22 AD21 AD20 AD21 AD20 AD19 AD19
AD17 AD16 AD17 AD16
C/BE#2 C/BE#2
C/BE#1 AD15 C/BE#1 AD15
AD14 AD14AD13 AD13 AD12 AD11 AD12 AD11 AD10 AD10
AD8 C/BE#0 AD8 C/BE#0 AD7 AD7
AD5 AD4 AD5 AD4 AD3 AD3
AD1 AD0 AD1 AD0
PU3_REQ64# PU3_ACK64# PU4_REQ64# PU4_ACK64#
B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49
B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62
B1 B2 B3 B4 B5 B6 B7 B8 B9
J11
-12V TCK GND TDO +5V +5V INTB# INTD# PRSNT1# RSV PRSNT2# GND GND RSV GND CLK GND REQ# +5V AD(31) AD(29) GND AD(27) AD(25) +3.3V C/BE#3) AD(23) GND AD(21) AD(19) +3.3V AD(17) C/BE#(2) GND IRDY# +3.3V DEVSEL# GND LOCK# PERR# +3.3V SERR# +3.3V C/BE#(1) AD(14) GND AD(12) AD(10) GND
AD(8) AD(7) +3.3V AD(5) AD(3) GND AD(1) +5V ACK64# +5V +5V
PCI_CONN
TRST#
+12V TMS
INTA# INTC#
GND GND
RESET#
GNT#
GND
PME#
AD(30)
+3.3V AD(28) AD(26)
GND
AD(24)
IDSEL
+3.3V AD(22) AD(20)
GND AD(18) AD(16)
+3.3V
FRAME#
GND TRDY#
GND STOP#
+3.3V
SDONE
SBO#
GND AD(15)
+3.3V AD(13) AD(11)
GND
AD(09)
C/BE#(0)
+3.3V AD(06) AD(04)
GND AD(02) AD(00)
REQ64#
+5V
+5V RSV +5V RSV
RSV +5V
PAR
+5V +5V
+5V
VCC3
+12V
VCC
A1 A2 A3 A4
TDI
A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49
A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62
PCI CONNECTORS
3 AND 4
PTRST# 22 PTMS 22
PTDI 2 2 PIRQ#C 18,19,22,34
PIRQ#A 18,19,21,22,34PIRQ#D18,19,22,34
PCIRST# 8,17,21,22
PCI_PME#
AD28 AD28
AD24 AD24
AD18 AD18
FRAME# 9,17,22,34 TRDY# 9,17,22,34 STOP# 9,17,22,34
SDONE_P3 SBO_P3
PAR 9,17,22
AD9 AD9
AD6 AD6
AD2 AD2
VCC3
VCC
-12V
J12
B1
-12V
B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49
B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62
B2 B3 B4 B5 B6 B7 B8 B9
TCK GND TDO +5V +5V INTB# INTD# PRSNT1# RSV PRSNT2# GND GND RSV GND CLK GND REQ# +5V AD(31) AD(29) GND AD(27) AD(25) +3.3V C/BE#3) AD(23) GND AD(21) AD(19) +3.3V AD(17) C/BE#(2) GND IRDY# +3.3V DEVSEL# GND LOCK# PERR# +3.3V SERR# +3.3V C/BE#(1) AD(14) GND AD(12) AD(10) GND
AD(8) AD(7) +3.3V AD(5) AD(3) GND AD(1) +5V ACK64# +5V +5V
PCI_CONN
PTCK
PIRQ#A PIRQ#B PIRQ#C
IRDY# DEVSEL# PLOCK#
PERR# SERR#
TRST#
+12V TMS
INTA# INTC#
GND GND
RESET#
GNT#
GND
PME#
AD(30)
+3.3V AD(28) AD(26)
GND
AD(24)
IDSEL
+3.3V AD(22) AD(20)
GND AD(18) AD(16)
+3.3V
FRAME#
GND TRDY#
GND
STOP#
+3.3V
SDONE
SBO#
GND AD(15)
+3.3V AD(13) AD(11)
GND
AD(09)
KEYKEY
C/BE#(0)
+3.3V AD(06) AD(04)
GND AD(02) AD(00)
REQ64#
+5V
+5V RSV +5V RSV
RSV +5V
PAR
+5V +5V
+5V
VCC3
+12V
VCC
A1 A2 A3 A4
TDI
A5 A6
PIRQ#D A7 A8 A9 A10 A11 A12 A13 A14 A15
PCIRST# A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34
FRAME# A35 A36
TRDY# A37 A38
STOP# A39 A40 A41 A42 A43
PAR A44 A45 A46 A47 A48 A49
A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62
PTRST#
PTMS PTDI
PGNT#3 9,34PGNT#2 9,34 PCI_PME# 18,22,34
SDONE_P4 SBO_P4
C/BE#[3:0]9,17,22
AD[31:0]9,17,22
PRSNT#31
SDONE_P3 SDONE_P4 SBO_P3
D D
SBO_P4
1
RP4
1 8 2 7 3 6 4 5
5.6K
VCC
2
PRSNT#32 PU3_ACK64#
PRSNT#41
PRSNT#42
3
C27
0.1 uF C28
0.1 uF C29
0.1 uF C30
0.1 uF
VCC
R148
PU3_REQ64#
PU4_ACK64#
PU4_REQ64#
4
5
2.7KR149
2.7K R151
2.7KR152
2.7K
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
Size Document Number Rev Custom
6
Date: Sheet of
AD29
AD31
PCI CONNECTORS 3 & 4
7
R147
100 R150
100
Intel(R) 440BX AGPset
R_AD29
R_AD31
23 40Thursday, April 09, 1998
8
1.0
1
A A
2
VCC
R153
1K
VCC
R154 1K
3
4
5
6
7
8
ISA SLOTS 0 & 1
VCC
VCC
J13
B1
GND
BRSTDRV32
-5V
-12V
+12V
B B
C C
IRQ918,19,20,35
DRQ218,20,35
ZEROWS#17,35
SMEMW#17
SMEMR#17
IOW#17,20,35,39
IOR#17,20,35,39
DACK#318,20
DRQ318,20,35
DACK#118,20
DRQ118,20,35
REFRESH#17,35
SYSCLK17,39
IRQ718,19,20,35 IRQ618,19,20,35 IRQ518,19,20,35 IRQ418,19,20,35 IRQ318,19,20,35
DACK#218,20
TC18,20
BALE17
OSC17
MEMCS16#17,35
IOCS16#17,35
IRQ1018,19,20,35 IRQ1118,19,20,35 IRQ1218,19,20,35 IRQ1518,19,20,25,35 IRQ1418,19,20,25,35
DACK#018,20
DRQ018,20,35
DACK#518
DRQ518,35
DACK#618
DRQ618,35
DACK#718
DRQ718,35
RMASTER#35
C31
47pF
B2 B3 B4 B5 B6 B7 B8
B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10 D11 D12 D13 D14 D15 D16 D17 D18
CON_ISA16C
BRSTDRV VCC IRQ9
-5V DREQ2
-12V ZEROWS# +12V GND SMEMW# SMEMR# IOW# IOR# DACK3# DREQ3# DACK1# DREQ1 REFRESH# SYSCLK IRQ7 IRQ6 IRQ5 IRQ4 IRQ3 DACK2# TC BALE VCC OSC GND
MEMCS16# IOCS16# IRQ10 IRQ11 IRQ12 IRQ15 IRQ14 DACK0# DREQ0 DACK5# DREQ5 DACK6# DREQ6 DACK7# DREQ7 VCC MASTER# GND
ISA 0
IOCHK#
SD7 SD6 SD5 SD4 SD3 SD2 SD1 SD0
IOCHRDY
AEN SA19 SA18 SA17 SA16 SA15 SA14 SA13 SA12 SA11 SA10
SA9 SA8 SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0
SBHE#
LA23 LA22 LA21 LA20 LA19 LA18 LA17
MEMR#
MEMW#
SD8
SD9 SD10 SD11 SD12 SD13 SD14 SD15
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31
C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18
IOCHK# 17,35 SD7 17,20,35 SD6 17,20,35 SD5 17,20,35 SD4 17,20,35 SD3 17,20,35 SD2 17,20,35 SD1 17,20,35 SD0 17,20,35 IOCHRDY 17,20,35 AEN 17,20 SA19 17,27,35 SA18 17,27,35 SA17 17,27,35 SA16 17,27,35 SA15 17,20,27,35 SA14 17,20,27,35 SA13 17,20,27,35 SA12 17,20,27,35 SA11 17,20,27,35 SA10 17,20,27,35 SA9 17,20,27,35 SA8 17,20,27,35 SA7 17,20,27,35 SA6 17,20,27,35 SA5 17,20,27,35 SA4 17,19,20,27,35 SA3 17,20,27,35 SA2 17,20,27,35,39 SA1 17,19,20,27,35,39 SA0 17,19,20,27,35,39
SBHE# 17 LA23 17,35 LA22 17,35 LA21 17,35 LA20 17,35 LA19 17,35 LA18 17,35 LA17 17,35 MEMR# 17,19,27,35 MEMW# 17,19,27,35 SD8 17,35 SD9 17,35 SD10 17,35 SD11 17,35 SD12 17,35 SD13 17,35 SD14 17,35 SD15 17,35
BRSTDRV SD7
-5V
IRQ9 SD5
-12V
+12V
NS1 TBD
**NOTE** DEFAULT NO STUFF. THIS CAP USED TO FILTER NOISE ON TC SIGNAL
DRQ2 SD3 ZEROWS# SD1
SMEMW# AEN SMEMR# SA19 IOW# SA18 IOR# SA17 DACK#3 SA16 DRQ3 SA15 DACK#1 SA14 DRQ1 SA13 REFRESH# SA12 SYSCLK SA11 IRQ7 SA10 IRQ6 SA9 IRQ5 SA8 IRQ4 SA7 IRQ3 SA6 DACK#2 SA5 TC SA4 BALE SA3
OSC1 SA1
MEMCS16# SBHE# IOCS16# LA23 IRQ10 LA22 IRQ11 LA21 IRQ12 LA20 IRQ15 LA19 IRQ14 LA18 DACK#0 LA17 DRQ0 MEMR# DACK#5 MEMW# DRQ5 SD8 DACK#6 SD9 DRQ6 SD10 DACK#7 SD11 DRQ7 SD12
RMASTER# SD14
B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31
D10 D11 D12 D13 D14 D15 D16 D17 D18
B1 B2 B3 B4 B5 B6 B7 B8 B9
D1 D2 D3 D4 D5 D6 D7 D8 D9
J14
GND BRSTDRV VCC IRQ9
-5V DREQ2
-12V ZEROWS# +12V GND SMEMW# SMEMR# IOW# IOR# DACK3# DREQ3# DACK1# DREQ1 REFRESH# SYSCLK IRQ7 IRQ6 IRQ5 IRQ4 IRQ3 DACK2# TC BALE VCC OSC GND
MEMCS16# IOCS16# IRQ10 IRQ11 IRQ12 IRQ15 IRQ14 DACK0# DREQ0 DACK5# DREQ5 DACK6# DREQ6 DACK7# DREQ7 VCC MASTER# GND
CON_ISA16C
ISA 1
IOCHK#
SD7 SD6 SD5 SD4 SD3 SD2 SD1 SD0
IOCHRDY
AEN SA19 SA18 SA17 SA16 SA15 SA14 SA13 SA12 SA11 SA10
SA9
SA8
SA7
SA6
SA5
SA4
SA3
SA2
SA1
SA0
SBHE#
LA23 LA22 LA21 LA20 LA19 LA18 LA17
MEMR#
MEMW#
SD8
SD9 SD10 SD11 SD12 SD13 SD14 SD15
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31
C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18
IOCHK# SD6 SD4 SD2 SD0
IOCHRDY
SA2 SA0
SD13 SD15
C32
47pF
D D
1
2
3
4
5
6
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
ISA SLOTS
Size Document Number Rev Custom
Date: Sheet of
Intel(R) 440BX AGPset
7
24 40Thursday, April 09, 1998
8
1.0
1
A A
2
3
4
5
6
7
8
IDE CONNECTORS
SDD[15:0]17
PDD[15:0]17
R155
BRSTDRV#32
RP5
1 16
PDD7
2 15
PDD6
3 14
PDD5
4 13
B B
PDREQ17
PDIOW#17
PDIOR#17 PIORDY17
PDDACK#17
PDD4
5 12
PDD3
6 11
PDD2
7 10
PDD1
8 9
PDD0
VCC VCC
R157
1K
33
R159
33
33
1 8 2 7 3 6
PDA1 R_PDA1
4 5
PDA0 R_PDA0
PCS1#17
IDEACTP#32 IDEACTS#32
C C
PDA[2:0]17 SDA[2:0]17
IRQ1418,19,20,24,35
R173
5.6K
R_BRSTDRV#1
33
DD7#1DD7#1 DD8#1 DD7#2DD7#2 DD6#1DD6#1 DD9#1 DD6#2DD6#2 DD5#1DD5#1 DD10#1 DD5#2DD5#2
DD4#1 DD11#1 DD4#2
DD3#1DD3#1 DD12#1 DD3#2DD3#2 DD2#1DD2#1 DD13#1 DD2#2DD2#2
R390 10K
R_PDDREQ#
RP9
33
R169
33
DD1#1DD1#1 DD14#1 DD1#2DD1#2 DD0#1DD0#1 DD15#1 DD0#2DD0#2
R161
R_PDIOW# R_SDIOW#
33R163
R_PDIOR# R_SDIOR#
R375 47
RPDACK# RSDACK#
R_PCS1# R_PCS3# R_SCS1# R_SCS3#
R377
47
J15 1 3 5 7 9
11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
PRIMARY IDE CONN.
2
BRSTDRV# 4 6 8 10 12 14 16
RP6 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9
33
PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15
18 20 22 24 26 28
PRI_PD1 SEC_PD1 30 32 34 36
R_PDA2 38 40
R165 470
R167
33
R170
33
PDA2
SDREQ17
SDIOW#17
SDIOR#17
SIORDY17
SDDACK#17
PCS3# 17
SCS1#17
IRQ1518,19,20,24,35
SDD7 SDD6 SDD5 SDD4 SDD3 SDD2 SDD1 SDD0
1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9
R158 1K
SDA1 SDA0
R174
5.6K
RP7
33
33
R160
33
1 8 2 7 3 6 4 5
R391 10K
RP10
33
R171
33
R378
47
R162 33R164
R156
33
R376 47
R_BRSTDRV#2
R_SDDREQ#
R_SDA1 R_SDA0
RIRQ15
J16 1 3 5 7 9
11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
SECONDARY IDE CONN.
2 4
DD8#2
6
DD9#2
8
DD10#2
10
DD11#2
12
DD12#2
14
DD13#2
16
DD14#2
18
DD15#2
RP8 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9
33
SDD8 SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15
20 22 24 26 28 30 32 34 36
R_SDA2 38 40
R166 470
R168
33
R172
33
SDA2
SCS3# 17
D D
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
PCI IDE CONNECTORS
Size Document Number Rev Custom
1
2
3
4
5
6
Date: Sheet of
Intel(R) 440BX AGPset
7
25 40Thursday, April 09, 1998
8
1.0
(
)
(
)
y
VCC
A
F1
1.5-2.0A
USB_PWR0
R175
470K
B
C
D
E
OC#018
4 4
VCC
OC#118
3 3
AGP_OC#21
USBP0-18 USBP0+18
USBP1-18
2 2
USBP1+18
VCC3
R380 330K
**NOTE: PLACE R123-126 AND C8-11 AS CLOSE AS
F2
1.5-2.0A
R290 0
C11
47pF
C33
0.001uF
R289
0
R176
560K
USB_PWR1
C37
0.001uF
DO NOT STUFF
R126 27
R125 27
C10
47pFC947pFC847pF
R124 27
R177
470K
R178 560K
R123 27
C38 68 uF
C34
68 uF
R181 15K
TANTALUM
POSSIBLE TO THE PIIX4.
1 1
A
B
BLM31A700S L1
+
TANTALUM
BLM31A700S L4
21
+
R182
R183
15K
15K
21
C39
0.1 uF
R184
15K
C35
0.1 uF
C
R179 0
R180 0
R_USBD1+
R_USBD1-
USB CONNECTORS
J17
USBV0 USBD0­USBD0+ USBG0
C36
470 pF
USBV1 USBD1­USBD1+ USBG1
C40
470 pF
R185 0
DO NOT STUFF
R186 0
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
USB HEADER
Size Document Number Rev Custom
D
, April 09, 1998
Date: Sheet of
1
VCC
2
DATA-
3
DATA+
4
GND
21
21
USB_CON_0.0
L3
BLM31A700S
J18
1
VCC
2
DATA-
3
DATA+
4
GND
USB_CON_0.0
L6
BLM31A700S
NOTE:
Intel(R) 440BX AGPset
5
UGND0
5
6
6
5
UGND1
5
6
6
USBAGP+ 21
USBAGP- 21
USE PIIX4 APPLICATION NOTE FOR LAYOUT GUIDELINES
21
BLM31A700S
21
BLM31A700S
26 40Thursda
E
L2
L5
1.0
1
A A
2
3
4
5
6
7
8
STUFFING OPTION
VCC
JP21
SYSTEM ROM
MODE
U16A
1 2
74HCT14
B B
MODE
Prog Boot Block
PROG DEV
(incl. boot block)
PnP
Write Protect
PWRGOOD3,5,32
MEMW#17,19,24,35
MEMR#17,19,24,35
C C
JP22
1-2
1-2 2-3
2-3
R_RP#
B_SA17
SA17
JP23
2-3 1-2 1-2 2-3
1 3
+12V
JP20
2
J_SA17
JP22
1
2
3
FL2MPU
C42
0.01 uF
NORMAL
RECOVERY
FLASH SOCKET
SA17 SA16 SA15 SA14 SA13 SA12 SA11 SA10 XD0 SA9 XD1 SA8 XD2 SA7 XD3 SA6 XD4 SA5 XD5 SA4 XD6 SA3 XD7 SA2 SA1 SA0
JP20
1-2 2-3
U17
40
A17
1
A16
2
A15
3
A14
4
A13
5
A12
6
A11
36
A10
7
A9
8
A8
14
A7
15
A6
16
A5
17
A4
18
A3
19
A2
20
A1
21
A0
9
WE#
24
OE#
22
CE#
10
RP# E28F002BC-T
DU
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
NC NC NC NC
VPP
12
25 26 27 28 32 33 34 35
13 29 37 38
11
TSOP SOCKET
C41
0.01 uF
FL_VPP
XD[7:0] 19,20,39SA[19:0]17,19,20,24,35,39
+12V
JP23
1
2
3
FL1MPU
SA19 SA16 SA15 SA12 SA14 SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0
XD0 XD1 XD2
* Header provided for BIOS emulation
12 34 56 78
910 1112 1314 1516 1718 1920 2122 2324 2526 2728 2930 3132 3334
Emulator Header
XD7 XD6 XD5 XD4 XD3
SA18 SA17
SA13 SA8 SA9 SA11
SA10
MEMW# BIOSCS#
BIOSCS#18
D D
1
2
3
4
5
6
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
SYSTEM ROM
Size Document Number Rev Custom
Date: Sheet of
Intel(R) 440BX AGPset
7
27 40Thursday, April 09, 1998
8
1.0
1
y
A A
2
3
4
C43
180pF
C45
180pF
5
C44
180pF
6
7
8
VCC
C46
D4 IN4148
C47
180pF
180pF
PAR5VOLTS
RP11
1K
RP13
1K
RP15 1 8 2 7 3 6 4 5
1K
RP17
1K
RP18 1 8 2 7 3 6 4 5
45 36 27 18
45 36 27 18
45 36 27 18
C49
180pF
C51
180pF
C53
180pF
C55
180pF
C57
180pF
PDR[7:0]20
B B
AFD#R20 STB#R20
INIT#R20
PDR0
RP12
33
45 36 27 18
PDR3
RP14
SLIN#R20
PDR2 PDR1
45 36 27 18
33
C C
PDR7 PDR6 PDR5 PDR4
RP16
45 36 27 18
33
ERR#20 SLCT20
PE20
BUSY20
ACK#20
1K
C48
180pF
C50
180pF
C52
180pF
C54
180pF
C56
180pF
C58
180pF
C59
180pF
PARALLEL HEADER
J19
AFD# ERR# INIT# SLIN#
STB# PD0 PD1 PD2 PD3 PD4 PD5 PD6
PD7 ACK# BUSY PE
SLCT
1
14
2
15
3
16
4
17
5
18
6
19
7
20
8
21
9 22 10 23 11 24 12 25 13
CONNECTOR DB25
D D
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
PARALLEL PORT
Size Document Number Rev Custom
1
2
3
4
5
6
Date: Sheet of
Intel(R) 440BX AGPset
, April 09, 1998
7
28 40Thursda
8
1.0
A
B
C
D
E
VCC+12V
U18 VCC+1VCC
-12V
-12V
RP19
1K
45 36 27 18
1
2
RA
3
RA
4
RA
5
DY
6
DY
7
RA
8
DY
9
RA
10
VCC­GD75232SOP
U19 VCC+1VCC
2
RA
3
RA
4
RA
5
DY
6
DY
7
RA
8
DY
9
RA
10
VCC­GD75232SOP
TP094
SP_DCD0 SP_RXD0 SP_DSR0
4 4
3 3
2 2
DSKCHG#20
SIDE1#20
RDATA#20
WPT#20
TRK0#20
W G ATE#20
WDATA#20
STEP#20
DIR#20
MOTEB#20
DRVSA#20
1 1
A
DRVSB#20 MOTEA#20
INDEX#20
DRATE020
REDWC#20
SP_DTR0 SP_TXD0 SP_CTS0 SP_RTS0 SP_RI0
SP_DCD1 SP_RXD1 SP_DSR1 SP_DTR1 SP_TXD1 SP_CTS1 SP_RTS1 SP_RI1
VCC
R189
1.0K
TP27
B
20 19
RY
18
RY
17
RY
16
DA
15
DA
14
RY
13
DA
12
RI0#
RY
11
GND
VCC+12V
20 19
RY
18
RY
17
RY
16
DA
15
DA
14
RY
13
DA
12
RI1#
RY
11
GND
FLOPPY INTERFACE HEADER
J22
3334 3132 2930 2728 2526 2324 2122 1920 1718 1516 1314 1112
910 78 56 34 12
RLSD0# 20 RX0 20 DSR0# 20 DTR0# 20 TX0 20 CTS0# 20 RTS0# 20 RI0# 20
RLSD1# 20 RX1 20 DSR1# 20 DTR1# 20 TX1 20 CTS1# 20 RTS1# 20 RI1# 20
C
**NOTE** Connected to GPI21 of the PIIX4 for BIOS detection of a floppy drive.
SP_DCD0 SP_RXD0 SP_TXD0 SP_DTR0
SP_DSR0 SP_RTS0 SP_CTS0 SP_RI0
SP_DCD1 SP_RXD1 SP_TXD1 SP_DTR1
SP_DSR1 SP_RTS1 SP_CTS1 SP_RI1
GPI21 18
100pF
C64 100pF
100pF
C72 100pF
C60
C68
D
C61
100pF
C62
C65 100pF
100pF
C73 100pF
Title
Size Document Number Rev Custom
Date: Sheet of
100pF
C66 100pF
C69
C70
100pF
C74 100pF
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
SERIAL AND FLOPPY
C63
100pF
C67 100pF
C71
100pF
C75 100pF
Intel(R) 440BX AGPset
J20 1
2 3
COM 0
4 5 6
HEADER
7 8 9
HEADER 9
J21 1
2 3 4 5
HEADER
6 7 8 9
HEADER 9
29 40Thursday, April 09, 1998
E
COM 1
1.0
1
y
2
3
4
5
6
7
8
VCC
A A
STUFFING OPTION
F3
1.25A
F4
1.35A
KB5V
21
L7
BLM31A700S
L8
B B
KBDAT#20
2 1
BLM31A700S
L9
KBCLK#20
2 1
KB DAT_FB#
KBCLK_FB#KBCLK_FB#
TP28
TP29
1
TP095
1
TP096
KBSIGNDKBSIGND
KB5V_FBKB5V_FB
BLM31A700S
L10
MSDAT#20
2 1
BLM31A700S
L11
MSCLK#20
2 1
MSDAT_FB#
MSCLK_FB#MSCLK_FB#
TP30
TP31
1
TP097
1
TP098
BLM31A700S
C76
C C
470pf
C77 470pF
C78 470pF
C79 470pF
C80
0.1 uF
KBSHGND
J23 1
2
KEYBOARD
3 4
CON NECTOR
5 6 7 8 9
J24 1
MO USE
2 3
CON NECTOR
4 5 6 7 8 9
L12
BLM31A700S
L13
BLM31A700S
2 1
2 1
D D
1
2
3
4
5
6
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
KEYBOARD/MOUSE INTERFACE
Size Document Number Rev Custom
Date: Sheet of
Intel(R) 440BX AGPset 1.0
, April 09, 1998
7
30 40Thursda
8
1
y
(
)
(
)
]
]
VID_A[4:0
4
A A
B B
VCCCORE1
+12V
VID_A0 VID_A2 VID_A4
2
A1 A2 A3 A4 A5 A6 A7 A8
A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20
J25
5Vin 5Vin 5Vin 12 Vin 12 Vin ISHARE VID0 VID2 VID4 VCCcore Vss VCCcore Vss VCCcore Vss VCCcore Vss VCCcore Vss VCCcore
VRM8_2.05
5Vin 5Vin 5Vin
12VIN
RES.
OUTEN
VID1 VID3
PWRGD
Vss
VCCcore
Vss
VCCcore
Vss
VCCcore
Vss
VCCcore
Vss
VCCcore
Vss
B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20
3
+12V
VCCVCC
ROE1 VID_A1 VID_A3
VCC3 VCC3
R190 10K
4
VID_B[4:0
6
R191 10K
VRM1_PGD 32
VCCCORE1
**NOTE** A VRM should not be installed if a processor is not installed unless VRMx_PGD is asserted by the VRM with a VID = 1111. If not asserted by the VRM, then circuitry must be provided to the block VRMx_PGD for the unpopulated Slot 1.
5
VCCCORE2
+12V
VID_B0 VID_B2 VID_B4
A1 A2 A3 A4 A5 A6 A7 A8
A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20
J26
5Vin 5Vin 5Vin 12 Vin 12 Vin ISHARE VID0 VID2 VID4 VCCcore Vss VCCcore Vss VCCcore Vss VCCcore Vss VCCcore Vss VCCcore
VRM8_2.05
6
B1
5Vin
B2
5Vin
B3
5Vin
B4
12VIN
B5
RES.
B6
OUTEN
B7
VID1
B8
VID3
B9
PWRGD
B10
Vss
B11
VCCcore
B12
Vss
B13
VCCcore
B14
Vss
B15
VCCcore
B16
Vss
B17
VCCcore
B18
Vss
B19
VCCcore
B20
Vss
+12V
VCCVCC
VCC3 VCC3
ROE1 VID_B1 VID_B3
7
R192 10K
R193
10K
VCCCORE2
8
VRM2_PGD 32
C C
VTT
VCC3 VTT
REGULATOR
VR2
3
VIN
C84
+ 22uF 16V 20%
Solid Tantalum
D D
1
LT1585A-1.5
**NOTE**
1. VOLTAGE REGULATOR SHOULD BE LOCATED NEAR THE 443BX
2. 6A OF OUTPUT CURRENT IS NECESSARY FOR A DP DESIGN. THE LT1585A-1.5 IS ONLY CAPABLE OF 5A. MAY NEED ANOTHER REGULATOR.
VOUT
GND
2
+
C82
C114
22uF
1
2
16V 20%
Solid Tantalum
1.0 uF
3
C81
1.0 uF CERAMIC X7R
4
+12V
C85
1.0 uF
V25_G1
1 2 3 4
V25_R3
R197
1.21K 1%
VR1
S/D VIN GND FB
LT1575_0.1
2.5V REGULATOR
8
IPOS
7
INEG
6
GATE
5
C88 2200pF
V25_R2
V2R
R195
100
C89
0.01 uF
6
COMP
R196
1.30K 1%
5
VCC3
2
4
VCC2.5
Q1
MMFT3055EL
3
+
C87 22uF
16V 20%
Intel(R) 440BX AGPset 1.0
, April 09, 1998
7
C83
1.0 uF
R194 10
1
V2GV25_R1
C86
1.0 uF CERAMIC X7R
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
DC-DC CONVERTER CONNECTORS
Size Document Number Rev Custom
Date: Sheet of
31 40Thursda
8
1
(
)
(
)
2
3
4
5
6
+12V +12V
7
8
R207 510K
LID18,34
FanM FanC Sense
3VSB
R392
4.7K
Q7 P-FET
DUAL-COLOR LED
GREEN
D11
D10
VCC3
5VSB
7
34
14
7
VCC
3VSB
14
U11B
3 4
7
74LVC14
VCC2.5
R213 330
12
R416 1K
Intel(R) 440BX AGPset
RED
R412 0
C94
0.1 uF
R212
4.7K U21D
9 8
74ALS05
3VSB
14
U11C
5 6
7
74LVC14
U36B
74F07
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
FRONT PANEL
Size Document Number Rev Custom
Date: Sheet of
BRSTDRV# 25
U16B
VCC VCC
R204 10K
VCC3
1 2
VCC3
3 4
VRM1_PGD31
VRM2_PGD31
JP_RST
S2
3VSB
1 3
3 4
74HCT14
R203
2.2K
R205 10K
1 2
R208
4.7K
U21A
74ALS05
R209
4.7K
U21B
74ALS05
R215 100
C99
0.01 uF
SPK1
HA RD DRIVE LED CONNECTOR
U20A
74ALS08
IDEACTP#25 IDEACTS#25
A_SLOTOCC#4,34
B_SLOTOCC#6,34
RESET SWITCH HEADER
RSTDRV17,20
SPKR18
J32
D7
MMBZ5226BL SOT-23
1
A A
B B
C C
D D
C97
0.01 uF
+
2
13
C100 10uF
14
1 2
U16C
5 6
74HCT14
Q2 MMBT3904L
3
5VSB
U22A
7
74HC10
4 5
+
R217
56
SPK2
IDE_LED
C95 470pF
U20B
74ALS08
C98 10uF
12
5VSB
R200
68 R202
68
VCC
6
R206 470
+3.3V
VCC3
ILPU1
C96 470pF
5 6
BRSTDRV 24
TP32
BUZZ2
C93
0.1 uF
J31 1
2 3 4
4 HEADER
VCC3
U21C
74ALS05
B_SUSC18
ATX POWER CONNECTOR
J33 1 2
3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
R218
22K
C101
1.0 uF
3
FAN_LED18
SPEAKER
VCC
TP888
+12V
C90
0.1 uF
+12V
C92
0.1 uF
R210
4.7K
DBRESET#7
VCC3
R214
4.7K
+12V
+5.0V
VCC
-5V
-12V
R_RSMRST#
Re sume Reset circuitry using a 22 msec delay and Schmitt trigger logic.
J29 1
KEY
2 3 4
CP U FAN HEADERS
J36
SENSE
3 2
+12V
1
GND
640456-3
J37
3 2 1
640456-3
VCC
R216
8.2K
PG1 PG2
4
VCC
R408
4.7K
SENSE +12V GND
VCC3
R211 240
U16D
9 8
74HCT14
3VSB
14
U11D
9 8
7
74LVC14
VCC
R409
4.7K
U35A
1 2
74F06 U23F
13 12
74F07
U35B
3 4
74F06
CPUFAN1 39
CPUFAN2 39
14
3 4 5
7
BRSM1
5VSB
U22B
74HC10
PG3
U16E
11 10
74HCT14
3VSB
14
11 10
7
5
VCC
R394
330
C181
VCC
100pF
R395
330
C182 100pF
3VSB
U11E
74LVC14
S1
SW PUSHBUTTON
JP24
PWR_ON_JMP
6
PG4 PG5
POWER LED HEADER
J28 1
key
2 3
OPTIONAL ATX CONNECTOR
J35
4 1
1394M
5 2
1394V
6 3
RES
Molex 39-30-1060
ACPI required POWER BUTTON to be located on the front of the chassis.
12
U23A
1 2
74F07
WOLLID18
PS_POK 18
RSMRST# 18
6
R393
1K
D9
1N4148
R407
1.2K
VCC
R397
U15D
4.7K 9 8
74AS07
5VSB
**OPTIONAL** WOL support requires 600mA of Stand-By current.
R199
4.7K
PWRGOOD 3,5,27
PWROK 9,18
Wake-On-LAN Header
J34
3 2 1
AMP 173981-3
(or Foxconn HF58030)
32 40Thursday, April 09, 1998
8
PSFAN 39
PWRBT# 18
POWER-ON 18
1.0
1
[1]
[0]
q
y
q
}
y
2
3
4
5
6
7
8
de}de}de}de}de}de}de}de}de}de
PROCESSOR BUS/CORE FREQUENCY
A A
VCC3
182736
45
RP20
4.7K
VCC3
U23B
3 4
74F07 U23C
5 6
74F07 U23D
9 8
74F07 U23E
11 10
74F07
CR ESET 19
A20M# 3,5,34
IGNNE# 3,5,34
LINT0 3,5,34
LINT1 3,5,34
JP25
KL_CFG1
JP26
KL_CFG2
KL_CFG3
B B
VCC3
KL_CFG4
JP27
JP28
A20_PB
IGNE_PB
U24
2
1A1
4
R291
10K
PX4_A20M#18,34 PX 4_IGNNE#18,34 PX 4_INTR18,19,34 PX4_NMI18,34
CR ESET#8
1A2
6
1A3
8
1A4
11
2A1
13
2A2
15
2A3
17
2A4
1
1G
19
2G
74FCT3244
U21E
11 10
1Y1 1Y2 1Y3 1Y4 2Y1 2Y2 2Y3 2Y4
18 16 14 12 9 7 5
LINT0_PB
3
LINT1_PB
R219 330
74ALS05
Processor Core Fre S
stem Bus Fre
Reserved
3VSB
C C
U11A
14
1 2
7
74LVC14
CR S T_STBY 19
:
LINT
2 3 4 5
5/2
7/2
L L
L L
L L
LINT
IGNNE#
A20M#
JP25
JP26
JP27JP28
L
L L
H H
L
LL
L
H
H
L
H
H
L
L H
L
All Other Combinations, HLLL-HHHL
2
H
H
H
H
D D
1
2
3
4
5
6
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
PROCESSOR BUS/CORE FREQUENCY
Size Document Number Rev Custom
Date: Sheet of
Intel(R) 440BX AGPset 1.0
, April 09, 1998
7
33 40Thursda
8
1
PERR#22,23 SERR#9,17,22,23 PLOCK#9,22,23
STOP#9,17,22,23 DEVSEL#9,17,22,23
TRDY#9,17,22,23 IRDY#9,17,22,23 FRAME#9,17,22,23
A A
PCI BUS
B B
C C
PIIX4
D D
1
PREQ#49
PIRQ#D18,19,22,23 PIRQ#C18,19,22,23 PIRQ#B18,19,21,22,23 PIRQ#A18,19,21,22,23
PREQ#39,17,23 PREQ#29,17,23 PREQ#19,17,22 PREQ#09,17,22
PGNT#49 PGNT#39,23 PGNT#29,23 PGNT#19,22
PGNT#09,22
PHLD#9,17 PHLDA#9,17 REQ#A18 REQ#B18 REQ#C18 APICREQ#18,19 THERM#3,5,18
A20GATE18,20 KBRST#18,20
TEST#18 SMBALERT#18 BATLOW#18
PCI_PME#18,22,23 LID18,32 EXTSMI#18,39 PX4_CFG118
APICCS#18,19 SMBDATA3,5,8,15,16,18,39 SMBCLK3,5,8,15,16,18,39
PX4_INTR18,19,33 PX4_IGNNE#18,33 PX4_A20M#18,33 PX4_NMI18,33
GPI[20:13]18
2
RP21
2
R1
3
R2
4
R3
5
R4
6
R5
7
R6
8
R7
9
R8
10
R9
2.7K RP22
2
R1
3
R2
4
R3
5
R4
6
R5
7
R6
8
R7
9
R8
10
R9
2.7K
RP23
1
8
2
7
3
6
4 5
8.2K RP24
1 2 3 4 5
8.2K
PGCS#118,39
R240
2.7K
GPI13 GPI14 GPI15 GPI16
GPI17 GPI18 GPI19 GPI20
GPI718
2
1
PU
1
PU
8 7 6
RP25
2
R1
3
R2
4
R3
5
R4
6
R5
7
R6
8
R7
9
R8
10
R9
8.2K RP27
2
R1
3
R2
4
R3
5
R4
6
R5
7
R6
8
R7
9
R8
10
R9
8.2K
R238
8.2K
R242
2.7K
RP29 1 2 3 4 5
2.7K
RP31 1 2 3 4 5
2.7K
3
VCC
VCC
VCC3
1
PU
1
PU
8 7 6
RP30 1 2 3 4 5
2.7K
8 7 6
RP32 1 2 3 4 5
2.7K
3
4
VCC3
3VSB
VCC3
AGP
8 7 6
8 7 6
4
5
A_SLOTOCC#4,32
B_SLOTOCC#6,32
FERR#3,5,18
THERMTRIP#3,5
TESTHI3,5
PICD[1:0]3,5,19
FLUSH#3,5
STPCLK#3,5,18
APC_SMI#19
SLOT 1
PX4_SMI#18,19
SLP#3,5,18
HINIT#3,5,18
A20M#3,5,33 IGNNE#3,5,33
LINT03,5,33 LINT13,5,33
GPERR#21 GSERR#21 GSTOP#9,21 GDEVSEL#9,21 GTRDY#9,21 GIRDY#9,21 GFRAME#9,21 ADSTB-A9,21 ADSTB-B9,21 SBSTB9,21
GGNT#9,21 GREQ#9,21 PIPE#9,21 RBF#9,21
AGP_PME#18,21
GPAR9,21
5
6
R235
8.2K
R237
8.2K
R241
8.2K
R244 8,2K
R246
8.2K
R250
8.2K
R252
8.2K
R248 100K
6
R222
8.2K
R224
220
PICD0
PICD1
R231
430
R233
330
2 3 4 5 6 7 8 9
10
R236
8.2K
R239
8.2K
R243
8.2K
R245
8.2K
R247
8.2K
R249
8.2K
R251
8.2K
R411
8.2K
7
VCC3
R223
8.2K
R292
220
R226
4.7K
R227
150
R228
150
R229
510
R230
430
R232
430
R234
330
RP26 R1
R2 R3 R4 R5 R6 R7 R8 R9
330
VCC2.5
**NOTE** Resistor values on signals STPCLK#, APC_SMI#, PX4_SMI#, SLP# & HINIT# enable an LAI to be used for board debug. If an LAI will not be used for debug the resistor values should be changed to 1K ohm.
VCC2.5
1
PU
VCC3
3VSB
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
BUS RESISTORS
Size Document Number Rev Custom
Date: Sheet of
Intel(R) 440BX AGPset
7
8
34 40Thursday, April 09, 1998
8
1.0
A
y
B
C
D
E
UNUSED GATES
3VSB
5VSB
E
4
14
5 6
7
U13B 74LVC125
10
14
9 8
7
U13C 74LVC125
13
14
12 11
7
U13D 74LVC125
U30A
14
1 2
7
74HCT14 U30C
14
5 6
7
74HCT14 U30D
14
9 8
7
74HCT14 U30E
14
11 10
7
74HCT14 U30F
14
13 12
7
74HCT14
35 40
VCC
4 4
SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 SD8
SD9 SD10 SD11 SD12 SD13 SD14 SD15
R254
8.2K
RP33
1 8 2 7 3 6 4 5
8.2K
RP34
2
R1
3
R2
4
R3
5
R4
6
R5
7
R6
8
R7
9
R8
10
R9
8.2K
RP35
2
R1
3
R2
4
R3
5
R4
6
R5
7
R6
8
R7
9
R8
10
R9
8.2K
RP37
2
R1
3
R2
4
R3
5
R4
6
R5
7
R6
8
R7
9
R8
10
R9
8.2K
RP39
2
R1
3
R2
4
R3
5
R4
6
R5
7
R6
8
R7
9
R8
10
R9
5.6K
IRQ#818,19
IRQ1218,19,20,24 IRQ1418,19,20,24,25 IRQ1518,19,20,24,25
IRQ118,19,20 IRQ318,19,20,24 IRQ418,19,20,24 IRQ518,19,20,24 IRQ618,19,20,24 IRQ718,19,20,24 IRQ918,19,20,24
IRQ1018,19,20,24
3 3
ISA BUS
2 2
1 1
IRQ1118,19,20,24
SD[15:0]17,20,24
IOW#17,20,24,39
MEMW#17,19,24,27
DRQ018,20,24 DRQ118,20,24 DRQ218,20,24 DRQ318,20,24 DRQ518,24 DRQ618,24 DRQ718,24
A
3VSB
VCC
VCC
1
PU
VCC
1
PU
VCC
1
PU
1
PU
B
IOCHK#17,24
ZEROWS#17,24
IOCHRDY17,20,24
RMASTER#24
REFRESH#17,24
IOR#17,20,24,39
MEMR#17,19,24,27
MEMCS16#17,24
IOCS16#17,24
SA[19:0]17,19,20,24,27,39
LA[23:17]17,24
SA19 SA18 SA17 SA16 SA15 SA14 SA13 SA12 SA11
SA10 SA9 SA8 SA7 SA6 SA5 SA4 SA3 SA2
SA1 SA0 LA23 LA22 LA21 LA20 LA19 LA18 LA17
R253
4.7K R255
1K R256
1K R257
1K R258
1K R259
8.2K R260
8.2K R261
1K R262
1K
RP36
2
R1
3
R2
4
R3
5
R4
6
R5
7
R6
8
R7
9
R8
10
R9
8.2K RP38
2
R1
3
R2
4
R3
5
R4
6
R5
7
R6
8
R7
9
R8
10
R9
8.2K RP40
2
R1
3
R2
4
R3
5
R4
6
R5
7
R6
8
R7
9
R8
10
R9
8.2K
C
VCC
1
PU
VCC
1
PU
VCC
1
PU
U20C
9
10
74ALS08
U20D
12 13
74ALS08
U35C
5 6
74F06 U35D
9 8
74F06 U35E
11 10
74F06 U35F
13 12
74F06
5VSB
U36C
14
5 6
7
74F07
U36D
14
9 8
7
74F07
U36E
14
11 10
7
74F07
U36F
14
13 12
7
74F07
8
11
D
U21F
13 12
74ALS05
U16F
13 12
74HCT14
U15A
1 2
74AS07 U15E
11 10
74AS07 U15F
13 12
74AS07
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
Size Document Number Rev Custom
, April 09, 1998
Thursda
Date: Sh e et of
ISA BUS PULLUPS
Intel(R) 440BX AGPset 1.0
1
2
3
4
5
6
7
8
VCC3
A A
B B
C C
DIM M DE COUPLING
0.1 uF
CD1
16V
0.1 uF
CD6
16V
0.1 uF
CD13
16V
0.1 uF
CD18
16V
0.1 uF
CD21
16V
0.1 uF
CD23
16V CD24
0.1 uF
16V CD89
CD2
CD7
CD14
CD19
CD22
CD88
0.1 uF
16V
0.1 uF
16V
0.1 uF
16V
0.1 uF
16V
0.1 uF
16V
0.1 uF
16V
0.1 uF
16VCD87
CKBF DECOUPLING
CD3
CD8
CD15
CD20
CD85
CD86
0.1 uF
0.1 uF
0.1 uF
0.1 uF
0.1 uF
0.1 uF
0.1 uF
16V
16V
16V
16V
16V
16V
16V
C102
+
22uF 16V
C103
+
22uF 16V
C104
+
22uF 16V
C105
+
22uF 16V
C116
+
22uF 16V
443BX DECOUPLING
VCC3
CD4
CD9
CD11
CD16
CK100 DECOUPLING
0.1 uF
16V CD5
0.1 uF
16V
0.1 uF
16V
0.1 uF
16V
CD10
CD12
CD17
0.01 uF
16V
0.01 uF
16V
0.01 uF
16V
0.01 uF
16V
VCC3
C195
+
22uF
C196
470pF C197
0.01uF
D D
1
2
3
4
VCC3 VCC2.5
CD98
CD99
C171
470pF 16V
+
22uF
5
0.01 uF 16V
C178
0.01uF 16V
C179
470pF 16V
C180
+
22uF
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
DRAM, CLOCK AND 443BX DECOUPLING CAPACITORS
Size Document Number Rev Custom
6
Date: Sheet of
Intel(R) 440BX AGPset
7
36 40Thursday, April 09, 1998
8
1.0
1
2
3
4
5
6
7
8
BULK POWER DECOUPLING
A A
**MAY NEED TO ADD MORE DECOUPLING TO VCC3 FOR THIS DP DESIGN.
C108
B B
C C
VCCCORE VCCCORE VCCCORE VCCVCCCORE
D D
1
+ ++
22 uF 16V
0.1 uF
CD62
16V CD63
CORE VOLTAGE DECOUPLING
10uF
CD100
16V
10uF
CD104
16V
10uF
CD107
16V
10uF
CD110
16V
10uF
CD112
16V
2
10uF
CD101
10uF
CD105
10uF
CD108
10uF
CD111
C106
+
22 uF 16V
0.1 uF
CD48
0.1 uF
CD52
16V
16V
16V
16V
16V
16V
VCCVCC3
+
22 uF 16V
CD49
CD53
-5v -12v+12v
C109
22 uF 16V
0.1 uF
16V CD64
100uF
CD102
16V
100uF
CD106
16V
100uF
CD109
16V
3
C107
0.1 uF
0.1 uF
16V
16V
C110
22 uF 16V
0.1 uF
0.01uF
CD103
4
16V
16V
3 VOLT DECOUPLING
VCC3
0.1 uF
CD42
16V CD43
0.1 uF
16V
0.1 uF
CD46
16V
0.1 uF
CD50
16V
0.1 uF
CD54
16V
0.1 uF
CD56
16V
0.1 uF
CD58
16V
0.1 uF
CD60
16V
0.1 uF
CD65
16V
0.1 uF
CD67
16V
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
Size Document Number Rev Custom
5
6
Date: Sheet of
0.1 uF
16V
0.1 uF
CD45
16VCD44
0.1 uF
CD47
16V
0.1 uF
CD51
16V
0.1 uF
CD55
16V
0.1 uF
CD57
16V
0.1 uF
CD59
16V
0.1 uF
CD61
16V
0.1 uF
CD66
16V
0.1 uF
CD68
16V
3.3 VOLT AND BULK POWER DECOUPLING
Intel(R) 440BX AGPset
7
37 40Thursday, April 09, 1998
8
1.0
1
A A
2
3
4
5
6
7
8
**THIS TERMINATION DECOUPLING IS OPTIONAL.
TERMINATION VOLTAGE DECOUPLING
VTT
0.1 uF
CD69
16V
B B
CD71
0.1 uF
16V
0.1 uF
CD73
16V
0.1 uF
CD75
16V
0.1 uF
CD77
16V
0.1 uF
CD79
16V
CD81
0.1 uF
16V
C C
0.1 uF
CD83
16V
CD70
CD72
CD74
CD78
CD80
CD82
CD84
0.1 uF
0.1 uF
0.1 uF
CD76
0.1 uF 16V
0.1 uF
0.1 uF
0.1 uF
0.1 uF
16V
16V
16V
16V
16V
16V
16V
D D
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
TERMINATION DECOUPLING
Size Document Number Rev Custom
1
2
3
4
5
6
Date: Sheet of
Intel(R) 440BX AGPset
7
38 40Thursday, April 09, 1998
8
1.0
A
y
]
]
B
C
D
E
4 4
VCC
U25
R293
10K
1
IORD#
2
IOWR#
3
SYSCLK
11
D0
10
D1
9
D2
8
D3
7
D4
6
D5
5
D6
4
D7
44
CS#
43
A0
42
A1
41
A2
37
VID0
36
VID1
35
VID2
34
VID3
23
VID4/NTEST
14
SMI_IN#
15
CHASIS_INTRU
38
BTI#
19
FAN1
18
FAN2
17
FAN3
33
IN0
32
IN1
31
IN2
30
IN3
29
IN4
28
-IN5
27
FB5
26
FB6
25
-IN6 LM79
IOR#17,20,24,35 IOW#17 , 20,24,35
19,20,27
SYSCLK17,24
XD[7:0
PGCS#118,34
VID[4:0
CPUFAN132 PSFAN32 CPUFAN232
SA017,19,20,24,27,35 SA117,19,20,24,27,35 SA217,20,24,27,35
R265
10K
3 3
VCCCORE VTT VCC3 VCC +12V -12V -5V
R266
R267
R268
R269
R270
R271
10K
10K
10K
66.5K
232K
232K
R274
R275
R276
2 2
100K
80.6K
66.5K
MUX for VID pins under construction.
R272
100K
R277
66.5K
XD0 XD1 XD2 XD3 XD4 XD5 XD6 XD7
VID0 VID1 VID2 VID3 VID4
C115
0.1uF
HARDWARE MONITOR
VCC
LM79
Slave address = 0101101b
VSSD
13
12
VCC5
VSSA
24
SMI#
NMI/IRQ#
PS_BYPASS
RESET#
SDA
SCL
R263
2.7K
40 39
16 22
21 20
Q4
2N3904
D8
SCHOTTKY BAR54
R264
2.7K
Q3
2N3904
R273
2.7K R279
2.7K
EXTSMI# 18,34
** NOTE** This device is powered by 5V only and requires a VIH of 3.5V on it's SMBUS interface. Here is a 5V-3V SMBUS level translation circuit.
SM BDATA 3,5,8,15,16,18,34 SMBCLK 3,5,8,15,16,18,34
VCC3
1 1
A
B
C
D
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA. 95630
Title
LM 79-75 MONITORS
Size Document Number Rev Custom
Date: Sheet of
Intel(R) 440BX AGPset 1.0
, April 09, 1998
39 40Thursda
E
A
B
C
D
E
REVISION 1.0 -
4 4
3 3
2 2
Initial public release -- April, 1998.
1 1
INTEL CORPORATION PLATFORM COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
Size Document Number Rev Custom
A
B
C
D
Date: Sheet of
Revision History
Intel(R) 440BX AGPset 1.0
40 40
E
Loading...