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430VX
Schematics Rev B.0
26 pgs755.12 Kb0

Intel 430VX Schematics Rev B.0

Page# Page Title
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
THIS DRAWING CONTAINS INFORMATION WHICH HAS NOT BEEN VERIFIED FOR MANUFACTURING AN END USER PRODUCT. INTEL IS NOT RESPONSIBLE FOR THE MISUSE OF THIS INFORMATION.
Released Rev. B.0
Title
Size Document Number REV
A 82430VX B.0
Date: June 20, 1997 Sheet 1 of 26
INTEL CORPORATION PCI COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Index
CPUVCC
RP70
4.7K
RP69
4.7K
RP74 1 8 2 7 3 6 4 5
4.7K
RP71
4.7K
HA20M#
12
1 2
R123 330
1 2
R142 4.7K
1 2
R141 4.7K
1 2
R147
4.7K
R132 330
1 2
R108 10K
1 2
R148
4.7K
1 2 1 2
R131
4.7K
5,6
4 5 3 6 2 7 1 8
4 5 3 6 2 7 1 8
1 8 2 7 3 6 4 5
4,6,10
HD[0..63]
HFRCMC# HPENA# HWB/WTA#
HBRDYC# HAPA HBUSCHKA# HFLUSHA#
9 8
HBOFF#
4
HINTR
10
10
HIGNNE#
10
HKEN#
4
HAHOLD
4
HEADS#
4
HBRDY#
4
HRESET
4
12
HINIT
10
HSMI#
10
HSTPCLK#
HNMI
HNA#
U27D
7407S
R107 330
1 2
TP224
1 2
R109
HA[3..31]
HADSC#
HBE#[0..7]
HFERR# HHITM#
HLOCK#
HCACHE# HADS#
HD/C# HW/R# HM/IO#
SPEED RATIO
RESERVED
JB1 1 3 5
JB3
R151
1 2
180
R152
1 2
180
6
10 4
4
4
4 4 4,6
4
CORE/BUS
3/2X 2X
5/2X
2 4 6
3,4,6
CPUVCC
C217
1 2
1uF
C251
1 2
1uF
C228
1 2
1uF
C231
1 2
1uF
C229
4,6
JB1
1-3,2-4 3-5,2-4 1-3,4-6 3-5,4-6
1 2
C252
1 2
C224
1 2
C232
1 2
C237
1 2
C221
1 2
C239
1 2
C249
1 2
C216
1 2
C215
1 2
C246
1 2
C230
1 2
C238
1 2
C253
1 2
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1
8
7
8
116
HD0 HD1 HD2 HD3 HD4 HD5 HD6 HD7 HD8 HD9 HD10 HD11 HD12 HD13 HD14 HD15 HD16 HD17 HD18 HD19 HD20 HD21 HD22 HD23 HD24 HD25 HD26 HD27 HD28 HD29 HD30 HD31 HD32 HD33 HD34 HD35 HD36 HD37 HD38 HD39 HD40 HD41 HD42 HD43 HD44 HD45 HD46 HD47 HD48 HD49 HD50 HD51 HD52 HD53 HD54 HD55 HD56 HD57 HD58 HD59 HD60 HD61 HD62 HD63
HDPA0 HDPA1 HDPA2 HDPA3 HDPA4 HDPA5 HDPA6 HDPA7
HCLKCPU
3
HA20M3V#
HFLUSHA#
HBUSCHKA# HWB/WTA#
1
TP001 HPENA#
HHOLDA HEWBEA#
330
HBRDYC#
TP037
1
TP225 TP226 TP227 TP228
TP029
1
TP028
1
TP030
1
102 112 101 97 96 91 90 72 55 54 36 71 35 53 17 34 52 16 69 33 51 15 68 50 48 67 47 66 46 65 45 44 63 43 62 42 61 41 60 59 2 78 20 58 39 77 38 57 76 56 94 75 100 74 99 105 109 110 115 120 119 125 129
73 70 49 64 40 95 93 130
256
185 251 206 201 192 170 306 165 286 175 257 160 180 269 190 191 196 202 186 166
195 169
179 275
146 151 152
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 D40 D41 D42 D43 D44 D45 D46 D47 D48 D49 D50 D51 D52 D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63
DP0 DP1 DP2 DP3 DP4 DP5 DP6 DP7
CLK
BOFF# A20# INTR NMI IGNNE# KEN# FLUSH# AHOLD EADS# BRDY# RESET INV NA# BUSCHK# WB/WT# INIT SMI# R/S# PEN# STOPCLK#
HOLD EWBE#
BRDYC# NC/MPBOFF#
NC/BHOLD NC/CHOLD NC/DHOLD
U26 P5II
8
V
V
V
C
C
C
O
O
O
R
R
R
E
E
E
1
1
1
0
0
0
3
1
0
9
2
1
0
9
8
7
4
8
8
8
V
V
V
V
V
V
V
V
V
V
C
C
C
C
C
C
C
C
C
C
O
O
O
O
O
O
O
O
O
O
R
R
R
R
R
R
R
R
R
R
E
E
E
E
E
E
E
E
E
E
3
3
3
3
3
3
2
2
2
1
1
1
6
5
4
3
2
1
0
9
8
1
8
8
8
8
8
8
8
8
1
9
8
7
6
5
4
3
V
V
V
V
V
C
C
C
C
C
O
O
O
O
O
R
R
R
R
R
E
E
E
E
E
V
V
V
V
V
V
V
V
V
V
C
C
C
C
C
C
C
C
C
C
O
O
O
O
O
O
O
O
O
O
R
R
R
R
R
R
R
R
R
R
E
E
E
E
E
E
E
E
E
E
NC/SUSPACK#
ADSC#
FERR# HITM# PCHK#
LOCK#
APCHK#
CACHE#
FRCMC#
IERR#
SMIACT# PM0/BP0
PM1/BP1
TRST#
U/O#/NC
PICCLK
PICD0 PICD1
PHITM#
PHIT# PBGNT# PBREQ#
UPVRM#
VCC2DET
CPUTYP
NC/TEST1 NC/TEST3
BE0# BE1# BE2# BE3# BE4# BE5# BE6# BE7#
BREQ HIT#
HLDA
PRDY
ADS# D/C# W/R# M/IO
SCYC
D/C#
283
A3
301
A4
263
A5
319
A6
282
A7
300
A8
262
A9
318
A10
281
A11
280
A12
261
A13
279
A14
260
A15
278
A16
259
A17
277
A18
258
A19
276
A20
216
A21
228
A22
211
A23
222
A24
246
A25
227
A26
221
A27
265
A28
264
A29
302
A30
245
A31
285 270
252 271 253 272 254 273 255
140 229 268 250 215
230 248
AP
225 210 200 220
PCD
267
PWT
159 231
249 287 155
274 182 135 219
139 145 149
BP2
150
BP3
126
TCK
131
TDO
132
TDI
136
TMS
141 212
106 111 122
199 189 205 209
181
BF0
176
BF1
249
226 266
142
171 172 320
TP011 TP012
TP021 TP010
HAPA TP022
TP008 TP020 TP019
TP023 HFRCMC# TP009
TP036 TP035 TP033 TP034
TP027 TP032 TP031 TP026 TP025 TP007
TP024 TP017 TP018
TP016 TP015 TP013 TP014
HBF0 HBF1
TP002 TP006
TP038
TP004 TP003 TP005
HA3 HA4 HA5 HA6 HA7 HA8 HA9 HA10 HA11 HA12 HA13 HA14 HA15 HA16 HA17 HA18 HA19 HA20 HA21 HA22 HA23 HA24 HA25 HA26 HA27 HA28 HA29 HA30 HA31
HBE#0 HBE#1 HBE#2 HBE#3 HBE#4 HBE#5 HBE#6 HBE#7
1
TP198
1
TP2
1
TP208
1
TP1
1
TP207
1
TP214
1
TP12
1
TP11
1
TP206
1
TP197
HSMIACT#
R150
1 2
180
R149
180
1 2
4
4
CPUVCC
HBF0R HBF1R
1
TP209
1
TP210
1
TP211
1
TP212
1
TP220
1
TP213
1
TP221
1
TP222
1
TP223
1
TP215
1
TP13
1
TP7
1
TP8
1
TP6
1
TP5
1
TP3
1
TP4
HD/C#
1
TP1015
1
TP218
1
TP55
1
TP216
1
TP217
1
TP67
CPUVCC
1
1
1
1
1
1
THIS DRAWING CONTAINS INFORMATION WHICH HAS NOT BEEN VERIFIED FOR MANUFACTURING AN END USER PRODUCT. INTEL IS NOT RESPONSIBLE FOR THE MISUSE OF THIS INFORMATION.
INTEL CORPORATION PCI COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
PRIMARY CPU (Socket 7)
Size Document Number REV
C 82430VX B.0
Date: June 20, 1997 Sheet 2 of 26
2,4,6
CPUVCC
HA[3..31]
TP9
R124
4.7K
1
PCLK(0:3)
50MHz 60MHz 66MHz
RESERVED
CPUVCC
JUMPER 1
JUMPER 2
HA27PU
1 2
HA27 TP040
BCLK(0:5) JUMPER 1
25MHz 30MHz 33MHz
RESERVED
1 2 3
R120
4.7K
J31
JP3
J30
JP3
J32
JP3
CLKSEL_PU
1 2
3 2 1
3 2 1
JUMPER 3
2-3 2-3 1-2 1-2
Y2
1 2
14.31818MHz
1
C205
2
10pF
JUMPER 2 JUMPER 3
2-3 1-2 2-3
1-2
2-3 1-2 2-3 2-3
1 2
C206 10pF
1 2
1 2
C203
0.1uF C189
1 2
0.1uF
23
C207
1 2
0.1uF C187
0.1uF C188
0.1uF
1 2
CLKGENOE
CLKSEL0 CLKSEL1
XTAL1
XTAL2
CLKVCC3
5
13 12
2 3
1 14
20 26
8
U25 OE
SEL0­SEL1-
X1 X2
VCC3 VCC3
VCC3 VCC3
VCC3 ICS9159-02S
L20
1 2
1.5uH
ISA14MHZ
APIC14MHZ
HCLK0 HCLK1 HCLK2 HCLK3
PCLK0 PCLK1 PCLK2 PCLK3 PCLK4 PCLK5
24MHZ 12MHZ
GND GND
GND GND
CPUVCC
28 27
6 7 9 10
15 16 18 19 21 22
24 25
4 23
17 11
R97 22
PIIXOSCR RAWOSCR
HCLKCPUR HCLKSRAM0R HCLKTDXR HCLKVIDR
PCLK0R PCLK1R PCLK2R PCLKVIDR PCLKTVXR PCLKPIIX3R
AIPCLKR TP039
1
PIIX3OSC
R94
1 2
OSCPULLDN
220
1 3
U18D 74LS125S
OSCUIOR
R114
1 2
22 R115
1 2
22 R116
1 2
22 R117
1 2
22 R118
1 2
22
R105
22 R104
22 R103
22 R102
22 R101
22 R100
22 R99
22
12 11
RAWOSC
1
2
1
R98 22
2
TP10
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
R88
22
HCLKSRAM0
PCLKPIIX3
HCLKTVX
HCLKCPU
HCLKTDX
HCLKVID
PCLK0
PCLK1
PCLK2
PCLKVID
PCLKTVX
USBCLK
10
OSCUIO
4
2
6
5
16
19
19
20
16
4
10
10
12
THIS DRAWING CONTAINS INFORMATION WHICH HAS NOT BEEN VERIFIED FOR MANUFACTURING AN END USER PRODUCT. INTEL IS NOT RESPONSIBLE FOR THE MISUSE OF THIS INFORMATION.
INTEL CORPORATIONLSOM, CA 95630 PCI COMPONENTS DIVISION
1900 PRAIRIE CITY RD., FM5-62 FOLSOM, CA 95630
Title
Size Document Number REV
B 82430VX B.0
Date: June 20, 1997 Sheet 3 of 26
Clock Generator
7,8,16
7,8,16
7,8
MRAS#[0..3]
MCAS#[0..7]
MP[0..7]
MP1 MP5 MP3 MP7
MP4 MP0 MP6 MP2
MRAS#2 MRAS#3 MRAS#0 MRAS#1
MCAS#4 MCAS#0 MCAS#6 MCAS#2
MCAS#7 MCAS#3 MCAS#5 MCAS#1
2,3,6
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
7,8,16
RP60 1 8 2 7 3 6 4 5
10K
RP66 1 8 2 7 3 6 4 5
10K
2
HA[3..31]
RP68
10 RP63
10 RP65
10
MA[0..11]
VCC
HNA#
J25
2 1
JP2
R106 0
Stuffing Option
HA[3..31]
8,16
MA[0..11]
TP56 TP15 TP17 TP16
CPUVCC
CADV#
6
CADS#
6
CCS#/CAB4
6
COE#
6
CGWE#
6 6
CBWE#/CGCS#
6
CAB3 CTWE#
6
MXS
5
POE#
5
MOE#
5
HOE#
5
MADV#
5
PCMD1
5
PCMD0
5
MSTB1
5
MSTB0
5
1 2
MWEA#
7
MWEB#
1 1 1 1
HNA#J
HA3 HA4 HA5 HA6 HA7 HA8 HA9 HA10 HA11 HA12 HA13 HA14 HA15 HA16 HA17 HA18 HA19 HA20 HA21 HA22 HA23 HA24 HA25 HA26 HA27 HA28 HA29 HA30 HA31
MRAS#R0 MRAS#R1 MRAS#R2 MRAS#R3
MCAS#R0 MCAS#R1 MCAS#R2 MCAS#R3 MCAS#R4 MCAS#R5 MCAS#R6 MCAS#R7
MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11
TP045 TP042 TP044 TP043
Stuff for new
cache type
R95
4.7K
2,6,10
1 2
2
2
HSMIACT# 2 2
2 2 3
37 40 43 42 41 44 56 46 45 57 59 58 60 47 48 49 50 55 29 32 28 30 34 33 31 35 39 38 36
135 136 133 134
142 140 144 138 141 139 143 137
115 116
117 118 119 120 121 123 124 125 126 127 128 129
145 146 147 148
HCACHE#
HKEN#
2
HADS#
2
HBRDY# HAHOLD
HEADS#
HBOFF# HCLKTVX HRESET
A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31
RAS0# RAS1# RAS2# RAS3#
CAS0# CAS1# CAS2# CAS3# CAS4# CAS5# CAS6# CAS7#
WEA# WEB#
MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11
SRASB#/RAS4# SRASA# SCASB# SCASA#
HLOCK#
2
HW/R#
2,6
HD/C#
2
HM/IO#
2
HHITM#
H
H
H
H
H
H
H
H
B
B
B
B
B
B
B
B
E
E
E
E
E
E
E
E
#
#
#
#
#
#
#
#
7
6
5
4
3
2
1
0
7
6
7
7
6
6
7
6
8
9
C
A
H
B
E
P
H
C
O
A
U
O
L
F
D
R
L
K
F
S
S
D
I
#
#
T
N
C
C
A
A
C
C
D
D
C
O
V
S
S
E
#
#
#
#
1
1
1
3
4
8
7
7
6
7
6
6
6
6
7
6
8
8
8
8
8
8
8
8
2
2
1
3
5
4
3
1
7
6
0
4
7
6
5
4
3
2
1
H
M
D
W
N
B
A
S
K
C
H
I
/
/
/
A
R
D
M
E
A
L
T
I
C
R
#
D
S
I
N
C
O
M
O
#
#
Y
#
A
#
H
C
#
#
#
C
E
K
T
#
#
#
K
C
C
T
T
T
T
T
T
R
G
B
T
I
I
I
I
I
I
Q
W
W
W
O
O
O
O
O
O
A
E
E
E
7
6
5
4
3
2
K
#
#
#
1
1
1
1
1
1
7
8
9
0
1
9
6
7
5
3
C
C
C
C
C
T
T
T
T
T
A
A
A
A
A
G
G
G
G
G
7
6
5
4
3
0
B
B
B
B
B
B
B
B
E
E
E
E
E
E
E
E
7
6
5
4
3
2
1
0
#
#
#
#
#
#
#
#
M X S
M
/
P
M
P
M
S
C
C
T
T
S
I
I
4
O
O
#
1
0
2 0
6
5
4
C
C
C
T
T
T
A
A
A
G
G
G
2
1
0
S
C
A
H
M
P
T
M
T
M
D
O
O
O
B
D
B
D
V
E
E
E
1
1
0
0
#
#
#
#
1
1
1
1
1
1
1
1
0
1
0
1
0
1
3
1
8
1
6
0
9
2
2
3
HBE#[0..7]
REFVCC5
2 0 7
R E F V C C 5
P
P
P
P
P
P
L
L
L
L
L
L
P
P
P
P
I
I
I
I
I
I
L
L
L
L
N
N
N
N
N
N
I
I
I
I
K
K
K
K
K
K
N
N
N
N
1
1
1
1
1
1
K
K
K
K
5
4
3
2
1
0
9
8
7
6
1
1
1
1
9
9
9
9
9
9
0
0
0
0
9
8
7
6
5
4
7
2
1
0
P
P
P
P
P
P
L
L
L
L
L
L
P
P
P
P
I
I
I
I
I
I
L
L
L
L
N
N
N
N
N
N
I
I
I
I
K
K
K
K
K
K
N
N
N
N
1
1
1
1
1
1
K
K
K
K
0
1
2
3
4
5
6
7
8
9
2 2,6
U13
154
PCLKIN
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8
AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C/BE0# C/BE1# C/BE2# C/BE3#
FRAME#
DEVSEL#
IRDY# TRDY# STOP# LOCK#
REQ0# REQ1# REQ2# REQ3#
PGNT0# PGNT1# PGNT2# MGNT3#
PHLD#
PHLDA#
PAR
P
P
P
P
P
P
L
L
L
L
L
L
I
I
I
I
I
I
N
N
N
N
N
N
K
K
K
K
K
K
5
4
3
2
1
0
9
9
9
9
8
8
3
2
1
0
9
8
P
P
P
P
P
P
L
L
L
L
L
L
I
I
I
I
I
I
N
N
N
N
N
N
K
K
K
K
K
K
0
1
2
3
4
5
PLINK[0..15]
PLINK[0..15] 5
PCLKTVX AD[0..31]
AD0
2
AD1
206
AD2
205
AD3
204
AD4
203
AD5
202
AD6
201
AD7
200
AD8
198
AD9
197
AD10
194
AD11
193
AD12
192
AD13
191
AD14
190
AD15
189
AD16
177
AD17
176
AD18
175
AD19
174
AD20
173
AD21
172
AD22
171
AD23
168
AD24
166
AD25
165
AD26
164
AD27
163
AD28
162
AD29
161
AD30
160
AD31
159 199
188 178 167
179 184 180 181 185 186
152 151 150 149
22 23 24 25
153 21 187
82437VX
CTAG[0..7]
6
C/BE#0 C/BE#1 C/BE#2 C/BE#3
FRAME# DEVSEL#
IRDY# TRDY# STOP#
PLOCK#
PREQ#0 PREQ#1 PREQ#2
PGNT#0 PGNT#1 PGNT#2
PHOLD#
PHLDA#
MREQ#
MGNT#
PAR
AD[0..31]
3 10,16,19,20
4,10,16,19,20 4,10,16,19,20 4,10,16,19,20 4,10,16,19,20
10,16,19,20,23 10,16,19,20,23 10,16,19,20,23 10,16,19,20,23 10,16,19,20,23 19,20,23
19,23 19,23 20,23 16,23
19,23 19,23 20,23 16,23
10,23 10,23 10,16,19,20,23
THIS DRAWING CONTAINS INFORMATION WHICH HAS NOT BEEN VERIFIED FOR MANUFACTURING AN END USER PRODUCT. INTEL IS NOT RESPONSIBLE FOR THE MISUSE OF THIS INFORMATION.
R65
1 2
VCC
100
REFVCC5
5
2
C132
1
1uF
INTEL CORPORATION PCI COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
Size Document Number REV
Date: June 20, 1997 Sheet 4 of 26
82430VX Chipset TVX
C 82430VX B.0
7,8,16
MD[0..63]
HD[0..63]2,6
HCLKTDX
3 4
4 4 4 MADV#
4
PCMD1
4
PCMD0
4
MSTB1
4
MSTB0
4 REFVCC5
4 POE# MOE# HOE#
MXS
MXS POE# MOE# HOE# MADV# PCMD1 PCMD0 MSTB1 MSTB0
THIS DRAWING CONTAINS INFORMATION WHICH HAS NOT BEEN VERIFIED FOR MANUFACTURING AN END USER PRODUCT. INTEL IS NOT RESPONSIBLE FOR THE MISUSE OF THIS INFORMATION.
HD0 HD1 HD2 HD3 HD4 HD5 HD6 HD7 HD16 HD17 HD18 HD19 HD20 HD21 HD22 HD23 HD32 HD33 HD34 HD35 HD36 HD37 HD38 HD39 HD48 HD49 HD50 HD51 HD52 HD53 HD54 HD55
8
8
8
8
8
8
3
8
7
0
98
M
M
HD0
99
X
S
HD1
S
T
100
HD2
B
3
0
HD3
4
HD4
5
HD5
6
HD6
7
HD7
8
HD8
9
HD9
10
HD10
11
HD11
12
HD12
13
HD13
14
HD14
15
HD15
16
HD16
17
HD17
18
HD18
20
HD19
21
HD20
22
HD21
23
HD22
24
HD23
25
HD24
26
HD25
32
HD26
33
HD27
34
HD28
35
HD29
36
HD30
37
HD31
8
3
9
8
4
5
0
2
7
1
P
M
P
H
M
H
M
P
C
S
C
C
A
O
O
O
M
T
M
L
D
E
E
E
D
B
D
K
V
#
#
#
1
1
0
#
P
P
P
L
L
L
I
I
I
N
N
N
K
K
K
7
6
5
9
9
0
1
P
P
L
L
I
I
N
N
K
K
6
7
5
U20
2
R E F V C C 5
P
P
P
P
P
L
L
L
L
L
I
I
I
I
I
N
N
N
N
N
K
K
K
K
K
4
3
2
1
0
9
9
9
9
9
9
2
3
4
5
6
7
P
P
P
P
P
P
L
L
L
L
L
L
I
I
I
I
I
I
N
N
N
N
N
N
K
K
K
K
K
K
0
1
2
3
4
5
MD10 MD11 MD12 MD13 MD14 MD15 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31
MD0
41
MD0
MD1
45
MD1
MD2
51
MD2
MD3
57
MD3
MD4
61
MD4
MD5
63
MD5
MD6
69
MD6
MD7
73
MD7
MD16
39
MD8
MD17
43
MD9
MD18
47
MD19
55
MD20
59
MD21
67
MD22
71
MD23
75
MD32
40
MD33
44
MD34
50
MD35
56
MD36
60
MD37
62
MD38
68
MD39
72
MD48
38
MD49
42
MD50
46
MD51
54
MD52
58
MD53
66
MD54
70
MD55
74
82438VX
HD8 HD9 HD10 HD11 HD12 HD13 HD14 HD15 HD24 HD25 HD26 HD27 HD28 HD29 HD30 HD31 HD40 HD41 HD42 HD43 HD44 HD45 HD46 HD47 HD56 HD57 HD58 HD59 HD60 HD61 HD62 HD63
8
8
8
8
8
8
3
8
7
0
98
M
M
HD0
99
X
S
HD1
S
T
100
HD2
B
3
0
HD3
4
HD4
5
HD5
6
HD6
7
HD7
8
HD8
9
HD9
10
HD10
11
HD11
12
HD12
13
HD13
14
HD14
15
HD15
16
HD16
17
HD17
18
HD18
20
HD19
21
HD20
22
HD21
23
HD22
24
HD23
25
HD24
26
HD25
32
HD26
33
HD27
34
HD28
35
HD29
36
HD30
37
HD31
8
3
9
8
4
5
0
2
7
1
P
M
P
H
M
H
M
P
C
S
C
C
A
O
O
O
M
T
M
L
D
E
E
E
D
B
D
K
V
#
#
#
1
1
0
#
P
P
P
L
L
L
I
I
I
N
N
N
K
K
K
7
6
5
9
9
0
1 P
P
L
L
I
I
N
N
K
K
1
1
4
5
5
U11
2
R E F V C C 5
P
P
P
P
P
L
L
L
L
L
I
I
I
I
I
N
N
N
N
N
K
K
K
K
K
4
3
2
1
0
9
9
9
9
9
9
2
3
4
5
6
7 P
P
P
P
P
P
L
L
L
L
L
L
I
I
I
I
I
I
N
N
N
N
N
N
K
K
K
K
K
K
8
9
1
1
1
1
0
1
2
3
MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8
MD9 MD10 MD11 MD12 MD13 MD14 MD15 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31
PLINK[0..15]
MD8
41
MD9
45
MD10
51
MD11
57
MD12
61
MD13
63
MD14
69
MD15
73
MD24
39
MD25
43
MD26
47
MD27
55
MD28
59
MD29
67
MD30
71
MD31
75
MD40
40
MD41
44
MD42
50
MD43
56
MD44
60
MD45
62
MD46
68
MD47
72
MD56
38
MD57
42
MD58
46
MD59
54
MD60
58
MD61
66
MD62
70
MD63
74
82438VX
PLINK[0..15]
4
INTEL CORPORATION PCI COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
Size Document Number REV
Date: June 20, 1997 Sheet 5 of 26
82430VX Chipset TDX
C 82430VX B.0
HD[0..63]
2,5
HA[3..31]
2..4 HBE#[0..7]
2,4
HCLKSRAM0
3
CCS#/CAB4
4
4
HADSC#
2
4
CBWE#/CGCS#
4
4
U14D
9
HRESET
2,4,10
HW/R#
2,4
CAB3
4
NOTES: PIN 16, 38, 39, 42 AND 66 ARE
NO-CONNECT FOR PIPELINED BURST CACHE. FRAMED COMPONENTS ARE NEEDED ONLY FOR A FUTURE CACHE OPTION AND SHOULD NOT BE POPULATED WITH A PIPELINED BURST CACHE SYSTEM.
THIS DRAWING CONTAINS INFORMATION WHICH HAS NOT BEEN VERIFIED FOR MANUFACTURING AN END USER PRODUCT. INTEL IS NOT RESPONSIBLE FOR THE MISUSE OF THIS INFORMATION.
74HCT14S
4 CADV#
CADS#
CGWE#
COE#
HBE#0 HBE#1 HBE#2 HBE#3
HA3 HA4 HA5 HA6 HA7 HA8 HA9 HA10 HA11 HA12 HA13 HA14 HA15 HA16 HA17
37 36 35 34 33 32 100 99 82 81 44 45 46 47 48
93 94 95 96
89
98 97 86 83 84 85
87 88 38
39 42
92 31
U29 A0
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14
BWE1# BWE2# BWE3# BWE4#
CLK
CE# CE2 OE# ADV# ADSP# ADSC#
BWE# GWE# NC
NC NC
CE3# LBO#
PBSRAM 32KX32
VDD1A
VDD2A
2
VDD1B
VDD2B
2
C241
0.01uF
C242
0.01uF
HD7
52
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32
VDD1 VDD2
SEE NOTES
DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9
FT-
HD6
53
HD5
56
HD4
57
HD1
58
HD3
59
HD2
62
HD0
63
HD12
68
HD9
69
HD11
72
HD10
73
HD15
74
HD8
75
HD13
78
HD14
79
HD18
2
HD16
3
HD22
6
HD23
7
HD19
8
HD21
9
HD20
12
HD17
13
HD31
18
HD29
19
HD30
22
HD27
23
HD28
24
HD25
25
HD26
28
HD24
29
VDD1A
16
VDD2A
66 51
NC
80
NC
1
NC
30
NC
14 43
NC
64
ZZ
R144
0
R154
1 2
0
2
C260
0.01uF1
1
R119
0
R145
1 2
0
2
C209
0.01uF12
1
Title
Size Document Number REV
C 82430VX B.0
Date: June 20, 1997 Sheet 6 of 26
SEE NOTES
NF2B
1 2
2
R143 220
1
VCC
1 2
2
C210
3.3uF
VCC
1 2
C258
1.0uF12
INTEL CORPORATION PCI COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Synchronous Cache,256K
R153
10K
1
C243
2
1.0uF1
C244
3.3uF1
U28
37
HA3
A0
HA4
36
A1
HA5
35
A2
HA6
34
A3
HA7
33
A4
HA8
32
A5
HA9
100
A6
HA10
99
A7
HA11
82
A8
HA12
81
A9
HA13
44
A10
HA14
45
A11
HA15
46
A12
HA16
47
A13
HA17
48
A14
HBE#4
93
BWE1#
HBE#5
94
BWE2#
HBE#6
95
BWE3#
HBE#7
96
BWE4#
89
CLK
98
CE#
97
CE2
86
OE#
83
ADV#
84
ADSP#
85
ADSC#
87
BWE#
88
HA5 HA6 HA7 HA8 HA9 HA10 HA11 HA12 HA13 HA14 HA15 HA16 HA17
HA30
38 39 42
92 31
CBURST_SEQ1 CRPD1 CRPU1
10 9 8 7 6 5 4 3 25 24 21 23 2 26 1
27 20 22
1 2
GWE# NC
NC NC
CE3# LBO#
PBSRAM 32KX32
U19 A0
DQ1
A1
DQ2
A2
DQ3
A3
DQ4
A4
DQ5
A5
DQ6
A6
DQ7
A7
DQ8 A8 A9 A10 A11 A12 A13 A14
WE# CE# OE#
SRAM32KX8
R92
4.7K
11 12 13 15 16 17 18 19
CPUVCC
R138
0
see notes
RP73
10K
R136
1 2
0
R129
0
R139
0
SEE NOTES
4
1 2
4 5 3 6 2 7 1 8
1 2
1 2
CTWE#
CPUVCC
HRESET#AHREST#R
HRESET#B
HW/R#A
CAB3A
4.7K
4.7K
4.7K
4.7K
R89
HA28
1 2
R93
HA29
1 2
R91
HA30
1 2
R90
HA31
1 2
8
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32
VDD1 VDD2
CTAG0 CTAG1 CTAG2 CTAG3 CTAG4 CTAG5 CTAG6 CTAG7
52
DQ1
53
DQ2
56
DQ3
57
DQ4
58
DQ5
59
DQ6
62
DQ7
63
DQ8
68
DQ9
69 72 73 74 75 78 79 2 3 6 7 8 9 12 13 18 19 22 23 24 25 28 29
16 66
51
NC
80
NC
1
NC
30
NC
14
FT-
43
NC
64
ZZ
HD36 HD37 HD34 HD35 HD32 HD33 HD38 HD39 HD42 HD47 HD40 HD46 HD44 HD41 HD45 HD43 HD55 HD54 HD53 HD52 HD51 HD50 HD48 HD49 HD63 HD62 HD61 HD60 HD59 HD57 HD58 HD56
VDD1B VDD2B
R125
NF2A
1 2
10K
SEE NOTES
CTAG[0..7]
CACHE CONFIG HA31
NO SRAM
256K PBSRAM
4
HA30 HA29 HA28
1X X
1
011
1
CPUVCC
R133
1 2
0
R137
1 2
0
SEE NOTES
HW/R#B
CAB3B
4,8,16
4,8,16
5,8,16
4,8,16
4,8
MP[0..7]
MD[0..63]
MA[0..11]
MRAS#[0..3]
MCAS#[0..7]
MODULE 1 (BANK 0)MODULE 0 (BANK 0)
MWEA#
4
THIS DRAWING CONTAINS INFORMATION WHICH HAS NOT BEEN VERIFIED FOR MANUFACTURING AN END USER PRODUCT. INTEL IS NOT RESPONSIBLE FOR THE MISUSE OF THIS INFORMATION.
TP23 TP923 TP25 TP26
U21 47 44
45 34 33
40 43 41 42
12 13 14 15 16 17 18 28 31 32 19 29
67 68 69 70
11 46 48 66 71
10 30 59
W-
RAS0-
RAS1-
RAS2-
RAS3-
CAS0-
CAS1-
CAS2-
CAS3-
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
ID1
ID2
ID3
ID4
RES1
RES2
RES3
RES4
RES5
VCC
VCC
VCC
32MX36SIMV
DQ8/P0 DQ17/P1 DQ26/P2 DQ35/P3
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16
DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25
DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34
MRAS#0 MRAS#1 MRAS#0 MRAS#1
MCAS#2 MCAS#1 MCAS#0 MCAS#3
MA7 MA8 MA2 MA3 MA4 MA5 MA6 MA0 MA1 MA9 MA10 MA11
TP052
1
TP051
1
TP050
1
TP049
1
VCC
MD16
2
DQ0
MD17
4
DQ1
MD18
6
DQ2
MD19
8
DQ3
MD20
20
DQ4
MD21
22
DQ5
MD22
24
DQ6
MD23
26
DQ7
MD8
49
DQ9
MD9
51
MD10
53
MD11
55
MD12
57
MD13
61
MD14
63
MD15
65
MD0
3
MD1
5
MD2
7
MD3
9
MD4
21
MD5
23
MD6
25
MD7
27
MD24
50
MD25
52
MD26
54
MD27
56
MD28
58
MD29
60
MD30
62
MD31
64
MP2
36
MP1
37
MP0
35
MP3
38
TP27 TP28 TP29
TP30
VCC
MRAS#0 MRAS#1 MRAS#0 MRAS#1
MCAS#6 MCAS#5 MCAS#4 MCAS#7
MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11
TP046
1
TP047
1
TP048
1
TP053
1
47 44
45 34 33
40 43 41 42
12 13 14 15 16 17 18 28 31 32 19 29
67 68 69 70
11 46 48 66 71
10 30 59
U22
W­RAS0-
RAS1­RAS2­RAS3-
CAS0­CAS1­CAS2­CAS3-
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11
ID1 ID2 ID3 ID4
RES1 RES2 RES3 RES4 RES5
VCC VCC VCC
32MX36SIMV
DQ8/P0 DQ17/P1 DQ26/P2 DQ35/P3
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16
DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25
DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
DQ9
MD49
4
MD50
6
MD51
8
MD52
20
MD53
22
MD54
24
MD55
26
MD40
49
MD41
51
MD42
53
MD43
55
MD44
57
MD45
61
MD46
63
MD47
65
MD32
3
MD33
5
MD34
7
MD35
9
MD36
21
MD37
23
MD38
25
MD39
27
MD56
50
MD57
52
MD58
54
MD59
56
MD60
58
MD61
60
MD62
62
MD63
64
MP6
36
MP5
37
MP4
35
MP7
38
INTEL CORPORATION PCI COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
Size Document Number REV
Date: June 20, 1997 Sheet 7 of 26
Memory Modules 0 & 1
C 82430VX B.0
MD48
2
4,7,16
4,7,16
5,7,16
4,7,16
4,7
MP[0..7]
MD[0..63]
MA[0..11]
MRAS#[0..3]
MCAS#[0..7]
4,16
MODULE 3 (BANK 1)MODULE 2 (BANK 1)
MWEB#
THIS DRAWING CONTAINS INFORMATION WHICH HAS NOT BEEN VERIFIED FOR MANUFACTURING AN END USER PRODUCT. INTEL IS NOT RESPONSIBLE FOR THE MISUSE OF THIS INFORMATION.
TP42 TP43 TP44
TP41
U24 47 44
45 34 33
40 43 41 42
12 13 14 15 16 17 18 28 31 32 19 29
67 68 69 70
11 46 48 66 71
10 30 59
W-
RAS0-
RAS1-
RAS2-
RAS3-
CAS0-
CAS1-
CAS2-
CAS3-
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
ID1
ID2
ID3
ID4
RES1
RES2
RES3
RES4
RES5
VCC
VCC
VCC
32MX36SIMV
DQ8/P0 DQ17/P1 DQ26/P2 DQ35/P3
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16
DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25
DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34
MRAS#3 MRAS#2 MRAS#3 MRAS#2
MCAS#2 MCAS#1 MCAS#0 MCAS#3
MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11
TP055
1 1
TP056 TP057
1
TP058
1
VCC
MD16
2
DQ0
MD17
4
DQ1
MD18
6
DQ2
MD19
8
DQ3
MD20
20
DQ4
MD21
22
DQ5
MD22
24
DQ6
MD23
26
DQ7
MD8
49
DQ9
MD9
51
MD10
53
MD11
55
MD12
57
MD13
61
MD14
63
MD15
65
MD0
3
MD1
5
MD2
7
MD3
9
MD4
21
MD5
23
MD6
25
MD7
27
MD24
50
MD25
52
MD26
54
MD27
56
MD28
58
MD29
60
MD30
62
MD31
64
MP2
36
MP1
37
MP0
35
MP3
38
TP45 TP46 TP47
TP48
VCC
MRAS#3 MRAS#2 MRAS#3 MRAS#2
MCAS#6 MCAS#5 MCAS#4 MCAS#7
MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7 MA8 MA9 MA10 MA11
TP061
1
TP060
1
TP059
1
TP054
1
47 44
45 34 33
40 43 41 42
12 13 14 15 16 17 18 28 31 32 19 29
67 68 69 70
11 46 48 66 71
10 30 59
U23
W­RAS0-
RAS1­RAS2­RAS3-
CAS0­CAS1­CAS2­CAS3-
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11
ID1 ID2 ID3 ID4
RES1 RES2 RES3 RES4 RES5
VCC VCC VCC
32MX36SIMV
DQ8/P0 DQ17/P1 DQ26/P2 DQ35/P3
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16
DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25
DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
DQ9
MD49
4
MD50
6
MD51
8
MD52
20
MD53
22
MD54
24
MD55
26
MD40
49
MD41
51
MD42
53
MD43
55
MD44
57
MD45
61
MD46
63
MD47
65
MD32
3
MD33
5
MD34
7
MD35
9
MD36
21
MD37
23
MD38
25
MD39
27
MD56
50
MD57
52
MD58
54
MD59
56
MD60
58
MD61
60
MD62
62
MD63
64
MP6
36
MP5
37
MP4
35
MP7
38
INTEL CORPORATION PCI COMPONENTS DIVISION
1900 PRAIRIE CITY RD. FM5-62 FOLSOM, CA 95630
Title
Size Document Number REV
Date: June 20, 1997 Sheet 8 of 26
Memory Modules 2 & 3
C 82430VX B.0
MD48
2
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