HP AT-42035 Datasheet
Up to 6 GHz Medium Power
Silicon Bipolar Transistor
Technical Data
AT-42035
Features
• High Output Power:
21.0 dBm Typical P
20.5 dBm Typical P
• High Gain at 1 dB
Compression:
14.0 dB Typical
9.5 dB Typical
• Low Noise Figure:
1.9 dB Typical
• High Gain-Bandwidth
Product: 8.0 GHz Typical f
• Cost Effective Ceramic
Microstrip Package
at 2.0␣ GHz
1 dB
at 4.0␣ GHz
1 dB
G
at 2.0␣ GHz
1 dB
G
at 4.0␣ GHz
1 dB
NFO at 2.0␣ GHz
T
Description
Hewlett-Packard’s AT-42035 is a
general purpose NPN bipolar
transistor that offers excellent
high frequency performance. The
AT-42035 is housed in a cost
effective surface mount 100 mil
micro-X package. The 4 micron
emitter-to-emitter pitch enables
this transistor to be used in many
different functions. The 20 emitter
finger interdigitated geometry
yields a medium sized transistor
with impedances that are easy to
match for low noise and medium
power applications. This device is
designed for use in low noise,
wideband amplifier, mixer and
oscillator applications in the VHF,
UHF, and microwave frequencies.
An optimum noise match near
50␣ Ω up to 1 GHz, makes this
device easy to use as a low noise
amplifier.
The AT-42035 bipolar transistor is
fabricated using Hewlett- Packard’s
10 GHz f
(SAT) process. The die is nitride
passivated for surface protection.
Excellent device uniformity,
performance and reliability are
produced by the use of ionimplantation, self-alignment
techniques, and gold metalization
in the fabrication of this device.
Self-Aligned-Transistor
T
35 micro-X Package
4-159
5965-8911E
AT-42035 Absolute Maximum Ratings
[1]
Absolute
Symbol Parameter Units Maximum
V
EBO
V
CBO
V
CEO
I
C
P
T
T
j
T
STG
Notes:
1. Permanent damage may occur if any of these limits are exceeded.
2. T
3. Derate at 5.7 mW/°C for T
4. Storage above +150° C may tarnish the leads of this package making it difficult
5. The small spot size of this technique results in a higher, though more
= 25° C.
CASE
to solder into a circuit. After a device has been soldered into a circuit, it may
be safely stored up to 200°C.
accurate determination of θ
MENTS section “Thermal Resistance” for more information.
Emitter-Base Voltage V 1.5
Collector-Base Voltage V 20
Collector-Emitter Voltage V 12
Collector Current mA 80
Power Dissipation
[2,3]
m W 600
Junction Temperature °C 200
Storage Temperature
> 95° C.
C
than do alternate methods. See MEASURE-
jc
[4]
°C -65 to 200
Thermal Resistance
θjc = 175°C/W
[2,5]
:
Electrical Specifications, T
Symbol Parameters and Test Conditions
|S
|2Insertion Power Gain; VCE = 8 V, IC = 35 mA f = 2.0 GHz dB 10.0 11.0
21E
= 25° C
A
[1]
Units Min. Typ. Max.
f = 4.0 GHz 5.0
P
1 dB
Power Output @ 1 dB Gain Compression f = 2.0 GHz dBm 21.0
VCE = 8 V, IC = 35 mA f= 4.0 GHz 20.5
G
1 dB
1 dB Compressed Gain; VCE = 8 V, IC = 35 mA f = 2.0 GHz dB 14.0
f = 4.0 GHz 9.5
NF
Optimum Noise Figure: VCE = 8 V, IC = 10 mA f = 2.0 GHz dB 2.0
O
f = 4.0 GHz 3.0
G
A
Gain @ NFO; VCE = 8 V, IC = 10 mA f = 2.0 GHz dB 13.5
f = 4.0 GHz 10.0
f
T
h
FE
I
CBO
I
EBO
C
CB
Notes:
1. For this test, the emitter is grounded.
Gain Bandwidth Product: VCE = 8 V, IC = 35 mA GHz 8.0
Forward Current Transfer Ratio; VCE = 8 V, IC = 35 mA — 30 150 270
Collector Cutoff Current; V
Emitter Cutoff Current; V
Collector Base Capacitance
= 8 V µA 0.2
CB
= 1 V µA 2.0
EB
[1]
: VCB = 8 V, f = 1 MHz pF 0.28
4-160
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