HP AT-41435 Datasheet
Up to 6 GHz Low Noise
Silicon␣ Bipolar Transistor
Technical Data
AT-41435
Features
• Low Noise Figure:
1.7 dB Typical at 2.0␣ GHz
3.0 dB Typical at 4.0␣ GHz
• High Associated Gain:
14.0 dB Typical at 2.0␣ GHz
10.0 dB Typical at 4.0␣ GHz
• High Gain-Bandwidth
Product: 8.0 GHz Typical f
• Cost Effective Ceramic
Microstrip Package
T
Description
Hewlett-Packard’s AT-41435 is a
general purpose NPN bipolar
transistor that offers excellent
high frequency performance. The
AT-41435 is housed in a cost
effective surface mount 100 mil
micro-X package. The 4 micron
emitter-to-emitter pitch enables
this transistor to be used in many
different functions. The 14 emitter
finger interdigitated geometry
yields an intermediate sized
transistor with impedances that
are easy to match for low noise
and moderate power applications.
This device is designed for use in
low noise, wideband amplifier,
mixer and oscillator applications
in the VHF, UHF, and microwave
frequencies. An optimum noise
match near 50 Ω at 1 GHz, makes
this device easy to use as a low
noise amplifier.
The AT-41435 bipolar transistor is
fabricated using Hewlett-Packard’s
10 GHz fT Self-Aligned-Transistor
(SAT) process. The die is nitride
passivated for surface protection.
Excellent device uniformity,
performance and reliability are
produced by the use of ionimplantation, self-alignment
techniques, and gold metalization
in the fabrication of this device.
35 micro-X Package
5965-8925E
4-114
AT-41435 Absolute Maximum Ratings
Absolute
Symbol Parameter Units Maximum
V
EBO
V
CBO
V
CEO
I
C
P
T
T
j
T
STG
Notes:
1. Permanent damage may occur if any of these limits are exceeded.
2. T
3. Derate at 5 mW/° C for T
4. Storage above +150° C may tarnish the leads of this package making it
5. The small spot size of this technique results in a higher, though more
= 25° C.
CASE
difficult to solder into a circuit. After a device has been soldered into a
circuit, it may be safely stored up to 200°C.
accurate determination of θ
MENTS section “Thermal Resistance” for more information.
Emitter-Base Voltage V 1.5
Collector-Base Voltage V 20
Collector-Emitter Voltage V 12
Collector Current mA 60
Power Dissipation
[2,3]
m W 500
Junction Temperature °C 200
Storage Temperature
> 100°C.
C
jc
[4]
than do alternate methods. See MEASURE-
°C -65 to 200
[1]
Thermal Resistance
θjc = 200°C/W
[2,5]
:
Electrical Specifications, T
= 25° C
A
Symbol Parameters and Test Conditions Units Min. Typ. Max.
|S
|2Insertion Power Gain; VCE = 8 V, IC = 25 mA f = 2.0 GHz dB 11.5
21E
f = 4.0 GHz 6.0
P
1 dB
Power Output @ 1 dB Gain Compression f = 2.0 GHz dBm 19.0
VCE = 8 V, IC = 25 mA f = 4.0 GHz 18.5
G
1 dB
1 dB Compressed Gain; VCE = 8 V, IC = 25 mA f = 2.0 GHz dB 14.0
f = 4.0 GHz 9.5
NF
Optimum Noise Figure: VCE = 8 V, IC = 10 mA f = 1.0 GHz dB 1.3
O
f = 2.0 GHz 1.7 2.0
f = 4.0 GHz 3.0
G
A
Gain @ NFO; VCE = 8 V, IC = 10 mA f = 1.0 GHz dB 18.5
f = 2.0 GHz 13.0 14.0
f = 4.0 GHz 10.0
f
T
h
FE
I
CBO
I
EBO
C
CB
Note:
1. For this test, the emitter is grounded.
Gain Bandwidth Product: VCE = 8 V, IC = 25 mA GHz 8.0
Forward Current Transfer Ratio; VCE = 8 V, IC = 10 mA — 30 150 270
Collector Cutoff Current; V
Emitter Cutoff Current; V
Collector Base Capacitance
= 8 V µA 0.2
CB
= 1 V µA 1.0
EB
[1]
: VCB = 8 V, f = 1 MHz pF 0.2
4-115
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