Input: 90Vac to 264Vac; Output: 48Vdc @ 2500W; 3.3Vdc or 5 Vdc @ 1A
Features
Universal input with PFC
Constant power characteristic
3 front panel LEDs: 1-input;2-output; 3 - fault
Remote ON/OFF control of the 48Vdc output
Remote sense on the 48Vdc output
No minimum load requirements
Redundant parallel operation
Active load sharing (single wire)
Hot Plug-ability
Efficiency: typically 92% @ 50% load
Standby orderable either as 3.3Vdc or 5Vdc
Auto recoverable OC & OT protection
Operating temperature: -10 - 70C (de-rated above 50C)
Digital status & control: I
EN/IEC/UL60950-1 2
EMI: class B FCC docket 20780 part 15, EN55022
Meets EN6100 immunity and transient standards
Shock & vibration: NEBS GR-63-CORE, level 3
Data Sheet
2
C and PMBus serial bus
nd
edition; UL, CSA and VDE
Description
The CAR2548FP series of Front-End rectifiers provide highly efficient isolated power from worldwide input mains in a
compact 1U industry standard form factor in an unprecedented power density of 27W/in
complement the CAR2548DC converter, providing comprehensive solutions for systems connected either to
commercial ac mains, 48/60Vdc power plants or telecom central offices. This plug and play approach offers
significant advantages since systems can be reconfigured and repositioned readily by simply replacing the power
supply. The high-density, front-to-back airflow is designed for minimal space utilization and is highly expandable for
future growth. The industry standard PMBus compliant I
2
C communications buss offers a full range of control and
monitoring capabilities. The SMBusAlert signal pin alerts customers automatically of any state change within the
power supply.
* UL is a registered trademark of Underwriters Laboratories, Inc.
† CSA is a registered trademark of Canadian Standards Association.
‡ VDE is a trademark of Verband Deutscher Elektrotechniker e.V.
§ Intended for integration into end-user equipment. All the required procedures for CE marking of end-user equipment should be followed. (The CE mark is placed on selected products.)
** ISO is a registered trademark of the International Organization of Standards.
+ PMBus name and logo are registered trademarks of the System Management Interface Forum (SMIF)
Input: 90Vac to 264Vac; Output: 12 Vdc @ 208A; 3.3Vdc or 5 Vdc @ 1A
Absolute Maximum Ratings
Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are absolute stress ratings only, functional
operation of the device is not implied at these or any other conditions in excess of those given in the operations sections of the data sheet.
Exposure to absolute maximum ratings for extended periods can adversely affect the device reliability.
Parameter Symbol Min Max Unit
Input Voltage: Continuous VIN 0 264 Vac
Operating Ambient Temperature TA -10 701 °C
Storage Temperature Tstg -40 85 °C
I/O Isolation voltage to Frame (100% factory Hi-Pot tested) 1500 Vac
Electrical Specifications
Unless otherwise indicated, specifications apply over all operating input voltage, load, and temperature conditions.
INPUT
Parameter Symbol Min Typ Max Unit
Operational Range VIN 90 110/230 264 Vac
F
Frequency Range
Main Output Turn_OFF
Maximum Input Current, (VIN= 180Vac, VO= V
O, set
, IO=I
O, max
Cold Start Inrush Current
(Excluding x-caps, 25C, <10ms, per ETSI 300-132)
Efficiency, (T
Power Factor, (Vin=230Vac, IO=I
=25C, Vin= 230Vac, V
amb
= 48Vdc, IO=I
out
) PF 0.99
O, max
O, max
Holdup time, (Vin= 230Vac, Vout= 48Vdc, Tamb 25C,IO=I
) I
)
)
O, max
IN
V
IN
IN
I
IN
T 16.8 ms
Early warning prior to loss of DC output below regulation 2 ms
Ride through T 8.3 ms
Leakage Current, (Vin= 250Vac, Fin = 60Hz) I
IN
Isolation Input/Output
Input/Frame 1500 V
Output/Frame 100 V
48Vdc MAIN OUTPUT
Parameter Symbol Min Typ Max Unit
Output Power High Line Operation (180 – 264 Vac)
Low Line Operation: 99Vac [Z03A/Z01A]
90 – 98 Vac [Z03A/Z01A]
Set point
Overall regulation (load, temperature, aging) -3 +3 %
Ripple and noise2 540
Turn-ON overshoot +3 %
Turn-ON delay
Remote ON/OFF delay time 40 ms
Turn-ON rise time (10 – 90% of V
)
out
W
V
out
T
47 50/60 63 Hz
80 V
ac
16 Aac
50 A
peak
92 %
3 mArms
3000 V
0 - 2500 W
0
0
-
1300/1000
1200/1000
47.95 48.00 48.05 V
mV
ac
ac
dc
W
dc
p-p
2 sec
50 ms
1
Derated above 50C at 2.5%/C
2
Measured across a 10µf electrolytic and a 0.1µf ceramic capacitors in parallel. 20MHz bandwidth
Programmable range (hardware & software) 43.2 52.8
Overvoltage protection, latched
(recovery by cycling OFF/ON via hardware or software)
Output current 0 52
Current limit, Hiccup (programmable level) 57.3 67.7
Active current share -5 +5 % of FL
V
out
I
out
I
out
STANDBY OUTPUT
Parameter Symbol Min Typ Max Unit
Set point V
Overall regulation (load, temperature, aging) V
Ripple and noise 50 mVp-p
Output current I
Isolation Output/Frame 100
3.3 / 5.0 V
out
-5 +5 %
out
out
-5 +5 %V
58 59 60
0 1 A
out
V
dc
V
dc
A
dc
A
dc
dc
dc
V
dc
General Specifications
Parameter Min Typ Max Units Notes
Reliability 100,000
Hrs
Full load, 50C ; MTBF per SR232 Reliability
protection for electronic equipment, method I,
case III,
Service Life 10 Yrs Full load, excluding fans
Weight
Kgs
(Lbs)
Feature Specifications
Unless otherwise indicated, specifications apply over all operating input voltage, resistive load, and temperature conditions. See
Feature Descriptions for additional information.
Parameter Symbol Min Typ Max Unit
Remote ON/OFF (Needs to be pulled HI via an external resistor)
Logic High (Module ON) I
Input: 90Vac to 264Vac; Output: 12 Vdc @ 208A; 3.3Vdc or 5 Vdc @ 1A
Feature Specifications (continued)
Parameter Symbol Min Typ Max Unit
SMBAlert# (Interrupt) (Needs to be pulled HI via an external
Logic High (No Alert - normal) I
V
Logic Low (Alert is set) I
V
Output current monitor (Imon)
Resolution
Measurement range IO 0 208 ADC
Measurement accuracy, load > 25% of FL -10 +10 %
Analog output range V
Sourced output current IO 5 mADC
Digital Interface Specifications
Parameter Conditions Symbol Min Typ Max Unit
PMBus Signal Interface Characteristics
Input Logic High Voltage (CLK, DATA) VIH 2.1 3.6 VDC
Input Logic Low Voltage (CLK, DATA) VIL 0 0.8 VDC
Input high sourced current (CLK, DATA) IIH 0 10 μA
Output Low sink Voltage (CLK, DATA, SMBALERT#) I
Output Low sink current (CLK, DATA, SMBALERT#) IOL 3.5 mA
Output High open drain leakage current
(CLK,DATA, SMBALERT#)
PMBus Operating frequency range Slave Mode FPMB 10 400 kHz
Measurement System Characteristics (all measurement tolerances are typical estimations under normal operating conditions)
Clock stretching
I
measurement range
OUT
I
measurement accuracy 25°C
OUT
V
measurement range
OUT
V
measurement accuracy
OUT
Temp measurement range
Temp measurement accuracy3
IIN measurement range
IIN measurement accuracy
VIN measurement range
VIN measurement accuracy
PIN measurement range
PIN measurement accuracy
Fan Speed measurement range Linear 0 30k RPM
Fan Speed measurement accuracy -5 5 %
Fan speed control range -direct- 0 100 %
=3.5mA VOL 0.4 VDC
OUT
=3.6V I
V
OUT
Linear
Linear
Linear
Linear
Linear
Linear
OH
OH
OL
0
OL
0 3.3 VDC
mon
OH
0.7V
DD
15 mV/A
0 10 μA
20 µA
12 V
DC
20 mA
0.4 VDC
tSTRETCH 25 ms
I
RNG
I
ACC
V
OUT(rng)
V
OUT(acc)
Temp
(rng)
Temp
(acc)
I
0 40 AAC
IN(rng)
I
IN(acc)
V
IN(rng)
V
IN(acc)
P
0 3000 W
N(rng)
P
IN(acc)
0 208 A
DC
-3 +3 % of FL
0 14 VDC
-3 +3 %
0 120
-5 +5
C
C
-5 +5 %
0 264 VAC
-3 +3 %
-5 +5 %
3
Temperature accuracy reduces non-linearly with decreasing temperature
Input: -36Vdc to -75Vdc; Output: +12 Vdc @ 850W; 3.3Vdc or 5 Vdc @ 1A
Control and Status
Control hierarchy: Some features, such as output voltage,
can be controlled both through hardware and firmware. For
example, the output voltage is controlled both by the signal
pin (Vprog) and the PMBus command, (Vout_command) .
Using output voltage as an example; the Vprog signal pin has
ultimate control of the output voltage until the Vprog is either
> 3Vdc or a no connect. When the programming signal via
Vprog is either a no connect or > 3Vdc, it is ignored, the
output voltage is set at its nominal 12Vdc and the unit output
voltage can be controlled via the PMBus command,
(Vout_command).
Analog controls:Details of analog controls are provided in
this data sheet under Signal Definitions.
Common ground:All signals and outputs are referenced to
Output return. These include ‘Vstb return’ and ‘Signal return’.
Control Signals
Voltage programming (V
signal can vary the output voltage ± 10% from 43.2Vdc to
52.8Vdc. The equation of this signal is:
= 43.2 + 3.3 (V
V
out
If Vprog is > 3V or left open the programming signal is ignored
and the unit output is set at the setpoint of 48Vdc.
Load share (Ishare):This is a single wire analog signal that is
generated and acted upon automatically by power supplies
connected in parallel. The Ishare pins should be tied together
for power supplies if active current share among the power
supplies is desired. No resistors or capacitors should get
connected to this pin.
Remote_ON/OFF:Controls presence of the 12Vdc output
voltage. This is an open collector, TTL level control signal that
needs to be pulled HI externally through a resistor.
A turn OFF command either through this signal (Remote
ON/OFF) or firmware commanded would turn OFF the 12V
output.
Enable:This is a short signal pin that controls the presence of
the 12Vdc main output. This pin should be connected to
‘output return’ on the system side of the output connector.
The purpose of this pin is to ensure that the output turns ON
after engagement of the power blades and turns OFF prior to
disengagement of the power blades.
Write protect (WP):This signal protects the contents of the
EEPROM from accidental over writing. When left open the
EEPROM is write protected. A LO (TTL compatible) permits
writing to the EEPROM. This signal is pulled HI internally by the
power supply.
prog
Status signals
Output current monitor (Imon): A voltage level proportional
to the delivered output current is present on this pin. The
signal level is 0. 1V per amp ± 0.25V.
AC OK: A TTL compatible status signal representing whether
the input voltage is within the anticipated range. This signal is
internally pulled HI to 3.3V via a 10kΩ resistor. A (HI) on this
): An analog voltage on this
prog
– 0.09) 0.09 < V
prog
< 3
signal indicates that the input voltage is applied within the
specified input range.
DC OK: A TTL compatible status signal representing
whether the output voltage is present. This signal is internally
pulled HI to 3.3V via a 10kΩ resistor. A (HI) on this signal
indicates that the output voltage is present.
Over temp warning: A TTL compatible status signal
representing whether an over temperature exists. This signal
needs to be pulled HI externally through a resistor. Open
collector (HI) on this signal indicates that temperatures are
normal.
If an over temperature should occur, this signal would pull LO
for approximately 10 seconds prior to shutting down the
power supply. The unit would restart if internal temperatures
recover within normal operational levels. At that time the
signal reverts back to its open collector (HI) state.
Fault: A TTL compatible status signal representing whether
a Fault occurred. This signal needs to be pulled HI externally
through a resistor. Open collector (HI) on this signal indicates
that no Fault is present.
This signal activates for OTP, OVP, OCP, AC fault or No output.
PS Present: This pin is connected to ‘output return’ within
the power supply. Its intent is to indicate to the system that a
power supply is present. This signal may need to be pulled HI
externally through a resistor.
Interrupt (SMBAlert#): A TTL compatible status signal,
representing the SMBusAlert# feature of the PMBus
compatible i
to be pulled HI externally through a resistor.
2
C protocol in the power supply. This signal needs
Serial Bus Communications
The I²C interface facilitates the monitoring and control of
various operating parameters within the unit and transmits
these on demand over an industry standard I²C Serial bus.
All signals are referenced to ‘Signal Return’.
Device addressing:The microcontroller (MCU) and the
The Global Broadcast instruction executes a simultaneous
write instruction to all power supplies. A read instruction
cannot be accessed globally. The three programmable
address bits are the same for all I
the power supply.
Address lines (A2, A1, A0): These signal pins allow up to eight
(8) modules to be addressed on a single I²C bus. The pins are
pulled HI internal to the power supply. For a logic LO these
pins should be connected to ‘Output Return’
Serial Clock (SCL):The clock pulses on this line are generated
by the host that initiates communications across the I²C
Serial bus. This signal is pulled up internally to 3.3V by a 10kΩ
Input: 90Vac to 264Vac; Output: 48Vdc @ 2500W; 3.3Vdc or 5 Vdc @ 1A
resistor. The end user should add additional pull up resistance
as necessary to ensure that rise and fall time timing and the
maximum sink current is in compliance to the I²C
specifications.
Serial Data (SDA):This line is a bi-directional data line. . This
signal is pulled up internally to 3.3V by a 10kΩ resistor. The
end user should add additional pull up resistance as
necessary to ensure that rise and fall time timing and the
maximum sink current is in compliance to the I²C
specifications.
Digital Feature Descriptions
PMBus™ compliance: The power supply is fully compliant to
the Power Management Bus (PMBus™) rev1.2 requirements.
Manufacturer specific commands located between addresses
0xD0 to 0xEF provide instructions that either do not exist in
the general PMBus specification or make the communication
interface simpler and more efficient.
Master/Slave: The ‘host controller’ is always the MASTER.
Power supplies are always SLAVES. SLAVES cannot initiate
communications or toggle the Clock. SLAVES also must
respond expeditiously at the command of the MASTER as
required by the clock pulses generated by the MASTER.
Clock stretching: The ‘slave’ µController inside the power
supply may initiate clock stretching if it is busy and it desires
to delay the initiation of any further communications. During
the clock stretch the ‘slave’ may keep the clock LO until it is
ready to receive further instructions from the host controller.
The maximum clock stretch interval is 25ms.
The host controller needs to recognize this clock stretching,
and refrain from issuing the next clock signal, until the clock
line is released, or it needs to delay the next clock pulse
beyond the clock stretch interval of the power supply.
Note that clock stretching can only be performed after
completion of transmission of the 9
being the START command.
Figure 1. Example waveforms showing clock stretching.
I²C Bus Lock-Up detection: The device will abort any
transaction and drop off the bus if it detects the bus being
held low for more than 35ms.
Communications speed: Both 100kHz and 400kHz clock
rates are supported. The power supplies default to the
100kHz clock rate. The minimum clock speed specified by
SMBus is 10 kHz.
Packet Error Checking (PEC): Although the power supply will
respond to commands with or without the trailing PEC, it is
highly recommended that PEC be used in all communications.
The integrity of communications is compromised if packet
th
ACK bit, the exception
Clock
Stretch
error correction is not employed. There are many functional
features, including turning OFF the main output, that should
require validation to ensure that the correct command is
executed.
PEC is a CRC-8 error-checking byte, based on the polynomial
8
+ x2 + x + 1, in compliance with PMBus™
C(x) = x
requirements. The calculation is based in all message bytes,
including the originating write address and command bytes
preceding read instructions. The PEC is appended to the
message by the device that supplied the last byte.
SMBAlert#: The µC driven SMBAlert# signal informs the
‘master/host’ controller that either a STATE or ALARM change
has occurred. Normally this signal is HI. The signal will change
to its LO level if the power supply has changed states and the
signal will be latched LO until the power supply either receives
a ‘clear’ instruction as outlined below or executes a READ
STATUS_WORD. If the alarm state is still present after the
STATUS registers were reset, then the signal will revert back
into its LO state again and will latch until a subsequent reset
signal is received from the host controller.
The signal will be triggered for any state change, including
the following conditions;
VIN under or over voltage
Vout under or over voltage
IOUT over current
Over Temperature warning or fault
Fan Failure
Communication error
PEC error
Invalid command
Detected internal faults
The power supply will clear the SMBusAlert# signal (release
the signal to its HI state) upon the following events:
Receiving a CLEAR_FAULTS command
The main output recycled (turned OFF and then ON) via
the ENABLE signal pin
The main output recycled (turned OFF and then ON) by
the OPERATION command
Execution of a READ of the STATUS_WORD register
Global broadcast: This is a powerful command because it
can instruct all power supplies to respond simultaneously in
one command. But it does have a serious disadvantage. Only
a single power supply needs to pull down the ninth
acknowledge bit. To be certain that each power supply
responded to the global instruction, a READ instruction should
be executed to each power supply to verify that the
command properly executed. The GLOBAL BROADCAST
command should only be executed for write instructions to
slave devices.
Read back delay: The power supply issues the SMBAlert #
notification as soon as the first state change occurred.During
an event a number of different states can be transitioned to
before the final event occurs. If a read back is implemented
rapidly by the host a successive SMBAlert# could be triggered
by the transitioning state of the power supply. In order to
avoid successive SMBAlert# s and read back and also to
avoid reading a transitioning state, it is prudent to wait more
than 2 seconds after the receipt of an SMBAlert# before
Input: 90Vac to 264Vac; Output: 48Vdc @ 2500W; 3.3Vdc or 5 Vdc @ 1A
executing a read back. This delay will ensure that only the
final state of the power supply is captured.
Successive read backs: Successive read backs to the power
supply should not be attempted at intervals faster than every
one second. This time interval is sufficient for the internal
processors to update their data base so that successive
reads provide fresh data.
PMBusTM Commands
Standard instruction: Up to two bytes of data may follow an
instruction depending on the required data content. Analog
data is always transmitted as LSB followed by MSB. PEC is
optional and includes the address and data fields.
1 8 1 8 1
S Slave address Wr A Command Code A
8 1 8 1 8 1 1
Low data byte A High data byte A PEC A P
Master to Slave Slave to Master
SMBUS annotations; S – Start , Wr – Write, Sr – re-Start, Rd
– Read,
A – Acknowledge, NA – not-acknowledged, P – Stop
Standard READ:
Up to two bytes of data may follow a READ
request depending on the required data content. Analog
data is always transmitted as LSB followed by MSB. PEC is
mandatory and includes the address and data fields
optional and includes the address and data fields.
1 7 1 1 8 1
S Slave address Wr A Command Code A
1 7 1 1 8 1
Sr Slave Address Rd A LSB A
8 1 8 1 1
MSB A PEC No-ack P
Block communications: When writing or reading more than
two bytes of data at a time BLOCK instructions for WRITE and
READ commands must be used instead of the Standard
Instructions Error! Reference source not found. write any
number of bytes greater than two.
Block write format:
1 7 1 1 8 1
S Slave address Wr A Command Code A
8 1 8 1 8 1
Byte count = N A Data 1 A Data 2 A
8 1 8 1 8 1 1
………. A Data 48 A PEC A P
. PEC is
Block read format:
1
S Slave address Wr A Command Code A
7 1 1 8 1
1 7 1 1
Sr Slave Address Rd A
8 1 8 1 8 1
Byte count = N A Data 1 A Data 2 A
8 1 8 1 8 1 1
………. A Data 48 A PEC NoAck P
Linear Data FormatThe definition is identical to Part II of the
PMBus Specification. All standard PMBus values, with the
exception of output voltage related functions, are
represented by the linear format described below. Output
voltage functions are represented by a 16 bit mantissa.
Output voltage has a E=9 constant exponent.
The Linear Data Format is a two byte value with an 11-bit,
two’s complement mantissa and a 5-bit, two’s complement
exponent or scaling factor, its format is shown below.
Data Byte High Data Byte Low
Bit 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0
Exponent (E) Mantissa (M)
The relationship between the Mantissa, Exponent, and Actual
Value (V) is given by the following equation:
E
MV2
Where: V is the value, M is the 11-bit, two’s
omplement mantissa, E is the 5-bit, two’s complement
exponent
PMBusTM Command set:
Command
Operation 01 1 Output ON/OFF
ON_OFF_config 02 1 09, output ON default
Clear_faults 03 0 Clear Status
Write_protect 10 1 Write control
Operation (01) : By default the Power supply is turned ON at
power up as long as Power ON/OFF signal pin is active HI. The
Operation command is used to turn the Power Supply ON or
OFF via the PMBus. The data byte below follows the
OPERATION command.
FUNCTION DATA BYTE
Unit ON 80
Unit OFF 00
To RESET the power supply cycle the power supply OFF, wait
at least 2 seconds, and then turn back ON. All alarms and
shutdowns are cleared during a restart.
Clear_faults (03): This command clears all STATUS and
FAULT registers and resets the SMBAlert# line.
If a fault still persists after the issuance of the clear_faults
command the specific registers indicating the fault are reset
and the SMBAlert# line is activated again.
WRITE_PROTECT register (10): Used to control writing to the
PMBus device. The intent of this command is to provide
protection against accidental changes. All supported
command parameters may have their parameters read,
regardless of the write_protect settings. The contents of this
register can be stored to non-volatile memory using the
Store_default_code command. The default setting of this
register is disable_all_writes except write_protect 0x80h.
Enable all writes 00
Disable all writes except write_protect 80
Disable all writes except write_protect and
OPERATION
Vout_Command (21) : This command is used to change the
output voltage of the power supply. Changing the output
voltage should be performed simultaneously to all power
supplies operating in parallel using the Global Address
(Broadcast) feature. If only a single power supply is instructed
to change its output, it may attempt to source all the required
power which can cause either a power limit or shutdown
condition.
FUNCTION DATA BYTE
40
Software programming of output voltage permanently
overrides the set point voltage configured by the Vprog
signal pin. The program no longer looks at the ‘Vprog pin’ and
will not respond to any hardware voltage settings. If power is
removed from the µController it will reset itself into its default
configuration looking at the Vprog signal for output voltage
control. In many applications, the Vprog pin is used for
setting initial conditions, if different that the factory setting.
Software programming then takes over once I
communications are established.
To properly hot-plug a power supply into a live backplane, the
system generated voltage should get re-configured into
either the factory adjusted firmware level or the voltage level
reconfigured by the margin pin. Otherwise, the voltage state
of the plugged in power supply could be significantly different
than the powered system.
Vout_OV_warn_limit (42): OV_warning is extremely useful
because it gives the system controller a heads up that the
output voltage is drifting out of regulation and the power
supply is close to shutting down. Pre-amative action may be
taken before the power supply would shut down and
potentially disable the system.
OC and OT_fault_ response (47, 50): The default response for
both OC and OT is auto_restart (hiccup). Each register,
individually, can be reconfigured into a latched state.
Latched and hiccup are the only supported states.
Restart after a latch off: Either of four restart possibilities are
available. The hardware pin Remote ON/OFF may be turned
OFF and then ON. The unit may be commanded to restart via
i2c through the Operation command by first turning OFF then
turning ON . The third way to restart is to remove and reinsert
the unit. The fourth way is to turn OFF and then turn ON ac
power to the unit. The fifth way is by changing firmware from
latch off to restart. Each of these commands must keep the
power supply in the OFF state for at least 2 seconds, with the
exception of changing to restart.
A power system that is comprised of a number of power
supplies could have difficulty restarting after a shutdown
event because of the non-synchronized behavior of the
individual power supplies. Implementing the latch-off
mechanism permits a synchronized restart that guarantees
the simultaneous restart of the entire system.
A synchronous restart can be implemented by;
1. Issuing a GLOBAL OFF and then ON command to all power
supplies,
2. Toggling Off and then ON the Remote ON/OFF signal
3. Removing and reapplying input commercial power to the
entire system.
The power supplies should be turned OFF for at least 20 – 30
seconds in order to discharge all internal bias supplies and
reset the soft start circuitry of the individual power supplies.
Auto_restart: Auto-restart is the default configuration for
recovering from over-current and over-temperature
shutdowns.
An overvoltage shutdown is followed by three attempted
restarts, each restart delayed 1 second, within a 1 minute
window. If within the 1 minute window three attempted
restarts failed, the unit will latch OFF. If less than 3
shutdowns occur within the 1 minute window then the count
Input: 90Vac to 264Vac; Output: 48Vdc @ 2500W; 3.3Vdc or 5 Vdc @ 1A
for latch OFF resets and the 1 minute window starts all over
again.
Vin_UV_warn_limit (58): This is another warning flag
indicating that the input voltage is decreasing dangerously
close to the low input voltage shutdown level.
Status_word (79): returns two bytes of information. The
upper byte bit functionality is tabulated in the Status_word
section. The lower byte bit functionality is identical to
Status_byte.
Fan_speed (D7): This register can be used to ‘read’ the fan
speed in adjustment percent (0 – 100%) or set the fan speed
in adjustment percent (0 – 100%). The speed of the fan
cannot be reduced below what the power supply requires for
its operation. The register value is the percent number, it is
not in linear format.
Invalid commands or data: The power supply notifies the
MASTER if a non-supported command has been sent or
invalid data has been received. Notification is implemented
by setting the appropriate STATUS and ALARM registers and
setting the SMBAlert# flag.
If a non-supported read is requested the power supply will
return all 0x00h.
Restart after a lachoff: To restart after a latch_off either of
four restart mechanisms are available. The hardware pin
Remote ON/OFF may be turned OFF and then ON. The unit
may be commanded to restart via i2c through the Operation
command by first turning OFF then turning ON . The third way
to restart is to remove and reinsert the unit. The fourth way is
to turn OFF and then turn ON ac power to the unit. The fifth
way is by changing firmware from latch off to restart. Each
of these commands must keep the power supply in the OFF
state for at least 2 seconds, with the exception of changing to
restart.
A successful restart shall clear all alarm registers.
A power system that is comprised of a number of power
supplies could have difficulty restarting after a shutdown
event because of the non-synchronized behavior of the
individual power supplies. Implementing the latch-off
mechanism permits a synchronized restart that guarantees
the simultaneous restart of the entire system.
A synchronous restart can be implemented by;
1. Issuing a GLOBAL OFF and then ON command to all power
supplies,
2. Toggling Off and then ON the Remote ON/OFF signal
3. Removing and reapplying input commercial power to the
entire system.
It is good practice to turn OFF the power supplies for about
20 – 30 seconds in order to discharge all internal bias supplies
and reset the soft start circuitry of the individual power
supplies.
Control and Read accuracy:
The estimates below are believed to be reasonable under
most operating conditions. However, these are typical
numbers and not hard bound values that cannot be
exceeded. In most nominal operating conditions the returned
values are significantly better than these estimates.
The microcontroller has 96 bytes of EEPROM memory
available for the system host.
Another separate EEPROM IC will provide another 128 bytes
of memory with write protect feature. Minimum information
to be included in this separate EEPROM: model number,
revision, date code, serial number etc.
LEDs
Three LEDs are located on the front faceplate. The
AC_OK LED provides visual indication of the INPUT signal
function. When the LED is ON GREEN the power supply
input is within normal design limits.
When the DC_OK LED is GREEN the DC output is
present.
When the FAULT_LED is RED then a fault condition exists
and the power supply may not provide output power. The
table below further defines these states: