Datasheet TEA1201TS Datasheet (Philips)

Page 1
查询TEA1201TS供应商查询TEA1201TS供应商
INTEGRATED CIRCUITS
DATA SH EET
TEA1201TS
0.95 V starting basic power unit
Product specification 2002 Jun 06
Page 2
Philips Semiconductors Product specification
CONTENTS
1 FEATURES 2 APPLICATIONS 3 GENERAL DESCRIPTION 4 ORDERING INFORMATION 5 QUICK REFERENCE DATA 6 BLOCK DIAGRAM 7 PINNING INFORMATION
7.1 Pinning
7.2 Pin description 8 FUNCTIONAL DESCRIPTION
8.1 Control mechanism
8.2 Synchronous rectification
8.3 Start-up
8.4 Undervoltage lockout
8.5 Shut-down
8.6 Power switches
8.7 Temperature protection
8.8 Current limiters
8.9 External synchronization and PWM-only mode
8.10 Behaviour at input voltage exceeding the specified range
8.11 Control of the additional switch
8.12 Low battery detector
9 LIMITING VALUES 10 THERMAL CHARACTERISTICS 11 QUALITY SPECIFICATION 12 CHARACTERISTICS 13 APPLICATION INFORMATION
13.1 External component selection
14 PACKAGE OUTLINE 15 SOLDERING
15.1 Introduction to soldering surface mount packages
15.2 Reflow soldering
15.3 Wave soldering
15.4 Manual soldering
15.5 Suitability of surface mount IC packages for wave and reflow soldering methods
16 DATA SHEET STATUS 17 DEFINITIONS 18 DISCLAIMERS
2002 Jun 06 2
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Philips Semiconductors Product specification
1 FEATURES
Complete DC-to-DC converter circuit, one current
switch and a battery low detector
Configurable for 1, 2 or 3-cell Nickel-Cadmium (NiCd)
or Nickel Metal Hydride (NiMH) batteries and 1 Lithium Ion (Li-Ion) battery
Guaranteed DC-to-DC converter start-up from 1-cell
NiCd or NiMH battery, even with a load current
Upconversion or downconversion
Internal power MOSFETs featuring a low R
DSon
of
approximately 0.1
Synchronous rectification for high efficiency
Soft start
PWM-only operating option
Stand-alone low battery detector requires no additional
supply voltage
Low battery detection level at 0.90 V, externally
adjustable to a higher level
Adjustable output voltages
Shut-down function
Small outline package
Advanced 0.6 µm BICMOS process.
2 APPLICATIONS
Cellular phones
Cordless phones
Personal Digital Assistants (PDAs)
Portable audio players
Pagers
Mobile equipment.
3 GENERAL DESCRIPTION
The TEA1201TS is a fully integrated battery power unit including ahigh-efficiency DC-to-DC converter which runs from a 1-cell NiCd or NiMH battery, a currentswitch and a lowbattery detector. Thecircuit can bearrangedin several ways to optimize the application circuit of a power supply system. Therefore, the DC-to-DC converter can be arranged for upconversionor downconversionand the low battery detector can be configured for several types of batteries. Accurate low battery detection is possible while all other blocks are switched off.
The DC-to-DC converter features efficient, compact and dynamic power conversion using a digital control concept comparable with Pulse Width Modulation (PWM) and Pulse Frequency Modulation (PFM), integrated CMOS power switches with a very low R
DSon
and fully
synchronous rectification. The device operates at a switching frequency of 600 kHz
which enables the use of external components with minimum size. The switching frequency can be synchronized to an external high frequency clock signal. Optionally, the device can be kept in PWM control mode only. Deadlock is prevented by an on-chip undervoltage lockout circuit.
Active current limiting enables efficient conversion in pulsed-load systems such as Global System for Mobile communication (GSM) and Digital Enhanced Cordless Telecommunications (DECT).
The switch canbe usedto controlthe connection of (a part of) the output load. It shows a low pin-to-pin resistance of 500 m.
The low battery detector has a built-in detection level which is optimum for a 1-cell NiCd or NiMH battery.
4 ORDERING INFORMATION
TYPE
NUMBER
NAME DESCRIPTION VERSION
PACKAGE
TEA1201TS SSOP16 plastic shrink small outline package; 16 leads; body width 4.4 mm SOT369-1
2002 Jun 06 3
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Philips Semiconductors Product specification
5 QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
DC-to-DC converter
UPCONVERSION V
I(up)
V
O(up)
V
I(start)
V
O(uvlo)
DOWNCONVERSION V
I(dwn)
V
O(dwn)
CURRENT LEVELS I
q(DCDC)
I
shdwn
I
LX(max)
I
lim
POWER MOSFETS R
DSon(N)
R
DSon(P)
EFFICIENCY η efficiency upconversion VOup to 3.3 V; see Fig.9
TIMING f
sw
f
i(sync)
t
start
Switch
R
DSon
I
O(max)
General characteristics
V
ref
input voltage V output voltage V
I(start) O(uvlo)
5.50 V
5.50 V
start-up input voltage IL< 10 mA 0.93 0.96 1.00 V undervoltage lockout voltage 2.0 2.2 2.4 V
input voltage V
O(uvlo)
5.50 V
output voltage 1.30 5.50 V
quiescent current at pin
110 −µA
UPOUT/DNIN current in shut-down mode V maximum continuous current at
LBI1=VI(up)
T
=80°C −−1.0 A
amb
= 1.2 V 65 −µA
pins LX1 and LX2 current limit deviation I
set to 1.0 A
lim
upconversion 12 +12 % downconversion 12 +12 %
drain-to-source on-state
Tj=27°C; IDS= 100 mA 110 200 m
resistance NFET drain-to-source on-state
Tj=27°C; IDS= 100 mA 125 250 m
resistance PFET
V
= 1.2 V; IL= 100 mA 84 %
I
V
= 2.4 V; IL=10mA 92 %
I
switching frequency PWM mode 480 600 720 kHz synchronization clock input
6 1320MHz
frequency start-up time 10 ms
drain-to-source resistance in switched-on state
maximum output current in
V
O(up)=VI(down)
V
< 0.4 V
FB1
V
< 0.4 V −−0.40 A
FB1
=5V;
500 750 m
switched-on state
reference voltage 1.165 1.190 1.215 V
2002 Jun 06 4
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Philips Semiconductors Product specification
Philips Semiconductors Product specification
0.95 V starting basic power unit TEA1201TS
0.95 V starting basic power unit TEA1201TS
6 BLOCK DIAGRAM
SHDWN0
TEA1201TS
FB1
OUT1
7
6
DETECTOR
LOW BATTERY
UPOUT/DNIN
3, 4
SUPPLY
INTERNAL
P-type
POWER FET
GND
8
CIRCUIT
START-UP
sense FET
FB0
12
ref
V
AND
MODE GEARBOX
CONTROL LOGIC
ref
COMPARATOR
CURRENT LIMIT
V
FET
sense
ref
V
11
VOLTAGE
REFERENCE
TIME
COUNTER
DIGITAL CONTROLLER
GATE
SYNC
13 MHz
PROTECTION
TEMPERATURE
OSCILLATOR
MGW787
SHDWN0
Fig.1 Block diagram.
1413 2 15
SYNC/PWM U/D
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2002 Jun 06 5
2002 Jun 06 5
9
LBI1
handbook, full pagewidth
10
LBO
GND0
FET
N-type
16
LX2
5
ILIM
1
LX1
POWER
Page 6
Philips Semiconductors Product specification
7 PINNING INFORMATION
7.1 Pinning
handbook, halfpage
SHDWN0 UPOUT/DNIN UPOUT/DNIN
LX1
ILIM
OUT1
FB1
GND
1 2 3 4
TEA1201TS
5 6 7 8
MGW788
LX2
16
U/D
15
SYNC/PWM
14
GND0
13
FB0
12
V
11
ref
LBO
10
LBI1
9
Fig.2 Pin configuration.
7.2 Pin description Table 1 SSOP16 package
SYMBOL PIN DESCRIPTION
LX1 1 inductor connection 1 SHDWN0 2 DC-to-DC converter shut-down input UPOUT/DNIN 3 up mode: DC-to-DC converter output; down mode: DC-to-DC converter input UPOUT/DNIN 4 ILIM 5 current limiting resistor connection OUT1 6 switch output FB1 7 switch control input GND 8 internal supply ground LBI1 9 low battery detector input 1 LBO 10 low battery detector output V
ref
11 reference voltage FB0 12 DC-to-DC converter feedback input GND0 13 DC-to-DC converter ground SYNC/PWM 14 synchronization clock input or PWM-only selection input U/D 15 conversion mode selection input LX2 16 inductor connection 2
2002 Jun 06 6
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Philips Semiconductors Product specification
8 FUNCTIONAL DESCRIPTION
8.1 Control mechanism
The TEA1201TSDC-to-DC converter isable to operatein PFM (discontinuous conduction) or PWM (continuous conduction) operating mode. All switching actions are completely determined by a digital control circuit which usesthe output voltagelevelas its controlinput.This novel digital approach enables the use of a new pulse widthand frequency modulation scheme, which ensures optimum power efficiency over the complete range of operation of the converter.
When high output power is requested, the device will operate in PWM (continuousconduction) operatingmode. This results in minimum AC currents in the circuit components and hence optimum efficiency, minimum costs and low EMC. In this operating mode, the output voltage isallowed to varybetween two predefined voltage levels. As long as the output voltage stays within this so-called window, switching continues in a fixed pattern.
When the output voltage reaches one of the window borders, the digital controller immediately reacts by adjusting the pulse width and inserting a current step in such a waythat theoutput voltagestays within the window with higher or lower current capability. This approach enables very fast reaction to load variations. Figure 3 shows the response of the converter to a sudden load increase. The upper trace shows the output voltage.
The ripple on top of the DC level is a result of the current in the output capacitor, which changes in sign twice per cycle, times the internal Equivalent Series Resistance (ESR) of the capacitor. After each ramp-down of the inductor current, i.e. when the ESR effect increases the output voltage, the converter determines what to do in the next cycle. As soon as more loadcurrent is taken from the output the output voltage starts to decay.
Figure 4 shows the spread of the output voltage window. The absolute value is mostly dependent on spread, while the actual window size (V affected. For one specific device, the output voltage will not vary more than 2% (typical value).
In lowoutput power situations,the TEA1201TS willswitch over to PFM (discontinuous conduction) operating mode. In this mode, regulation information from an earlier PWM operating mode is used. This results in optimum inductor peak current levels in the PFM mode, which are slightly larger than the inductor ripple current in the PWM mode. As a result,the transitionbetween PFMand PWM mode is optimum under all circumstances. In the PFM mode the TEA1201TS regulates the output voltage to the high window limit as shown in Fig.3.
8.2 Synchronous rectification
For optimum efficiency over the whole load range, synchronous rectifiers inside the TEA1201TS ensure that during the whole second switching phase, all inductor current will flow through the low-ohmic power MOSFETs. Special circuitry is included which detects when the inductorcurrent reaches zero.Followingthis detection, the digital controller switches off the power MOSFET and proceeds with regulation.
8.3 Start-up
Start-up from low input voltage in the boost mode is realized by anindependent start-uposcillator, which starts switching the N-type power MOSFET as soon as the low-battery detector detects a sufficiently high voltage. The inductor current is limited internally to ensure soft-starting. The switch actions of the start-up oscillator will increase the output voltage. As soon as the output voltage is high enough for normal regulation, the digital control system takes control over the power MOSFETs.
wdw(high)
V
wdw(low)
) is not
When theoutput voltage becomes lower than the low limit of the window, acorrective action is taken bya ramp-upof theinductor currentduring a muchlonger time. Asa result, the DC current level is increased and normal PWM control can continue. The output voltage (including ESR effect) is again within the predefined window.
2002 Jun 06 7
8.4 Undervoltage lockout
As a result of too high a load or disconnection of the input power source, the output voltage can drop so low that normal regulation cannot beguaranteed. In this event, the device switches back to start-up mode. If the output voltage drops even further, switching is stopped completely.
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Philips Semiconductors Product specification
handbook, full pagewidth
load increase
V
o
I
L
start corrective action
time
time
high window limit
low window limit
MGK925
Fig.3 Response to load increase.
handbook, full pagewidth
V
wdw(high)
V
2%
O
V
wdw(low)
typical
situation
+2%
V
wdw(high)
V
wdw(low)
maximum
positive spread
Fig.4 Output voltage window spread.
2002 Jun 06 8
2%
2%
V
wdw(high)
2%
V
wdw(low)
maximum
negative spread
MGW789
Page 9
Philips Semiconductors Product specification
8.5 Shut-down
When the shut-down input is set HIGH, the DC-to-DC converter disables both switches and power consumption is reduced to a few microamperes.
8.6 Power switches
The power switches in the IC are one N-type and one P-type power MOSFET, both having a typical drain-to-source resistance of 100 m. The maximum average current in the power switches is 1.0 A at T
=80°C.
amb
8.7 Temperature protection
When the DC-to-DC converter operates in the PWM mode, and the die temperature gets too high (typical value is 190 °C), the converter and the switch stop operating. They resume operation when the die temperature falls below 90 °C again. As a result, low frequency cycling between the on and off state will occur. It should be noted that in the eventof device temperatures at thecut-off limit, the application differs strongly from maximum specifications.
8.8 Current limiters
If the current in one of the power switches exceeds the programmed limit in the PWM mode, the current ramp is stopped immediately and the next switching phase is entered. Current limiting is required to keep power conversion efficient during temporary high loads. Furthermore, current limiting protects the IC against overload conditions, inductor saturation, etc.
The current limiting level is set by an external resistor whichmust be connectedbetweenpin ILIM and groundfor downconversion, or between pins ILIM and UPOUT/DNIN for upconversion.
8.9 External synchronization and PWM-only mode
If an external high-frequency clock or a HIGH level is applied to pin SYNC/PWM, the TEA1201TS will use PWM regulation independent of the load applied.
In the event of a high-frequency clock being applied, the switching frequency in the PWM mode will be exactly that frequency divided by 22. In the PWM mode the quiescent current of the device increases.
8.10 Behaviour at input voltage exceeding the specified range
In general, an inputvoltage exceeding the specified range isnot recommendedsince instability mayoccur. Thereare two exceptions:
1. Upconversion: at an input voltage higher than the
targetoutput voltage, butup to 5.5 V,the converter will stop switching and the external Schottky diode will take over. The output voltage will equal the input voltageminus thediode voltage drop. Since allcurrent flows through the external diode in this situation, the current limiting function is not active.
In the PWM mode, the P-type power MOSFET is always on when the input voltage exceeds the target output voltage. The internal synchronous rectifier ensures that the inductor current does not fall below zero. As a result, the achieved efficiency is higher in this situation than standard PWM-controlled converters achieve.
2. Downconversion: when the inputvoltage is lower than
the target output voltage, but higher than 2.2 V, the P-type power MOSFET will stay conducting resulting in an output voltage being equal to the input voltage minussome resistive voltagedrop. Thecurrentlimiting function remains active.
8.11 Control of the additional switch
The switch will be in the on-state when its feedback input is connected to ground. When the feedback input is higher than 2 V, the power FET will be high-ohmic. The switch always turns to the high-ohmic state when the shutdown input is made HIGH.
8.12 Low battery detector
The low battery detector is an autonomous circuit which can work at an input voltage down to 0.90 V. It is always on, evenwhen all other blocks are in the shut-down mode.
The low battery input (pin LBI1) is tuned to accept a 1-cell NiCd or NiMH battery voltage directly. Hysteresis is included for correct operation.
The output of the low battery detector on pin LBO is an open-collector output.The output is high (i.e. no current is sunk by the collector) when the input voltage of the detector is below the lower detection level.
In the event that no external synchronization or PWM mode selection is necessary, pin SYNC/PWM must be connected to ground.
2002 Jun 06 9
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Philips Semiconductors Product specification
9 LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
n
T
T
amb
T
stg
V
es
Notes
1. ESD specification is in accordance with the JEDEC standard: a) Human Body Model (HBM) tests are carried out by discharging a 100 pF capacitor through a 1.5 k series
b) Machine Model (MM) tests are carried out by discharging a 200 pF capacitor via a 0.75 µH series inductor.
2. Exception is pin ILIM: 1000 V HBM and 100 V MM.
voltage on any pin shut-down mode 0.2 +6.5 V
operating mode 0.2 +5.5 V
junction temperature 40 +150 °C
j
ambient temperature 20 +80 °C storage temperature 40 +125 °C electrostatic handling voltage notes 1 and 2 Class II V
resistor.
10 THERMAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS VALUE UNIT
R
th(j-a)
thermal resistance from junction to ambient in free air 143 K/W
11 QUALITY SPECIFICATION
In accordance with
“SNW-FQ-611D”
.
2002 Jun 06 10
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Philips Semiconductors Product specification
12 CHARACTERISTICS
T
= 20 to +80 °C; all voltages are measured with respect to ground; positive currents flow into theIC; unless
amb
otherwise specified.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT DC-to-DC converter
PCONVERSION; PIN U/D = LOW
U V
I(up)
V
O(up)
V
I(start)
V
O(uvlo)
OWNCONVERSION; PIN U/D = HIGH
D V
I(dwn)
V
O(dwn)
input voltage V output voltage V start-up input voltage IL< 10 mA 0.93 0.96 1.00 V undervoltage lockout voltage note 1 2.0 2.2 2.4 V
input voltage note 2 V
output voltage 1.30 5.50 V REGULATION V
O(wdw)
output voltage window size as a function
PWM mode 1.5 2.0 2.5 %
of output voltage CURRENT LEVELS I
q(DCDC)
I
shdwn
I
lim(max)
I
lim
quiescent current at pin UPOUT/DNIN note 3 110 −µA
current in shut-down mode V
LBI1=VI(up)
= 1.2 V 65 −µA maximum current limit 5 A current limit deviation I
set to 1.0 A; note 4
lim
upconversion 12 +12 % downconversion 12 +12 %
I
LX(max)
maximum continuous current at pins LX1
T
=80°C −−1.0 A
amb
and LX2
POWER MOSFETS R
DSon(N)
R
DSon(P)
drain-to-source on-state resistance NFET Tj=27°C; IDS= 100 mA 110 200 m drain-to-source on-state resistance PFET Tj=27°C; IDS= 100 mA 125 250 m
EFFICIENCY η efficiency upconversion VOupto 3.3 V;see note 5
and Fig.9
V
= 1.2 V; IL= 100 mA 84 %
I
V
= 2.4 V; IL=10mA 92 %
I
TIMING f
sw
f
i(sync)
t
start
switching frequency PWM mode 480 600 720 kHz synchronization clock input frequency 6 13 20 MHz start-up time note 6 10 ms
DIGITAL INPUT LEVELS V
lL(n)
LOW-level input voltage on all digital pins 0 0.4 V
I(start) O(uvlo)
O(uvlo)
5.50 V
5.50 V
5.50 V
2002 Jun 06 11
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Philips Semiconductors Product specification
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
IH(n)
Switch: see Fig.5 R
DSon
I
O(max)
Low battery detector
I
LBD
t
t(HL)
DETECTION INPUT PIN LBI1 V
det
V
hys
TC
Vdet
TC
Vhys
DETECTION OUTPUT PIN LB0 I
O(sink)
General characteristics
V
ref
I
q
T
amb
T
max
Notes
1. The undervoltage lockout level shows wide specification limits since it decreases at increasing temperature. When the temperature increases, the minimum supply voltage of the digital control part of the IC decreases and therefore thecorrect operationof this functionis guaranteedover the wholetemperature range.The undervoltage lockoutlevel is measured at pin UPOUT/DNIN.
2. When VI is lower than the target output voltage but higher than 2.2 V, the P-type power MOSFET will remain conducting (duty factor is 100%), resulting in VO following VI.
3. The quiescent current is specified as the input current in the upconversion configuration at VI= 1.20 V and VO= 3.30 V, using L1 = 6.8 µH, R1 = 150 k and R2 = 91 k.
4. The current limit is defined by resistor R10. This resistor must have a tolerance of 1%.
5. The specified efficiency is valid when using an output capacitor having an ESR of 0.1 and an inductor of 6.8 µH with an ESR of 0.05 and a sufficient saturation current level.
6. The specified start-up time is the time between the connection of a 1.20 V input voltage source and the moment the output reaches 3.30 V. The output capacitance equals 100 µF, the inductance equals 6.8 µH and no load is present.
7. V4is the voltage at pin UPOUT/DNIN. If the applied HIGH-level voltage is less than V4− 1 V, the quiescent current of the device will increase.
HIGH-level input voltage note 7
on pins SYNC/PWM, SHDWN0
0.55V
V4+ 0.3 V
4
and SHDWN2 all other digital input pins V
drain-to-source resistance in switched-on state
maximum output current in switched-on
V
O(up)=VI(dwn)
V
< 0.4 V
FB1
V
< 0.4 V −−0.40 A
FB1
=5V;
0.4 V4+ 0.3 V
4
500 750 m
state
supply current of detector VI= 0.9 V 20 −µA transition time falling V
low battery detection level falling V
bat
bat
2 −µs
0.87 0.90 0.93 V low battery detection hysteresis 20 mV temperature coefficient of detection level 0 mV/K temperature coefficient of detection
0.175 mV/K hysteresis
output sink current 15 −− µA
reference voltage 1.165 1.190 1.215 V quiescent current at pin UPOUT/DNIN all blocks operating 270 −µA ambient temperature 20 +25 +80 °C internal temperature for cut-off 190 −°C
2002 Jun 06 12
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Philips Semiconductors Product specification
handbook, full pagewidth
600
R
DS(on)
m
500
400
300
200
100
0
0.00 1.00
SWITCH
2.00 3.00 4.00
5.00
Fig.5 Switch drain-to-source on-state resistance as a function of input voltage.
VI (V)
MGU641
6.00
2002 Jun 06 13
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Philips Semiconductors Product specification
13 APPLICATION INFORMATION
handbook, full pagewidth
low-batt
C1
L1
SYNC/PWM
C5
LX1 LX2
V
ref
LBI1
U/D
LBO
DC/DC
UPCONVERTER
LOW BATTERY
DETECTOR
Equivalent block diagram
D1
1 16
11
9
TEA1201TS
15
10
14
TEA1201TS
SWITCH
ILIM
5
UPOUT/DNIN
4 3
FB0
12
OUT1
6
FB1
7
V
out_dcdc
V
out_switched
low-batt
R
lim
R1
R2
C2
V
out_dcdc
V
out_switched
switch_on
SHDWN0
R7
2
813
GND GND0
Fig.6 1-cell NiCd or NiMH battery powered equipment.
2002 Jun 06 14
MGW790
Page 15
Philips Semiconductors Product specification
handbook, full pagewidth
low-batt
C1
R8
R9
L1
SYNC/PWM
C5
LX1 LX2
V
ref
LBI1
U/D
LBO
DC/DC
UPCONVERTER
LOW BATTERY
DETECTOR
Equivalent block diagram
D1
1 16
11
9
TEA1201TS
15
10
14
TEA1201TS
SWITCH
ILIM
5
UPOUT/DNIN
4 3
FB0
12
OUT1
6
FB1
7
V
out_dcdc
V
out_switched
low-batt
R
lim
R1
R2
C2
V
out_dcdc
V
out_switched
switch_on
SHDWN0
R7
2
813
GND GND0
MGW791
Fig.7 2-cell NiCd or NiMH battery powered equipment with autonomous shut-down at low battery voltage.
2002 Jun 06 15
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Philips Semiconductors Product specification
handbook, full pagewidth
low-batt
R7
C1
R8
R9
UPOUT/DNIN
R
lim
ILIM
U/D
LBI1
V
ref
C5
LBO
SYNC/PWM
DC/DC
DOWNCONVERTER
LOW BATTERY
DETECTOR
Equivalent block diagram
4 3
5
15
9
TEA1201TS
11
10
14
TEA1201TS
SWITCH
LX1
1
LX2
16
FB0
12
OUT1
6
FB1
7
D1
L1
V
out_dcdc
V
out_switched
low-batt
R1
R2
C2
V
out_dcdc
V
out_switched
switch_on
SHDWN0
2
813
GND GND0
Fig.8 3-cell NiCd or NiMH and 1-cell Li-Ion battery powered equipment.
2002 Jun 06 16
MGW792
Page 17
Philips Semiconductors Product specification
13.1 External component selection
13.1.1 INDUCTOR L1 The performance of the TEA1201TS is not very sensitive
to inductance value. Thebest efficiencyperformance over a wide load current range is achieved by using an inductance of 6.8 µH for example TDK SLF7032 or Coilcraft DO1608 range.
13.1.2 DC-TO-DC CONVERTER INPUT CAPACITOR C1 The value of C1 strongly depends on the type of input
source. In general, a 100 µF tantalum capacitor is sufficient.
13.1.3 DC-TO-DC CONVERTER OUTPUT CAPACITOR C2 Thevalue and typeof C2 depends onthemaximum output
current and the ripple voltage which is allowed in the application. Low-ESR tantalum capacitors show good results. The most important specification of C2 is its ESR, which mainly determines output voltage ripple.
13.1.4 DIODE D1 The Schottky diode is only used for a short time during
takeover from N-type power MOSFET and P-type power MOSFET and vice versa. Therefore, a medium-power diode is sufficient in most applications, for example a Philips PRLL5819.
13.1.6 CURRENT LIMITING RESISTOR R10 The maximum instantaneous currentis setby theexternal
resistor R10. The preferred type is SMD with 1% tolerance.
The connection of resistor R10 differs for each mode:
At upconversion: resistor R10 must be connected between pins ILIM and UPOUT/DNIN; the current
320
I
limiting level is defined by:
Iim
=
----------­R10
At downconversion: resistor R10 must be connected between pins ILIM and GND0; the current limiting level
300
I
is defined by:
Iim
=
----------­R10
The average inductor current during limited current operation also depends on the inductance value, input voltage, output voltage and resistive losses in all components in the power path. Ensure that I
lim<Isat
(saturation current) of the inductor.
13.1.7 REFERENCE VOLTAGE DECOUPLING CAPACITOR C5
Optionally, a decoupling capacitor can be connected between pin V
and ground in order to achieve a lower
ref
noise level of the output voltages of the LDO. The best choice for C5 is a ceramic multilayer capacitor of approximately 10 nF.
13.1.5 FEEDBACK RESISTORS R1 AND R2 The output voltage of the DC-to-DC converter is
determined by the resistors R1 and R2. The following conditions apply:
Use SMD type resistors only with a tolerance of 1%. If larger body resistors are used, the capacitance on pin FB0 will be too large, causing inaccurate operation.
Resistors R1 and R2 should have a maximum value of 50 k when connected in parallel. A higher value will result in inaccurate operation.
Under these conditions, the output voltage can be calculated by the formula:
R1
V
=
O
V
×
ref
1
+
------- -
R2
13.1.8 LOW BATTERY DETECTOR COMPONENTS R7, R8 AND R9
Resistor R7 is connected between pin LBO and the input or output pin and must be 330 k or higher.
A 1-cell NiCd or NiMH battery can be connected directly to pin LBI1.
A higher battery voltage can be detected by application of a divider circuit with resistors R8 and R9. The low-battery detection level for a higher battery voltage can be set by using the formula:
R9
V
LBI1(det)

V
×=
----------------------
det

R8 R9+
Since current flows into the LBI1 pin, the parallel impedance of R8 and R9 must be about 1 k in order to avoid inaccuracy due to the spread of the LBI1 current.
2002 Jun 06 17
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Philips Semiconductors Product specification
100
handbook, full pagewidth
η
(%)
80
60
40
110
(1) VI= 2.4 V (2) VI= 1.2 V
VO= 3.5 V
MGU577
(1)
(2)
2
10
IL (mA)
3
10
Fig.9 Efficiency as a function of load current.
2002 Jun 06 18
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Philips Semiconductors Product specification
14 PACKAGE OUTLINE
SSOP16: plastic shrink small outline package; 16 leads; body width 4.4 mm
SOT369-1
D
c
y
Z
16
pin 1 index
9
18
w M
b
e
p
E
H
E
A
2
A
1
L
detail X
A
X
v M
A
Q
(A )
L
p
A
3
θ
0 2.5 5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT A1A2A
mm
Note
1. Plastic or metal protrusions of 0.20 mm maximum per side are not included.
A
max.
0.15
0.00
1.4
1.2
IEC JEDEC EIAJ
1.5
OUTLINE VERSION
SOT369-1 MO-152
0.25
b
3
p
0.32
0.25
0.20
0.13
(1)E(1)
cD
5.30
5.10
REFERENCES
4.5
4.3
0.65
2002 Jun 06 19
eHELLpQZywv θ
1.0
0.75
0.45
0.65
0.45
PROJECTION
0.130.2 0.1
EUROPEAN
6.6
6.2
(1)
0.48
0.18
ISSUE DATE
95-02-04 99-12-27
o
10
o
0
Page 20
Philips Semiconductors Product specification
15 SOLDERING
15.1 Introduction to soldering surface mount packages
Thistext gives averybrief insight toacomplex technology. A more in-depth account of soldering ICs can be found in our
“Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011). There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering can still be used for certainsurface mount ICs,butit is notsuitablefor fine pitch SMDs. In these situations reflow soldering is recommended.
15.2 Reflow soldering
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied tothe printed-circuitboardby screen printing,stencilling or pressure-syringe dispensing before package placement.
Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method.
Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 220 °C for thick/large packages, and below 235 °C for small/thin packages.
15.3 Wave soldering
Conventional single wave soldering is not recommended forsurface mount devices(SMDs)or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems.
To overcome these problems the double-wave soldering method was specifically developed.
If wave soldering is used the following conditions must be observed for optimal results:
Use a double-wave soldering method comprising a turbulent wavewith high upwardpressure followed by a smooth laminar wave.
For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27mm, the footprint
longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board;
– smaller than 1.27mm, the footprint longitudinal axis
must be parallel to the transport direction of the printed-circuit board.
The footprint must incorporate solder thieves at the downstream end.
Forpackages with leadsonfour sides, thefootprintmust be placedat a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners.
During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured.
Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications.
15.4 Manual soldering
Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C.
When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C.
2002 Jun 06 20
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Philips Semiconductors Product specification
15.5 Suitability of surface mount IC packages for wave and reflow soldering methods
PACKAGE
WAVE REFLOW
(1)
BGA, HBGA, LFBGA, SQFP, TFBGA not suitable suitable
SOLDERING METHOD
HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, SMS not suitable
(3)
PLCC
, SO, SOJ suitable suitable LQFP, QFP, TQFP not recommended SSOP, TSSOP, VSO not recommended
(2)
(3)(4) (5)
suitable
suitable suitable
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the
“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”
.
2. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, the solder might be deposited on the heatsink surface.
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
5. Wave soldering is onlysuitable for SSOP and TSSOPpackages witha pitch (e) equal toor larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
2002 Jun 06 21
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Philips Semiconductors Product specification
16 DATA SHEET STATUS
PRODUCT
DATA SHEET STATUS
Objective data Development This data sheet contains data from the objective specification for product
Preliminary data Qualification This data sheet contains data from the preliminary specification.
Product data Production This data sheet contains data from the product specification. Philips
(1)
STATUS
(2)
DEFINITIONS
development. Philips Semiconductors reserves the right to change the specification in any manner without notice.
Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product.
Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A.
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
17 DEFINITIONS Short-form specification The data in a short-form
specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook.
Limiting values definition Limiting valuesgiven are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device atthese or atany other conditionsabovethose given inthe Characteristics sectionsof the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information  Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make norepresentation or warranty thatsuchapplications will be suitable for the specified use without further testing or modification.
18 DISCLAIMERS Life support applications These products are not
designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expectedto resultin personal injury. Philips Semiconductorscustomers using or sellingtheseproducts for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes  Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for theuse of anyofthese products, conveysnolicence or title under any patent, copyright, or mask work right to these products,and makes norepresentations or warrantiesthat these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
2002 Jun 06 22
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Philips Semiconductors Product specification
NOTES
2002 Jun 06 23
Page 24
Philips Semiconductors – a w orldwide compan y
Contact information
For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
© Koninklijke Philips Electronics N.V. 2002 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands 403502/01/pp24 Date of release: 2002 Jun 06 Document order number: 9397 750 09359
SCA74
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