Datasheet SY10H641L, SY100H641L Datasheet (MICREL)

3.3V SINGLE SUPPLY
1:9 PECL-TO-TTL

ClockWorks™

PRELIMINARY

SY10H641L

SY100H641L

FEATURES

■ 3.3V power supply

■ PECL-to-TTL version of popular ECLinPS E111

■ Guaranteed low skew specification

■ Latched input

■ Differential ECL internal design

■ V

BB output for single-ended operation

■ Reset/enable

■ Extra TTL and ECL power/ground pins

■ Choice of ECL compatibility: MECL 10KH (10Hxxx)

or 100K (100Hxxx)

■ Available in 28-pin PLCC package

TTL Outputs

Q

0

Q

1

Q

2

DESCRIPTION

The SY10/100H641L are single supply, low skew
translating 1:9 clock drivers. Devices in the Micrel­Synergy H600 translator series utilize the 28-lead PLCC
for optimal power pinning, signal flow-through and
electrical performance.

The devices feature a 24mA TTL output stage with
AC performance specified into a 20pF load capacitance.
A latch is provided on-chip. When LEN is LOW (or left
open, in which case it is pulled LOW by the internal pull­downs), the latch is transparent. A HIGH on the enable
pin (/EN) forces all outputs LOW.

The 10H version is compatible with MECL 10KH ECL
logic levels. The 100H version is compatible with 100K
levels.

PIN CONFIGURATIONBLOCK DIAGRAM

7

6

T

T

V

Q

G

25

24 23 22 21 20 19

G
Q

Q

Q
G

26

T

27

5

28

V

T

1

4

2

V

T

3

3

4

T

TOP VIEW

PLCC

567891011

8

T

T

V

Q

Q

G

18

V

BB

17

D

16

D

15

V

E

14

LEN

13

G

E

12

EN

PECL Input

D
D

V

BB

LEN

EN

DQ

Q

3

Q

4

PIN NAMES

2

1

0

T

T

T

V

Q

G

Q

T

V

Q

G

Pin Function

Q

5

GT TTL Ground (0V)
VT TTL VCC (+3.0V)

Q

6

VE ECL VCC (+3.0V)
GE ECL Ground (0V)
D, /D Signal Input (PECL)

Q

7

VBB VBB Reference Output (PECL)
Q0 – Q8 Signal Outputs (TTL)
/EN Enable Input (PECL)

Q

8

LEN Latch Enable Input (PECL)

1

Rev.: D Amendment: /0
Issue Date: May 2000

Micrel

ClockWorks™

PRELIMINARY

SY10H641L

SY100H641L

ABSOLUTE MAXIMUM RATINGS

(1)

Symbol Rating Value Unit

E (ECL) Power Supply –0.5 to +7.0 V

V
VT (TTL) Voltage –0.5 to +7.0

VI (ECL) Input Voltage 0.0 to VE V
V

OUT (TTL) Disabled 3-State 0.0 to VT V

Output

I

OUT (ECL) Output Current mA

TRUTH TABLE

D LEN /EN Q

LL LL
HL LH
XH LQ0
XX HL

- Continuous 50

- Surge 100
Tstore Storage Temperature –65 to +150 °C
T

A Operating Temperature 0 to +85 °C

NOTE:

1. Do not exceed.

DC ELECTRICAL CHARACTERISTICS

VT = VE = +3.0V to +3.6V

TA = 0°CTA = +25°CTA = +85°C

Symbol Parameter Min. Max. Min. Max. Min. Max. Unit Condition

EE Power Supply Current ECL — 30 — 30 — 30 mA VE Pin

I

CCH TTL — 30 — 30 — 30 Total all VT pins

I

CCL —35 —35 — 35

I

TTL DC ELECTRICAL CHARACTERISTICS

VT = VE = +3.0V to +3.6V

TA = 0°CTA = +25°CTA = +85°C

Symbol Parameter Min. Max. Min. Max. Min. Max. Unit Condition

VOH Output HIGH Voltage 2.0 — 2.0 — 2.0 — V IOH = –3.0mA
VOL Output LOW Voltage — 0.5 — 0.5 — 0.5 V IOL = 24mA

OS Output Short Circuit Current –100 — –100 — –100 — mA VOUT = 0V

I

10H ECL DC ELECTRICAL CHARACTERISTICS

VT = VE = +3.0V to +3.6V

TA = 0°CTA = +25°CTA = +85°C

Symbol Parameter Min. Max. Min. Max. Min. Max. Unit Condition

IIH Input HIGH Current — 225 — 175 — 175 µA—
IIL Input LOW Current 0.5 — 0.5 — 0.5 — µA—

(1)

(1)

(1)

2.130 2.460 2.170 2.490 2.240 2.580 V VE = 3.3V

1.350 1.820 1.350 1.820 1.350 1.855 V VE = 3.3V

1.920 2.030 1.950 2.050 1.990 2.110 V VE = 3.3V

VIH Input HIGH Voltage
VIL Input LOW Voltage
VBB Output Reference Voltage

NOTE:

1. VIH, VIL and VBB are referenced to VE and will vary 1:1 with the power supply. The levels shown are for VE = +3.3V.

2

ClockWorks™

PRELIMINARY

Micrel

SY10H641L

SY100H641L

100H ECL DC ELECTRICAL CHARACTERISTICS

VT = VE = +3.0V to +3.6V

TA = 0°CTA = +25°CTA = +85°C

Symbol Parameter Min. Max. Min. Max. Min. Max. Unit Condition

IIH Input HIGH Current — 225 — 175 — 175 µA—
IIL Input LOW Current 0.5 — 0.5 — 0.5 — µA—

(1)

(1)

(1)

2.135 2.420 2.135 2.420 2.135 2.420 V VE = 3.3V

1.490 1.825 1.490 1.825 1.490 1.825 V VE = 3.3V

1.920 2.040 1.920 2.040 1.920 2.040 V VE = 3.3V

VIH Input HIGH Voltage
VIL Input LOW Voltage

BB Output Reference Voltage

V

NOTE:

1. VIH, VIL and VBB are referenced to VE and will vary 1:1 with the power supply. The levels shown are for VE = +3.3V.

AC ELECTRICAL CHARACTERISTICS

VT = VE = +3.0V to +3.6V

TA = 0°CTA = +25°CTA = +85°C

Symbol Parameter Min. Max. Min. Max. Min. Max. Unit Condition

t

PLH Propagation Delay 2.0 3.0 2.0 3.0 2.0 3.0 ns CL = 20pF

tPHL D to Output 2.5 3.5 2.5 3.5 2.5 3.5
tskpp Part-to-Part Skew

skew++ Within-Device Skew

t
tskew– – — 0.35

PLH Propagation Delay 2.0 3.5 2.0 3.5 2.0 3.5 ns CL = 20pF

t
tPHL LEN to Output

PLH Propagation Delay 2.0 3.5 2.0 3.5 2.0 3.5 ns CL = 20pF

t
tPHL /EN to Output

t

r Output Rise/Fall Time — 1.7 — 1.7 — 1.7 ns CL = 20pF

tf 1.0V to 2.0V — 1.6 — 1.6 — 1.6
fMAX Maximum Input Frequency
— Pulse Width 1.5 — 1.5 — 1.5 — ns —
— Recovery Time 1.25 — 1.25 — 1.25 — ns —
tS Set-up Time 0.5 (typ.) 0.5 (typ.) 0.5 (typ.) ns —

H Hold Time 0.5 (typ.) 0.5 (typ.) 0.5 (typ.) ns —

t

NOTES:

1. Device-to-Device Skew considering HIGH-to-HIGH transitions at common VCC level.

2. Within-Device Skew considering HIGH-to-HIGH transitions at common VCC level.

3. Within-Device Skew considering LOW-to-LOW transitions at common VCC level.

4. All skew parameters are guaranteed but not tested.

5. Frequency at which output levels will meet a 0.8V to 2.0V minimum swing.

6. The fMAX value is specified as the minimum guaranteed maximum frequency. Actual operational maximum frequency may be greater.

7. VT = VE = +3.15V to +3.45V, (i.e. VE +/– 5%).

8. VT = VE = +3.0V to +3.6V, (i.e. VE +/– 10%).

(1,4)

(2,3,4)

(5,6)

— 0.5 — 0.5 — 0.5 ns CL = 20pF
— 0.3

(7)

(8)

—0.3
— 0.35

(7)

(8)

— 0.3
— 0.35

(7)

ns CL = 20pF

(8)

ns CL = 20pF

135 — 135 — 135 — MHz

3

Micrel

–

TTL SWITCHING CIRCUIT

USE 0.1µF CAPACITORS
FOR DECOUPLING.

ClockWorks™

PRELIMINARY

SY10H641L

SY100H641L

V

EE

VCC & V

CCO

PECL

50Ω COAX

PULSE

GENERATOR

50Ω COAX 50Ω COAX

USE OSCILLOSCOPE
INTERNAL 50Ω LOAD

CH A

FOR TERMINATION.

ECL/TTL PROPAGATION DELAY — SINGLE ENDED

50%
V

IN

T

pd++

T

DEVICE

IN OUT

UNDER

TEST

CH B

OSCILLOSCOPE

pd–

TTL

450Ω

1.5V

V

OUT

ECL/TTL WAVEFORMS: RISE AND FALL TIMES

2.0V

V

OUT

T

rise

T

fall

0.8V

LOGIC DIAGRAMPRODUCT ORDERING CODE

Ordering Package Operating

Code Type Range

SY10H641LC J28-1 Commercial
SY10H641LJCTR J28-1 Commercial
SY100H641LJC J28-1 Commercial
SY100H641LJCTR J28-1 Commercial

4

Micrel

28 LEAD PLCC (J28-1)

ClockWorks™

PRELIMINARY

SY10H641L

SY100H641L

Rev. 03

MICREL-SYNERGY 3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA

TEL + 1 [phone] FAX + 1 [phone] WEB http://www.micrel.com

This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or

other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc.

© 2000 Micrel Incorporated

5