Artesyn MVME2502 User Manual

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MVME2502

Installation and Use
P/N: 6806800R96E April 2015
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©
Copyright 2015 Artesyn Embedded Technologies, Inc.
All rights reserved.
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Notice
While reasonable efforts have been made to assure the accuracy of this document, Artesyn assumes no liability resulting from any omissions in this document, or from the use of the information obtained therein. Artesyn reserves the right to revise this document and to make changes from time to time in the content hereof without obligation of Artesyn to notify any person of such revision or changes.
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It is possible that this publication may contain reference to or information about Artesyn products (machines and programs), programming, or services that are not available in your country. Such references or information must not be construed to mean that Artesyn intends to announce such Artesyn products, programming, or services in your country.
Limited and Restricted Rights Legend
If the documentation contained herein is supplied, directly or indirectly, to the U.S. Government, the following notice shall apply unless otherwise agreed to in writing by Artesyn.
Use, duplication, or disclosure by the Government is subject to restrictions as set forth in subparagraph (b)(3) of the Rights in Technical Data clause at DFARS 252.227-7013 (Nov. 1995) and of the Rights in Noncommercial Computer Software and Documentation clause at DFARS 252.227-7014 (Jun. 1995).
Contact Address
Artesyn Embedded Technologies Artesyn Embedded Technologies Marketing Communications 2900 S. Diablo Way, Suite 190 Tempe, Arizona 85282
Lilienthalstr. 17-19 85579 Neubiberg/Munich Germany
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Contents
About this Manual . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Safety Notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Sicherheitshinweise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
1.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
1.2 Standard Compliances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
1.3 Mechanical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
1.4 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
1.5 Product Identification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
2 Hardware Preparation and Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
2.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
2.2 Unpacking and Inspecting the Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
2.3 Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
2.3.1 Environmental Requirements. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
2.3.2 Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
2.3.3 Equipment Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
2.4 Configuring the Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
2.5 Installing Accessories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
2.5.1 Rear Transition Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
2.5.2 PMC/XMC Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
2.5.3 Installation of MVME2502-HDMNTKIT1/MVME2502-HDMNTKIT2. . . . . . . . . . . . . . . . . . 48
2.6 Installing and Removing the Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
2.7 Completing the Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
3 Controls, LEDs, and Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
3.1 Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
3.2 Front Panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
3.2.1 Reset Switch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
3.3 LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
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3.3.1 Front Panel LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
3.3.2 On-board LEDs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
3.4 Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
3.4.1 Front Panel Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
3.4.1.1 RJ45 with Integrated Magnetics (J1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
3.4.1.2 Front Panel Serial Port (J4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
3.4.1.3 USB Connector (J5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
3.4.1.4 VMEBus P1 Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
3.4.1.5 VMEBus P2 Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
3.4.2 On-board Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
3.4.2.1 SATA Connector (J3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
3.4.2.2 PMC Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
3.4.2.3 JTAG Connector (P6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
3.4.2.4 COP Connector P50(15) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
3.4.2.5 XMC Connector (XJ1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
3.4.2.6 XMC Connector (XJ2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
3.4.2.7 Miscellaneous P2020 Debug Connectors(P4) . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
3.5 Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
3.5.1 Geographical Address Switch (S1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
3.5.2 SMT Configuration Switch (S2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
4 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
4.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
4.2 Chipset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
4.2.1 e500 Processor Core. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
4.2.2 Integrated Memory Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
4.2.3 PCI Express Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
4.2.4 Local Bus Controller (LBC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
4.2.5 Secure Digital Host Controller (SDHC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
4.2.6 I2C Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
4.2.7 USB Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
4.2.8 DUART. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
4.2.9 DMA Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
4.2.10 Enhanced Three-Speed Ethernet Controller (eTSEC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
4.2.11 General Purpose I/O (GPIO). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
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4.2.12 Security Engine (SEC) 3.1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
4.2.13 Common On-Chip Processor (COP). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
4.2.14 P2020 Strapping Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
4.3 System Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
4.4 Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
4.4.1 Real Time Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
4.4.2 P2020 Internal Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
4.4.3 Watchdog Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
4.4.4 CPLD Tick Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
4.5 Ethernet Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
4.6 SPI Bus Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
4.6.1 SPI Flash Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
4.6.2 SPI Flash Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
4.6.3 Firmware Redundancy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
4.6.4 Crisis Recovery. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
4.7 Front UART Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
4.8 Rear UART Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
4.9 PMC/XMC Sites . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
4.9.1 PMC Add-on Card . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
4.9.2 XMC Add-on Card . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
4.10 SATA Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
4.11 VME Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
4.11.1 Tsi148 VME Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
4.12 USB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100
4.13 I2C Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
4.14 Reset/Control CPLD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
4.15 Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
4.15.1 On-board Voltage Supply Requirement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
4.15.2 Power Up Sequencing Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
4.16 Clock Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
4.17 Reset Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
4.17.1 Reset Sequence. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
4.18 Thermal Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
4.19 Real-Time Clock Battery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
4.20 Debugging Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
4.20.1 POST Code Indicator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
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4.20.2 JTAG Chain and Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
4.20.3 Custom Debugging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
4.21 Rear Transition Module (RTM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
5 Memory Maps and Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
5.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
5.2 Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
5.3 Flash Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
5.4 Linux Devices Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .112
5.5 Programmable Logic Device (PLD) Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
5.5.1 PLD Revision Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
5.5.2 PLD Year Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .115
5.5.3 PLD Month Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .115
5.5.4 PLD Day Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
5.5.5 PLD Sequence Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
5.5.6 PLD Power Good Monitor Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
5.5.7 PLD LED Control Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
5.5.8 PLD PCI/PMC/XMC (Slot1) Monitor Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
5.5.9 PLD PCI/PMC/XMC (Slot2) Monitor Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
5.5.10 PLD U-Boot and TSI Monitor Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
5.5.11 PLD Boot Bank Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
5.5.12 PLD Write Protect and I2C Debug Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
5.5.13 PLD Test Register 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .124
5.5.14 PLD Test Register 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .125
5.5.15 PLD GPIO2 Interrupt Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
5.5.16 PLD Shutdown and Reset Control and Reset Reason Register . . . . . . . . . . . . . . . . . . . . . 126
5.5.17 EMMC Reset Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
5.5.18 PLD Watchdog Timer Refresh Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
5.5.19 PLD Watchdog Control Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
5.5.20 PLD Watchdog Timer Count Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
5.5.21 PLD Watchdog Timer Count Value Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
5.6 External Timer Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
5.6.1 Prescaler Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
5.6.2 Control Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
5.6.3 Compare High and Low Word Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
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5.6.4 Counter High and Low Word Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
6 Boot System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .135
6.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135
6.2 Accessing U-Boot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135
6.3 Boot Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
6.3.1 Booting from a Network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
6.3.2 Booting from an Optional SATA Drive. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
6.3.3 Booting from a USB Drive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
6.3.4 Booting from an SD Card. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
6.3.5 Booting VxWorks Through the Network. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
6.4 Using the Persistent Memory Feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
6.5 MVME2502 Specific U-Boot Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .140
6.6 Updating U-Boot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
7 Programming Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145
7.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145
7.2 Reset Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145
7.3 Interrupt Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149
7.4 I2C Bus Device Addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150
7.5 Ethernet PHY Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150
7.6 Other Software Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151
7.6.1 MRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151
7.6.2 Real Time Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .151
7.6.3 Quad UART. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151
7.6.4 LBC Timing Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152
7.7 Clock Distribution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .153
7.7.1 System Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154
7.7.2 Real Time Clock Input. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155
7.7.3 Local Bus Controller Clock Divisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155
A Replacing the Battery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157
A.1 Replacing the Battery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157
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B Related Documentation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161
B.1 Artesyn Embedded Technologies - Embedded Computing Documentation . . . . . . . . . . . . . . .161
B.2 Manufacturers’ Documents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162
B.3 Related Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162
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Table 1-1 Board Standard Compliances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Table 1-2 Mechanical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 1-3 Accessories and Cables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 1-4 Accessories and Cables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Table 2-1 Environmental Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Table 2-2 Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Table 3-1 Front Panel LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Table 3-2 On-board LEDs Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Table 3-3 Front Panel Tri-Speed Ethernet Connector (J1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Table 3-4 Front Panel Serial Port (J4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Table 3-5 USB Connector (J5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Table 3-6 VMEbus P1 Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Table 3-7 VMEbus P2 Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Table 3-8 Custom SATA Connector (J3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Table 3-9 PMC J11/J111 Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Table 3-10 PMC J12/J222 Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Table 3-11 PMC J13/J333 Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Table 3-12 PMC J14 Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Table 3-13 JTAG Connector (P6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Table 3-14 COP Header (P50) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Table 3-15 XMC Connector (XJ1) Pin out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Table 3-16 XMC Connector (XJ2) Pin out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Table 3-17 P2020 Debug Header (P4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Table 3-18 Geographical Address Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Table 3-19 Geographical Address Switch Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Table 4-1 P2020 GPIO Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Table 4-2 P2020 Strapping Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Table 4-3 P2020 I2C Port1 Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .101
Table 4-4 P2020 I2C Port2 Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .101
Table 4-5 Voltage Supply Requirement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
Table 4-6 Thermal Interrupt Threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
Table 4-7 POST Code Indicator on the LED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .106
Table 4-8 Transition Module Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Table 5-1 Physical Address Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
Table 5-2 Flash Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .112
Table 5-3 Linux Devices Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .112
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Table 5-4 PLD Revision Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .114
Table 5-5 PLD Year Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .115
Table 5-6 PLD Month Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .115
Table 5-7 PLD Day Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .115
Table 5-8 PLD Sequence Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .116
Table 5-9 PLD Power Good Monitor Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .116
Table 5-10 PLD LED Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .117
Table 5-11 PLD PCI/PMC/XMC (Slot1) Monitor Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .118
Table 5-12 PLD PCI/PMC/XMC (Slot2) Monitor Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .119
Table 5-13 PLD U-Boot and TSI Monitor Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .121
Table 5-14 PLD Boot Bank Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .121
Table 5-15 PLD Write Protect and I2C Debug Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .123
Table 5-16 PLD Test Register 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .124
Table 5-17 PLD Test Register 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .125
Table 5-18 PLD GPIO2 Interrupt Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .125
Table 5-19 PLD Shutdown and Reset Control and Reset Reason Register . . . . . . . . . . . . . . . . . . . . . . . .126
Table 5-20 PLD Shutdown and Reset Control and Reset Reason Register . . . . . . . . . . . . . . . . . . . . . . . .128
Table 5-21 PLD Watchdog Timer Refresh Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .128
Table 5-22 PLD Watchdog Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .129
Table 5-23 PLD Watchdog Timer Count Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .129
Table 5-24 PLD Watchdog Timer Count Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .130
Table 5-25 Prescaler Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .131
Table 5-26 Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .131
Table 5-27 Compare High Word Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .133
Table 5-28 Compare Low Word Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .133
Table 5-29 Counter High Word Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .133
Table 5-30 Counter Low Word Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
Table 6-1 MVME2502 Specific U-Boot Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .140
Table 7-1 POR Configuration Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .145
Table 7-2 MVME2502 Interrupt List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .149
Table 7-3 I2C Bus Device Addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .150
Table 7-4 PHY Types and MII Management Bus Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .150
Table 7-5 LBC Timing Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .152
Table 7-6 Clock Distribution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .153
Table 7-7 System Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .154
Table B-1 Artesyn Embedded Technologies - Embedded Computing Publications . . . . . . . . . . . . . .161
10
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List of Tables
Table B-2 Manufacturers’ Publications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162
Table B-3 Related Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162
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List of Tables
12
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List of Figures
Figure 1-1 MVME2502 Declaration of Conformity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 1-2 Serial Number Location-ENP1 Variant . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Figure 1-3 Serial Number Location-ENP2 Variant . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Figure 3-1 Board Layout ENP1 Variant . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Figure 3-2 Board Layout ENP2 Variant . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Figure 3-3 Front Panel LEDs, Connectors and Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Figure 3-4 Front Panel LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Figure 3-5 On-board LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Figure 3-6 Geographical Address Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Figure 3-7 SMT Configuration Switch Position . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Figure 4-1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Figure 4-2 SPI Device Multiplexing Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Figure 4-3 Clock Distribution Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
Figure 4-4 JTAG Chain Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Figure 4-5 RTM Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
Figure A-1 Battery Location ENP1 Variant . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157
Figure A-2 Battery Location ENP2 Variant . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158
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List of Figures
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About this Manual

Overview of Contents

This manual is intended for users who install and configure MVME2502 product. It is assumed that the user is familiar with the standard cabling procedures, configuration of operating systems, U-Boot system and MVME Chassis.
The purpose of this manual is to describe MVME2502 product and the services it provides. This manual includes description of MVME2502 product hardware, firmware and also information about operating system.
This manual is divided into the following chapters and appendices.
About this Manual lists all conventions and abbreviations used in this manual
and outlines the revision history.
Safety Notes summarizes the safety instructions in the manual.
Sicherheitshinweise is a German translation of the Safety Notes chapter.
Introduction gives an overview of the features of the product, standard compliances,
mechanical data, and ordering information.
Hardware Preparation and Installation outlines the installation requirements, hardware
accessories, switch settings, and installation procedures.
Controls, LEDs, and Connectors describes external interfaces of the board. This includes
connectors and LEDs.
Functional Description includes a block diagram and functional description of major
components of the product.
Memory Maps and Registers contains information on system resources including system
control and status registers and external timers.
Boot System describes the boot loader software.
Programming Model contains additional programming information for the board.
Replacing the Battery contains the procedures for replacing the battery.
Related Documentation provides a listing of related product documentation,
manufacturer’s documents, and industry standard specifications.
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About this Manual

Abbreviations

This document uses the following abbreviations:
Term Definition
COP Common On-Chip Processor
CPLD Complex Programmable Logic Device
DDR3 Double Data Rate 3
DUART Dual Universal Asynchronous Receiver Transmitter
EEPROM Erasable Programmable Read-Only Memory
FCC Federal Communications Commission
FPGA Field Programmable Gate Array
GPIO General Purpose Input/Output
HDD Hard Disk Drive
About this Manual
16
IEEE Institute of Electrical and Electronics Engineers
LBC Local Bus Controller
MCP Multi-Chip Package
MRAM Magnetoresistive Random Access Memory
PCI Peripheral Component Interconnect
PCI-E PCI Express
PCI-X Peripheral Component Interconnect eXtended
PIM PCI Mezzanine Card Input/Output Module
PLD Programmable Logic Device
PMC PCI Mezzanine Card (IEEE P1386.1)
PrPMC Processor PCI Mezzanine Card
RTC Real-Time Clock
RTM Rear Transition Module
SATA Serial Advanced Technology Attachment
SDHC Secure Digital Host Controller
SMT Surface Mounted Technology
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Term Definition
UART Universal Asynchronous Receiver-Transmitter
VITA VMEbus International Trade Association
VME Versa Module Eurocard
XMC PCI Express Mezzanine Card

Conventions

The following table describes the conventions used throughout this manual.
Notation Description
0x00000000 Typical notation for hexadecimal numbers (digits are
About this Manual
0 through F), for example used for addresses and offsets
0b0000 Same for binary numbers (digits are 0 and 1)
bold Used to emphasize a word Screen Used for on-screen output and code-related
elements or commands in body text
Courier + Bold Used to characterize user input and to separate it
from system output
Reference Used for references and for table and figure
descriptions
File > Exit Notation for selecting a submenu
<text> Notation for variables and keys
[text] Notation for software buttons to click on the screen
and parameter description
... Repeated item for example node 1, node 2, ..., node
12
. . .
.. Ranges, for example: 0..4 means one of the integers
Omission of information from example/command that is not necessary at the time being
0,1,2,3, and 4 (used in registers)
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About this Manual
Notation Description
| Logical OR
About this Manual
Indicates a hazardous situation which, if not avoided, could result in death or serious injury
Indicates a hazardous situation which, if not avoided, may result in minor or moderate injury
Indicates a property damage message
No danger encountered. Pay attention to important information
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Summary of Changes

This manual has been revised and replaces all prior editions.
Part Number Publication Date Description
6806800R96A October 2013 Initial Version
6806800R96B April 2014 Re-branded to Artesyn template.
6806800R96C August 2014 Added GBE_MUX_SEL in S2 to TSEC1 and
About this Manual
Added MVME2502 Declaration of Conformity on page 22.
Added Flash Memory Map and updated SPI Flash Memory, Reset Switch and PMC/XMC Sites.
Added Installation of MVME2502HDMNKIT1 and
MVME2502-HDMNKIT2
changed PHY addresses in Table 7-4 PHY Types and MII Management Bus Address.
.
6806800R96D December 2014 Updated Boot Options and Crisis Recovery.
6806800R96E April 2015 Updated Table B.1 on page 161.
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About this Manual
About this Manual
20
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Safety Notes

This section provides warnings that precede potentially dangerous procedures throughout this manual. Instructions contained in the warnings must be followed during all phases of operation, service, and repair of this equipment. You should also employ all other safety precautions necessary for the operation of the equipment in your operating environment. Failure to comply with these precautions or with specific warnings elsewhere in this manual could result in personal injury or damage to the equipment.
Artesyn Embedded Technologies intends to provide all necessary information to install and handle the product in this manual. Because of the complexity of this product and its various uses, we do not guarantee that the given information is complete. If you need additional information, ask your Artesyn representative.
This product is a Safety Extra Low Voltage (SELV) device designed to meet the EN60950-1 requirements for Information Technology Equipment. The use of the product in any other application may require safety evaluation specific to that application.
Only personnel trained by Artesyn or persons qualified in electronics or electrical engineering are authorized to install, remove or maintain the product.
The information given in this manual is meant to complete the knowledge of a specialist and must not be used as replacement for qualified personnel.
Keep away from live circuits inside the equipment. Operating personnel must not remove equipment covers. Only Factory Authorized Service Personnel or other qualified service personnel may remove equipment covers for internal subassembly or component replacement or any internal adjustment.
Do not install substitute parts or perform any unauthorized modification of the equipment or the warranty may be voided. Contact your local Artesyn representative for service and repair to make sure that all safety features are maintained.
EMC (Results below)
This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the instruction manual, may cause harmful interference to radio communications.
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Safety Notes
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own expense. Changes or modifications not expressly approved by Artesyn could void the user's authority to operate the equipment. Board products are tested in a representative system to show compliance with the above mentioned requirements. A proper installation in a compliant system will maintain the required performance. Use only shielded cables when connecting peripherals to assure that appropriate radio frequency emissions compliance is maintained.
Operation
Product Damage
High humidity and condensation on the board surface causes short circuits. Do not operate the board outside the specified environmental limits. Make sure the board is completely dry and there is no moisture on any surface before applying power.
Damage of Circuits
Electrostatic discharge and incorrect installation and removal can damage circuits or shorten its life. Before touching the board or electronic components, make sure that you are working in an ESD-safe environment.
Board Malfunction
Switches marked as “reserved” might carry production-related functions and can cause the board to malfunction if their setting is changed. Do not change settings of switches marked as “reserved”. The setting of switches which are not marked as “reserved” has to be checked and changed before board installation.
Installation
Data Loss
Powering down or removing a board before the operating system or other software running on the board has been properly shut down may cause corruption of data or file systems.
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Make sure all software is completely shut down before removing power from the board or removing the board from the chassis.
Product Damage
Only use injector handles for board insertion to avoid damage to the front panel and/or PCB. Deformation of the front panel can cause an electrical short or other board malfunction.
Product Damage
Inserting or removing modules with power applied may result in damage to module components. Before installing or removing additional devices or modules, read the documentation that came with the product.
Cabling and Connectors
Safety Notes
Product Damage
RJ-45 connectors on modules are either twisted-pair Ethernet (TPE) or E1/T1/J1 network interfaces. Connecting an E1/T1/J1 line to an Ethernet connector may damage your system.
Make sure that TPE connectors near your working area are clearly marked as network
connectors.
Verify that the length of an electric cable connected to a TPE bushing does not exceed 100
meters.
Make sure the TPE bushing of the system is connected only to safety extra low voltage
circuits (SELV circuits).
If in doubt, ask your system administrator.
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Safety Notes
Battery
Board/System Damage
Incorrect exchange of lithium batteries can result in a hazardous explosion. When exchanging the on-board lithium battery, make sure that the new and the old battery are exactly the same battery models. If the respective battery model is not available, contact your local Artesyn sales representative for the availability of alternative, officially approved battery models.
Data Loss
Exchanging the battery can result in loss of time settings. Backup power prevents the loss of data during exchange. Quickly replacing the battery may save time settings.
Data Loss
If the battery has low or insufficient power the RTC is initialized. Exchange the battery before seven years of actual battery use have elapsed.
PCB and Battery Holder Damage
Removing the battery with a screw driver may damage the PCB or the battery holder. To prevent damage, do not use a screw driver to remove the battery from its holder.
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Sicherheitshinweise

Dieses Kapitel enthält Hinweise, die potentiell gefährlichen Prozeduren innerhalb dieses Handbuchs vorrangestellt sind. Beachten Sie unbedingt in allen Phasen des Betriebs, der Wartung und der Reparatur des Systems die Anweisungen, die diesen Hinweisen enthalten sind. Sie sollten außerdem alle anderen Vorsichtsmaßnahmen treffen, die für den Betrieb des Produktes innerhalb Ihrer Betriebsumgebung notwendig sind. Wenn Sie diese Vorsichtsmaßnahmen oder Sicherheitshinweise, die an anderer Stelle diese Handbuchs enthalten sind, nicht beachten, kann das Verletzungen oder Schäden am Produkt zur Folge haben.
Artesyn Embedded Technologies ist darauf bedacht, alle notwendigen Informationen zum Einbau und zum Umgang mit dem Produkt in diesem Handbuch bereit zu stellen. Da es sich jedoch um ein komplexes Produkt mit vielfältigen Einsatzmöglichkeiten handelt, können wir die Vollständigkeit der im Handbuch enthaltenen Informationen nicht garantieren. Falls Sie weitere Informationen benötigen sollten, wenden Sie sich bitte an die für Sie zuständige Geschäftsstelle von Artesyn.
Das Produkt wurde entwickelt, um die Sicherheitsanforderungen für SELV Geräte nach der Norm EN 60950-1 für informationstechnische Einrichtungen zu erfüllen. Die Verwendung des Produkts in einer anderen Anwendung erfordert eine Sicherheitsüberprüfung für diese spezifische Anwendung.
Einbau, Wartung und Betrieb dürfen nur von durch Artesyn ausgebildetem oder im Bereich Elektronik oder Elektrotechnik qualifiziertem Personal durchgeführt werden. Die in diesem Handbuch enthaltenen Informationen dienen ausschließlich dazu, das Wissen von Fachpersonal zu ergänzen, können dieses jedoch nicht ersetzen.
Halten Sie sich von stromführenden Leitungen innerhalb des Produktes fern. Entfernen Sie auf keinen Fall Abdeckungen am Produkt. Nur werksseitig zugelassenes Wartungspersonal oder anderweitig qualifiziertes Wartungspersonal darf Abdeckungen entfernen, um Komponenten zu ersetzen oder andere Anpassungen vorzunehmen.
Installieren Sie keine Ersatzteile oder führen Sie keine unerlaubten Veränderungen am Produkt durch, sonst verfällt die Garantie. Wenden Sie sich für Wartung oder Reparatur bitte an die für Sie zuständige Geschäftsstelle von Artesyn. So stellen Sie sicher, dass alle sicherheitsrelevanten Aspekte beachtet werden.
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Sicherheitshinweise
EMV
Das Produkt wurde in einem Artesyn Standardsystem getestet. Es erfüllt die für digitale Geräte der Klasse A gültigen Grenzwerte in einem solchen System gemäß den FCC-Richtlinien Abschnitt 15 bzw. EN 55022 Klasse B. Diese Grenzwerte sollen einen angemessenen Schutz vor Störstrahlung beim Betrieb des Produktes in Gewerbe- sowie Industriegebieten gewährleisten.
Das Produkt arbeitet im Hochfrequenzbereich und erzeugt Störstrahlung. Bei unsachgemäßem Einbau und anderem als in diesem Handbuch beschriebenen Betrieb können Störungen im Hochfrequenzbereich auftreten.
Wird das Produkt in einem Wohngebiet betrieben, so kann dies mit grosser Wahrscheinlichkeit zu starken Störungen führen, welche dann auf Kosten des Produktanwenders beseitigt werden müssen. Änderungen oder Modifikationen am Produkt, welche ohne ausdrückliche Genehmigung von Artesyn durchgeführt werden, können dazu führen, dass der Anwender die Genehmigung zum Betrieb des Produktes verliert. Boardprodukte werden in einem repräsentativen System getestet, um zu zeigen, dass das Board den oben aufgeführten EMV­Richtlinien entspricht. Eine ordnungsgemässe Installation in einem System, welches die EMV­Richtlinien erfüllt, stellt sicher, dass das Produkt gemäss den EMV-Richtlinien betrieben wird. Verwenden Sie nur abgeschirmte Kabel zum Anschluss von Zusatzmodulen. So ist sichergestellt, dass sich die Aussendung von Hochfrequenzstrahlung im Rahmen der erlaubten Grenzwerte bewegt.
Warnung! Dies ist eine Einrichtung der Klasse A. Diese Einrichtung kann im Wohnbereich Funkstörungen verursachen. In diesem Fall kann vom Betreiber verlangt werden, angemessene Maßnahmen durchzuführen.
Betrieb
1 Beschädigung des Produktes
Hohe Luftfeuchtigkeit und Kondensat auf der Oberfläche des Produktes können zu Kurzschlüssen führen.
Betreiben Sie das Produkt nur innerhalb der angegebenen Grenzwerte für die relative Luftfeuchtigkeit und Temperatur. Stellen Sie vor dem Einschalten des Stroms sicher, dass sich auf dem Produkt kein Kondensat befindet.
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Beschädigung von Schaltkreisen
Elektrostatische Entladung und unsachgemäßer Ein- und Ausbau des Produktes kann Schaltkreise beschädigen oder ihre Lebensdauer verkürzen.
Bevor Sie das Produkt oder elektronische Komponenten berühren, vergewissern Sie sich, daß Sie in einem ESD-geschützten Bereich arbeiten.
Fehlfunktion des Produktes
Schalter, die mit 'Reserved' gekennzeichnet sind, können mit produktionsrelevanten Funktionen belegt sein. Das Ändern dieser Schalter kann im normalen Betrieb Störungen auslösen.
Verstellen Sie nur solche Schalter, die nicht mit 'Reserved' gekennzeichnet sind. Prüfen und ggf. ändern Sie die Einstellungen der nicht mit 'Reserved' gekennzeichneten Schalter, bevor Sie das Produkt installieren.
Installation
Sicherheitshinweise
Datenverlust
Das Herunterfahren oder die Deinstallation eines Boards bevor das Betriebssystem oder andere auf dem Board laufende Software ordnungsmemäss beendet wurde, kann zu partiellem Datenverlust sowie zu Schäden am Filesystem führen.
Stellen Sie sicher, dass sämtliche Software auf dem Board ordnungsgemäss beendet wurde, bevor Sie das Board herunterfahren oder das Board aus dem Chassis entfernen.
Beschädigung des Produktes
Fehlerhafte Installation des Produktes kann zu einer Beschädigung des Produktes führen.
Verwenden Sie die Handles, um das Produkt zu installieren/deinstallieren. Auf diese
Weise vermeiden Sie, dass das faceplate oder die Platine deformiert oder zerstört
wird.
Beschädigung des Produktes und von Zusatzmodulen
Fehlerhafte Installation von Zusatzmodulen, kann zur Beschädigung des Produktes und der Zusatzmodule führen.
Lesen Sie daher vor der Installation von Zusatzmodulen die zugehörige Dokumentation.
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Sicherheitshinweise
Kabel und Stecker
Beschädigung des Produktes
Bei den RJ-45-Steckern, die sich an dem Produkt befinden, handelt es sich entweder um Twisted-Pair-Ethernet (TPE) oder um E1/T1/J1-Stecker. Beachten Sie, dass ein versehentliches Anschließen einer E1/T1/J1-Leitung an einen TPE-Stecker das Produkt zerstören kann.
Kennzeichnen Sie deshalb TPE-Anschlüsse in der Nähe Ihres Arbeitsplatzes deutlich als
Netzwerkanschlüsse.
Stellen Sie sicher, dass die Länge eines mit Ihrem Produkt verbundenen TPE-Kabels 100 m
nicht überschreitet.
Das Produkt darf über die TPE-Stecker nur mit einem Sicherheits-Kleinspannungs-
Stromkreis (SELV) verbunden werden.
Bei Fragen wenden Sie sich an Ihren Systemverwalter.
Batterie
Beschädigung des Blades
Ein unsachgemäßer Einbau der Batterie kann gefährliche Explosionen und
Beschädigungen des Blades zur Folge haben.
Verwenden Sie deshalb nur den Batterietyp, der auch bereits eingesetzt wurde und
befolgen Sie die Installationsanleitung.
Datenverlust
Wenn Sie die Batterie austauschen, können die Zeiteinstellungen verloren gehen. Eine Backupversorgung verhindert den Datenverlust während des Austauschs. Wenn Sie die Batterie schnell austauschen, bleiben die Zeiteinstellungen möglicherweise erhalten.
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Datenverlust
Wenn die Batterie wenig oder unzureichend mit Spannung versorgt wird, wird der RTC initialisiert. Tauschen Sie die Batterie aus, bevor sieben Jahre tatsächlicher Nutzung vergangen sind.
Schäden an der Platine oder dem Batteriehalter
Wenn Sie die Batterie mit einem Schraubendreher entfernen, können die Platine oder der Batteriehalter beschädigt werden. Um Schäden zu vermeiden, sollten Sie keinen Schraubendreher zum Ausbau der Batterie verwenden.
Umweltschutz
Entsorgen Sie alte Batterien und/oder Blades/Systemkomponenten/RTMs stets gemäß der in Ihrem Land gültigen Gesetzgebung, wenn möglich immer umweltfreundlich.
Sicherheitshinweise
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Sicherheitshinweise
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Introduction

1.1 Overview

The MVME2502 is a VME form-factor single-board computer based on the Freescale QorIQ P2020 dual core processor which features e500 cores delivering an excellent performance-to­power ratio.The board has wide range of I/O options and is designed for applications such as industrial control, semiconductor process equipment, radar, sonar and transportation signaling.
The MVME2502 is designed to work in VMEbus chassis with a 3-row backplane connector environment with a reduced I/O capacity and reduced peripheral power. It is also designed to work in a more modern and higher performance VME chassis environment with a 5-row backplane connector in the 2eVME or the 2eSST protocol mode.
The main features of the MVME2502 board are as follows:
Freescale QorIQ P2020 based 6U form-factor VME board
Chapter 1
1000 MHz to 1.2 GHzcore frequency
512 KB L2 cache
Three 10/100/1000 Mbps enhanced three-speed Ethernet controllers (eTSECs)
Two PCI-E 1.0a x1 interface controller
One PCI-E 1.0a x2 interface controller
USB 2.0 interface
Enhanced secure digital host controller
DDR3 memory controller at 800 MT/s
SPI interface (four chip selects, but only two are used on the board)
Programmable interrupt controller
Dual PMC/XMC sites
Site1:
PMC supporting PCI-X 64/33 interface XMC supporting PCI-E 1.0a x2 interface
Site2:
SATA Drive Kit
2 GB DDR3-800 soldered chip memory with ECC
MVME2502 Installation and Use (6806800R96E)
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Introduction
IEEE 1101.10 compliant or SCANBE ejector handles
Extended Temperature /Ruggedized Option
The front panel I/O configuration consists of two RJ45 10/100/1000BASE-T Ethernet ports,
The rear I/O includes support for VMEbus (Legacy VME, VME 64, VME64x, and 2eSST), rear
Persistent Data Storage: 512 KB MRAM
User Flash: 8GB eMMC solid state storage
Boot Flash:
PMC/XMC front panel I/O (optional) a USB 2.0 port, a Micro DB9 RS-232 serial console port, and a reset/abort switch. It also has an LED to signal board failure and another LED that can be configured in the LED register.
PMC/XMC I/O with P4 I/O, RTM I/O (through VME P2), two 10/100/1000BASE-T Ethernet, four UART, and RTM I2C/Presence/Power.
16 MB SPI Flash (2x 8MB)
Supports crisis recovery
I2C Devices:
Real-Time Clock
Board Temperature Sensor
8 KB VPD EEPROM
Two 64 KB User EEPROM
MVME721E Rear Transition Module I/O
Two Gigabit Ethernet interfaces
PMC I/O from PMC1
Operating System:
Based from BSP provided by Freescale which is based from standard Linux version
2.6.32-rc3. Development tool is ltib 9.1.1 (Linux Target Image Builder) from Freescale
VxWorks
Boot Firmware: U-Boot-based firmware image in 16 MB SPI Flash. This flash is split into two
8 MB chips.
32
MVME2502 Installation and Use (6806800R96E)
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VMEbus Interface
Controller: Tsi148 PCI-X to VMEbus bridge with support for VME64 and 2eSST protocols
CPLD: Watchdog, timers, and registers

1.2 Standard Compliances

The product is designed to meet the following standards:
Table 1-1 Board Standard Compliances
Standard Description
EN 60950-1/A11:2009 IEC 60950-1:2005 2nd Edition CAN/CSA C22.2 No 60950-1
Introduction
Safety Requirements (legal)
FCC Part 15, Subpart B, Class A (non­residential)
ICES-003, Class A (non-residential) EMC Directive 89/336/EEC EN55022 Class B EN55024 AS/NZS CISPR 22, Class A EN300386
ETSI EN 300 019 series Environmental Requirements
Directive 2011/65/EU Directive on the restriction of the use of certain
EMC requirements (legal) on system level (predefined Artesyn system)
hazardous substances in electrical and electronic equipment (RoHS)
MVME2502 Installation and Use (6806800R96E)
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Introduction
Figure 1-1 MVME2502 Declaration of Conformity
EC Declaration of Conformity
According to EN 17050-1:2004
Manufacturer’s Name:
Manufacturer’s Address:
Declares that the following product, in accordance with the requirements of 2004/108/EC, 2006/95/EC, 2011/65/EU and their amending directives,
Product:
Model Name/Number:
has been designed and manufactured to the following specifications:
EN55022:2006 Class A
EN55024: (A1: 2001 + A2: 2003): 1998
2011/65/EU RoHS Directive
As manufacturer we hereby declare that the product named above has been designed to comply with the rele­vant sections of the above referenced specifications. This product complies with the essential health and safety requirements of the above specified directives. We have an internal production control system that ensures compliance between the manufactured products and the technical documentation.
Artesyn Embedded Technologies
Zhongshan General Carton Box Factory Co. Ltd. No 62, Qi Guan Road West, Shiqi District, 528400 Zhongshan City Guangdong, PRC
MVME2502 Series Single-Board Computers
MVME2502-02100202E, MVME2502-02100202S, MVME2502-02120201E, MVME2502-02120201E, MVME2502-021CC
34
___________________________________________________ ___
03/11/2014
______
Tom Tuttle, Manager, Product Testing Services Date (MM/DD/YYYY)
MVME2502 Installation and Use (6806800R96E)
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1.3 Mechanical Data

The following table provides the dimensions and the weight of the board.
Table 1-2 Mechanical Data
Feature Value
Height 233.44 mm (9.2 inches)
Depth 160.0 mm (6.3 inches)
Front Panel Height 261.8 mm (10.3 inches)
Width 19.8 mm (0.8 inches)
Max. Component Height 14.8 mm (0.58 inches)
Weight 400 grams (ENP1), 700 grams (ENP2)
Introduction

1.4 Ordering Information

As of the printing date of this manual, this guide supports the models listed below.
Table 1-3 Accessories and Cables
Order Number Description
MVME2502-02100202E QorIQ P2020 1.0GHz, 2GB DDR3 2PMC/XMC ENP2 EXTENDED TEMP,
IEEE
MVME2502-02100202S QorIQ P2020 1.0GHz, 2GB DDR3 2PMC/XMC ENP2 EXTENDED TEMP,
SCANBE
MVME2502-02120201E QorIQ P2020 1.2GHz, 2GB DDR3 2PMC/XMC ENP1 IEEE
MVME2502-02120201S QorIQ P2020 1.2GHz, 2GB DDR3 2PMC/XMC ENP1 SCANBE
MVME2502-021CC QorIQ P2020 1.0GHz, 2GB DDR3 2PMC/XMC ENP2 EXT TEMP, IEEE
MVME2502 Installation and Use (6806800R96E)
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Introduction
As of the printing date of this manual, the following board accessories are available.
Table 1-4 Accessories and Cables
Order Number Description
SERIAL-MINI-D2 SERIAL CABLE - MICRO D SUB CONNECTOR TO STANDARD DB9
ACC/CABLE/SER/DTE/6E SERIAL CABLE, RD 009, 2M, 2 DTE MD/D, RJ45 TO DB9
MVME2502-HDMNTKIT1 MVME2502 HD MOUNTING KIT ENP1
MVME2502-HDMNTKIT2 MVME2502 HD MOUNTING KIT ENP2
36
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1.5 Product Identification

The following figures show the location of the serial number label.
Figure 1-2 Serial Number Location-ENP1 Variant
Introduction
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Introduction
Figure 1-3 Serial Number Location-ENP2 Variant
38
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Hardware Preparation and Installation

2.1 Overview

This chapter provides unpacking instructions, hardware preparation, installation procedures of the board. Installation instructions for the optional PMC/XMC modules and transitions modules are also included.
A fully implemented MVME2502 consists of the base board and the following modules:
PCI Mezzanine Card (PMC) or PCI-E Mezzanine Card (XMC) for added versatility
Rear transition module
SATA kit
NOTE: MVME2502-HDMNKIT1/MVME2502-HDMNKIT2 is provided based on purchase order.
The following are the steps to be performed before using the board. Be sure to read the entire chapter, including all caution and warning notes, before you begin.
Chapter 2
1. Unpack the hardware. Refer to Unpacking and Inspecting the Board on page 40
2. Configure the hardware by setting jumpers on the board and the RTM. Refer to Configuring
the Board on page 43
3. Install the rear transition module in the chassis. Refer to Rear Transition Module on page 44.
4. Install PMC module (if required). Refer to PMC/XMC Support on page 46.
5. Install XMC span module (if required). Refer to PMC/XMC Support on page 46.
6. If purchased, install MVME2502-HDMNKIT1/MVME2502-HDMNKIT2. Refer to Installation
of MVME2502-HDMNTKIT1/MVME2502-HDMNTKIT2 on page 48.
7. Install the board in the chassis. Refer to Installing and Removing the Board on page 50.
8. Attach cables and apply power. Refer to Completing the Installation on page 52.
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Hardware Preparation and Installation

2.2 Unpacking and Inspecting the Board

Read all notices and cautions prior to unpacking the product.
Damage of Circuits
Electrostatic discharge and incorrect installation and removal can damage circuits or shorten its life.
Before touching the board or electronic components, make sure that you are working
in an ESD-safe environment.
Shipment Inspection
To inspect the shipment, perform the following steps:
1. Verify that you have received all items of your shipment:
MVME2502 board
Quick Start Guide
Safety Notes Summary Any optional items ordered
2. Check for damage and report any damage or differences to customer service.
3. Remove the desiccant bag shipped together with the board and dispose of it according to
your country’s legislation.
The product is thoroughly inspected before shipment. If any damage occurred during transportation or any items are missing, contact customer service immediately.
40
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2.3 Requirements

Make sure that the board meets the following requirements when operated in your particular system configuration.

2.3.1 Environmental Requirements

Operating temperatures refer to the temperature of the air circulating around the board and not to the component temperature.
Table 2-1 Environmental Requirements
Hardware Preparation and Installation
Characteristics Commercial Versions Extended Temperature Versions
Applicable Variants MVME2502-02120201E/S
MVME2502-02120202E/S
Cooling Method Forced Air Forced Air
Operating Temperature
Storage -40°C to +85°C -50°C to +100°C
Vibration Sine (10min/axis)
Vibration Random (1hr/axis)
Shock 20g/11 mS 30g/11 mS
Humidity to 95% RH (non-condensing) to 100% RH (non-condensing)
1. ft3/min
2. Flat 15-1000Hz, -6db/octave 1000Hz - 2000Hz [MIL-STD 810F Figure 514.5C-17]
MVME2502 Installation and Use (6806800R96E)
0°C to +55°C -40°C to +71°C
2 G, 5 to 500 Hz 5 G, 15 to 2000 Hz
0.002g2/Hz, 15 to 2000 Hz 0.04g2/Hz, 15 to 2000 Hz (8
MVME2502-02100202E MVME2502-02100202S
2
GRMS)
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Hardware Preparation and Installation
Product Damage
High humidity and condensation on the board surface causes short circuits.
Do not operate the board outside the specified environmental limits.
Make sure that the board is completely dry and there is no moisture on any surface
before applying power.

2.3.2 Power Requirements

The board uses +5.0 V from the VMEbus backplane. On-board power supply generates required voltages for various ICs. The MVME2502 connects the +12 V and -12 V supplies from the backplane to the PMC sites, while the +3.3 V power supplied to the PMC sites comes from the +5.0 V backplane power. A maximum of 10 A of +3.3 V power is available to the PMC sites, however the 90 W +5.0 V limit must be observed as well as any cooling limitations.
42
The following table provides an estimate of the typical and maximum power required.
Table 2-2 Power Requirements
Typical
Maximum
Board Variant
MVME2502-02120201E 28.93W 21.8
MVME2502-02120201S 28.93W 21.8
MVME2502-02100202E 23.33W 16.6
MVME2502-02100202S 23.33W 16.6
(Calculated)
(Measured Operating)
The power is measured when the board is in standby (Linux prompt) mode. Power will significantly increase when adding hard drives or a XMC/PMC card.
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The following table shows the power available when the MVME2502 is installed in either a three row or five row chassis and when PMCs are present.
Chassis Type Available Power Power With PMCs
Three Row 70 W maximum below 70 W
Five Row 90 W maximum below 90 W
Keep below power limit. Cooling limitations must be considered.

2.3.3 Equipment Requirements

Hardware Preparation and Installation
The following are recommended to complete a MVME2502 system:
VMEbus system enclosure
System console terminal
Operating system (and/or application software)
Transition module and connecting cables

2.4 Configuring the Board

The board provides software control over most options. Settings can be modified to fit the user's specifications. To configure, set the bits in the control register after installing the board in a system. Make sure that all user-defined switches are properly set before installing a PMC/XMC module. For more information, see Switches on page 79.
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Hardware Preparation and Installation

2.5 Installing Accessories

2.5.1 Rear Transition Module

The MVME2502 does not support hot swap. Remove power to the rear slot or the system before installing the module. A PCMI/O Module (PIM) needs to be manually configured and installed before placing the transition module.
Damage of Circuits
Electrostatic discharge and incorrect installation and removal can damage circuits or
shorten its life.
Before touching the board or electronic components, make sure that you are working
in an ESD-safe environment.
44
Product Damage
Only use injector handles for board insertion to avoid damage to the front panel and/or
PCB. Deformation of the front panel can cause an electrical short or other board malfunction.
Board Malfunction
Switches marked as “reserved” might carry production-related functions and can cause
the board to malfunction if their setting is changed.
Do not change settings of switches marked as “reserved”. The setting of switches which
are not marked as “reserved” has to be checked and changed before board installation.
Installation Procedure
1. Turn OFF all equipment and disconnect the power cable from the AC power source.
2. Remove the chassis cover.
3. Remove the filler panel(s) from the appropriate card slot(s) at the rear of the chassis (if the chassis has a rear card cage).
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Hardware Preparation and Installation
4. Install the top and bottom edge of the transition module into the rear guides of the chassis.
5. Ensure that the levers of the two injector/ejectors are in the outward position.
6. Slide the transition module into the chassis until resistance is felt.
7. Move the injector/ejector levers in an inward direction.
8. Verify that the transition module is properly seated and secure it to the chassis using two screws adjacent to the injector/ejector levers.
9. Connect the cables to the transition module.
To remove the transition module from the chassis, reverse the procedure and press the red locking tabs (IEEE handles only) to extract the board.
Removal Procedure
1. Turn off the power.
2. Disconnect all the cables.
3. Press the red locking tabs (IEEE handles only) to eject the board.
4. Loosen and remove the screws adjacent to the injector/ejector levers that securing the module to the chassis.
5. Move the injector/ejector levers in outward direction.
6. Slide the module from the chassis and make sure that no damage is caused to the pins.
7. Remove the transition module from the chassis and insert the filler panels.
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Hardware Preparation and Installation

2.5.2 PMC/XMC Support

Installation Procedure
Read all notices and follow these steps to install a PMC on the baseboard.
Damage of Circuits
Electrostatic discharge and incorrect installation and removal can damage circuits or
shorten its life.
Before touching the board or electronic components, make sure that you are working
in an ESD-safe environment.
Product Damage
46
Inserting or removing modules with power applied may result in damage to module
components.
Before installing or removing additional devices or modules, read the documentation
that came with the product.
1. Attach an ESD strap to your wrist. Attach the other end of the strap to the chassis as a ground. Make sure that it is securely fastened throughout the procedure.
2. Remove the PMC/XMC filler plate from the front panel cut-out.
3. Slide the front bezel of the PMC/XMC into the front panel cut-out from backside. The front bezel of the PMC/XMC module will be placed with the board when the connectors on the module align with the connectors on the board.
4. Align the mating connectors properly and apply minimal pressure to the PMC/XMC until it is seated to the board.
5. Insert the four PMC/XMC mounting screws through the mounting holes on the bottom side of the board, and then thread the four mount points on the PMC/XMC. Fasten the screws.
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Hardware Preparation and Installation
6. Install the board into the appropriate card slot. Make sure that the board is well seated into the backplane connectors. Do not damage or bend connector pins.
7. Replace the chassis or system cover.
8. Reconnect the system to the power source and then turn on the system.
When removing the PMC/XMC, hold it by its long side and exert minimal force when pulling it from the baseboard to prevent pin damage.
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Hardware Preparation and Installation
2.5.3 Installation of MVME2502-HDMNTKIT1/MVME2502­HDMNTKIT2
Installation Procedure
1. Attach washers and hex standoffs to HDD received with the MVME2502-HDMNTKIT1 /
MVME2502-HDMNTKIT2.
48
2. Assemble the SATA adapter board to the blade and ensure that it is properly aligned with
the standoff. Attach the screws to anchor the SATA adapter board to the blade.
Note: The 3.3V key must be removed to install the SATA kit.
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3. Attach hex standoff to main board.
Hardware Preparation and Installation
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Hardware Preparation and Installation
4. Attach HDD with interface PCB to main board using screws as shown below:

2.6 Installing and Removing the Board

This section describes the recommended procedure for installing the board in a chassis. Read all warnings and instructions before installing the board.
50
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Hardware Preparation and Installation
The MVME2502 does not support hot swap. Power off the slot or system and make sure that the serial ports and switches are properly configured.
Damage of Circuits
Electrostatic discharge and incorrect installation and removal can damage circuits or
shorten its life.
Before touching the board or electronic components, make sure that you are working
in an ESD-safe environment.
Product Damage
Only use injector handles for board insertion to avoid damage to the front panel and/or
PCB. Deformation of the front panel can cause an electrical short or other board malfunction.
Installation Procedure
1. Attach an ESD strap to your wrist. Attach the other end of the strap to an electrical ground.
Make sure that it is securely fastened throughout the procedure.
2. Remove VME filler panels from the VME enclosures, as appropriate.
3. Install the top and bottom edge of the board into the guides of the chassis.
4. Ensure that the levers of the two injector/ejectors are in the outward position.
5. Slide the board into the chassis until resistance is felt.
6. Simultaneously move the injector/ejector levers in an inward direction.
7. Verify that the board is properly seated and secure it to the chassis using the two screws
located adjacent to the injector/ejector levers.
8. Connect the appropriate cables to the board.
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Hardware Preparation and Installation
Removal Procedure
1. Turn off the power.
2. Disconnect all the cables.
3. Press the red locking tabs (IEEE handles only) to eject the board.
4. Loosen and remove the screws adjacent to the injector/ejector levers that securing the
module to the chassis.
5. Move the injector/ejector levers in outward direction.
6. Hold top and bottom edges of the board and exert minimal force when pulling the board
from the chassis to prevent pin damage.
7. Carefully remove the board from the chassis and store the board in anti-static envelope.

2.7 Completing the Installation

52
The board is designed to operate as an application-specific computer blade or an intelligent I/O board/carrier. It can be used in any slot in a VME chassis. Once the board is installed, you are ready to connect peripherals and apply power to the board.
Product Damage
RJ-45 connectors on modules are either twisted-pair Ethernet (TPE) or E1/T1/J1
network interfaces. Connecting an E1/T1/J1 line to an Ethernet connector may damage your system.
Make sure that TPE connectors near your working area are clearly marked as network
connectors.
Verify that the length of an electric cable connected to a TPE bushing does not exceed
100 meters.
Make sure the TPE bushing of the system is connected only to safety extra low voltage
circuits (SELV circuits).
If in doubt, ask your system administrator.
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Hardware Preparation and Installation
The console settings for the MVME2502 are:
Eight bits per character
One stop bit per character
Parity disabled (no parity)
Baud rate of 9600 baud
Verify that hardware is installed and the power/peripheral cables connected are appropriate for your system configuration.
Replace the chassis or system cover, reconnect the chassis to power source, and turn the equipment power on.
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Hardware Preparation and Installation
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Controls, LEDs, and Connectors

3.1 Board Layout

The following figure shows the components and connectors on the MVME2502 board.
Figure 3-1 Board Layout ENP1 Variant
Chapter 3
MVME2502 Installation and Use (6806800R96E)
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Controls, LEDs, and Connectors
Figure 3-2 Board Layout ENP2 Variant
56
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3.2 Front Panel

The following components are found on the MVME2502 ENP1 and ENP2 front panel.
Figure 3-3 Front Panel LEDs, Connectors and Switches
Controls, LEDs, and Connectors
PMC/XMC 2
Serial Port
USB
ETH 1
ETH 2
MVME2502 Installation and Use (6806800R96E)
PMC/XMC 1
USER 1
Reset Switch
FAIL
SPEED
ACT
SPEED
ACT
57
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Controls, LEDs, and Connectors

3.2.1 Reset Switch

The MVME2502 has a single push button switch that has both the abort and the reset functions. Pressing the switch for less than three seconds generates an abort interrupt if there is firmware that will read the GPIO2 (0xffdf0095) interrupt register. U-boot does not implement any interrupts and also does not detect the interrupt or display anything when the button is pressed.
Holding it down for more than three seconds will generate a hard reset. The VME SYSRESET is generated if the MVME2502 is the VMEbus system controller.

3.3 LEDs

The MVME2502 utilize light emitting diodes (LEDs) to provide a visible status indicator on the front panel. These LEDs show power failures, power up states, Ethernet link/speed, Ethernet activity, SATA link and activity and PCIe valid lane status. There are few user configurable LEDs. Each LED description is necessary for troubleshooting and debugging.

3.3.1 Front Panel LEDs

The front panel LEDs are listed below
Figure 3-4 Front Panel LEDs
PMC/XMC 2
58
SPEED
PMC/XMC 1 USER 1 FAIL
MVME2502 Installation and Use (6806800R96E)
SPEED
ETH 1
ACT
ACT
ETH 2
Page 59
Controls, LEDs, and Connectors
Table 3-1 Front Panel LEDs
Label Function Location Color Description
USER 1 User Defined Front panel Off
Yellow
Red
FAIL Board Fail Front panel Off
Red
GENET1 SPEED
GENET1 ACT
GENET2 SPEED
TSEC1 Link/Speed
TSEC1 Activity
TSEC2 Link/Speed
Front panel Integrated RJ45 LED
Front panel Integrated RJ45 LED
Front panel Integrated RJ45 LED (Left)
Off Amber Green
Off Blinking Green
Off Amber Green
By default User Software Controllable. Refer to
the "User LED Register." User Software Controllable. Refer to
the "User LED Register."
Normal operation after successful firmware boot.
One or more on-board power rails has failed and the board has shutdown to protect the hardware. Normal during power up, during hardware reset (such as a front panel reset). May be asserted by the BDFAIL bit in the Tsi148 VSTAT register.
No link 10/100BASE-T operation 1000 BASE-T operation
No activity Activity proportional to bandwidth
utilization
No link 10/100BASE-T operation 1000BASE-T operation
GENET2 ACT
MVME2502 Installation and Use (6806800R96E)
TSEC2 Activity
Front panel Integrated RJ45 LED
Off Blinking Green
No activity Activity proportional to bandwidth
utilization
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Controls, LEDs, and Connectors

3.3.2 On-board LEDs

The on-board LEDs are listed below. The LEDs are located on the rear side of the board just opposite of the battery location. To view the board, see Figure 3-1 on page 55.
Figure 3-5 On-board LEDs
60
Table 3-2 On-board LEDs Status
Label Function Color Description
D9 Power Fail Red This indicator is illuminated when one or more of the on-
board voltage rails fails.
D33 User Defined Amber Controlled by the CPLD. Used for boot-up sequence
indicator.
D34 User Defined Amber Controlled by the CPLD. Used for boot-up sequence
indicator.
D35 User Defined Amber Controlled by the CPLD. Used for boot-up sequence
indicator.
D36 Early Power Fail Amber This indicator is lit when the early 3.3V power supply fails.
D37 User Defined Amber Controlled by the CPLD
D38 User Defined Amber Controlled by the CPLD
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3.4 Connectors

This section describes the pin assignments and signals for the connectors on the MVME2502 board.

3.4.1 Front Panel Connectors

The following connectors are found on the outside of the MVME2502 board. These connectors are divided between the front panel connectors and the backplane connectors. The front panel connectors include the J1 and the J5 connectors. The backplane connectors include the P1 and the P2 connectors.
3.4.1.1 RJ45 with Integrated Magnetics (J1)
The MVME2502 uses an X2 RJ45.
Controls, LEDs, and Connectors
Table 3-3 Front Panel Tri-Speed Ethernet Connector (J1)
Pin Name Signal Description
1A GND
2A NC
3A Port A TRD3 -
4A Port A TRD3 +
5A Port A TRD2 -
6A Port A TRD2 +
7A Port A TRD1 -
8A Port A TRD1 +
9A Port A TRD0 -
10A Port A TRD0 +
D1A Port A Green LED1
Anode/ Yellow LED1 Cathode
D2A Port A Yellow LED1
Anode/ Green LED1 Cathode
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Controls, LEDs, and Connectors
Table 3-3 Front Panel Tri-Speed Ethernet Connector (J1) (continued)
Pin Name Signal Description
D3A Port A Green LED2
Anode/ Yellow LED2 Cathode
D4A Port A Yellow LED2
Anode/ Green LED2 Cathode
1B GND
2B NC
3B Port B TRD3 -
4B Port B TRD3 +
5B Port B TRD2 -
6B Port B TRD2 +
7B Port B TRD1 -
8B Port B TRD1 +
9B Port B TRD0 -
10B Port B TRD0 +
D1B Port B Green
LED1Anode/ Yellow LED1 Cathode
D2B Port B Yellow LED1
Anode/ Green LED1 Cathode
D3B Port B Green
LED2Anode/ Yellow LED2 Cathode
D4B Port B Yellow LED2
Anode/ Green LED2 Cathode
62
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3.4.1.2 Front Panel Serial Port (J4)
There is one front access asynchronous serial port interface labeled COMM1 that is routed to the micro mini DB-9 front panel connector. A male-to-male micro-mini DB9 adapter cable is available under Artesyn part number SERIAL-MINI-D (30-W2400E01A). The pin assignments for these connectors are as follows:
Table 3-4 Front Panel Serial Port (J4)
Signal
Pin
1NC
2RX
3TX
4NC
5GND
Description
Controls, LEDs, and Connectors
6NC
7RTS
8CTS
9NC
3.4.1.3 USB Connector (J5)
The MVME2502 uses upright USB receptacle mounted in the front panel.
Table 3-5 USB Connector (J5)
Pin Name Signal Description
1 +5 V
2 Data -
3 Data +
4GND
MTG Mounting Ground
MTG Mounting Ground
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Controls, LEDs, and Connectors
Table 3-5 USB Connector (J5) (continued)
Pin Name Signal Description
MTG Mounting Ground
MTG Mounting Ground
3.4.1.4 VMEBus P1 Connector
The VME P1 connector is a 160-pin DIN. The P1 connector provides power and VME signals for 24-bit address and 16-bit data. The pin assignments for the P1 connector is as follows:
Table 3-6 VMEbus P1 Connector
Pin Row A Row B Row C Row D Row Z
1 DATA 0 BBSY DATA 8 +5V NC
2 DATA 1 BCLR DATA 9 GND GND
3 DATA 2 ACFAIL DATA 10 NC NC
4 DATA 3 BGIN0 DATA 11 NC GND
5 DATA 4 BGOUT0 DATA 12 NC NC
6 DATA 5 BGIN1 DATA 13 NC GND
7 DATA 6 BGOUT1 DATA 14 NC NC
8 DATA 7 BGIN2 DATA 15 NC GND
9 GND BGOUT2 GND GAP NC
10 SYSCLK BGIN3 SYSFAIL GA0 GND
11 GND BGOUT3 BERR GA1 NC
12 DS1 BR0 SYSRESET +3.3V (not
used)
13 DS0 BR1 LWORD GA2 NC
14 WRITE BR2 AM 5 +3.3V (not
used)
15 GND BR3 ADD 23 GA3 NC
16 DTACK AM 0 ADD 24 +3.3V (not
used)
GND
GND
GND
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Table 3-6 VMEbus P1 Connector (continued)
Pin Row A Row B Row C Row D Row Z
17 GND AM 1 ADD 25 GA4 NC
18 AS AM 2 ADD 26 +3.3V (not
used)
19 GND AM 3 ADD 27 NC NC
20 IACK GND ADD 28 +3.3V (not
used)
21 IACKIN NC ADD 29 NC NC
22 IACKOUT NC ADD 30 +3.3V (not
used)
23 AM 4 GND ADD 31 NC NC
24 ADD 7 IRQ7 ADD 32 +3.3V (not
used)
25 ADD 6 IRQ6 ADD 33 NC NC
26 ADD 5 IRQ5 ADD 34 +3.3V (not
used)
27 ADD 4 IRQ4 ADD 35 NC NC
28 ADD 3 IRQ3 ADD 36 +3.3V (not
used)
29 ADD 2 IRQ2 ADD 37 NC NC
30 ADD 1 IRQ1 ADD 38 +3.3V (not
used)
GND
GND
GND
GND
GND
GND
GND
31 -12V NC +12V +12V NC
32 +5V +5V +5V +5V GND
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3.4.1.5 VMEBus P2 Connector
The VME P2 connector is a 160-pin DIN. Row B of the P2 connector provides power to the MVME2502 and to the upper eight VMEbus address lines and additional 16 VMEbus data lines. The Z, A, C, and D pin assignments for the P2 connector are the same for both the MVME2502 and MVME7216E/ MVME721E, and are as follows:
Table 3-7 VMEbus P2 Connector
Pin Row A Row B Row C Row D Row Z
1 PMC IO 2 +5V PMC IO 1 GE3_0 + Serial 1 RX
2 PMC IO 4 GND PMC IO 3 GE3_0 - GND
3 PMC IO 6 RETRY PMC IO 5 GND Serial 1 TX
4 PMC IO 8 ADDRESS 24 PMC IO 7 GE3_1 + GND
5 PMC IO 10 ADDRESS 25 PMC IO 9 GE3_1 - Serial 1 CTS
6 PMC IO 12 ADDRESS 26 PMC IO 11 GND GND
7 PMC IO 14 ADDRESS 27 PMC IO 13 GE3_2 + Serial 1 RTS
8 PMC IO 16 ADDRESS 28 PMC IO 15 GE3_2 - GND
9 PMC IO 18 ADDRESS 29 PMC IO 17 GND Serial 2 RX
10 PMC IO 20 ADDRESS 30 PMC IO 19 GE3_3 + GND
11 PMC IO 22 ADDRESS 31 PMC IO 21 GE3_3 - Serial 2 TX
12 PMC IO 24 GND PMC IO 23 GND GND
13 PMC IO 26 +5V PMC IO 25 I2C DATA Serial 2 CTS
14 PMC IO 28 DATA 16 PMC IO 27 I2C CLK GND
15 PMC IO 30 DATA 17 PMC IO 29 GE3_LINK_ LED Serial 2 RTS
16 PMC IO 32 DATA 18 PMC IO 31 GE3_ACT_LED GND
17 PMC IO 34 DATA 19 PMC IO 33 GE4_LINK_LED Serial 3 RX
18 PMC IO 36 DATA 20 PMC IO 35 GE4_A_LED GND
19 PMC IO 38 DATA 21 PMC IO 37 GND Serial 3 TX
20 PMC IO 40 DATA 22 PMC IO 39 GE4_3 - GND
21 PMC IO 42 DATA 23 PMC IO 41 GE4_3 + Serial 3 CTS
22 PMC IO 44 GND PMC IO 43 GND GND
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Table 3-7 VMEbus P2 Connector (continued)
Pin Row A Row B Row C Row D Row Z
23 PMC IO 46 DATA 24 PMC IO 45 GE4_2 - Serial 3 RTS
24 PMC IO 48 DATA 25 PMC IO 47 GE4_2+ GND
25 PMC IO 50 DATA 26 PMC IO 49 GND Serial 4 RX
26 PMC IO 52 DATA 27 PMC IO 51 GE4_1 - GND
27 PMC IO 54 DATA 28 PMC IO 53 GE4_1 + Serial 4 TX
28 PMC IO 56 DATA 29 PMC IO 55 GND GND
29 PMC IO 58 DATA 30 PMC IO 57 GE4_0 - Serial 4 CTS
30 PMC IO 60 DATA 31 PMC IO 59 GE4_0 + GND
31 PMC IO 62 GND PMC IO 61 GND Serial 4 RTS
32 PMC IO 64 +5V PMC IO 63 +5V GND

3.4.2 On-board Connectors

3.4.2.1 SATA Connector (J3)
The on-board customized SATA connector is compatible with SATA kit, namely VME­64GBSSDKIT and IVME7210-MNTKIT.
Table 3-8 Custom SATA Connector (J3)
Pin Signal Description Pin Signal Description
1 GND 21 GND
2 GND 22 SATA POWER ENABLE
3NC 23NC
4 SATA TX + 24 SATA DETECT
5NC 25NC
6 SATA TX - 26 GND
7 GND 27 NC
8 GND 28 GND
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Table 3-8 Custom SATA Connector (J3) (continued)
Pin Signal Description Pin Signal Description
9 GND 29 GND
10 GND 30 GND
11 NC 31 +3.3V
12 SATA RX - 32 +5V
13 NC 33 +3.3V
14 SATA RX + 34 +5V
15 GND 35 +3.3V
16 GND 36 +5V
17 NC 37 +3.3V
18 GND 38 +5V
19 NC 39 +3.3V
20 GND 40 +5V
3.4.2.2 PMC Connectors
The MVME2502 supports two PMC sites. It utilizes J14 to support PMC I/O that goes to the RTM PMC. The tables below show the pin out detail of J11/J111, J12/J222, J13/J333 and J14. See
Figure 3-1 for the location of the PMC connectors.
Table 3-9 PMC J11/J111 Connector
Pin Signal Description Pin Signal Description
1 JTAG TCK 33 FRAME
2 -12V 34 GND
3 GND 35 GND
4 INT A 36 IRDY
5 INT B 37 DEVSEL
6 INT C 38 +5V
7 PRESENT SIGNAL 39 PCIXCAP
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Table 3-9 PMC J11/J111 Connector (continued)
Pin Signal Description Pin Signal Description
8 +5V 40 LOCK
9INT D 41NC
10 NC 42 NC
11 GND 43 PAR
12 NC 44 GND
13 PCI CLK 45 +3.3V
14 GND 46 AD 15
15 GND 47 AD 12
16 GNT A 48 AD 11
17 REQ A 49 AD 9
18 +5V 50 +5V
19 +3.3V 51 GND
20 AD 31 52 CBE0
21 AD 28 53 AD 6
22 AD 27 54 AD 5
23 AD 25 55 AD 4
24 GND 56 GND
25 GND 57 +3.3V
26 CBE3 58 AD 3
27 AD 22 59 AD 2
28 AD 21 60 AD 1
29 AD 19 61 AD 0
30 +5V 62 +5V
31 +3.3V 63 GND
32 AD 17 64 REQ64
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Table 3-10 PMC J12/J222 Connector
Pin Signal Description Pin Signal Description
1 +12V 33 GND
2 JTAG TRST 34 IDSELB
3 JTAG TMS 35 TRDY
4 JTAG TDO 36 +3.3V
5 JTAG TDI 37 GND
6 GND 38 STOP
7 GND 39 PERR
8NC 40GND
9 NC 41 +3.3V
10 NC 42 SERR
11 BUSMODE2 (Pulled
UP)
12 +3.3V 44 GND
13 PCI RESET 45 AD 14
14 BUSMODE3 (PULLED
DWN)
15 +3.3V 47 M66EN
16 BUSMODE4 (PULLED
DWN)
17 NC 49 AD 8
18 GND 50 +3.3V
19 AD 30 51 AD 7
20 AD 29 52 REQB
21 GND 53 +3.3V
22 AD 26 54 GNTB
23 AD 24 55 NC
24 +3.3V 56 GND
25 IDSEL 57 NC
43 CBE1
46 AD 13
48 AD 10
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Table 3-10 PMC J12/J222 Connector (continued)
Pin Signal Description Pin Signal Description
26 AD 23 58 EREADY
27 +3.3V 59 GND
28 AD 28 60 RSTOUT
29 AD 18 61 ACK64
30 GND 62 +3.3V
31 AD 16 63 GND
32 CBE2 64 NC
Table 3-11 PMC J13/J333 Connector
Pin Signal Description Pin Signal Description
1NC 33GND
2 GND 34 AD48
3 GND 35 AD 47
4 CBE7 36 AD 52
5 CBE6 37 AD 45
6CBE5 38GND
7 CBE4 39 +3.3V
8 GND 40 AD 40
9 +3.3V 41 AD 43
10 PAR64 42 AD 42
11 +3.3V 43 AD 41
12 AD 62 44 GND
13 AD 61 45 GND
14 GND 46 AD 40
15 GND 47 AD 39
16 AD 60 48 AD 38
17 AD 59 49 AD 37
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Table 3-11 PMC J13/J333 Connector (continued)
Pin Signal Description Pin Signal Description
18 AD 58 50 GND
19 AD 57 51 GND
20 GND 52 AD 36
21 +3.3V 53 AD 35
22 AD 56 54 AD 34
23 AD 55 55 AD 33
24 AD 54 56 GND
25 AD 53 57 +3.3V
26 GND 58 AD 32
27 GND 59 NC
28 GND 60 NC
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29 AD 51 61 NC
30 AD 50 62 GND
31 AD 49 63 GND
32 GND 64 NC
Table 3-12 PMC J14 Connector
Pin Signal Description Pin Signal Description
1 PMC IO 1 33 PMC IO 33
2 PMC IO 2 34 PMC IO 34
3 PMC IO 3 35 PMC IO 35
4 PMC IO 4 36 PMC IO 36
5 PMC IO 5 37 PMC IO 37
6 PMC IO 6 38 PMC IO 38
7 PMC IO 7 39 PMC IO 39
8 PMC IO 8 40 PMC IO 40
9 PMC IO 9 41 PMC IO 41
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Table 3-12 PMC J14 Connector (continued)
Pin Signal Description Pin Signal Description
10 PMC IO 10 42 PMC IO 42
11 PMC IO 11 43 PMC IO 43
12 PMC IO 12 44 PMC IO 44
13 PMC IO 13 45 PMC IO 45
14 PMC IO 14 46 PMC IO 46
15 PMC IO 15 47 PMC IO 47
16 PMC IO 16 48 PMC IO 48
17 PMC IO 17 49 PMC IO 49
18 PMC IO 18 50 PMC IO 50
19 PMC IO 19 51 PMC IO 51
20 PMC IO 20 52 PMC IO 52
21 PMC IO 21 53 PMC IO 53
22 PMC IO 22 54 PMC IO 54
23 PMC IO 23 55 PMC IO 55
24 PMC IO 24 56 PMC IO 56
25 PMC IO 25 57 PMC IO 57
26 PMC IO 26 58 PMC IO 58
27 PMC IO 27 59 PMC IO 59
28 PMC IO 28 60 PMC IO 60
29 PMC IO 29 61 PMC IO 61
30 PMC IO 30 62 PMC IO 62
31 PMC IO 31 63 PMC IO 63
32 PMC IO 32 64 PMC IO 64
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3.4.2.3 JTAG Connector (P6)
The JTAG Connector can be used in conjunction with the JTAG board and ASSET hardware.
Table 3-13 JTAG Connector (P6)
Pin Signal Description Pin Signal Description
1 NC 2 +3.3V FROM +5V
3 SPI HOLD 0 4 SPI CS 0
5 SPI CLK 6 SPI CS 1
7 SPI HOLD 1 8 SPI MOSI
9 SPI MISO 10 GND
11 SPI VCC 12 SCAN 1 TCK
13 SCAN 1 TDI 14 GND
15 SCAN 1 TRST 16 SCAN 1 TDO
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17 SCAN 1 TMS 18 +3.3V
19 GPO0 20 NC
21 NC 22 SCAN 2 TMS
23 NC 24 SCAN 2 TDO
25 SCAN 2 TCK 26 +3.3V FROM +5V
27 GND 28 SCAN 2 TDI
29 NC 30 NC
31 SCAN 3 TMS 32 SCAN 3 TCK1
33 SCAN 3 TDO 34 SCAN 3 TCK 2
35 +2.5V 36 SCAN 3 TCK 3
37 SCAN 3 TDI 38 GND
39 SCAN 3 TRST 40 SCAN 3 TCK3
41 SCAN 4 TCK 1 42 SCAN 4 TMS
43 GND 44 SCAN 4 TDO
45 SCAN 4 TCK 2 46 +3.3V
47 GND 48 SCAN 4 TDI
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Table 3-13 JTAG Connector (P6) (continued)
Pin Signal Description Pin Signal Description
49 SCAN 4 TCK 3 50 SCAN 4 TRST
51 SCAN 5 TMS 52 SCAN 5
53 SCAN 5 TDO 54 GND
55 +3.3V 56 SCAN5 TCK2
57 SCAN 5 TDI 58 GND
59 SCAN 5 TRST 60 NC
3.4.2.4 COP Connector P50(15)
The COP header is not populated by default.
Table 3-14 COP Header (P50)
Controls, LEDs, and Connectors
Pin Signal Description
1 JTAG TDO
2 COP QACK
3 JTAG TDI
4 COP TRST
5 COP RUNSTOP (Pulled UP)
6 COP VDD SENSE
7 JTAG TCK
8 COP CHECK STOP IN
9 JTAG TMS
10 NC
11 P2020 SW RESET
12 COP PRESENT
13 COP HARD RESET
14 KEYING
15 COP CHECK STOP OUT
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Table 3-14 COP Header (P50) (continued)
Pin Signal Description
16 GND
3.4.2.5 XMC Connector (XJ1)
The MVME2502 supports two XMC sites. The board only support J15 for XMC site 1 and J25 for XMC site 2.
Table 3-15 XMC Connector (XJ1) Pin out
Pin Row A Row B Row C Row D Row E Row F
1 RX0 + RX0 - +3.3V NC NC +3.3V
2 GND GND JTAG TRST GND GND HRESET
3 NC NC +3.3V NC NC +3.3V
4 GND GND JTAG TCK GND GND MRSTO
(PULLED UP)
5 NC NC +3.3V NC NC +3.3V
6 GND GND JTAG TMS GND GND +12V
7 NC NC +3.3V NC NC +3.3V
8 GND GND JTAG TMS GND GND -12V
9 NC NC NC NC NC +3.3V
10 GND GND JTAG TDO GND GND GA 0
11 TX0 TX0 - BIST (PULLED
UP)
12 GND GND GA 1 GND GND PRESENT
13 NC NC NC NC NC +3.3V
14 GND GND GA 2 GND GND I2C DATA
15 NC NC NC NC NC +3.3V
16 GND GND MVMRO
(PULLED DOWN)
17 NC NC NC NC NC NC
NC NC +3.3V
GND GND I2C CLOCK
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Table 3-15 XMC Connector (XJ1) Pin out (continued)
Pin Row A Row B Row C Row D Row E Row F
18 GND GND NC GND GND NC
19 CLK + CLK - NC ROOT 0
(PULLED UP)
ROOT0 (PULLED UP)
3.4.2.6 XMC Connector (XJ2)
Table 3-16 XMC Connector (XJ2) Pin out
Pin Row A Row B Row C Row D Row E Row F
1 RX0 + RX0 - +3.3V RX1+ RX1- +3.3V
2 GND GND JTAG TRST GND GND HRESET
3 NC NC +3.3V NC NC +3.3V
4 GND GND JTAG TCK GND GND MRSTO
(PULLED UP)
5 NC NC +3.3V NC NC +3.3V
6 GND GND JTAG TMS GND GND +12V
7 NC NC +3.3V NC NC +3.3V
8 GND GND JTAG TMS GND GND -12V
9 NC NC NC NC NC +3.3V
NC
10 GND GND JTAG TDO GND GND GA 0
11 TX0 TX0 - BIST (PULLED
UP)
12 GND GND GA 1 GND GND PRESENT
13 NC NC NC NC NC +3.3V
14 GND GND GA 2 GND GND I2C DATA
15 NC NC NC NC NC +3.3V
16 GND GND MVMRO
(PULLED DOWN)
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GND GND I2C CLOCK
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Table 3-16 XMC Connector (XJ2) Pin out (continued)
Pin Row A Row B Row C Row D Row E Row F
17 NC NC NC NC NC NC
18 GND GND NC GND GND NC
19 CLK + CLK - NC NC ROOT0
(PULLED UP)
3.4.2.7 Miscellaneous P2020 Debug Connectors(P4)
This is used for processor debugging. It is a depopulated connector labeled P4, located at the bottom side of the board near the processor.
Table 3-17 P2020 Debug Header (P4)
Signal
Pin
1 MSRCDI0
2GND
3 MSRCDI1
4MDVAL
5 MSRCDI2
6 TRIG_OUT
7 MSRCDI3
8 TRIG_IN
Description
NC
78
9 MSRCID4
10 GND
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3.5 Switches

These switches control the configuration of the MVME2502.
Board Malfunction
Switches marked as “reserved” might carry production-related functions and can cause
the board to malfunction if their settings are changed.
Do not change settings of switches marked as “reserved”. The setting of switches which
are not marked as “reserved” has to be checked and changed before board installation.

3.5.1 Geographical Address Switch (S1)

Controls, LEDs, and Connectors
The Tsi148 VMEbus Status Register provides the VMEbus geographical address of the MVM2502. The switch reflects the inverted states of the geographical address signals. Applications not using the five row backplane can use the geographical address switch to assign a geographical address based on the following diagram.
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Note that this switch is wired in parallel with the geographical address pins on the five row connector. These switches must be in the "OFF" position when installed in a five row chassis in order to get the correct address from the P1 connector. This switch also includes the SCON control switches.
Figure 3-6 Geographical Address Switch
80
Table 3-18 Geographical Address Switch
Position Function Default
S1-1 VME SCON Auto
S1-2 VME SCON SEL
S1-3 GAP 1
S1-4 GA4 1
S1-5 GA3 1
S1-6 GA2 1
S1-7 GA1 1
S1-8 GA0 1
1. The VME SCON MAN switch is "OFF" to select Auto-SCON mode. The switch is "ON" to select manual SCON mode which works in conjunction with the VME SCON SEL switch.
2. The VME SCON SEL switch is OFF to select non-SCON mode. The switch is ON to select always SCON mode. This switch is only effective when the VME SCON MAN switch is "ON".
1
2
Auto-SCON
Non-SCON
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3.5.2 SMT Configuration Switch (S2)

This eight position SMT configuration switch controls the flash bank user defined switch, selects the flash boot image, and controls the safe start ENV settings. The default setting on all switch positions is "OFF" and is indicated by brackets in Table 3-19.
Figure 3-7 SMT Configuration Switch Position
Controls, LEDs, and Connectors
Table 3-19 Geographical Address Switch Settings
SW2 DEFAULT Signal Name Description Notes
1 OFF (Normal Env) NORMAL_ENV Safe Start ("ON"= Use
normal ENV, "OFF"= Use safe ENV)
2 OFF (Flash Block A) BOOT_BLOCK_A Boot Block B Select
3 OFF (WP disabled) FLASH_WP_N Flash Write Protect
4 OFF (Auto) PMC_XMC_SEL XMC/PMC - Manual Detect
or Auto Detect
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Table 3-19 Geographical Address Switch Settings (continued)
SW2 DEFAULT Signal Name Description Notes
5 OFF (133 MHz) PMC_133 PCI frequency selection This option can only be used
if the PMC supports PCI-X interface. The board will automatically detect the frequency of operation of the PMC and the board will negotiate accordingly. If the PMC support PCI-X speed, this switch can be configured to run either 100 MHz or 133MHz frequency.
6 OFF (WP Enabled) MASTER_WP_DISA
BLED
The on-board EEPROM can be write-protected via S2­6, switching it ON will disable the write protection.
For I2C write-protect only.
7 OFF (Front) GBE_MUX_SEL User Defined switch that
will select if the GBE PHY will function on the front panel or on the Back PLANE
8 OFF (CPU Reset
Deasserted)
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Functional Description

4.1 Block Diagram

The MVME2502 block diagram is illustrated in Figure 4-1. All variants provide front panel access to one serial port via a micro-mini DB-9 connector, two 10/100/1000 Ethernet port (one is configurable to be routed to the front panel or the rear panel) through a RJ45 connector and one Type A USB Port. It includes Board Fail LED indicator, user-defined LED indicator and a ABORT/RESET switch.
Figure 4-1 Block Diagram
Chapter 4
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Functional Description

4.2 Chipset

The MVME2502 utilizes the QorIQ P20x0 integrated processor. It offers an excellent combination of protocol and interface support which includes the following components.
The QorIQ P2020 integrated processor or e500 processor core.
PCI Express interface
Local Bus Controller
Secure Digital Host Controller
I2C interface
USB interface
DUART
DMA controller
Enhanced three speed Ethernet controller
General Purpose I/O (GPIO)
Integrated Security Engine
Common On-chip Processor
P2020 Strapping pins

4.2.1 e500 Processor Core

The e500v2 (P2020)QorIQ integrated processor offers high performance dual core. It operates from 1.0GHz up to 1.2GHz core frequency. The e500 processor core is a low-power implementation of the family of reduced instruction set computing (RISC) embedded processor that implement the Book E definition of the PowerPC architecture. The e500 is a 32­bit implementation of the Book E architecture using the lower words of 64-bit general-purpose registers (GPRs) while E500v2 uses 36 bit physical addressing.
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4.2.2 Integrated Memory Controller

A fully programmable DDR SDRAM controller supports most JEDEC standard DDR2 and DDR3 memories available. A built-in error checking and correction (ECC) ensures very low bit-error rates for reliable high-frequency operation. ECC is implemented on MVME2502.
The memory controller supports the following:
16 GB of memory
Asynchronous clocking from platform clock, with programmable settings that meets all
the SDRAM timing parameters.
Up to four physical banks; each bank can be independently addressed to 64 Mbit to 4 Gbit
memory devices (depending on the internal device configuration with x8/x16/x32 data ports).
Chipset interleaving and partial array self-refresh.
Data mask signal and read-modify-write for sub-double-word writes when ECC is enabled.
Functional Description
Double-bit error detection and single-bit error correction ECC, 8-bit check work across 64-
bit data.
Automatic DRAM initialization sequence or software-controlled initialization sequence
and automatic DRAM data initialization.
Write leveling for DDR3 memories and supports up to eight posted refreshes.

4.2.3 PCI Express Interface

The PCI Express interface is compatible with the PCI Express Base Specification Rev. 1.0a. The PCI Express controller connects the internal platform to a 2.5 GHz serial interface. The P2020 has options for up to three PCIe interfaces with up to x4 link width. The PCIe controller is configured to operate as either PCIe root complex (RC) or as an endpoint (EP) device.
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Functional Description

4.2.4 Local Bus Controller (LBC)

The main component of the enhanced LBC is the memory controller that provides a 16-bit interface to various types of memory devices and peripherals. The memory controller is responsible for controlling eight memory banks shared by the following: a general purpose chip select machine (GPCM); a flash controller machine (FCM), and user programmable machines (UPMs). The MVME2502 supports the GPCM, to interface with the CPLD, MRAM, and QUART.

4.2.5 Secure Digital Host Controller (SDHC)

The ENP1 and ENP2 variants of the MVME2502 use a soldered down 8GB eMMC device connected to the SDHC interface of the P2020 Processor. This is the only device available on the SDHC interface.

4.2.6 I2C Interface

The MVME2502 has two independent I2C buses on the processor. The MVME2502 use port 2 for the XMC modules and the I2C port 1 for all other devices. For more information, see I2C
Devices, on page 101.

4.2.7 USB Interface

The P2020 implements a USB 2.0 compliant serial interface engine. For more information, see
USB, on page 100.

4.2.8 DUART

The chipset provides two universal asynchronous receiver/transmitter (UART). Each UART is clocked by the CCB clock and is compatible with PC16522D. As a full-duplex interface, it provides 16-byte FIFO for both transmitter and receiver mode.
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Functional Description

4.2.9 DMA Controller

The DMA controller transfers blocks of data between the various interfaces and functional blocks of P2020 that are independent of the e500 cores. The P2020 DMA controller has three high-speed DMA channels, all of which are capable of complex data movement and advanced transaction chaining.

4.2.10 Enhanced Three-Speed Ethernet Controller (eTSEC)

The eTSEC controller of the device communicates to10 Mbps, 100 Mbps, and 1 Gbps Ethernet/IEE 802.3 networks, and devices featuring generic 8 to 16-bit FIFO ports. The MVME2502 uses the eTSEC using the RGMII interface.

4.2.11 General Purpose I/O (GPIO)

The P2020 has a total of sixteen I/O ports. Four of these ports are used alternately as external input interrupt. All sixteen ports have open drain capabilities.
The table below details the GPIO usage for the MVME2502:
Table 4-1 P2020 GPIO Functions
GPIO bit CPU Pin # Function
15 E24 Not connected
14 F24 Not connected
13 E23 Connected to pin R7 of the CPLD (unused input)
12 F23 Connected to pin M8 of the CPLD (unused input)
11 D24 Connected to pin M7 of the CPLD (unused input)
10 A25 Not connected
09 A24 Not connected
08 F22 Not connected
07 R25 Not connected
06 R29 Connected to pin T6 of the CPLD (unused input)
05 R24 Connected to pin R6 of the CPLD (unused input)
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Functional Description
Table 4-1 P2020 GPIO Functions (continued)
GPIO bit CPU Pin # Function
04 U29 Connected to INTA of the QUART. Programmed as
03 N24 Connected to pin P15of the CPLD
02 P29 Connected to Pin R16 of the CPLD. Programmed to
01 R26 Connected to INTA_N of the DS1337 Real Time
00 R28 Connected to LED_P21[2] of the BCM5482S.
a discrete input or to generate IRQ11. Also connected to pin P16 of the CPLD. (unused input)
generate a IRQ09 interrupt to the CPU based on contents of the CPLD GPIO2 interrupt register. For more information see, PLD GPIO2 Interrupt Register
on page 125.
Clock (RTC). Programmed as a discrete input or to generate IRQ08
Programmed as a discrete input or to generate IRQ07.

4.2.12 Security Engine (SEC) 3.1

The integrated security engine of the P2020 is designed to off load intensive security functions like key generation and exchange, authentication and bulk encryption from the processor core. It includes eight different execution units where data flows in and out of an EU.
NOTE: The standard versions of the MVME2502 do not use the encryption enabled versions of the P2020 processor.

4.2.13 Common On-Chip Processor (COP)

The COP is the debug interface of the QorIQ P2020 Processor. It allows a remote computer system to access and control the internal operation of the processor. The COP interface connects primarily through the JTAG and has additional status monitoring signals. The COP has additional features like breakpoints, watch points, register and memory examination/modification and other standard debugging features.
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Functional Description

4.2.14 P2020 Strapping Pins

The following table lists all the P2020 strapping pins and the default configuration settings for the MVME2502.
Table 4-2 P2020 Strapping Options
Config Functional Signal Name
LA[29:31] cfg_sys_pii[0:2] Yes 000 4:1 ratio CCB clock: SYSCLK
TSEC_1588_CLKOUT TSEC_1588_PULSE_O
UT1 TSEC_1588_PULSE_O
UT2
Reset Configuration Name
cfg_ddr_pii[0:2] Yes 011 8:1 ratio, DDRCLK=100MHz, DDRPLL
Resistor
Options
Default Value Description
=100MHz, CCB=400Mhz
(data rate) = 800MHz
LBCTL LALE LGPL2/LOE/LFRE
LWE0_N UART_SOUT1 READY_P1
LA27 LA16
LGPL3/LFW PLGPL5
DMA2_DACK0 cfg_mem_debug Yes 1 DDR SDRAM controller debug info
cfg_core0pii[0:2] Yes 110
101
cfg_core1pii[0:2] Yes 110 ENP1:
101 ENP2:
cfg_cup0_boot cfg_cpu1_boot
cfg_boot_seq[0:1] Yes 11 Boot sequencer is disabled. No I2C
Yes 10 CPU0 boot without waiting. CPU1
ENP1: 3:1 ratio, CCB clock= 400MHz, Core
clock=1200MHz
ENP2:
2.5:1 ratio, CCB clock= 400MHz, Core clock=1000MHz
3:1 ratio, CCB clock= 400MHz, Core clock=1200MHz
2.5:1 ratio, CCB clock= 400MHz, Core clock=1000MHz
holdoff
ROM is accessed (default)
driven to MSRCID/MDVAL (default)
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Functional Description
Table 4-2 P2020 Strapping Options (continued)
Config Functional Signal Name
DMA2_DDONE0 cfg_ddr_debug Yes 1 Debug information is not driven on
EC_MDC cfg_tsec_reduce Yes 0 eTSEC1 and eTSEC2 Ethernet
TSEC1_TXD[0,7] cfg_tsec1_prctcl[0:1] Yes 10 The eTSEC1 controller operates using
TSEC2_TXD[0,7] cfg_tsec2_prctcl[0:1] Yes 10 The eTSEC2 controller operates using
UART_RTS0,UART_RTS1cfg_tsec3_prctcl[0:1] Yes 10 The eTSEC3 controller operates using
Reset Configuration Name
Resistor
Options
Default Value Description
ECC pins (default)
interfaces operate in RGMII mode
the RGMII protocol
the RGMII protocol
the RGMII protocol
TSEC1_TXD[3:1] TSEC2_TX_ERR
MSRCID0 cfg_elbc_ecc Yes 0 eLBC ECC checking is disabled
LA28 cfg_sys_speed Yes 1 SYSCLK is at or above 66MHz
LA23 cfg_plat_speed Yes 1 Platform clock is at or above 333MHz
LA24 cfg_core0_speed Yes 1 ENP1:
LA25 cfg_core1_speed Yes 1 ENP1:
cfg_io_ports[0:3] Yes 0010 PCIE1=1x, PCIE2=1x, PCI3=2x
(default)
(default)
Core0 clock frequency is greater than 1000MHz
0 ENP2:
Core0 clock frequency is less than or equal to 1000MHz
Core1 clock frequency is greater than 1000MHz
0 ENP2:
Core1 clock frequency is less than or equal to 1000MHz
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Functional Description
Table 4-2 P2020 Strapping Options (continued)
Config Functional Signal Name
LA26 cfg_ddr_speed Yes 1 DDR Controller complex clock
LVDD_VSEL Yes 1 eTSEC, ethernet management, 1588
BVD_VSEL[0:1] Yes 11 Local bus and GPIO[8:15] interfaces =
CVDD_VSEL[0:1] Yes 00 USB, eSDHC, SPI interface = 3.3V
LA[20:22] UART_SOUT[0] TRIG_OUT MSRCID[1] MSRCID[4] DMA1_DDONE_B[0]
Reset Configuration Name
cfg_en_use[0:7] Yes 11111111default
Resistor
Options
Default Value Description
frequency (same as DDR rate) is greater than or equal to 500 MHZ (default)
interfaces = 2.5V
3.3V
TSEC2_TXD1 cfg_dram_type Yes 1 DDR3 SDRAM selected 1.5V (default)
TSEC2_TXD5 cfg_sdhc_cd_pol_sel Yes 1 SDHC polarity detect = not inverted
TSEC1_TXD[6:4] TSEC1_TX_ER
For the following options, no strapping options provided. They are only listed for reference.
LGPL1 cfg_sgmii2 No 1 eTSEC2 interface operates in parallel
TSEC_1588_ALARM_ OUT2
TSEC_1588_ALARM_ OUT1
LWE1/LBS1 LA[18:19] cfg_host_agt[0:2] No 111 Processor acts as the host root
TSEC2_TXD[4:2] cfg_device_ID[7:5] No 111 Rapid IO interface not used => default
MVME2502 Installation and Use (6806800R96E)
cfg_rom_loc[0:3] Yes 0110 Location of boot ROM = SPI FLASH
interface mode (default)
cfg_sgmii3 No 1 eTSEC3 interface operates in parallel
interface mode (default)
cfg_srds_refclk No 1 100MHz SERDES ref clock for PCIE
(default)
complex for all PCIE busses(default)
values used
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Functional Description
Table 4-2 P2020 Strapping Options (continued)
Config Functional Signal Name
LAD[0:15] cfg_gpinput[0:15] No No default value. Input pins do not
LGPL0 cfg_rio_sys_size No 1 Rapid IO interface not used => default
Reset Configuration Name
Resistor
Options
Default Value Description
have internal pull-up resistors
values used

4.3 System Memory

The P2020 integrated memory controller supports both DDR2 and DDR3 memory devices. It has one channel and can be configured up to four memory banks with x8, x16 and x32 devices. Selection of 4GB devices allows support up to 16 GB of memory. ECC is also supported.
The MVME2502 design implements 2 banks of 9x8 devices which includes ECC. The standard configurations populate a single memory bank of 2Gb DDR3-800 for a 2GB capacity. The MVME2502 is designed to accommodate 4Gb DDR3 devices supporting up to 8 Gb total when both memory banks are populated with 4Gb devices.

4.4 Timers

There are various timer functions implemented on the MVME2502 board:

4.4.1 Real Time Clock

The MVME2502 implements a Maxim DS1337 RTC to maintain seconds, minutes, hours, day, date, month, year accurately. The INT_A pin of the DS1337 is connected to the CPU GPIO[1] pin to allow the DS1337 to generate interrupts to the CPU. Access to the DS1337 is provided via the I2C port 0 from the CPU and responds to a base I2C address of $D0.
The MVME2502 provides a socketed 190mAh primary battery to power the RTC when the module is out of service.
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4.4.2 P2020 Internal Timer

The processor's internal timer is composed of eight global timers divided into two groups of four timers each. Each timer has four individual configuration registers and they cannot be cascaded together.

4.4.3 Watchdog Timer

The on-board CPLD provides programmable 16-bit watchdog timers. It has a 1 ms resolution and generates a board reset when the counter expires. Interrupt is generated to the processor when this occurs. Default value is 60 seconds.

4.4.4 CPLD Tick Timer

The MVME2502 supports three independent 32-bit timers that are implemented on the CPLD to provide fully programmable registers for the timers.
Functional Description

4.5 Ethernet Interfaces

The MVME2502 has three eTSEC controllers. Each one supports RGMII, GMII, and SGMII interface to the external PHY. All controllers can only be utilized when using the RGMII interface. Using the GMII allows only up to two usable controllers.
MVME2502 provides two 10/100/1000 Ethernet interfaces on the front panel and another two are routed to the RTM through the backplane connector. Due to controller limitations, one controller is designed to be routed to the front panel or to the RTM. This setting is possible by using a third party gigabit Ethernet LAN switch with a single enable switch such as PERICOM’s P13L301D. The routing direction is configured through the on-board dip switch.
The registers of the PHY are accessed through the processor’s two-wire Ethernet management interface.The front panel RJ45 connector has integrated speed and activity status indicator LEDs. Isolation transformers are provided on the board for each port.
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4.6 SPI Bus Interface

The enhanced serial peripheral interface (eSPI) allows the device to exchange data with peripheral devices such as EEPROMs, RTC, Flash and the like. The eSPI is a full-duplex synchronous, character-oriented channel that supports a simple interface such as receive, transmit, clock and chip selects. The eSPI receiver and transmitter each have a FIFO of 32 Bytes.
The P2020 supports up to four chip selects and RapidS full clock cycle operation. It can operate both full-duplex and half duplex. It works with a range from 4-bit to 16-bit data characters and is a single-master environment. The MVME2502 is configured such that the eSPI can operate up to 200 MHz clock rate and can support booting process.The firmware boot flash resides in the P2020 eSPI bus interface.

4.6.1 SPI Flash Memory

The MVME2502 has two 8 MB on-board serial flash. Both contain the ENV variables and the U­Boot firmware image, which is about 513 KB in size. Both SPI flash contain the same programming for firmware redundancy and crisis recovery. The SPI flash is programmed through the JTAG interface or through an on-board SPI flash programming header.
For information on U-boot and ENV Variables location see, Flash Memory Map, Table 5-2 on
page 112.

4.6.2 SPI Flash Programming

The MVME2502 has three headers: a 10-pin header for SPI Flash programming, an 80-pin header for the JTAG connectivity, and a 20-pin JTAG header for ASSET hardware connectivity. The following options are used to program the on-board flash:
Using on-board SPI header - The MVME2502 uses the 10-pin header with a Dual SPI Flash
in-circuit programming configuration. The pin connection is compatible with DediProg SPI Universal Pin Header.
Using 60-pin external JTAG header - An external JTAG board with a JTAG multiplexer is
compatible with the MVME2502 and is attached using an external cable. It is used to update the boot loader in the field. Using this method, programming is done through the JTAG interface or by using the dedicated SPI Flash programming header on the JTAG board.
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Factory Pre-Programming - Programming the SPI Flash usually takes a while. Ideally, the
SPI Flash should be pre-programmed in the factory before shipment.
ICT Programming - This programming is done on exposed test points using a bed of nails
tester.
The board power should be switched on before programming. The switch S2-8 should also be powered on to successfully detect the SPI Flash chip.

4.6.3 Firmware Redundancy

The MVME2502 utilizes two physically separate boot devices to provide boot firmware redundancy. Although the P2020 provides four SPI Bus chip selects, the P2020 is only capable of booting from the SPI Device controlled by chip select 0. External SPI multiplexing logic is implemented on the MVME2502 to accommodate this chipset limitation.
Functional Description
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Functional Description
The MVME2502 CPLD controls the chip select to SPI devices A and B. The CPLD chip select control is based on the Switch Bank (S2-2).
Figure 4-2 SPI Device Multiplexing Logic
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On power-up, the selection of the SPI boot device is strictly based upon the Switch Bank (S2-2) setting. Depending on the S2-2 setting, SPI_SEL0 is routed to one of two SPI devices. The selected SPI device must contain a boot image. Once the boot image is copied into memory and executed, the CPLD will wait, and once the P2020 will write on one bit of the CPLD watchdog register, the CPLD will then pass through the SPI chip select from the P2020 to SPI device chip selects. Now the software can perform read/write processes on any SPI device, including copying from one SPI device to another.
With this flexible approach to firmware redundancy, one should always be able to recover from a corrupt active firmware image, as long as a healthy firmware image is maintained in single bootable SPI Device.
The MVME2502 supports automatic switch over. If booting one device is not successful, the watchdog will trigger the board reset and it will automatically boot on the other device.
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4.6.4 Crisis Recovery

The MVME2502 provides an independent boot firmware recovery mechanism for the operating system. The firmware recovery can be performed without leaving the firmware environment.
During crisis recovery, the healthy boot image contained in SPI Device B is copied to SPI Device A, replacing the corrupt boot image contained in SPI Device A.
Crisis recovery is performed as follows:
1. Power off the board.
2. Set Switch S2-2 to "ON" to point to SPI Device B (crisis image).
3. Power on the board.
4. Press <h> key on the keyboard to go to the U-Boot prompt.
5. Type "moninit fru" to copy the crisis image to SPI Device A.
Functional Description
6. Once the U-Boot prompt is visible, power off the board.
7. Set the S2-2 back to "OFF" to point to the SPI Device A.
8. Power on the board to boot from the newly recovered image on the SPI Device A.
The board will automatically switch over if one of the devices is corrupted.

4.7 Front UART Control

The MVME2502 utilizes one of the two UART functions provided in the male micro-mini DB-9 front panel. A male-to-male micro-mini DB-9 to DB9 adapter cable is available under Artesyn Part Number SERIAL-MINI-D (30-W2400E01A) and is approximately 12 inches in length.
Only 115200 bps and 9600 bps are supported. The default baud rate on the front panel serial is 9600 kbps.
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Functional Description

4.8 Rear UART Control

The MVME2502 utilizes the Exar ST16C554 quad UART (QUART) to provide four asynchronous serial interface’ to the RTM. These devices feature 16 bytes of transmit and receive first-in first­out (FIFO) with selectable receive FIFO trigger levels and data rates of up to 1.5 Mbps. Each UART has a set of registers that provide the user with operating status and control. The QUART are 8-bit devices connected to the processor through the local bus controller using LBC chipset CS1, CS2, CS3 and CS4.
These four serial interfaces are routed to P2 I/O for RTM accessibility. There are total of five serial ports available on the MVME2502 board.

4.9 PMC/XMC Sites

The MVME2502 hosts two PMC/XMC sites and accepts either a PMC or an XMC add-on card. Only an XMC or a PMC may be populated at any given time as both occupy the same physical space on the PCB. The MVME2502 does not support combination PMC/XMC cards. The site provides a rear PMC I/O.
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The PMC sites are fully compliant with the following:
1. VITA 39 –PCI-X for PMC.
2. VITA 35-2000 for PMC P4 to VME P2 Connection.
3. PCI Rev 2.2 for PCI Local Bus Specification.
4. PCI-X PT 2.0 for PCI-X Protocol Addendum to the PCI Local Bus Specs.
5. IEEE Standard P1386-2001 for Standard for Common Mezzanine Card Family.
6. IEEE Standard P1386.1-2001 for Standard Physical and Environmental Layer for PCI Mezzanine Card.
7. VITA 42 for XMC.
8. VITA 42.3, PCIe for XMC.
PMC/XMC sites are keyed for 3.3V PMC signaling. The PMC and the XMC add-on cards must have a hole in the 3.3 V PMC keying position in order to be populated on the MVME2502 board. The XMC specification accommodates this since it is expected that carrier cards will host both XMC and PMC capable add-on cards.
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The MVME2502 have a keying pin at the 3.3V location at each PMC site. The MVME2502 boards are not 5 volt PMC IO compatible. The MVME2502 also has a 5 volt keying pin location at each PMC site. At PMC site 2, the 5 volt keying pin hole is used to mount the SATA adapter card. Warning label covers 5 volt keying pin at PMC site 1 and also at PMC site 2. If 5 volt PMC or XMC devices are operated on MVME2502 it may cause damage to the board.
The MVME2502 utilizes the P2020 x2 link PCI Express interface for PMC/XMC1 and x1 link PCI Express interface for PMC/XMC2. It is designed such that same PCI Express interface is used for either PMC or XMC. It is made possible by using PCIe Mux/DeMux chip. The CPLD via on-board switch controls the enable pin.
The CPLD controls the PCIe Mux/DeMux at both sites. The CPLD detects the presence signal provided by the XMC or PMC board and it will be used to configure the routing of PCIe Mux/DeMux correspondingly.

4.9.1 PMC Add-on Card

Functional Description
The MVME2502 PMC interface utilizes IDT’s TSI384 as the PCie/PCI-X bridge. It supports up to
8.5 Gbps (64 bits x 133 Mhz). The on-board switch S2-5 configures the TSI384 to run on either
100 Mhz or 133 Mhz, with 133 Mhz as default.
The MVME2502 supports multi-function PMCs and processor PMCs (PrPMCs). The PMC site has two IDSELs, two REQ/GNT pairs, and EREADY to support PrPMC as defined by VITA39.

4.9.2 XMC Add-on Card

The x2 links the PCI-E Gen 1 and is directly routed to the P15 XM connector through Pericom MUX Switch. The on-board switch S2-4 should be set to "ON".
The XMC add-on cards are required to operate at +5V or +12V (from carrier to XMC). The MVME2502 provides +5V to the XMC VPWR (Variable Power) pins. The MVME2502 does not provide +12V to the XMC VPWR pins. Voltage tolerances for VPWR and all carrier supplied voltage (+3.3 V, +12 V, -12 V) are defined by the base XMC standard.
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Functional Description

4.10 SATA Interface

The MVME2502 supports an optional 2.5" SATA HDD. The connector interface is compatible with the SATAMNKIT, which contains the following: one SSD/HDD, one SATA board, screws, and a mounting guide. The SATA connector supports a horizontal mounted SSD/HDD.
The MVME2502 uses Marvell's 88SE9125 SATA controller and supports up to 1.5 Gbps, 3.0 Gbps, or 6.0 Gbps (SATA Gen 1). For status indicators, it has an on-board green LED, D12 and D13 for SATA link, and SATA activity status respectively.

4.11 VME Support

The MVME2502 operates in either System Controller (SCON) mode or non-SCON mode, as determined by the switch setting of S1-1 and S1-2.
The P2020 x1 link is used for the VME backplane connectivity through the Tsi384 (PCI-E/PCI-X) and Tsi148 (PCI-X/VMEBus) bridges.
See VMEBus P1 Connector, on page 64 and VMEBus P2 Connector, on page 66 for more information.

4.11.1 Tsi148 VME Controller

The VMEbus interface for the MVME2502 is provided by the Tsi148 VMEbus controller. The Tsi148 provides the required VME, VME extensions, and 2eSST functions. TI SN74VMEH22501transceivers are used to buffer the VME signals between the Tsi148 and the VME backplane. Refer to the Tsi148 user's manual for additional details and/or programming information.

4.12 USB

The MVME2502 processor implements a dual-role (DR) USB 2.0 compliant serial interface engine. DC power to the front panel USB port is supplied using a USB power switch which provides soft-start, current limiting, over current detection, and power enable for port 1.
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