Artesyn MVME2500 Installation And Use Manual

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MVME2500

Installation and Use
P/N: 6806800L01L April 2015
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©
Copyright 2015 Artesyn Embedded Technologies, Inc.
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Notice
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If the documentation contained herein is supplied, directly or indirectly, to the U.S. Government, the following notice shall apply unless otherwise agreed to in writing by Artesyn.
Use, duplication, or disclosure by the Government is subject to restrictions as set forth in subparagraph (b)(3) of the Rights in Technical Data clause at DFARS 252.227-7013 (Nov. 1995) and of the Rights in Noncommercial Computer Software and Documentation clause at DFARS 252.227-7014 (Jun. 1995).
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Artesyn Embedded Technologies Artesyn Embedded Technologies Marketing Communications 2900 S. Diablo Way, Suite 190 Tempe, Arizona 85282
Lilienthalstr. 17-19 85579 Neubiberg/Munich Germany
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Contents
About this Manual . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Safety Notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Sicherheitshinweise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
1.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
1.2 Standard Compliances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
1.3 Mechanical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
1.4 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
1.5 Product Identification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
2 Hardware Preparation and Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
2.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
2.2 Unpacking and Inspecting the Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
2.3 Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
2.3.1 Environmental Requirements. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
2.3.2 Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
2.3.3 Equipment Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
2.4 Configuring the Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
2.5 Installing Accessories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
2.5.1 Rear Transition Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
2.5.2 PMC/XMC Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
2.6 Installing and Removing the Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
2.7 Completing the Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
3 Controls, LEDs, and Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
3.1 Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
3.2 Front Panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
3.2.1 Reset Switch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
3.3 LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
3.3.1 Front Panel LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
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3.3.2 On-board LEDs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
3.4 Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
3.4.1 Front Panel Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
3.4.1.1 RJ45 with Integrated Magnetics (J1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
3.4.1.2 Front Panel Serial Port (J4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
3.4.1.3 USB Connector (J5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
3.4.1.4 VMEBus P1 Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
3.4.1.5 VMEBus P2 Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
3.4.2 On-board Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
3.4.2.1 Flash Program Connector (P7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
3.4.2.2 SATA Connector (J3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
3.4.2.3 PMC Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
3.4.2.4 JTAG Connector (P6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
3.4.2.5 COP Connector (P50) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
3.4.2.6 SD Connector (J2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
3.4.2.7 XMC Connector (XJ2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
3.4.2.8 Miscellaneous P2020 Debug Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
3.5 Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
3.5.1 Geographical Address Switch (S1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
3.5.2 SMT Configuration Switch (S2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
4 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
4.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
4.2 Chipset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
4.2.1 e500 Processor Core. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
4.2.2 Integrated Memory Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
4.2.3 PCI Express Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
4.2.4 Local Bus Controller (LBC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
4.2.5 Secure Digital Hub Controller (SDHC). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
4.2.6 I2C Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
4.2.7 USB Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
4.2.8 DUART. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
4.2.9 DMA Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
4.2.10 Enhanced Three-Speed Ethernet Controller (eTSEC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
4.2.11 General Purpose I/O (GPIO). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
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4.2.12 Security Engine (SEC) 3.1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
4.2.13 Common On-Chip Processor (COP). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
4.2.14 P20x0 Hardware Configuration Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
4.3 System Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
4.4 Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
4.4.1 Real Time Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
4.4.2 Internal Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
4.4.3 Watchdog Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
4.4.4 FPGA Tick Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
4.5 Ethernet Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
4.6 SPI Bus Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
4.6.1 SPI Flash Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
4.6.2 SPI Flash Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
4.6.3 Firmware Redundancy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
4.6.4 Crisis Recovery. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
4.7 Front UART Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
4.8 Rear UART Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
4.9 PMC/XMC Sites . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
4.9.1 PMC Add-on Card . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
4.9.2 XMC Add-on Card . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
4.10 SATA Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
4.11 VME Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
4.11.1 Tsi148 VME Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
4.12 USB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
4.13 I2C Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
4.14 Reset/Control FPGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
4.15 Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
4.15.1 On-board Voltage Supply Requirement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
4.15.2 Power Up Sequencing Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
4.16 Clock Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
4.17 Reset Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
4.17.1 Reset Sequence. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
4.18 Thermal Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
4.19 Real-Time Clock Battery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
4.20 Debugging Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
4.20.1 POST Code Indicator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
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4.20.2 JTAG Chain and Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
4.20.3 Custom Debugging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
4.21 Rear Transition Module (RTM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
5 Memory Maps and Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
5.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
5.2 Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
5.3 Flash Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
5.4 Linux Devices Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .102
5.5 Programmable Logic Device (PLD) Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
5.5.1 PLD Revision Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
5.5.2 PLD Year Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .104
5.5.3 PLD Month Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .105
5.5.4 PLD Day Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
5.5.5 PLD Sequence Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
5.5.6 PLD Power Good Monitor Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
5.5.7 PLD LED Control Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
5.5.8 PLD PCI/PMC/XMC Monitor Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
5.5.9 PLD U-Boot and TSI Monitor Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
5.5.10 PLD Boot Bank Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
5.5.11 PLD Write Protect and I2C Debug Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
5.5.12 PLD Test Register 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .112
5.5.13 PLD Test Register 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .112
5.5.14 PLD GPIO2 Interrupt Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
5.5.15 PLD Shutdown and Reset Control and Reset Reason Register . . . . . . . . . . . . . . . . . . . . . 114
5.5.16 PLD Watchdog Timer Refresh Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
5.5.17 PLD Watchdog Control Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
5.5.18 PLD Watchdog Timer Count Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
5.6 External Timer Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
5.6.1 Prescaler Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
5.6.2 Control Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
5.6.3 Compare High and Low Word Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
5.6.4 Counter High and Low Word Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
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6 Boot System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .121
6.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
6.2 Accessing U-Boot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
6.3 Boot Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
6.3.1 Booting from a Network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
6.3.2 Booting from an Optional SATA Drive. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
6.3.3 Booting from a USB Drive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
6.3.4 Booting from an SD Card. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
6.3.5 Booting VxWorks Through the Network. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
6.4 Using the Persistent Memory Feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
6.5 MVME2500 Specific U-Boot Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .126
6.6 Updating U-Boot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
7 Programming Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
7.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
7.2 Reset Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
7.3 Interrupt Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135
7.4 I2C Bus Device Addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
7.5 Ethernet PHY Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
7.6 Other Software Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
7.6.1 MRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
7.6.2 Real Time Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .137
7.6.3 Quad UART. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
7.6.4 LBC Timing Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
7.7 Clock Distribution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .139
7.7.1 System Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140
7.7.2 Real Time Clock Input. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
7.7.3 Local Bus Controller Clock Divisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
A Replacing the Battery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
A.1 Replacing the Battery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
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B Related Documentation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147
B.1 Artesyn Embedded Technologies - Embedded Computing Documentation . . . . . . . . . . . . . . .147
B.2 Manufacturers’ Documents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148
B.3 Related Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148
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Table 1-1 Board Standard Compliances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 1-2 Mechanical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Table 1-3 Available Board Variants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Table 1-4 Available Board Accessories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Table 2-1 Environmental Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Table 2-2 Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Table 3-1 Front Panel LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Table 3-2 On-board LEDs Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Table 3-3 Front Panel Tri-Speed Ethernet Connector (J1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Table 3-4 Front Panel Serial Port (J4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Table 3-5 USB Connector (J5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Table 3-6 VMEbus P1 Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Table 3-7 VMEbus P2 Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Table 3-8 Flash Programming Header (P7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Table 3-9 Custom SATA Connector (J3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Table 3-10 PMC J11 Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Table 3-11 PMC J12 Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Table 3-12 PMC J13 Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Table 3-13 PMC J14 Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Table 3-14 JTAG Connector (P6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Table 3-15 COP Header (P50) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Table 3-16 SD Connector (J2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Table 3-17 XMC Connector (XJ2) Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Table 3-18 P20x0 Debug Header . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Table 3-19 Geographical Address Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Table 3-20 Geographical Address Switch Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Table 4-1 Voltage Supply Requirement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
Table 4-2 Thermal Interrupt Threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
Table 4-3 POST Code Indicator on the LED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Table 4-4 Transition Module Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Table 5-1 Physical Address Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Table 5-2 Flash Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .102
Table 5-3 Linux Devices Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .102
Table 5-4 PLD Revision Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
Table 5-5 PLD Year Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
Table 5-6 PLD Month Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
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Table 5-7 PLD Day Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .105
Table 5-8 PLD Sequence Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .105
Table 5-9 PLD Power Good Monitor Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .106
Table 5-10 PLD LED Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .107
Table 5-11 PLD PCI/PMC/XMC Monitor Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .108
Table 5-12 PLD U-Boot and TSI Monitor Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .109
Table 5-13 PLD Boot Bank Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .109
Table 5-14 PLD Write Protect and I2C Debug Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .110
Table 5-15 PLD Test Register 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .112
Table 5-16 PLD Test Register 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .112
Table 5-17 PLD GPIO2 Interrupt Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .113
Table 5-18 PLD Shutdown and Reset Control and Reset Reason Register . . . . . . . . . . . . . . . . . . . . . . . .114
Table 5-19 PLD Watchdog Timer Refresh Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .115
Table 5-20 PLD Watchdog Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .116
Table 5-21 PLD Watchdog Timer Count Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .116
Table 5-22 Prescaler Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .117
Table 5-23 Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .118
Table 5-24 Compare High Word Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .119
Table 5-25 Compare Low Word Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .119
Table 5-26 Counter High Word Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .120
Table 5-27 Counter Low Word Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
Table 6-1 MVME2500 Specific U-Boot Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .126
Table 7-1 POR Configuration Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .131
Table 7-2 MVME2500 Interrupt List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .135
Table 7-3 I2C Bus Device Addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .136
Table 7-4 PHY Types and MII Management Bus Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .136
Table 7-5 LBC Timing Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .138
Table 7-6 Clock Distribution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .139
Table 7-7 System Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .140
Table B-1 Artesyn Embedded Technologies - Embedded Computing Publications . . . . . . . . . . . . . .147
Table B-2 Manufacturers’ Publications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .148
Table B-3 Related Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .148
10
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List of Figures
Figure 1-1 MVME2500 Declaration of Conformity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 1-2 Serial Number Location . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Figure 3-1 Component Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Figure 3-2 Front Panel LEDs, Connectors and Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Figure 3-3 Front Panel LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Figure 3-4 On-board LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Figure 3-5 Geographical Address Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Figure 3-6 SMT Configuration Switch Position . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Figure 4-1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Figure 4-2 SPI Device Multiplexing Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Figure 4-3 Power Up Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Figure 4-4 Clock Distribution Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Figure 4-5 Reset Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Figure A-1 Battery Location . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
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List of Figures
12
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About this Manual

Overview of Contents

This manual is intended for users who install and configure MVME2500 product. It is assumed that the user is familiar with the standard cabling procedures, configuration of operating systems, U-Boot system and MVME Chassis.
The purpose of this manual is to describe MVME2500 product and the services it provides. This manual includes description of MVME2500 product hardware, firmware and also information about operating system.
This manual is divided into the following chapters and appendices.
About this Manual lists all conventions and abbreviations used in this manual and outlines
the revision history.
Safety Notes summarizes the safety instructions in the manual.
Sicherheitshinweise is a German translation of the Safety Notes chapter.
Introduction gives an overview of the features of the product, standard compliances,
mechanical data, and ordering information.
Hardware Preparation and Installation outlines the installation requirements, hardware
accessories, switch settings, and installation procedures.
Controls, LEDs, and Connectors describes external interfaces of the board. This includes
connectors and LEDs.
Functional Description includes a block diagram and functional description of major
components of the product.
Memory Maps and Registers contains information on system resources including system
control and status registers and external timers.
Boot System describes the boot loader software.
Programming Model contains additional programming information for the board.
Replacing the Battery contains the procedures for replacing the battery.
Related Documentation provides a listing of related product documentation,
manufacturer’s documents, and industry standard specifications.
MVME2500 Installation and Use (6806800L01L)
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About this Manual

Abbreviations

This document uses the following abbreviations:
Term Definition
COP Common-On-Chip Processor
CPLD Complex Programmable Logic Device
DDR3 Double Data Rate 3
DUART Dual UART
ECC Error Checking Correction
EEPROM Erasable Programmable Read-Only Memory
FCC Federal Communications Commission
FPGA Field Programmable Gate Array
GPIO General Purpose Input/Output
About this Manual
14
IEEE Institute of Electrical and Electronics Engineers
HDD Hard Disk Drive
LBC Local Bus Controller
MCP Multi-Chip Package
MRAM Magneto-resistive Random Access Memory
PCI Peripheral Component Interconnect
PCI-E PCI Express
PCI-X Peripheral Component Interconnect extended
PIM PCI Mezzanine Card Input/Output Module
PLD Programmable Logic Device
PMC PCI Mezzanine Card (IEEE P1386.1)
PrPMC Processor PCI Mezzanine Card
RTC Real-Time Clock
RTM Rear Transition Module
SATA Serial AT Attachment
SDHC Secure Digital Host Controller
MVME2500 Installation and Use (6806800L01L)
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Term Definition
SMT Surface Mounted Technology
UART Universal Asynchronous Receiver-Transmitter
VITA VMEbus International Trade Association
VME Versa Module Eurocard
XMC PCI Express Mezzanine Card

Conventions

The following table describes the conventions used throughout this manual.
Notation Description
0x00000000 Typical notation for hexadecimal numbers (digits are
About this Manual
0 through F), for example used for addresses and offsets
0b0000 Same for binary numbers (digits are 0 and 1)
bold Used to emphasize a word
Screen Used for on-screen output and code-related elements
Courier + Bold Used to characterize user input and to separate it
Reference Used for references and for table and figure
File > Exit Notation for selecting a submenu
<text> Notation for variables and keys
[text] Notation for software buttons to click on the screen
... Repeated item for example node 1, node 2, ..., node
. . .
MVME2500 Installation and Use (6806800L01L)
or commands in body text
from system output
descriptions
and parameter description
12
Omission of information from example/command that is not necessary at the time being
15
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About this Manual
Notation Description
.. Ranges, for example: 0..4 means one of the integers
| Logical OR
About this Manual
0,1,2,3, and 4 (used in registers)
Indicates a hazardous situation which, if not avoided, could result in death or serious injury
Indicates a hazardous situation which, if not avoided, may result in minor or moderate injury
Indicates a property damage message
16
No danger encountered. Pay attention to important information
MVME2500 Installation and Use (6806800L01L)
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Summary of Changes

This manual has been revised and replaces all prior editions.
Part Number Publication Date Description
6806800L01A June 2010 First edition
6806800L01B October 2010 This version includes updates and revisions
About this Manual
for the EA release of the MVME2500.
Table 1.3. Added mechanical data. Table 4-3. Removed the following
commands: brd_reset, irqinfo, mac. Added soft_reset.
Table 4-1. Removed: L2 SRAM, L1 for stack
and Boot Page entries.
Changed all instances of "via" to “through”. Implemented editorial changes.
6806800L01C May 2011 Updated Chapter 3, Controls, LEDs, and
Connector s by adding the following.
Chapter 3, Board Layout Chapter 3, Front Panel Connectors Chapter 3, On-board Connectors
Added Chapter 4, Functional Description Applied editorial edits
6806800L01D May 2011 Edited Memory Maps and Registers
Edited Programming Model Edited Figure “Component Layout” Edited Figure “On-board LEDs” Added Front Panel Serial Port (J4)
6806800L01E July 2011 Updated Table “Available Board Variants".
Updated Appendix B, Related Documentation
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About this Manual
Part Number Publication Date Description
6806800L01F August 2011 Changed title of Section 3.4.1 to Front Panel
6806800L01G January 2013 Updated Standard Compliances on page 21.
6806800L01H January 2014 Added Flash Memory Map and updated SPI Flash
6806800L01J February 2014 Re-branded to Artesyn template.
6806800L01K March 2015 Added Figure "Power Up Sequence" on page 93 and
About this Manual
Connector s.
Edited Front Panel Serial Port (J4). Updated Figure “Component Layout” to
include proper label for XMC connectors.
Updated Safety Notes and
Sicherheitshinweise.
Memory.
Added Declaration of Conformity.
Figure "Reset Sequence" on page 96.
Updated Boot Options on page 122, Real Time
Clock on page 137 and Crisis Recovery on page 87.
18
6806800L01L April 2015 Replaced MVME7216 and its variants with
MVME721X.
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Safety Notes

This section provides warnings that precede potentially dangerous procedures throughout this manual. Instructions contained in the warnings must be followed during all phases of operation, service, and repair of this equipment. You should also employ all other safety precautions necessary for the operation of the equipment in your operating environment. Failure to comply with these precautions or with specific warnings elsewhere in this manual could result in personal injury or damage to the equipment.
Artesyn Embedded Technologies intends to provide all necessary information to install and handle the product in this manual. Because of the complexity of this product and its various uses, we do not guarantee that the given information is complete. If you need additional information, ask your Artesyn representative.
This product is a Safety Extra Low Voltage (SELV) device designed to meet the EN60950-1 requirements for Information Technology Equipment. The use of the product in any other application may require safety evaluation specific to that application.
Only personnel trained by Artesyn or persons qualified in electronics or electrical engineering are authorized to install, remove or maintain the product.
The information given in this manual is meant to complete the knowledge of a specialist and must not be used as replacement for qualified personnel.
Keep away from live circuits inside the equipment. Operating personnel must not remove equipment covers. Only Factory Authorized Service Personnel or other qualified service personnel may remove equipment covers for internal subassembly or component replacement or any internal adjustment.
Do not install substitute parts or perform any unauthorized modification of the equipment or the warranty may be voided. Contact your local Artesyn representative for service and repair to make sure that all safety features are maintained.
EMC (Results pending testing)
This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the instruction manual, may cause harmful interference to radio communications.
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Safety Notes
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own expense. Changes or modifications not expressly approved by Artesyn could void the user's authority to operate the equipment. Board products are tested in a representative system to show compliance with the above mentioned requirements. A proper installation in a compliant system will maintain the required performance. Use only shielded cables when connecting peripherals to assure that appropriate radio frequency emissions compliance is maintained.
Operation
Product Damage
High humidity and condensation on the board surface causes short circuits. Do not operate the board outside the specified environmental limits. Make sure the board is completely dry and there is no moisture on any surface before applying power.
Damage of Circuits
Electrostatic discharge and incorrect installation and removal can damage circuits or shorten its life. Before touching the board or electronic components, make sure that you are working in an ESD-safe environment.
Board Malfunction
Switches marked as “reserved” might carry production-related functions and can cause the board to malfunction if their setting is changed. Do not change settings of switches marked as “reserved”. The setting of switches which are not marked as “reserved” has to be checked and changed before board installation.
Installation
Data Loss
Powering down or removing a board before the operating system or other software running on the board has been properly shut down may cause corruption of data or file systems.
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Make sure all software is completely shut down before removing power from the board or removing the board from the chassis.
Product Damage
Only use injector handles for board insertion to avoid damage to the front panel and/or PCB. Deformation of the front panel can cause an electrical short or other board malfunction.
Product Damage
Inserting or removing modules with power applied may result in damage to module components. Before installing or removing additional devices or modules, read the documentation that came with the product.
Cabling and Connectors
Safety Notes
Product Damage
RJ-45 connectors on modules are either twisted-pair Ethernet (TPE) or E1/T1/J1 network interfaces. Connecting an E1/T1/J1 line to an Ethernet connector may damage your system.
Make sure that TPE connectors near your working area are clearly marked as network
connectors.
Verify that the length of an electric cable connected to a TPE bushing does not exceed 100
meters.
Make sure the TPE bushing of the system is connected only to safety extra low voltage
circuits (SELV circuits).
If in doubt, ask your system administrator.
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Safety Notes
Battery
Board/System Damage
Incorrect exchange of lithium batteries can result in a hazardous explosion. When exchanging the on-board lithium battery, make sure that the new and the old battery are exactly the same battery models. If the respective battery model is not available, contact your local Artesyn sales representative for the availability of alternative, officially approved battery models.
Data Loss
Exchanging the battery can result in loss of time settings. Backup power prevents the loss of data during exchange. Quickly replacing the battery may save time settings.
Data Loss
If the battery has low or insufficient power the RTC is initialized. Exchange the battery before seven years of actual battery use have elapsed.
PCB and Battery Holder Damage
Removing the battery with a screw driver may damage the PCB or the battery holder. To prevent damage, do not use a screw driver to remove the battery from its holder.
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Sicherheitshinweise

Dieses Kapitel enthält Hinweise, die potentiell gefährlichen Prozeduren innerhalb dieses Handbuchs vorrangestellt sind. Beachten Sie unbedingt in allen Phasen des Betriebs, der Wartung und der Reparatur des Systems die Anweisungen, die diesen Hinweisen enthalten sind. Sie sollten außerdem alle anderen Vorsichtsmaßnahmen treffen, die für den Betrieb des Produktes innerhalb Ihrer Betriebsumgebung notwendig sind. Wenn Sie diese Vorsichtsmaßnahmen oder Sicherheitshinweise, die an anderer Stelle diese Handbuchs enthalten sind, nicht beachten, kann das Verletzungen oder Schäden am Produkt zur Folge haben.
Artesyn Embedded Technologies ist darauf bedacht, alle notwendigen Informationen zum Einbau und zum Umgang mit dem Produkt in diesem Handbuch bereit zu stellen. Da es sich jedoch um ein komplexes Produkt mit vielfältigen Einsatzmöglichkeiten handelt, können wir die Vollständigkeit der im Handbuch enthaltenen Informationen nicht garantieren. Falls Sie weitere Informationen benötigen sollten, wenden Sie sich bitte an die für Sie zuständige Geschäftsstelle von Artesyn.
Das Produkt wurde entwickelt, um die Sicherheitsanforderungen für SELV Geräte nach der Norm EN 60950-1 für informationstechnische Einrichtungen zu erfüllen. Die Verwendung des Produkts in einer anderen Anwendung erfordert eine Sicherheitsüberprüfung für diese spezifische Anwendung.
Einbau, Wartung und Betrieb dürfen nur von durch Artesyn ausgebildetem oder im Bereich Elektronik oder Elektrotechnik qualifiziertem Personal durchgeführt werden. Die in diesem Handbuch enthaltenen Informationen dienen ausschließlich dazu, das Wissen von Fachpersonal zu ergänzen, können dieses jedoch nicht ersetzen.
Halten Sie sich von stromführenden Leitungen innerhalb des Produktes fern. Entfernen Sie auf keinen Fall Abdeckungen am Produkt. Nur werksseitig zugelassenes Wartungspersonal oder anderweitig qualifiziertes Wartungspersonal darf Abdeckungen entfernen, um Komponenten zu ersetzen oder andere Anpassungen vorzunehmen.
Installieren Sie keine Ersatzteile oder führen Sie keine unerlaubten Veränderungen am Produkt durch, sonst verfällt die Garantie. Wenden Sie sich für Wartung oder Reparatur bitte an die für Sie zuständige Geschäftsstelle von Artesyn. So stellen Sie sicher, dass alle sicherheitsrelevanten Aspekte beachtet werden.
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Sicherheitshinweise
EMV
Das Produkt wurde in einem Artesyn Standardsystem getestet. Es erfüllt die für digitale Geräte der Klasse A gültigen Grenzwerte in einem solchen System gemäß den FCC-Richtlinien Abschnitt 15 bzw. EN 55022 Klasse A. Diese Grenzwerte sollen einen angemessenen Schutz vor Störstrahlung beim Betrieb des Produktes in Gewerbe- sowie Industriegebieten gewährleisten.
Das Produkt arbeitet im Hochfrequenzbereich und erzeugt Störstrahlung. Bei unsachgemäßem Einbau und anderem als in diesem Handbuch beschriebenen Betrieb können Störungen im Hochfrequenzbereich auftreten.
Wird das Produkt in einem Wohngebiet betrieben, so kann dies mit grosser Wahrscheinlichkeit zu starken Störungen führen, welche dann auf Kosten des Produktanwenders beseitigt werden müssen. Änderungen oder Modifikationen am Produkt, welche ohne ausdrückliche Genehmigung von Artesyn durchgeführt werden, können dazu führen, dass der Anwender die Genehmigung zum Betrieb des Produktes verliert. Boardprodukte werden in einem repräsentativen System getestet, um zu zeigen, dass das Board den oben aufgeführten EMV­Richtlinien entspricht. Eine ordnungsgemässe Installation in einem System, welches die EMV­Richtlinien erfüllt, stellt sicher, dass das Produkt gemäss den EMV-Richtlinien betrieben wird. Verwenden Sie nur abgeschirmte Kabel zum Anschluss von Zusatzmodulen. So ist sichergestellt, dass sich die Aussendung von Hochfrequenzstrahlung im Rahmen der erlaubten Grenzwerte bewegt.
Warnung! Dies ist eine Einrichtung der Klasse A. Diese Einrichtung kann im Wohnbereich Funkstörungen verursachen. In diesem Fall kann vom Betreiber verlangt werden, angemessene Maßnahmen durchzuführen.
Betrieb
1 Beschädigung des Produktes
Hohe Luftfeuchtigkeit und Kondensat auf der Oberfläche des Produktes können zu Kurzschlüssen führen.
Betreiben Sie das Produkt nur innerhalb der angegebenen Grenzwerte für die relative Luftfeuchtigkeit und Temperatur. Stellen Sie vor dem Einschalten des Stroms sicher, dass sich auf dem Produkt kein Kondensat befindet.
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Beschädigung von Schaltkreisen
Elektrostatische Entladung und unsachgemäßer Ein- und Ausbau des Produktes kann Schaltkreise beschädigen oder ihre Lebensdauer verkürzen.
Bevor Sie das Produkt oder elektronische Komponenten berühren, vergewissern Sie sich, daß Sie in einem ESD-geschützten Bereich arbeiten.
Fehlfunktion des Produktes
Schalter, die mit 'Reserved' gekennzeichnet sind, können mit produktionsrelevanten Funktionen belegt sein. Das Ändern dieser Schalter kann im normalen Betrieb Störungen auslösen.
Verstellen Sie nur solche Schalter, die nicht mit 'Reserved' gekennzeichnet sind. Prüfen und ggf. ändern Sie die Einstellungen der nicht mit 'Reserved' gekennzeichneten Schalter, bevor Sie das Produkt installieren.
Installation
Sicherheitshinweise
Datenverlust
Das Herunterfahren oder die Deinstallation eines Boards bevor das Betriebssystem oder andere auf dem Board laufende Software ordnungsmemäss beendet wurde, kann zu partiellem Datenverlust sowie zu Schäden am Filesystem führen.
Stellen Sie sicher, dass sämtliche Software auf dem Board ordnungsgemäss beendet wurde, bevor Sie das Board herunterfahren oder das Board aus dem Chassis entfernen.
Beschädigung des Produktes
Fehlerhafte Installation des Produktes kann zu einer Beschädigung des Produktes führen.
Verwenden Sie die Handles, um das Produkt zu installieren/deinstallieren. Auf diese
Weise vermeiden Sie, dass das faceplate oder die Platine deformiert oder zerstört
wird.
Beschädigung des Produktes und von Zusatzmodulen
Fehlerhafte Installation von Zusatzmodulen, kann zur Beschädigung des Produktes und der Zusatzmodule führen.
Lesen Sie daher vor der Installation von Zusatzmodulen die zugehörige Dokumentation.
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Sicherheitshinweise
Kabel und Stecker
Beschädigung des Produktes
Bei den RJ-45-Steckern, die sich an dem Produkt befinden, handelt es sich entweder um Twisted-Pair-Ethernet (TPE) oder um E1/T1/J1-Stecker. Beachten Sie, dass ein versehentliches Anschließen einer E1/T1/J1-Leitung an einen TPE-Stecker das Produkt zerstören kann.
Kennzeichnen Sie deshalb TPE-Anschlüsse in der Nähe Ihres Arbeitsplatzes deutlich als
Netzwerkanschlüsse.
Stellen Sie sicher, dass die Länge eines mit Ihrem Produkt verbundenen TPE-Kabels 100 m
nicht überschreitet.
Das Produkt darf über die TPE-Stecker nur mit einem Sicherheits-Kleinspannungs-
Stromkreis (SELV) verbunden werden.
Bei Fragen wenden Sie sich an Ihren Systemverwalter.
Batterie
Beschädigung des Blades
Ein unsachgemäßer Einbau der Batterie kann gefährliche Explosionen und
Beschädigungen des Blades zur Folge haben.
Verwenden Sie deshalb nur den Batterietyp, der auch bereits eingesetzt wurde und
befolgen Sie die Installationsanleitung.
Datenverlust
Wenn Sie die Batterie austauschen, können die Zeiteinstellungen verloren gehen. Eine Backupversorgung verhindert den Datenverlust während des Austauschs. Wenn Sie die Batterie schnell austauschen, bleiben die Zeiteinstellungen möglicherweise erhalten.
26
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Datenverlust
Wenn die Batterie wenig oder unzureichend mit Spannung versorgt wird, wird der RTC initialisiert. Tauschen Sie die Batterie aus, bevor sieben Jahre tatsächlicher Nutzung vergangen sind.
Schäden an der Platine oder dem Batteriehalter
Wenn Sie die Batterie mit einem Schraubendreher entfernen, können die Platine oder der Batteriehalter beschädigt werden. Um Schäden zu vermeiden, sollten Sie keinen Schraubendreher zum Ausbau der Batterie verwenden.
Umweltschutz
Entsorgen Sie alte Batterien und/oder Blades/Systemkomponenten/RTMs stets gemäß der in Ihrem Land gültigen Gesetzgebung, wenn möglich immer umweltfreundlich.
Sicherheitshinweise
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Sicherheitshinweise
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Introduction

1.1 Overview

The MVME2500 is a VME form-factor single-board computer based on the Freescale QorIQ™ P2010 single core or P2020 dual core processors. A e500 v2 core QorIQ processor uses 45 nanometer technology which delivers an excellent performance to power ratio.The MVME2500 is ideal for automation, medical, and military applications such as railway control, semiconductor processing, test and measurement, image processing, and radar/sonar.
The main features of the MVME2502 board are as follows:
Freescale QorIQ P2010 (single-core) or P2020 (dual-core)
800 MHz Freescale P2010 single-core processor
1.2 GHz Freescale P2020 dual-core processor
512 KB L2 shared cache
Chapter 1
Integrated, on-chip controllers for DDR2/3
SPI flash
I2C and security acceleration
PCI Express
USB 2.0
–DUART
10/100/1000 Ethernet
DMA
SDHC
Eight 32-bit timers
1 GB or 2 GB DDR3-800, soldered down
Single channel 800MB/s
User Flash/NVRAM Memory
512 KB MRAM (NVRAM)
SDHC socket
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Introduction
Boot Flash Memory
Boot Firmware: U-Boot-based firmware image in 16 MB SPI Flash. This flash is split into two
Operating Systems:
MVME721X Transition Module I/O:
16 MB SPI flash
Support crisis recovery
8 MB chips.
Based from BSP provided by Freescale which is based from standard Linux version
2.6.32-rc3 Development tool is ltib 9.1.1 (Linux Target Image Builder) from Freescale
VxWorks
Two GbE interfaces
Four RS-232 serial ports
30
I2C
PMC I/O
Software: U-Boot firmware
One PMC/XMC site
SATA port for optional on-board hard drive
Extended temperature and rugged variants
The front panel I/O configuration consists of two RJ45 10/100/1000BASE-T Ethernet ports,
a USB 2.0 port, a Micro DB9 RS-232 serial console port, and a reset/abort switch. It also has an LED to signal board failure and another LED that can be configured in the LED register.
The rear I/O includes support for VMEbus (Legacy VME, VME 64, VME64x, and 2eSST), rear
PMC/XMC I/O, RTM I/O (through VME P2), two 10/100/1000BASE-T Ethernet, four UART, and RTM I2C/Presence/Power.
I2C devices:
Real-Time Clock
Board Temperature Sensor
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8 KB VPD EEPROM
Two 64 KB User EEPROM
VMEbus Interface Controller: Tsi148 PCI-X to VMEbus bridge with support for VME64 and
2eSST protocols
CPLD: Watchdog, timers, and registers

1.2 Standard Compliances

The product is designed to meet the following standards:
Table 1-1 Board Standard Compliances
Standard Description
Introduction
EN 60950-1/A11:2009 IEC 60950-1:2005 2nd Edition CAN/CSA C22.2 No 60950-1
FCC Part 15, Subpart B, Class A (non­residential)
ICES-003, Class A (non-residential) EMC Directive 89/336/EEC EN55022 Class B EN55024 AS/NZS CISPR 22, Class A EN300386
ETSI EN 300 019 series Environmental Requirements
Directive 2011/65/EU Directive on the restriction of the use of certain
Safety Requirements (legal)
EMC requirements (legal) on system level (predefined Artesyn Embedded Technologies system)
hazardous substances in electrical and electronic equipment (RoHS)
MVME2500 Installation and Use (6806800L01L)
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Introduction
Figure 1-1 MVME2500 Declaration of Conformity
EC Declaration of Conformity
According to EN 17050-1:2004
Manufacturer’s Name:
Manufacturer’s Address:
Declares that the following product, in accordance with the requirements of 2004/108/EC, 2006/95/EC, 2011/65/EU and their amending directives,
Product:
Model Name/Number:
has been designed and manufactured to the following specifications:
EN55022:2006 Class A
EN55024: (A1: 2001 + A2: 2003): 1998
2011/65/EU RoHS Directive
As manufacturer we hereby declare that the product named above has been designed to comply with the rele­vant sections of the above referenced specifications. This product complies with the essential health and safety requirements of the above specified directives. We have an internal production control system that ensures compliance between the manufactured products and the technical documentation.
Artesyn Embedded Technologies
Zhongshan General Carton Box Factory Co. Ltd. No 62, Qi Guan Road West, Shiqi District, 528400 Zhongshan City Guangdong, PRC
MVME2500 Series Single-Board Computers
MVME2500-01080101E, MVME2500-01080101S, MVME2500­0161, MVME2500-0163,MVME2500-0171, MVME2500-0173, MVME2500-02100202E, MVME2500-02100202S, MVME2500­02120201E, MVME2500-02120201S, MVME2500-021CC, MVME2500ET-0161, MVME2500ET-0163, MVME2500ET-0171, MVME2500ET-0173
32
___________________________________________________ ___
03/11/2014
______
Tom Tuttle, Manager, Product Testing Services Date (MM/DD/YYYY)
MVME2500 Installation and Use (6806800L01L)
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1.3 Mechanical Data

The following table provides the dimensions and the weight of the board.
Table 1-2 Mechanical Data
Feature Value
Height 233.44 mm (9.2 inches)
Depth 160.0 mm (6.3 inches)
Front Panel Height 261.8 mm (10.3 inches)
Width 19.8 mm (0.8 inches)
Max. Component Height 14.8 mm (0.58 inches)
Weight 400 grams (standard variant), 700 grams (ET variants)
Introduction

1.4 Ordering Information

As of the printing date of this manual, this guide supports the models listed below.
Table 1-3 Available Board Variants
Order Number Processor Speed Memory Ejector
MVME2500-0163 QorIQ P2010 (single-core) 800 MHz 1 GB IEEE
MVME2500-0161 QorIQ P2010 (single-core) 800 MHz 1 GB SCANBE
MVME2500-0173 QorIQ P2020 (dual-core) 1.2 GHz 2 GB IEEE
MVME2500-0171 QorIQ P2020 (dual-core) 1.2 GHz 2 GB SCANBE
MVME2500ET-0173 QorIQ P2020 (dual-core) 1 GHz 2 GB IEEE ENP2
MVME2500ET-0171 QorIQ P2020 (dual-core) 1 GHz 2 GB SCANBE ENP2
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Introduction
As of the printing date of this manual, the following board accessories are available.
Table 1-4 Available Board Accessories
Order Number Description
VME-HDMNTKIT Used on ENP1 board
VME-HDMNTKIT2 Used on ENP2 board
VME-64GBSSDKIT VME 64 GB SSD and mounting kit
MVME7216E-101 VME RTM (IEEE handle)
MVME7216E-102 VME RTM (SCANBE Handle)
MVME721ET-101 VME RTM Extended Temperature (IEEE handle)
MVME721ET-102 VME RTM Extended Temperature (SCANBE Handle)
SERIAL-MINI-D (30­W2400E01A)
ACC/CABLE/SER/DTE/6E9-pin micro-DSUB to 9-pin DSUB cross connected serial
Female - to -male micro-mini DB-9 to DB9 adapter cable
console cable
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1.5 Product Identification

The following figure shows the location of the serial number label.
Figure 1-2 Serial Number Location
Introduction
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Introduction
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Hardware Preparation and Installation

2.1 Overview

This chapter provides unpacking instructions, hardware preparation, installation procedures of the board. Installation instructions for the optional PMC/XMC modules and transitions modules are also included.
A fully implemented MVME2500 consists of the base board and the following modules:
PCI Mezzanine Card (PMC) or PCI-E Mezzanine Card (XMC) for added versatility
Rear transition module
SATA kit
The following are the steps to be performed before using the board. Be sure to read the entire chapter, including all caution and warning notes, before you begin.
1. Unpack the hardware. Refer to Unpacking and Inspecting the Board on page 38
Chapter 2
2. Configure the hardware by setting jumpers on the board and the RTM. Refer to Configuring
the Board on page 42
3. Install the rear transition module in the chassis. Refer to Rear Transition Module on page 43.
4. Install PMC module (if required). Refer to PMC/XMC Support on page 45.
5. Install XMC span module (if required). Refer to PMC/XMC Support on page 45.
6. Install the board in the chassis. Refer to Installing and Removing the Board on page 46.
7. Attach cables and apply power. Refer to Completing the Installation on page 48.
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Hardware Preparation and Installation

2.2 Unpacking and Inspecting the Board

Read all notices and cautions prior to unpacking the product.
Damage of Circuits
Electrostatic discharge and incorrect installation and removal can damage circuits or shorten its life.
Before touching the board or electronic components, make sure that you are working
in an ESD-safe environment.
Shipment Inspection
To inspect the shipment, perform the following steps:
1. Verify that you have received all items of your shipment.
MVME2500 board
Quick Start Guide
Safety Notes Summary
Any optional items ordered
2. Check for damage and report any damage or differences to customer service.
3. Remove the desiccant bag shipped together with the board and dispose of it according to
your country’s legislation.
The product is thoroughly inspected before shipment. If any damage occurred during transportation or any items are missing, contact customer service immediately.
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2.3 Requirements

Make sure that the board meets the following requirements when operated in your particular system configuration.

2.3.1 Environmental Requirements

Operating temperatures refer to the temperature of the air circulating around the board and not to the component temperature.
Table 2-1 Environmental Requirements
Hardware Preparation and Installation
Characteristics Commercial Versions Extended Temperature Versions
Applicable Variants MVME2500-0163
MVME2500-0161 MVME2500-0173 MVME2500-0171
Cooling Method Forced Air 7 CFM
Operating Temperature
Storage -40°C to +85°C -50°C to +100°C
Vibration Sine (10min/axis)
Vibration Random (1hr/axis)
Shock 20g/11 mS 30g/11 mS
Humidity to 95% RH (non-condensing) to 100% RH (non-condensing)
1. ft3/min
2. Flat 15-1000Hz, -6db/octave 1000Hz - 2000Hz [MIL-STD 810F Figure 514.5C-17]
MVME2500 Installation and Use (6806800L01L)
0°C to +55°C -40°C to +71°C
2 G, 5 to 2000 Hz 10 G, 15 to 2000 Hz
0.01g2/Hz, 15 to 2000 Hz 0.04g2/Hz, 15 to 2000 Hz (8
MVME2500ET-0173 MVME2500ET-0171
1
Forced Air 7 CFM
2
GRMS)
1
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Hardware Preparation and Installation
Product Damage
High humidity and condensation on the board surface causes short circuits.
Do not operate the board outside the specified environmental limits.
Make sure the board is completely dry and there is no moisture on any surface before
applying power.

2.3.2 Power Requirements

The board uses +5.0 V from the VMEbus backplane. On-board power supply generates required voltages for various ICs. The MVME2500 connects the +12 V and -12 V supplies from the backplane to the PMC sites, while the +3.3 V power supplied to the PMC sites comes from the +5.0 V backplane power. A maximum of 10 A of +3.3 V power is available to the PMC sites, however the 90 W +5.0 V limit must be observed as well as any cooling limitations.
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Hardware Preparation and Installation
The following table provides an estimate of the typical and maximum power required.
Table 2-2 Power Requirements
Typical
Maximum
Board Variant
MVME2500-0163 18.5 W 14.8 W
MVME2500-0161 18.5 W 14.8 W
MVME2500-0173 23.5 W 16.6 W
MVME2500-0171 23.5 W 16.6 W
MVME2500ET-0173 23.5 W 16.6 W
MVME2500ET-0171 23.5 W 16.6 W
(Calculated)
The power is measured when the board is in standby (Linux prompt) mode. Power will significantly increase when adding hard drives or a XMC/PMC card.
(Measured Operating)
The following table shows the power available when the MVME2500 is installed in either a three row or five row chassis and when PMCs are present.
Chassis Type Available Power Power With PMCs
Three Row 70 W maximum below 70 W
Five Row 90 W maximum below 90 W
Keep below power limit. Cooling limitations must be considered.
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Hardware Preparation and Installation

2.3.3 Equipment Requirements

The following are recommended to complete a MVME2500 system:
VMEbus system enclosure
System console terminal
Operating system (and/or application software)
Transition module and connecting cables

2.4 Configuring the Board

The board provides software control over most options. Settings can be modified to fit the user's specifications. To configure, set the bits in the control register after installing the board in a system. Make sure that all user-defined switches are properly set before installing a PMC/XMC module. For more information, see Switches on page 71.
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2.5 Installing Accessories

2.5.1 Rear Transition Module

The MVME2500 does not support hot swap. Remove power to the rear slot or system before installing the module. A PCMI/O Module (PIM) needs to be manually configured and installed before placing the transition module.
Damage of Circuits
Electrostatic discharge and incorrect installation and removal can damage circuits or
shorten its life.
Before touching the board or electronic components, make sure that you are working
in an ESD-safe environment.
Hardware Preparation and Installation
Product Damage
Only use injector handles for board insertion to avoid damage to the front panel and/or
PCB. Deformation of the front panel can cause an electrical short or other board malfunction.
Board Malfunction
Switches marked as “reserved” might carry production-related functions and can cause
the board to malfunction if their setting is changed.
Do not change settings of switches marked as “reserved”. The setting of switches which
are not marked as “reserved” has to be checked and changed before board installation.
Installation Procedure
1. Turn OFF all equipment and disconnect the power cable from the AC power source.
2. Remove the chassis cover.
3. Remove the filler panel(s) from the appropriate card slot(s) at the rear of the chassis (if the chassis has a rear card cage).
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Hardware Preparation and Installation
4. Install the top and bottom edge of the transition module into the rear guides of the chassis.
5. Ensure that the levers of the two injector/ejectors are in the outward position.
6. Slide the transition module into the chassis until resistance is felt.
7. Move the injector/ejector levers in an inward direction.
8. Verify that the transition module is properly seated and secure it to the chassis using two screws adjacent to the injector/ejector levers.
9. Connect the cables to the transition module.
To remove the transition module from the chassis, reverse the procedure and press the red locking tabs (IEEE handles only) to extract the board.
Removal Procedure
1. Turn off the power.
2. Disconnect all the cables.
3. Press the red locking tabs (IEEE handles only) to eject the board.
4. Loosen and remove the screws adjacent to the injector/ejector levers that securing the
module to the chassis.
5. Move the injector/ejector levers in outward direction.
6. Slide the module from the chassis and make sure that no damage is caused to the pins.
7. Remove the transition module from the chassis and insert the filler panels.
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2.5.2 PMC/XMC Support

Installation Procedure
Read all notices and follow these steps to install a PMC on the baseboard.
Damage of Circuits
Electrostatic discharge and incorrect installation and removal can damage circuits or
shorten its life.
Before touching the board or electronic components, make sure that you are working
in an ESD-safe environment.
Product Damage
Hardware Preparation and Installation
Inserting or removing modules with power applied may result in damage to module
components.
Before installing or removing additional devices or modules, read the documentation
that came with the product.
1. Attach an ESD strap to your wrist. Attach the other end of the strap to the chassis as a ground. Make sure that it is securely fastened throughout the procedure.
2. Remove the PMC/XMC filler plate from the front panel cut-out.
3. Slide the front bezel of the PMC/XMC into the front panel cut-out from backside. The front bezel of the PMC/XMC module will be placed with the board when the connectors on the module align with the connectors on the board.
4. Align the mating connectors properly and apply minimal pressure to the PMC/XMC until it is seated to the board.
5. Insert the four PMC/XMC mounting screws through the mounting holes on the bottom side of the board, and then thread the four mount points on the PMC/XMC. Fasten the screws.
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Hardware Preparation and Installation
6. Install the board into the appropriate card slot. Make sure that the board is well seated into the backplane connectors. Do not damage or bend connector pins.
7. Replace the chassis or system cover.
8. Reconnect the system to the power source and then turn on the system.
When removing the PMC/XMC, hold it by its long side and exert minimal force when pulling it from the baseboard to prevent pin damage.

2.6 Installing and Removing the Board

This section describes the recommended procedure for installing the board in a chassis. Read all warnings and instructions before installing the board.
46
The MVME2500 does not support hot swap. Power off the slot or system and make sure that the serial ports and switches are properly configured.
Damage of Circuits
Electrostatic discharge and incorrect installation and removal can damage circuits or
shorten its life.
Before touching the board or electronic components, make sure that you are working
in an ESD-safe environment.
Product Damage
Only use injector handles for board insertion to avoid damage to the front panel and/or
PCB. Deformation of the front panel can cause an electrical short or other board malfunction.
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Hardware Preparation and Installation
Installation Procedure
1. Attach an ESD strap to your wrist. Attach the other end of the strap to an electrical ground.
Make sure that it is securely fastened throughout the procedure.
2. Remove VME filler panels from the VME enclosures, as appropriate.
3. Install the top and bottom edge of the board into the guides of the chassis.
4. Ensure that the levers of the two injector/ejectors are in the outward position.
5. Slide the board into the chassis until resistance is felt.
6. Simultaneously move the injector/ejector levers in an inward direction.
7. Verify that the board is properly seated and secure it to the chassis using the two screws
located adjacent to the injector/ejector levers.
8. Connect the appropriate cables to the board.
Removal Procedure
1. Turn off the power.
2. Disconnect all the cables.
3. Press the red locking tabs (IEEE handles only) to extract the board.
4. Loosen and remove the screws located adjacent to the injector/ejector levers that securing
board to the chassis.
5. Move the injector/ejector levers in outward direction.
6. Hold top and bottom edges of the board and exert minimal force when pulling the board
from the chassis to prevent pin damage.
7. Carefully remove the board from the chassis and store the board in anti-static envelope.
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Hardware Preparation and Installation

2.7 Completing the Installation

The board is designed to operate as an application-specific computer blade or an intelligent I/O board/carrier. It can be used in any slot in a VME chassis. Once the board is installed, you are ready to connect peripherals and apply power to the board.
Product Damage
RJ-45 connectors on modules are either twisted-pair Ethernet (TPE) or E1/T1/J1
network interfaces. Connecting an E1/T1/J1 line to an Ethernet connector may damage your system.
Make sure that TPE connectors near your working area are clearly marked as network
connectors.
Verify that the length of an electric cable connected to a TPE bushing does not exceed
100 meters.
Make sure the TPE bushing of the system is connected only to safety extra low voltage
circuits (SELV circuits).
If in doubt, ask your system administrator.
The console settings for the MVME2500 are:
Eight bits per character
One stop bit per character
Parity disabled (no parity)
Baud rate of 9600 baud
Verify that hardware is installed and the power/peripheral cables connected are appropriate for your system configuration.
Replace the chassis or system cover, reconnect the chassis to power source, and turn the equipment power on.
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Controls, LEDs, and Connectors

3.1 Board Layout

The following figure shows the components and the connectors on the MVME2500 board.
Figure 3-1 Component Layout
Chapter 3
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Controls, LEDs, and Connectors

3.2 Front Panel

The following components are found on the MVME2500 front panel.
Figure 3-2 Front Panel LEDs, Connectors and Switches
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3.2.1 Reset Switch

The MVME2500 has a single push button switch that has both “abort” and “reset” functions. Pressing the switch for less than three seconds generates an abort interrupt to the P20x0 QorIQ PIC. Holding it down for more than three seconds will generate a hard reset. The VME SYSRESET is generated if the MVME2500 is the VMEbus system controller.

3.3 LEDs

The MVME2500 utilizes light emitting diodes (LEDs) to provide a visible status indicator on the front panel. These LEDs show power failures, power-up status, Ethernet link/speed, Ethernet activity, SATA link and activity and PCI -E valid lane status. There are also a few user configurable LEDs. Each LED description is necessary for troubleshooting and debugging.

3.3.1 Front Panel LEDs

Controls, LEDs, and Connectors
The front panel LEDs are listed below.
Figure 3-3 Front Panel LEDs
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Controls, LEDs, and Connectors
Table 3-1 Front Panel LEDs
Label Function Location Color Description
USER 1 User Defined Front panel Off
Yellow
Red
FAIL Board Fail Front panel Off
Red
GENET1 SPEED
GENET1 ACT
GENET2 SPEED
TSEC1 Link/Speed
TSEC1 Activity
TSEC2 Link/Speed
Front panel Integrated RJ45 LED
Front panel Integrated RJ45 LED
Front panel Integrated RJ45 LED (Left)
Off Amber Green
Off Blinking Green
Off Amber Green
By default User Software Controllable. Refer to
the “User LED Register.” User Software Controllable. Refer to
the “User LED Register.”
Normal operation after successful firmware boot.
One or more on-board power rails has failed and the board has to shutdown to protect the hardware. Normal during power up, during hardware reset (such as a front panel reset). May be asserted by the BDFAIL bit in the Tsi148 VSTAT register.
No link 10/100BASE-T operation 1000 BASE-T operation
No activity Activity proportional to bandwidth
utilization
No link 10/100BASE-T operation 1000BASE-T operation
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GENET2 ACT
TSEC2 Activity
Front panel Integrated RJ45 LED
Off Blinking Green
MVME2500 Installation and Use (6806800L01L)
No activity Activity proportional to bandwidth
utilization
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3.3.2 On-board LEDs

The on-board LEDs are listed below. To view its location on the board, see Figure 3-1 on page
49.
Figure 3-4 On-board LEDs
Controls, LEDs, and Connectors
Table 3-2 On-board LEDs Status
Label Function Color Description
D9 Power Fail Red This indicator is illuminated when one or more of the on-
D33 User Defined Amber Controlled by the FPGA. Used for boot-up sequence
D34 User Defined Amber Controlled by the FPGA. Used for boot-up sequence
D35 User Defined Amber Controlled by the FPGA. Used for boot-up sequence
D36 Early Power Fail Amber This indicator is lit when the early 3.3V power supply fails.
D37 User Defined Amber Controlled by the FPGA
D38 User Defined Amber Controlled by the FPGA

3.4 Connectors

This section describes the pin assignments and signals for the connectors on the MVME2500.
board voltage rails fails.
indicator.
indicator.
indicator.
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Controls, LEDs, and Connectors

3.4.1 Front Panel Connectors

The following connectors are found on the outside of the MVME2500 board. These connectors are divided between the front panel connectors and the backplane connectors. The front panel connectors include the J1 and the J5 connectors. The backplane connectors include the P1 and the P2 connectors.
3.4.1.1 RJ45 with Integrated Magnetics (J1)
The MVME2500 uses an X2 RJ45.
Table 3-3 Front Panel Tri-Speed Ethernet Connector (J1)
Pin Name Signal Description
1A GND
2A NC
3A Port A TRD3 -
4A Port A TRD3 +
5A Port A TRD2 -
6A Port A TRD2 +
7A Port A TRD1 -
8A Port A TRD1 +
9A Port A TRD0 -
10A Port A TRD0 +
D1A Port A Green LED1 Anode/ Yellow LED1 Cathode
D2A Port A Yellow LED1 Anode/ Green LED1 Cathode
D3A Port A Green LED2 Anode/ Yellow LED2 Cathode
D4A Port A Yellow LED2 Anode/ Green LED2 Cathode
1B GND
2B NC
3B Port B TRD3 -
4B Port B TRD3 +
5B Port B TRD2 -
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Table 3-3 Front Panel Tri-Speed Ethernet Connector (J1) (continued)
Pin Name Signal Description
6B Port B TRD2 +
7B Port B TRD1 -
8B Port B TRD1 +
9B Port B TRD0 -
10B Port B TRD0 +
D1B Port B Green LED1Anode/ Yellow LED1 Cathode
D2B Port B Yellow LED1 Anode/ Green LED1 Cathode
D3B Port B Green LED2Anode/ Yellow LED2 Cathode
D4B Port B Yellow LED2 Anode/ Green LED2 Cathode
3.4.1.2 Front Panel Serial Port (J4)
Controls, LEDs, and Connectors
There is one front access asynchronous serial port interface that is routed to the micro mini DB­9 front panel connector. A male-to-male micro-mini DB9 adapter cable is available under Artesyn part number SERIAL-MINI-D (30-W2400E01A) and ACC/CABLE/SER/DTE/6E 9-pin micro-DSUB to 9-pin DSUB cross connected serial console cable. The pin assignments for these connectors are as follows:
Table 3-4 Front Panel Serial Port (J4)
Pin Signal Description
1NC
2RX
3TX
4NC
5GND
6NC
7RTS
8CTS
9NC
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Controls, LEDs, and Connectors
3.4.1.3 USB Connector (J5)
The MVME2500 uses upright USB receptacle mounted in the front panel.
Table 3-5 USB Connector (J5)
Pin Name Signal Description
1 +5 V
2 Data -
3 Data +
4GND
MTG Mounting Ground
MTG Mounting Ground
MTG Mounting Ground
MTG Mounting Ground
3.4.1.4 VMEBus P1 Connector
The VME P1 connector is a 160-pin DIN. The P1 connector provides power and VME signals for 24-bit address and 16-bit data. The pin assignments for the P1 connector are as follows:
Table 3-6 VMEbus P1 Connector
Pin Row A Row B Row C Row D Row Z
1 DATA 0 BBSY DATA 8 +5V NC
2 DATA 1 BCLR DATA 9 GND GND
3 DATA 2 ACFAIL DATA 10 NC NC
4 DATA 3 BGIN0 DATA 11 NC GND
5 DATA 4 BGOUT0 DATA 12 NC NC
6 DATA 5 BGIN1 DATA 13 NC GND
7 DATA 6 BGOUT1 DATA 14 NC NC
8 DATA 7 BGIN2 DATA 15 NC GND
9 GND BGOUT2 GND GAP NC
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Controls, LEDs, and Connectors
Table 3-6 VMEbus P1 Connector (continued)
Pin Row A Row B Row C Row D Row Z
10 SYSCLK BGIN3 SYSFAIL GA0 GND
11 GND BGOUT3 BERR GA1 NC
12 DS1 BR0 SYSRESET +3.3V
(not used)
13 DS0 BR1 LWORD GA2 NC
14 WRITE BR2 AM 5 +3.3V
(not used)
15 GND BR3 ADD 23 GA3 NC
16 DTACK AM 0 ADD 24 +3.3V
(not used)
17 GND AM 1 ADD 25 GA4 NC
18 AS AM 2 ADD 26 +3.3V
(not used)
19 GND AM 3 ADD 27 NC NC
20 IACK GND ADD 28 +3.3V
(not used)
21 IACKIN NC ADD 29 NC NC
22 IACKOUT NC ADD 30 +3.3V
(not used)
23 AM 4 GND ADD 31 NC NC
24 ADD 7 IRQ7 ADD 32 +3.3V
(not used)
GND
GND
GND
GND
GND
GND
GND
25 ADD 6 IRQ6 ADD 33 NC NC
26 ADD 5 IRQ5 ADD 34 +3.3V
27 ADD 4
28 ADD 3 IRQ3 ADD 36 +3.3V
29 ADD 2 IRQ2 ADD 37 NC NC
30 ADD 1 IRQ1 ADD 38 +3.3V
MVME2500 Installation and Use (6806800L01L)
IRQ4 ADD 35 NC NC
GND
(not used)
GND
(not used)
GND
(not used)
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Controls, LEDs, and Connectors
Table 3-6 VMEbus P1 Connector (continued)
Pin Row A Row B Row C Row D Row Z
31 -12V NC +12V +12V
32 +5V +5V +5V +5V
3.4.1.5 VMEBus P2 Connector
The VME P2 connector is a 160-pin DIN. Row B of the P2 connector provides power to the MVME2500 board and to the upper eight VMEbus address lines and additional 16 VMEbus data lines. The Z, A, C, and D pin assignments for the P2 connector are same for both the MVME2500 and the MVME7216E/ MVME721E, and are as follows:
Table 3-7 VMEbus P2 Connector
Pin Row A Row B Row C Row D Row Z
1 PMC IO 2 +5V PMC IO 1 GE3_0 + Serial 1 RX
2 PMC IO 4 GND PMC IO 3 GE3_0 - GND
3 PMC IO 6 RETRY PMC IO 5 GND Serial 1 TX
4 PMC IO 8 ADDRESS 24 PMC IO 7 GE3_1 + GND
5 PMC IO 10 ADDRESS 25 PMC IO 9 GE3_1 - Serial 1 CTS
6 PMC IO 12 ADDRESS 26 PMC IO 11 GND GND
7 PMC IO 14 ADDRESS 27 PMC IO 13 GE3_2 + Serial 1 RTS
8 PMC IO 16 ADDRESS 28 PMC IO 15 GE3_2 - GND
9 PMC IO 18 ADDRESS 29 PMC IO 17 GND Serial 2 RX
10 PMC IO 20 ADDRESS 30 PMC IO 19 GE3_3 + GND
11 PMC IO 22 ADDRESS 31 PMC IO 21 GE3_3 - Serial 2 TX
12 PMC IO 24 GND PMC IO 23 GND GND
13 PMC IO 26 +5V PMC IO 25 I2C DATA Serial 2 CTS
14 PMC IO 28 DATA 16 PMC IO 27 I2C CLK GND
15 PMC IO 30 DATA 17 PMC IO 29 GE3_LINK_ LED Serial 2 RTS
16 PMC IO 32 DATA 18 PMC IO 31 GE3_ACT_LED GND
17 PMC IO 34 DATA 19 PMC IO 33 GE4_LINK_LED Serial 3 RX
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Table 3-7 VMEbus P2 Connector (continued)
Pin Row A Row B Row C Row D Row Z
18 PMC IO 36 DATA 20 PMC IO 35 GE4_A_LED GND
19 PMC IO 38 DATA 21 PMC IO 37 GND Serial 3 TX
20 PMC IO 40 DATA 22 PMC IO 39 GE4_3 - GND
21 PMC IO 42 DATA 23 PMC IO 41 GE4_3 + Serial 3 CTS
22 PMC IO 44 GND PMC IO 43 GND GND
23 PMC IO 46 DATA 24 PMC IO 45 GE4_2 - Serial 3 RTS
24 PMC IO 48 DATA 25 PMC IO 47 GE4_2+ GND
25 PMC IO 50 DATA 26 PMC IO 49 GND Serial 4 RX
26 PMC IO 52 DATA 27 PMC IO 51 GE4_1 - GND
27 PMC IO 54 DATA 28 PMC IO 53 GE4_1 + Serial 4 TX
28 PMC IO 56 DATA 29 PMC IO 55 GND GND
29 PMC IO 58 DATA 30 PMC IO 57 GE4_0 - Serial 4 CTS
30 PMC IO 60 DATA 31 PMC IO 59 GE4_0 + GND
31 PMC IO 62 GND PMC IO 61 GND Serial 4 RTS
32 PMC IO 64 +5V PMC IO 63 +5V GND

3.4.2 On-board Connectors

3.4.2.1 Flash Program Connector (P7)
The Flash Program Connector is depopulated in the production version of the MVME2500. However, each pin is exposed for the 60-pin header connector for the JTAG boundary scan.
Table 3-8 Flash Programming Header (P7)
Pin Signal Description
1 HOLD 1
2 Chip Select 1
3 Chip Select 0
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Table 3-8 Flash Programming Header (P7) (continued)
Pin Signal Description
4 Programmer's VCC
5 Master In Slave OUT
(MISO)
6 HOLD 0
7 Keying
8 CLOCK
GND
10 Master OUT Slave IN
(MOSI)
3.4.2.2 SATA Connector (J3)
The on-board customized SATA connector is compatible with the SATA kit, namely VME­64GBSSDKIT and IVME7210-MNTKIT.
Table 3-9 Custom SATA Connector (J3)
Pin Signal Description Pin Signal Description
1 GND 21 GND
2 GND 22 SATA POWER ENABLE
3NC 23NC
4 SATA TX + 24 SATA DETECT
5NC 25NC
6 SATA TX - 26 GND
7 GND 27 NC
8 GND 28 GND
9 GND 29 GND
10 GND 30 GND
11 NC 31 +3.3V
12 SATA RX - 32 +5V
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Table 3-9 Custom SATA Connector (J3) (continued)
Pin Signal Description Pin Signal Description
13 NC 33 +3.3V
14 SATA RX + 34 +5V
15 GND 35 +3.3V
16 GND 36 +5V
17 NC 37 +3.3V
18 GND 38 +5V
19 NC 39 +3.3V
20 GND 40 +5V
3.4.2.3 PMC Connectors
Controls, LEDs, and Connectors
The MVME2500 supports only one PMC site. It utilizes J14 to support PMC I/O that goes to the RTM PMC. The tables below show the pinout detail of J11, J12, J13 and J14. See Figure 3-1 for the location of the PMC connectors.
Table 3-10 PMC J11 Connector
Pin Signal Description Pin Signal Description
1 JTAG TCK 33 FRAME
2 -12V 34 GND
3 GND 35 GND
4 INT A 36 IRDY
5 INT B 37 DEVSEL
6 INT C 38 +5V
7 PRESENT SIGNAL 39 PCIXCAP
8 +5V 40 LOCK
9INT D 41NC
10 NC 42 NC
11 GND 43 PAR
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Table 3-10 PMC J11 Connector (continued)
Pin Signal Description Pin Signal Description
12 NC 44 GND
13 PCI CLK 45 +3.3V
14 GND 46 AD 15
15 GND 47 AD 12
16 GNT A 48 AD 11
17 REQ A 49 AD 9
18 +5V 50 +5V
19 +3.3V 51 GND
20 AD 31 52 CBE0
21 AD 28 53 AD 6
22 AD 27 54 AD 5
62
23 AD 25 55 AD 4
24 GND 56 GND
25 GND 57 +3.3V
26 CBE3 58 AD 3
27 AD 22 59 AD 2
28 AD 21 60 AD 1
29 AD 19 61 AD 0
30 +5V 62 +5V
31 +3.3V 63 GND
32 AD 17 64 REQ64
Table 3-11 PMC J12 Connector
Pin Signal Description Pin Signal Description
1 +12V 33 GND
2 JTAG TRST 34 IDSELB
3 JTAG TMS 35 TRDY
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Table 3-11 PMC J12 Connector (continued)
Pin Signal Description Pin Signal Description
4 JTAG TDO 36 +3.3V
5 JTAG TDI 37 GND
6 GND 38 STOP
7 GND 39 PERR
8NC 40GND
9 NC 41 +3.3V
10 NC 42 SERR
11 BUSMODE2 (Pulled
UP)
12 +3.3V 44 GND
13 PCI RESET 45 AD 14
14 BUSMODE3 (PULLED
DWN)
15 +3.3V 47 M66EN
16 BUSMODE4 (PULLED
DWN)
17 NC 49 AD 8
18 GND 50 +3.3V
19 AD 30 51 AD 7
20 AD 29 52 REQB
21 GND 53 +3.3V
22 AD 26 54 GNTB
23 AD 24 55 NC
24 +3.3V 56 GND
25 IDSEL 57 NC
26 AD 23 58 EREADY
43 CBE1
46 AD 13
48 AD 10
27 +3.3V 59 GND
28 AD 28 60 RSTOUT
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Table 3-11 PMC J12 Connector (continued)
Pin Signal Description Pin Signal Description
29 AD 18 61 ACK64
30 GND 62 +3.3V
31 AD 16 63 GND
32 CBE2 64 NC
Table 3-12 PMC J13 Connector
Pin Signal Description Pin Signal Description
1NC 33GND
2 GND 34 AD48
3 GND 35 AD 47
4 CBE7 36 AD 52
5 CBE6 37 AD 45
6CBE5 38GND
7 CBE4 39 +3.3V
8 GND 40 AD 40
9 +3.3V 41 AD 43
10 PAR64 42 AD 42
11 +3.3V 43 AD 41
12 AD 62 44 GND
13 AD 61 45 GND
14 GND 46 AD 40
15 GND 47 AD 39
16 AD 60 48 AD 38
17 AD 59 49 AD 37
18 AD 58 50 GND
19 AD 57 51 GND
20 GND 52 AD 36
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Table 3-12 PMC J13 Connector (continued)
Pin Signal Description Pin Signal Description
21 +3.3V 53 AD 35
22 AD 56 54 AD 34
23 AD 55 55 AD 33
24 AD 54 56 GND
25 AD 53 57 +3.3V
26 GND 58 AD 32
27 GND 59 NC
28 GND 60 NC
29 AD 51 61 NC
30 AD 50 62 GND
31 AD 49 63 GND
Controls, LEDs, and Connectors
32 GND 64 NC
Table 3-13 PMC J14 Connector
Pin Signal Description Pin Signal Description
1 PMC IO 1 33 PMC IO 33
2 PMC IO 2 34 PMC IO 34
3 PMC IO 3 35 PMC IO 35
4 PMC IO 4 36 PMC IO 36
5 PMC IO 5 37 PMC IO 37
6 PMC IO 6 38 PMC IO 38
7 PMC IO 7 39 PMC IO 39
8 PMC IO 8 40 PMC IO 40
9 PMC IO 9 41 PMC IO 41
10 PMC IO 10 42 PMC IO 42
11 PMC IO 11 43 PMC IO 43
12 PMC IO 12 44 PMC IO 44
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Table 3-13 PMC J14 Connector (continued)
Pin Signal Description Pin Signal Description
13 PMC IO 13 45 PMC IO 45
14 PMC IO 14 46 PMC IO 46
15 PMC IO 15 47 PMC IO 47
16 PMC IO 16 48 PMC IO 48
17 PMC IO 17 49 PMC IO 49
18 PMC IO 18 50 PMC IO 50
19 PMC IO 19 51 PMC IO 51
20 PMC IO 20 52 PMC IO 52
21 PMC IO 21 53 PMC IO 53
22 PMC IO 22 54 PMC IO 54
23 PMC IO 23 55 PMC IO 55
24 PMC IO 24 56 PMC IO 56
25 PMC IO 25 57 PMC IO 57
26 PMC IO 26 58 PMC IO 58
27 PMC IO 27 59 PMC IO 59
28 PMC IO 28 60 PMC IO 60
29 PMC IO 29 61 PMC IO 61
30 PMC IO 30 62 PMC IO 62
31 PMC IO 31 63 PMC IO 63
32 PMC IO 32 64 PMC IO 64
3.4.2.4 JTAG Connector (P6)
The JTAG Connector can be used in conjunction with the JTAG board and ASSET hardware.
Table 3-14 JTAG Connector (P6)
Pin Signal Description Pin Signal Description
1 NC 2 +3.3V FROM +5V
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Table 3-14 JTAG Connector (P6) (continued)
Pin Signal Description Pin Signal Description
3 SPI HOLD 0 4 SPI CS 0
5 SPI CLK 6 SPI CS 1
7 SPI HOLD 1 8 SPI MOSI
9 SPI MISO 10 GND
11 SPI VCC 12 SCAN 1 TCK
13 SCAN 1 TDI 14 GND
15 SCAN 1 TRST 16 SCAN 1 TDO
17 SCAN 1 TMS 18 +3.3V
19 GPO0 20 NC
21 NC 22 SCAN 2 TMS
23 NC 24 SCAN 2 TDO
Controls, LEDs, and Connectors
25 SCAN 2 TCK 26 +3.3V FROM +5V
27 GND 28 SCAN 2 TDI
29 NC 30 NC
31 SCAN 3 TMS 32 SCAN 3 TCK1
33 SCAN 3 TDO 34 SCAN 3 TCK 2
35 +2.5V 36 SCAN 3 TCK 3
37 SCAN 3 TDI 38 GND
39 SCAN 3 TRST 40 SCAN 3 TCK3
41 SCAN 4 TCK 1 42 SCAN 4 TMS
43 GND 44 SCAN 4 TDO
45 SCAN 4 TCK 2 46 +3.3V
47 GND 48 SCAN 4 TDI
49 SCAN 4 TCK 3 50 SCAN 4 TRST
51 SCAN 5 TMS 52 SCAN 5
53 SCAN 5 TDO 54 GND
55 +3.3V 56 SCAN5 TCK2
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Table 3-14 JTAG Connector (P6) (continued)
Pin Signal Description Pin Signal Description
57 SCAN 5 TDI 58 GND
59 SCAN 5 TRST 60 NC
3.4.2.5 COP Connector (P50)
The COP header is used for the CPU debug. The pin assignment is dictated by Freescale and is compatible with the processor’s debugging tool.
Table 3-15 COP Header (P50)
Pin Signal Description
1 JTAG TDI
2 COP QACK
3 JTAG TDO
4 COP TRST
5 COP RUNSTOP (Pulled UP)
6 COP VDD SENSE
7 JTAG TCK
8 COP CHECK STOP IN
9 JTAG TMS
10 NC
11 P2020 SW RESET
12 COP PRESENT
13 COP HARD RESET
14 KEYING
15 COP CHECK STOP OUT
16 GND
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3.4.2.6 SD Connector (J2)
Table 3-16 SD Connector (J2)
Pin Signal Description
1 DATA 3
2 COMMAND
3GND
4 VCC (+3.3V)
5 CLOCK
6GND
7 DATA 0
8 DATA 1
Controls, LEDs, and Connectors
9 DATA 2
10 WRITE PROTECT
11 CARD DETECT
12 GND
3.4.2.7 XMC Connector (XJ2)
The MVME2500 has one XMC connector (XJ2) that supports XMC cards with J15 connector. It can also support XMC cards with J16 connector without encountering any mechanical interference.
Table 3-17 XMC Connector (XJ2) Pinout
Pin Row A Row B Row C Row D Row E Row F
1 RX0 + RX0 - +3.3V RX1+ RX1 - +3.3V
2 GND GND JTAG TRST GND GND HRESET
3 NC NC +3.3V NC NC +3.3V
4 GND GND JTAG TCK GND GND MRSTO
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Table 3-17 XMC Connector (XJ2) Pinout (continued)
Pin Row A Row B Row C Row D Row E Row F
5 NC NC +3.3V NC NC +3.3V
6 GND GND JTAG TMS GND GND +12V
7 NC NC +3.3V NC NC +3.3V
8 GND GND JTAG TMS GND GND -12V
9 NC NC NC NC NC +3.3V
10 GND GND JTAG TDO GND GND GA 0
11 TX0 TX0 - BIST
(PULLED UP)
12 GND GND GA 1 GND GND PRESENT
13 NC NC NC NC NC +3.3V
14 GND GND GA 2 GND GND I2C DATA
15 NC NC NC NC NC +3.3V
16 GND GND MVMRO
(PULLED DOWN)
17 NC NC NC NC NC NC
18 GND GND NC GND GND NC
19 CLK + CLK - NC NC ROOT0
TX1 + TX1 - +3.3V
GND GND I2C CLOCK
3.4.2.8 Miscellaneous P2020 Debug Connectors
Table 3-18 P20x0 Debug Header
NC (PULLED UP)
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Pin Signal Description
1 MSRCDI0
2GND
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Table 3-18 P20x0 Debug Header (continued)
Pin Signal Description
3 MSRCDI1
4MDVAL
5 MSRCDI2
6 TRIG_OUT
7 MSRCDI3
8 TRIG_IN
9 MSRCID4
10 GND

3.5 Switches

Controls, LEDs, and Connectors
These switches control the configuration of the MVME2500.
Board Malfunction
Switches marked as “reserved” might carry production-related functions and can cause
the board to malfunction if their settings are changed.
Do not change settings of switches marked as “reserved”. The setting of switches which
are not marked as “reserved” has to be checked and changed before board installation.

3.5.1 Geographical Address Switch (S1)

The Tsi148 VMEbus Status Register provides the VMEbus geographical address of the MVM2500. The switch reflects the inverted states of the geographical address signals. Applications not using the five row backplane can use the geographical address switch to assign a geographical address based on the following diagram.
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Note that this switch is wired in parallel with the geographical address pins on the 5-row connector. These switches must be in the "OFF" position when installed in a 5-row chassis in order to get the correct address from the P1 connector. This switch also includes the SCON control switches.
Figure 3-5 Geographical Address Switch
72
Table 3-19 Geographical Address Switch
Position Function Default
S1-1 VME SCON Auto
S1-2 VME SCON SEL
S1-3 GAP 1
S1-4 GAP4 1
S1-5 GAP3 1
S1-6 GAP2 1
S1-7 GAP1 1
S1-8 GAP0 1
1. The VME SCON MAN switch is "OFF" to select Auto-SCON mode. The switch is "ON" to select manual SCON mode which works in conjunction with the VME SCON SEL switch.
2. The VME SCON SEL switch is OFF to select non-SCON mode. The switch is ON to select always SCON mode. This switch is only effective when the VME SCON MAN switch is "ON".
1
2
Auto-SCON
Non-SCON
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3.5.2 SMT Configuration Switch (S2)

This eight position SMT configuration switch controls the flash bank write-protect, selects the flash boot image, and controls the safe start ENV settings. The default setting on all switch positions is "OFF" and is indicated by brackets in Table 3-20.
Figure 3-6 SMT Configuration Switch Position
Controls, LEDs, and Connectors
Table 3-20 Geographical Address Switch Settings
SW2 DEFAULT Signal Name Description Notes
1 OFF (Normal Env) NORMAL_ENV Safe Start ("ON"= Use
normal ENV, "OFF"= Use safe ENV)
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Table 3-20 Geographical Address Switch Settings (continued)
SW2 DEFAULT Signal Name Description Notes
2 OFF (Flash Block A) BOOT_BLOCK_A Boot Block B Select
ON: Flash Block B OFF: Flash Block A
The MVME2500 supports dual boot. User can select either Flash A or Flash B to boot the board. If the selected flash is corrupted, the board will automatically switch over to the next flash. If both flash banks are corrupted, the board should be sent for repair.
3 OFF (WP Disabled) FLASH_WP_N SPI Flash Write-Protect
ON: WP Enabled OFF: WP Disabled
4 OFF (PMC) PMC_XMC_SEL XMC or PMC selection
switch ON: XMC OFF: PMC
5 OFF (133 MHz) PMC_133 PCI frequency selection
ON: 100 MHz OFF: 133 MHz
Hardware via S2-3 write­protects the flash. To disable the write­protect, S2-3 should be OFF. You need to set the U-Boot configuration to successfully write on the flash. For details, see
Programming Model.
Will select if XMC card or PMC card is used
This option can only be used if the PMC supports PCI-X interface. The board will automatically detect the frequency of operation of the PMC and will execute accordingly. If the PMC supports PCI-X speed, this switch can be configured to run either 100 MHz or 133 MHz frequency.
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Table 3-20 Geographical Address Switch Settings (continued)
SW2 DEFAULT Signal Name Description Notes
6 OFF (WP Enabled) MASTER_WP_DISA
BLED
Write-Protect Disable switch
ON: WP disabled OFF: WP enabled
For I2C write-protect only. Switching it "ON" will disable the write-protect.
7 OFF (Front) GBE_MUX_SEL User Defined switch that
will select if the GBE PHY will function on the front panel or on the backplane
ON: RTM Genet OFF: Front Panel
8 OFF (CPU Reset
Deasserted)
CPU Reset Should be "OFF" for normal
Two GbE ports cannot be used at the same time. The front panel GENET 2 and RTM GENET 2 shares same controller and PHY. When the S2-7 can be set to select the Ethernet will be routed either to the front panel or to the RTM.
operation.
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Functional Description

4.1 Block Diagram

The MVME2500 block diagram is illustrated in Figure 4-1. All variants provide front panel access to one serial port via a micro-mini DB-9 connector, two 10/100/1000 Ethernet port (one is configurable to be routed to the front panel or to the rear panel) through a ganged RJ45 connector and one Type A USB port. It includes board-fail LED indicator, user-defined LED indicator and an ABORT/RESET switch.
Figure 4-1 Block Diagram
Chapter 4
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Functional Description

4.2 Chipset

The MVME2500 utilizes the QorIQ P20x0 integrated processor. It offers an excellent combination of protocol and interface support which includes the following components:
The QorIQ P20x0 integrated processor or e500v2 processor core (P2020) and a single
e500v2 processor core (P2010).
PCI Express interface
Local Bus Controller
Secure Digital Host Controller
I2C interface
USB interface
DUART
DMA controller
Enhanced three speed Ethernet controller
General Purpose I/O (GPIO)
Integrated Security Engine
Common On-chip Processor
P20x0 Strapping pins

4.2.1 e500 Processor Core

The QorIQ integrated processors offer dual high performance e500v2 core (P2020) and a single e500v2 core (P2010). It operates from 800 MHz up to 1.2 GHz core frequency. The e500 processor core is a low-power implementation of the family of reduced instruction set computing (RISC) embedded processor that implement the Book E definition of the PowerPC architecture. The e500 is a 32-bit implementation of the Book E architecture using the lower words of 64-bit general-purpose registers (GPRs) while E500v2 uses 36-bit physical addressing.
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4.2.2 Integrated Memory Controller

A fully programmable DDR SDRAM controller supports most JEDEC standard DDR2 and DDR3 memories available. Unbuffered registered DIMMs are also supported. A built-in error checking and correction (ECC) ensures very low bit-error rates for reliable high-frequency operation. Though ECC is not implemented on MVME2500, the board includes a place holder for additional chips for ECC whenever it is needed in the future.
The memory controller supports the following:
16 GB of memory
Asynchronous clocking from platform clock, with programmable settings that meets all
the SDRAM timing parameters.
Up to four physical banks; each bank can be independently addressed to 64 Mb to 4 Gb
memory devices (depending on the internal device configuration with x8/x16/x32 data ports).
Functional Description
Chip set interleaving and partial array self-refresh.
Data mask signal and read-modify-write for sub-double-word writes when ECC is enabled.
Double-bit error detection and single-bit error correction ECC, 8-bit check work across 64-
bit data.
Address parity for registered DIMMs.
Automatic DRAM initialization sequence or software-controlled initialization sequence
and automatic DRAM data initialization.
Write leveling for DDR3 memories and supports up to eight posted refreshes.

4.2.3 PCI Express Interface

The PCI Express interface is compatible with the PCI Express Base Specification Rev. 1.0a. The PCI Express controller connects the internal platform to a 2.5 GHz serial interface. The P20x0 has options for up to three PCI-E interfaces with up to x4 link width. The PCI-E controller is configured to operate as either PCI-E root complex (RC) or as an endpoint (EP) device.
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Functional Description

4.2.4 Local Bus Controller (LBC)

The main component of the enhanced LBC is the memory controller that provides a 16-bit interface to various types of memory devices and peripherals. The memory controller is responsible for controlling eight memory banks shared by the following: a general purpose chip select machine (GPCM); a flash controller machine (FCM), and user programmable machines (UPMs).

4.2.5 Secure Digital Hub Controller (SDHC)

The SDHC/eSDHC provides an interface between the host system and the memory cards such as the MMC and the SD. It is compatible with the SD Host Controller Standard Specification Ver.
2.0 and supports the following: SD, miniSD, SD Combo, MMC+, and RS-MMC card.

4.2.6 I2C Interface

The MVME2500 uses only one of the two independent I2C buses on the processor. For more information, see I2C Devices, on page 91.

4.2.7 USB Interface

The P20x0 implements a USB 2.0 compliant serial interface engine. For more information, see
USB, on page 90.

4.2.8 DUART

The chipset provides two universal asynchronous receiver/transmitter (UART), each of which acts independently of the other. Each UART is clocked by the CCB clock and is compatible with PC16522D. As a full-duplex interface, it provides a 16-byte FIFO for both transmitter and receiver mode.
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Functional Description

4.2.9 DMA Controller

The DMA controller transfers blocks of data between the various interfaces and functional blocks of P20x0 that are independent of the e500 cores. The P20x0 DMA controller has three high-speed DMA channels, all of which capable of complex data movement and advanced transaction chaining.

4.2.10 Enhanced Three-Speed Ethernet Controller (eTSEC)

The eTSEC controller of the device communicates to the 10 Mbps, 100 Mbps, and 1 Gbps Ethernet/IEE 802.3 networks, as well as to devices with generic 8 to 16-bit FIFO ports. The MVME2500 uses the eTSEC using the RGMII interface.

4.2.11 General Purpose I/O (GPIO)

The P20x0 has a total of sixteen I/O ports. Four of these ports are used alternately as external input interrupt. All sixteen ports have open drain capabilities.
The P20x0 processor provides a Serial Rapid I/O interface. However, this interface is not utilized by the MVME2500.

4.2.12 Security Engine (SEC) 3.1

The integrated security engine of the P20x0 is designed to off-load intensive security functions like key generation and exchange, authentication and bulk encryption from the processor core. It includes eight different execution units where data flows in and out of an EU.
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Functional Description

4.2.13 Common On-Chip Processor (COP)

The COP is the debug interface of the QorIQ P20x0 processor. It allows a remote computer system to access and control the internal operation of the processor. The COP interface connects primarily through the JTAG and has additional status monitoring signals. The COP has additional features like breakpoints, watch points, register and memory examination/modification and other standard debugging features.

4.2.14 P20x0 Hardware Configuration Pins

A series of strapping pins are required to initialize the P20x0. These pins are samples during the assertion of HRESET and return to their assigned function after HRESET is deasserted.

4.3 System Memory

The processors integrated memory controller supports both DDR2 and DDR3 memory devices. It has one channel and can be configured up to four memory banks with x8, x16 and x32 devices. Using 4 GB devices allows support of up to 16 GB of memory.
The MVME2500 has total of eight board variants, half of which has soldered 2 GB memory, while the remaining half has 16 GB memory. The x8 or 1 Gbit device forms 2 GB and 1 GB memory capacity. A total of 16 devices for 2 GB and eight devices are used to form 16 GB.
MVME2500 supports ENP1 and ENP2 operating environment. The ENP1 environment uses Samsung for all variants including the commercial grade devices, while the ENP2 variants use Micron.

4.4 Timers

There are various timer functions implemented on the MVME2500 platform:

4.4.1 Real Time Clock

This operates on 3.3 V supply monitoring and battery control function (MAX6364PUT29), a
32.768 KHz clock generator (DS32KHZS), and an RTC with alarm (DS1375T).
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See Real-Time Clock Battery, on page 97 for more information on the real time clock back-up battery.

4.4.2 Internal Timer

The processor's internal timer is composed of eight global timers divided into two groups of four timers each. Each timer has four individual configuration registers and they cannot be cascaded together.

4.4.3 Watchdog Timer

The on-board FPGA provides programmable 16-bit watchdog timers. It has a 1 ms resolution and generates a board reset when the counter expires. Interrupt is generated to the processor when this occurs. Default value is 60 seconds.
Functional Description

4.4.4 FPGA Tick Timer

The MVME2500 supports three independent 32-bit timers that are implemented on the FPGA to provide fully programmable registers for the timers.

4.5 Ethernet Interfaces

The MVME2500 has three eTSEC controllers. Each one supports RGII, GMII, and SGMII interface to the external PHY. All controllers can only be utilized when using the RGMII interface. Using the GMII allows only up to two usable controllers.
MVME2500 provides two 10/100/1000 Ethernet interfaces on the front panel and another two are routed to the RTM through the backplane connector. Due to controller limitations, one controller is designed to be routed to the front panel or to the RTM. This setting is possible by using a third party gigabit Ethernet LAN switch with a single enable switch such as PERICOM’s P13L301D. The routing direction can be configured through the on-board dip switch.
Each Ethernet controller has a single dedicated Broadcom BCM54616S with integrated MAC and PHY. The registers of the PHY can be accessed through the processor’s two-wire Ethernet management interface.The front panel RJ45 connector has integrated speed and activity status indicator LEDs. Isolation transformers are provided on-board for each port.
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Functional Description

4.6 SPI Bus Interface

The enhanced serial peripheral interface (eSPI) allows the device to exchange data with peripheral devices such as EEPROMs, RTC, Flash and the like. The eSPI is a full-duplex synchronous, character-oriented channel that supports a simple interface such as receive, transmit, clock and chip selects. The eSPI receiver and transmitter each have a FIFO of 32 Bytes.
The P20x0 supports up to four chip selects and RapidS full clock cycle operation. It can operate both full-duplex and half duplex. It works with a range of 4-bit to 16-bit data characters and is a single-master environment. The MVME2500 is configured such that the eSPI can operate up to 200 MHz clock rate and can support booting process.The firmware boot flash resides in the P20x0 eSPI bus interface.

4.6.1 SPI Flash Memory

The MVME2500 has two 8 MB on-board serial flash. Both contain the ENV variables and the U­Boot firmware image, which is about 513 KB in size. Both SPI flash contain the same programming for firmware redundancy and crisis recovery. The SPI flash is programmed through the JTAG interface or through an on-board SPI flash programming header.
For information on U-boot and ENV Variables location see, Flash Memory Map, Table 5-2 on
page 102.

4.6.2 SPI Flash Programming

The MVME2500 has three headers: a 10-pin header for SPI Flash programming, an 80-pin header for the JTAG connectivity, and a 20-pin JTAG header for ASSET hardware connectivity. The following options are used to program the on-board flash:
Using on-board SPI header - The MVME2500 uses the 10-pin header with a dual SPI Flash
in-circuit programming configuration. The pin connection is compatible with DediProg SPI Universal Pin Header.
Using 60-pin external JTAG header - An external JTAG board with a JTAG multiplexer is
compatible with the MVME2500 and is attached using an external cable. It is used to update the boot loader in the field. Using this method, programming is done through the JTAG interface or by using the dedicated SPI Flash programming header on the JTAG board.
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Factory Pre-Programming the SPI Flash usually takes a while. Ideally, the SPI Flash should
be pre-programmed in the factory before shipment.
ICT Programming - This programming is done on exposed test points using a bed of nails
tester.
The board power should be switched on before programming. The switch S2-8 should also be powered on to successfully detect the SPI Flash chip.

4.6.3 Firmware Redundancy

The MVME2500 uses two physically separate boot devices to provide boot firmware redundancy. Although the P20x0 provides four SPI Bus chip selects, the P20x0 is only capable of booting from the SPI Device controlled by Chip Select 0. External SPI multiplexing logic is implemented on the MVME2500 to accommodate this chipset limitation.
Functional Description
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Functional Description
The MVME2500 FPGA controls the chip select to SPI devices A and B. The FPGA chip select control is based on the Switch Bank (S2-2).
Figure 4-2 SPI Device Multiplexing Logic
86
At power-up, the selection of the SPI boot device is strictly based upon the Switch Bank (S2-2) setting. Depending on the S2-2 setting, SPI_SEL0 is routed to one of two SPI devices. The selected SPI device must contain a boot image. Once the boot image is copied into memory and executed, the FPGA will wait and once the P20x0 will write on one bit of the FPGA watchdog register, the FPGA will then pass through the SPI chip select from the P20x0 to SPI device chip selects. The software can now perform read/write processes on any SPI device, including copying from one SPI device to another.
With this flexible approach to firmware redundancy, one should always be able to recover from a corrupt active firmware image, as long as a healthy firmware image is maintained in single bootable SPI Device.
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The MVME2500 supports automatic switch over. If booting one device is not successful, the watchdog will trigger the board reset and it will automatically boot on the other device.

4.6.4 Crisis Recovery

The MVME2500 provides an independent boot firmware recovery mechanism for the operating system. The firmware recovery can be performed without leaving the firmware environment.
During crisis recovery, the healthy boot image contained in SPI Device B is copied to SPI Device A, replacing the corrupt boot image contained in SPI Device A.
Crisis recovery is performed as follows:
1. Power off the board.
2. Set Switch S2-2 to "ON" to point to SPI Device B (crisis image).
3. Power on the board.
Functional Description
4. Press <h> key on the keyboard to go to the U-Boot prompt.
5. Type "moninit fru" to copy the crisis image to SPI Device A.
6. Once the U-Boot prompt is visible, power off the board.
7. Set the S2-2 back to "OFF" to point to the SPI Device A.
8. Power on the board to boot from the newly recovered image on the SPI Device A.
The board will automatically switch over if one of the devices is corrupted.

4.7 Front UART Control

The MVME2500 utilizes one of the two UART functions provided in the male micro-mini DB-9 front panel. A male-to-male micro-mini DB-9 to DB9 adapter cable is available under Artesyn Part Number SERIAL-MINI-D (30-W2400E01A) and is approximately 12 inches in length.
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Functional Description
Only 115200 bps and 9600 bps are supported. The default baud rate on the front panel serial is 9600 kbps.

4.8 Rear UART Control

The MVME2500 utilizes the Exar ST16C554 quad UART (QUART) to provide four additional ports to the RTM. These devices feature 16 bytes of transmit and receive first-in first-out (FIFO) with selectable receive FIFO trigger levels and data rates of up to 1.5 Mbps. Each UART has a set of registers that provide the user with operating status and control. The QUART are 8-bit devices connected to the processor through the local bus controller using LBC chipset CS1, CS2, CS3 and CS4.
These four serial interfaces are routed to P2 I/O for RTM accessibility. There are a total of five serial ports available on the MVME2500.

4.9 PMC/XMC Sites

The MVME2500 hosts only one PMC/XMC site and accepts either a PMC or an XMC add-on card. Only an XMC or a PMC may be populated at any given time as both occupy the same physical space on the PCB. Combination PMC/XM cards are not supported by the MVME2500. The site provides a rear PMC I/O.
The PMC site is fully compliant with the following:
1. VITA 39 –PCI-X for PMC
2. VITA 35-2000 for PMC P4 to VME P2 Connection
3. PCI Rev 2.2 for PCI Local Bus Specification.
4. PCI-X PT 2.0 for PCI-X Protocol Addendum to the PCI Local Bus Specs.
5. IEEE Standard P1386-2001 for Standard for Common Mezzanine Card Family
6. IEEE Standard P1386.1-2001 for Standard Physical and Environmental Layer for PCI Mezzanine Card.
7. VITA 42 for XMC
8. VITA 42.3, PCIe for XMC
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Functional Description
PMC/XMC sites are keyed for 3.3V PMC signaling. The PMC and the XMC add-on cards must have a hole in the 3.3 V PMC keying position in order to be populated on the MVME2500. The XMC specification accommodates this since it is expected that carrier cards will host both XMC and PMC capable add-on cards.
The MVME2500 have a keying pin at the 3.3V location at the PMC site. The MVME2500 boards are not 5 volt PMC IO compatible. The MVME2500 also has a 5 volt keying pin location at the PMC site used to mount the SATA adapter card.
The MVME2500 utilizes the P20x0 x2 link PCI Express interface. It is designed such that the same PCI-E interface is used for either PMC or XMC through Pericom’s PI2PCIE2412. It is PCI-E Gen2 compliant with four differential channel input and 2:1 MUX switch with single enable. The enable pin is controlled by FPGA through on-board switch.
The on-board switch S2-4 determines the direction of the PCI-E MUX switch. The default setting "OFF" routes the differential lines to the PMC. Otherwise, it is routed to the XMC connector.

4.9.1 PMC Add-on Card

The MVME2500 PMC interface utilizes IDT’s TSI384 as the PCie/PCI-X bridge. It can support up to 8.5 Gbps (64 bits x 133 MHz). The on-board switch S2-5 configures the TSI384 to run on either 100 MHz or 133 MHz, with 133 MHz as default.
The MVME2500 supports multi-function PMCs and processor PMCs (PrPMCs). The PMC site has two IDSELs, two REQ/GNT pairs, and EREADY to support PrPMC as defined by VITA39.

4.9.2 XMC Add-on Card

The x2 links the PCI-E Gen 1 and is directly routed to the P15 XM connector through Pericom MUX Switch. The on-board switch S2-4 should be set to "ON".
The XMC add-on cards are required to operate at +5V or +12V (from carrier to XMC). The MVME2500 provides +5V to the XMC VPWR (Variable Power) pins. The MVME2500 does not provide +12V to the XMC VPWR pins. Voltage tolerances for VPWR and all carrier supplied voltage (+3.3 V, +12 V, -12 V) are defined by the base XMC standard.
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Functional Description

4.10 SATA Interface

The MVME2500 supports an optional 2.5" SATA HDD. The connector interface is compatible with the SATAMNKIT, which contains the following: one SSD/HDD, one SATA board, screws and a mounting guide. The SATA connector can support a horizontal mounted SSD/HDD.
The MVME2500 uses Marvell's 88SE6121B2-NAA2C000 SATA controller and supports up to 1.5 Gbps (SATA Gen 1). For status indicators, it has an on-board green LED, D12 and D13 for SATA link and SATA activity status respectively.

4.11 VME Support

The MVME2500 can operate in either System Controller (SCON) mode or non-SCON mode, as determined by the switch setting of S1-1 and S1-2.
The P20x0 x1 link is used for the VME backplane connectivity through the Tsi384 (PCI-E/PCI-X) and Tsi148 (PCI-X/VMEBus) bridges.
See VMEBus P1 Connector, on page 56 and VMEBus P2 Connector, on page 58 for more information.

4.11.1 Tsi148 VME Controller

The VMEbus interface for the MVME2500 is provided by the Tsi148 VMEbus controller. The Tsi148 provides the required VME, VME extensions, and 2eSST functions. TI SN74VMEH22501transceivers are used to buffer the VME signals between the Tsi148 and the VME backplane. Refer to the Tsi148 user's manual, for additional details and/or programming information.

4.12 USB

The MVME2500 processor implements a dual-role (DR) USB 2.0 compliant serial interface engine. DC power to the front panel USB port is supplied using a USB power switch which provides soft-start, current limiting, over current detection, and power enable for port 1.
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4.13 I2C Devices

The MVME2500 utilizes one of the two I2C ports provided by the board's processor. The I2C bus is a two-wire, serial data (SDA) and serial clock (SCL), synchronous, multi-master bi-directional serial bus that allows data exchange between this device and other devices such as VPD, SPD, EEPROM, RTC, temperature sensor, RTM, XMC, and IDT clocking.
The RTM I2C address can be configured by the user and should not contain duplicate addresses to avoid conflict. For more information, see I2C Bus Device Addressing, on page 136.

4.14 Reset/Control FPGA

The FPGA provides the following functions:
Power control and fault detection
Reset sequence and reset management
Functional Description
Status and control registers
Miscellaneous control logic
Watchdog timer
32-bit Tick Timer
Clock generator
Switch decoder and LED controller

4.15 Power Management

The MVME2500 backplane is utilized to derive +3.3V, +2.5V, +1.8V, +1.5V, +1.2V, +1.05V voltage rail. Each voltage rail is controlled by the FPGA through an enable pin of the regulator, while the output is monitored through power good signal. If a voltage rail fails. the FPGA will disable each supply. To restart the system, the chassis power switch must be power-cycled.
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Functional Description

4.15.1 On-board Voltage Supply Requirement

The on-board power supply is considered to be out of regulation if the output voltage level is below the minimum required power or goes beyond the maximum.
Table 4-1 Voltage Supply Requirement
Voltage Rail Requirement
Voltage Rail
+3.3 V 3.15 V 3.45 V
+2.5 V 2.375 V 2.625 V
+1.8 V 1.7 V 1.9 V
+1.5 V 1.425 V 1.575 V
+1.2 V 1.14 V 1.26 V
+1.2 V_SW 1.14 V 1.26 V
+1.05 V 1.0 V 1.1 V
Minimum Maximum

4.15.2 Power Up Sequencing Requirements

The power up sequence describes the voltage rail power up timing, which is designed to support all the chip supply voltage sequencing requirement.
The backplane contains three power supplies, +12 V, -12 V and +5 V. The +12 V is assigned to PMC/XMC sites only, while the +5 V and below are assigned to different voltage levels to support all the voltage requirements on the board. Each voltage rail is controlled by FPGA and sequenced to provide correct voltage sequencing requirements.
When the 1.5 V is Good, it means that all the DC-DC power is Good.
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Functional Description
D
CBA
The figure below describes the detailed power up sequence of the board from +5V (main source from backplane) up to the 1.5 V Power Good.
Figure 4-3 Power Up Sequence
1
2
3
4
1
2
3
4
POWER SEQUENCE DIAGRAM
DOCUMENT NUMBER
6306822HA.cpm
AB CD
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Functional Description

4.16 Clock Structure

A total of three IDT chips, a discrete oscillator, and crystal supports all the clock requirements of MVME2500.
Figure 4-4 Clock Distribution Diagram

4.17 Reset Structure

The MVME2500 reset will initiate after the power up sequence if the 1.5 V power supply is “GOOD”. When the board is at “ready” state, the reset logic will monitor the reset sources and implement the necessary reset function.
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4.17.1 Reset Sequence

The timing of the reset sequence supports each chip reset requirements with respect to the power supply.
All the resets are controlled by the FPGA with a power supply of +3.3 V from+5 V. All the resets are asserted until +1.5 V power is Good. Initially peripherals resets are released to corresponding sequence, then later the CPU reset is released. Once the CPU reset is released, the CPU starts boot up sequence.
Below is the SW event sequence from the release of CPU reset to boot up.
1. Copying of U-boot from SPI to CPU cache.
2. Initialization of Serial Console.
3. Initialization of DDR using SPD parameters in cache.
4. Execution relocation to RAM.
Functional Description
5. Initialization of PCI.
6. POST routine.
7. Additional SW routines.
8. U-boot terminal visibility, ready to load OS image.
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Functional Description
The figure below describes the reset sequence from the +5 V Power Good to the release of the CPU reset.
Figure 4-5 Reset Sequence
CBA
1
2
3
4
RESET SEQUENCE
DOCUMENT NUMBER
6306822HA.cpm
AB CD
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4.18 Thermal Management

The MVME2500 utilizes two on-board temperature sensors: one for the board and the other for the CPU temperature sensor. The board temperature sensor is located near the dual RJ45 connector near the front panel. The CPU temperature sensor is located near the P2020 CPU.
The MVME2500 thermal management support will interrupt the process only to show the current board and CPU temperature. This interrupt is routed directly to one of the processor’s IRQ4.
The table below shows the low and high threshold temperature in order for the interrupt to be asserted.
Table 4-2 Thermal Interrupt Threshold
Functional Description
Board Variant Board Temperature Limit
Standard Variant 0°C to +55°C 0°C 70°C 0°C 90°C
Extended Temperature Variant
-55°C to +71°C -40°C 90°C -40°C 100°C

4.19 Real-Time Clock Battery

A back-up battery based on the CR2325 specification is provided. It helps support the RTC hold-up requirements that maintain the correct date and time. It provides backup power for the on-board RTC when primary power is unavailable.

4.20 Debugging Support

The following information shows the details of Artesyn debugging support as applied to the MVME2500.
Board Temperature Limit
Low High Low High
CPU Temperature Limit
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Functional Description

4.20.1 POST Code Indicator

The following table shows the LED status of the POST Codes. For the location of the POST Code LEDs, see On-board LEDs, on page 53.
Logic 1 = LED is “ON”, Logic 0 = LED is “OFF”
Table 4-3 POST Code Indicator on the LED
Sequence D33 D34 D35 Description
1 000U-boot has been copied from SPI flash to CPU cache.
2 010Serial console has been initialized, some text is visible
3 0 1 1 DDR has been initialized using SPD parameters,
4 100Execution has been relocated to RAM.
on the terminal.
Execution is still in the cache.
5 101PCI has been initialized.
6 110POST routines are finished.
7 111Additional SW routines are finished.
8 000U-boot prompt is visible on the terminal, can start

4.20.2 JTAG Chain and Board

The MVME2500 is designed to work with separate JTAG board rather than with an on-board JTAG multiplexer. The chip can support up to a 6-scan port and the board’s boundary scan requires the following to function: ASSET hardware, JTAG board, and JTAG cable. The MVME2500 provides a 60-pin header that can connect to the JTAG board using a custom cable.
The JTAG board provides three different connectors for the ASSET hardware, flash programming and the MVME2500 JTAG connector. The board is equipped with TTL buffers to help improve the signal quality as it traverses over the wires.
loading OS image from USB, Ethernet, SATA SSD, SD.
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4.20.3 Custom Debugging

Custom debugging makes use of the common on-chip processor. Refer to Common On-Chip
Processor (COP), on page 82 for details.

4.21 Rear Transition Module (RTM)

The MVME2500 is compatible with the MVME721x RTM.
The MVME721X RTM is for I/O routing through the rear of a compact VMEbus chassis. It connects directly to the VME backplane in chassis with an 80 mm deep rear transition area. The MVME721X RTM is designed for use with the MVME7100, MVME2500, iVME7210, and MVME
4100. It has the following features:
Table 4-4 Transition Module Features
Functional Description
Function Features
I/O One five-row P2 backplane connector for serial and Ethernet I/O passed from the
SBC
Four RJ-45 connectors for rear panel I/O: four asynchronous serial channels Two RJ-45 connectors with integrated LEDs for rear panel I/O: two 10/100/1000
Ethernet channels
One PIM site with rear panel I/O
For more information, refer to the MVME721x RTM Installation and Use. See Appendix B,
Related Documentation, on page 147 for details on how to obtain and download the document.
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