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MITX-430/MITX-440-DVI-2E
Installation and Use
P/N: 6806800K37D
August 2014
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©
Copyright 2014 Artesyn Embedded Technologies, Inc.
All rights reserved.
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Industrial Computer Manufacturers Group.
UNIX® is a registered trademark of The Open Group in the United States and other countries.
Notice
While reasonable efforts have been made to assure the accuracy of this document, Artesyn assumes no liability resulting from any
omissions in this document, or from the use of the information obtained therein. Artesyn reserves the right to revise this document
and to make changes from time to time in the content hereof without obligation of Artesyn to notify any person of such revision or
changes.
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altered without the permission of Artesyn.
It is possible that this publication may contain reference to or information about Artesyn products (machines and programs),
programming, or services that are not available in your country. Such references or information must not be construed to mean that
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Limited and Restricted Rights Legend
If the documentation contained herein is supplied, directly or indirectly, to the U.S. Government, the following notice shall apply
unless otherwise agreed to in writing by Artesyn.
Use, duplication, or disclosure by the Government is subject to restrictions as set forth in subparagraph (b)(3) of the Rights in
Technical Data clause at DFARS 252.227-7013 (Nov. 1995) and of the Rights in Noncommercial Computer Software and
Documentation clause at DFARS 252.227-7014 (Jun. 1995).
Contact Address
Artesyn Embedded Technologies Artesyn Embedded Technologies
Marketing Communications
2900 S. Diablo Way, Suite 190
Tempe, Arizona 85282
Lilienthalstr. 17-19
85579 Neubiberg/Munich
Germany
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Contents
About this Manual . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
1.1.1 MITX-430 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
1.1.2 MITX-440-DVI-2E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
1.2 Standard Compliances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
1.3 Mechanical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
1.4 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
1.4.1 Supported Board Models. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
1.4.2 Board Accessories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
1.5 Product Identification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
2 Hardware Preparation and Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
2.1 Environmental and Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
2.1.1 Environmental Requirements. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
2.1.2 Thermal Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
2.1.3 Power Requirements (Single Core Processor Board) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
2.1.3.1 Full Loading Running Burn-in Test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
2.1.3.2 Idle Mode Power Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
2.1.3.3 Standby Mode Power Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
2.1.4 Power Requirements (Dual Core Processor Board). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
2.1.4.1 Full Loading Running Burn-in Test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
2.1.4.2 Idle Mode Power Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
2.1.4.3 Standby Mode Power Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
2.2 Board Thermal Management and Placement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
2.2.1 Board Thermal Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
2.3 Unpacking and Inspecting the Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
2.4 Preparing the Installation Environment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
2.5 Processor Cooler Installation and Removal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
2.6 Memory Module Installation and Removal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
3 Controls, LEDs, and Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
3.1 Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
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3.2 Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
3.2.1 Clear CMOS (P3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
3.2.2 LVDS Header (J5). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
3.2.3 LVDS Backlight Header (P23) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
3.2.4 LVDS Power (P5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
3.2.5 MINI IDE Header (J8). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
3.2.6 USB Flash Header (P10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
3.2.7 USB Header (P12) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
3.2.8 ELO Touch Screen Header (P6). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
3.2.9 GPIO Header (P4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
3.2.10 COM Header (P9, P27) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
3.2.11 RS-232/422/485 (P18). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
3.2.12 Power COM (P8, P26) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
3.2.13 TPM Header (P2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
3.2.14 LPT Header (P11). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
3.2.15 Front Panel Header (P15). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
3.2.16 BIOS Program Header (P16) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
3.2.17 Fan Header (P1, P13) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
3.2.18 MINI PCIE LED (P14) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
3.2.19 Case Open Header (P25) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
4 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
4.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
4.2 Pineview-D Processor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
4.3 SMBus Interface and Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
4.4 System Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
4.5 Ethernet Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
4.6 PCI-E Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
4.7 USB Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
4.8 VGA, LVDS, LPC, and Audio Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
4.9 DVI Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
4.10 BIOS Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
4.11 SPI Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
4.12 GPIO Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
4.12.1 User Defined GPIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
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4.12.2 ICH8-M GPIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
4.13 Chipset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
4.14 Clock Generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
4.15 Video . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
4.16 Storage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
4.17 Super I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
4.18 HW Monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
4.19 Watchdog Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
4.20 Debug . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
4.21 Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
4.22 Manageability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
4.23 RTC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
5 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
5.1 POST . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
5.2 Boot Process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
5.3 Initiating Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
5.4 Setup Utility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
5.4.1 Main Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
5.4.2 Advanced Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
5.4.3 Chipset Menu. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
5.4.4 Boot Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
5.4.5 Security Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
5.4.6 Save & Exit Menu. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
5.5 POST Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
5.5.1 Status Code Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
5.5.2 Standard Status Codes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
5.5.2.1 SEC Status Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
5.5.2.2 PEI Status Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
5.5.2.3 PEI Beep Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
5.5.2.4 DXE Status Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
5.5.2.5 DXE Beep Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
5.5.2.6 CPU Exception Status Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
5.5.2.7 ASL Status Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
5.5.2.8 OEM-Reserved Status Code Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .103
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6 Operating System and Driver Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .105
6.1 Supported Operating System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
6.2 Supported Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
A Related Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .107
A.1 Artesyn Embedded Technologies - Embedded Computing Documentation . . . . . . . . . . . . . . . 107
A.2 Related Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
Safety Notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .109
Sicherheitshinweise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
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List of Tables
Table 1-1 Single Core Processor Board Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 1-2 Dual Core Processor Board Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 1-3 Standard Compliances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 1-4 Mechanical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 1-5 Available Board Variants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 1-6 Available Board Accessories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 2-1 Environmental Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 2-2 Critical Temperature Spots . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Table 3-1 MITX-430/MITX440-DVI-2E Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Table 3-2 Clear CMOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Table 3-3 LVDS Header Pin Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Table 3-4 LVDS Backlight Header PIn Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Table 3-5 LVDS Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Table 3-6 MINI IDE Header PIN Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Table 3-7 USB Flash Header Pin Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Table 3-8 USB Header Pin Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Table 3-9 ELO Touch Screen Header Pin Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Table 3-10 GPIO Header Pin Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Table 3-11 COM3, COM6 Header Pin Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Table 3-12 RS-232/422/485 Header Pin Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Table 3-13 RS-232/422/485 Jumper Selection (P28) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Table 3-14 COM4, COM5 Header Pin Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Table 3-15 COM4, COM5 Pin9 Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Table 3-16 TPM Header Pin Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Table 3-17 LPT Header Pin Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Table 3-18 Front Panel Header Pin Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Table 3-19 BIOS Program Header Pin Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Table 3-20 Smart Fan Header Pin Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Table 3-21 MINI PCIE Wireless LAN LED Header Pin Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Table 3-22 Case Open Header Pin Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Table 4-1 I2C Device Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Table 4-2 PCI-E Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Table 4-3 ICH8-M GPIO Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Table 5-1 Setup Utility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Table 5-2 Main Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Table 5-3 Legacy OPROM Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
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List of Tables
Table 5-4 Advanced Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Table 5-5 ACPI Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Table 5-6 Trusted Computing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Table 5-7 S5 RTC Wake Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .77
Table 5-8 CPU Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .77
Table 5-9 IDE Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Table 5-10 IGD-LCD Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Table 5-11 USB Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .80
Table 5-12 EMC2103 H/W Monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Table 5-13 Super IO Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Table 5-14 Serial Port 1 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Table 5-15 Serial Port 2 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Table 5-16 Serial Port 3 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Table 5-17 Serial Port 4 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Table 5-18 Serial Port 5 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Table 5-19 Serial Port 6 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Table 5-20 Parallel Port Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Table 5-21 Watchdog Timer Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Table 5-22 W83627UHG H/W Monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Table 5-23 Serial Port Console Redirection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Table 5-24 COM1 and COM2 Console Redirection Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Table 5-25 Chipset Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Table 5-26 Host Bridge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Table 5-27 South Bridge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Table 5-28 Boot Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Table 5-29 Security Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Table 5-30 Save & Exit Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Table 5-31 Status Code Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
Table 5-32 SEC Status Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Table 5-33 PEI Status Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .94
Table 5-34 PEI Beep Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
Table 5-35 DXE Status Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Table 5-36 DXE Beep Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .101
Table 5-37 CPU Exception Status Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .101
Table 5-38 ASL Status Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .102
Table 5-39 OEM-Reserved Status Code Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
8
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List of Tables
Table 6-1 Supported Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
Table A-1 Artesyn Embedded Technologies - Embedded Computing Publications . . . . . . . . . . . . . 107
Table A-2 Related Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
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List of Tables
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List of Figures
Figure 1-1 Declaration of Conformity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 1-2 Single Core Processor Board - Serial Number Location . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 1-3 Dual Core Processor Board -Serial Number Location . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 2-1 Board Thermal Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 3-1 Single Core Motherboard Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Figure 3-2 Dual Core Motherboard Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Figure 4-1 Motherboard Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Figure 4-2 Board I2C Device Connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Figure 4-3 PCI-E Connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Figure 4-4 USB Ports Connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
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List of Figures
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About this Manual
Overview of Contents
This manual is divided into the following chapters and appendix.
Chapter 1, Introduction, on page 19, describes the features of single core and dual core
processors, standard compliances, mechanical data, ordering information, and product
identification.
Chapter 2, Hardware Preparation and Installation, on page 29, describes the environmental
and power requirements, installation prerequisites, processor cooler and memory module
installation and removal procedures.
Chapter 3, Controls, LEDs, and Connectors, on page 43, describes the LEDs and connectors
used on the motherboard.
Chapter 4, Functional Description, on page 57, describes the functionalities provided on the
motherboard.
Chapter 5, Operation, on page 73, describes the boot process, setup utility, and POST
codes.
Chapter 6, Operating System and Driver Support, on page 105, describes the supported
Operating Systems and Drivers.
Appendix A, Related Documentation, on page 107, lists the related documents.
Abbreviations
This document uses the following abbreviations:
Abbreviation Definition
ACPI Advanced Configuration and Power Interface
AHCI Advanced Host Controller Interface
AMI American Megatrends Inc
AMT Active Management Technology
AP Application Processor
APIC Advanced Programmable Interrupt Controller
ASL ACPI Source Language
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About this Manual
Abbreviation Definition
ATA Advanced Technology Attachment
ATAPI AT Attachment Packet Interface
ATX Advance Technology Extended
BDS Boot Device Selection
BIOS Basic Input-Output System
BSP Boot Strap Processor
CMOS Complementary Metal Oxide Semiconductor
COM Communications
CRT Cathode Ray Tube
CSM Compatibility Support Module
CTS Clear To Send
DC Dual Core/Direct Current
About this Manual
14
DCD Data Carrier Detect
DMA Direct Memory Access
DMI Direct Media Interface
DSR Device Status Register
DTR Data Terminal Ready
DVI Digital Visual Interface
DVMT Dynamic Video Memory Technology
DXE Driver Execution Environment
ECC Error Checking and Correcting
ECP Extended Capabilities Parallel Port
EFI Extensible Firmware Interface
EHCI Enhanced Host Controller Interface
EMC Electromagnetic Magnetic Compatibility
EMS Emergency Management Services
EPP Enhanced Parallel Port
ESD Electro-Static Discharge
MITX-430/MITX-440-DVI-2E Installation and Use (6806800K37D)
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Abbreviation Definition
GBE Gigabit Ethernet
GLCI Gigabit LAN Connect Interface
GPI General Purpose Input
GPIO General Purpose Input Output
GPO General Purpose Output
GPU Graphics Processing Unit
IDE Integrated Device Electronics
IGD Internal Graphics Device
IPL Initial Program Loader
LFP Local Flat Panel
LPC Low Pin Count
About this Manual
LPT Line Printer Terminal
LVDS Low Voltage Differential Signaling
MAC Medium Access Control
MSR Mode Specific Register
NMI Non-Maskable Interrupt
NVRAM Non-Volatile RAM
OEM Original Equipment Manufacturer
PATA Parallel AT Attachment
PCB Printed Circuit Board
PCI Peripheral Component Interface
PCIE Peripheral Component Interface Express
PEG PCI Express Graphics
PEI Pre-EFI Initialization
PIC Programmable Interrupt Controller
PIO Programmed Input Output
POST Power on Self Test
PPI PEIM-to-PEIM Interface
MITX-430/MITX-440-DVI-2E Installation and Use (6806800K37D)
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About this Manual
Abbreviation Definition
PWM Pulse Width Modulation
PXE Preboot Execution Environment
RGB Red,Green,Blue
RTC Real Time Clock
RTS Request To Send
RXD Receive X Data
SATA Serial AT Attachment
SC Single Core
SCSI Small Computer System Interface
SIMD Single Instruction Multiple Data
SIO Super Input/Output
SMBus System Management Bus
About this Manual
16
SMM System Management Mode
SPD Serial Presence Detect
SPI Serial Peripheral Interface
SPP Standard Parallel Port
TACH Tachometer
TDP Thermal Dissipation Power
TPM Trusted Platform Module
TXD Transmit X data
UEFI Unified Extensible Firmware Interface
UHCI Universal Host Controller Interface
VBIOS Video BIOS
VCC Voltage Current Circuit
VCORE Core Voltage
VGA Video Graphics Adapter
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Abbreviation Definition
WDT Watch Dog Timer
WP Write Protect
XD Execute Disable
XDP Extended Debug Port
Conventions
The following table describes the conventions used throughout this manual.
Notation Description
0x00000000 Typical notation for hexadecimal numbers (digits are
About this Manual
0 through F), for example used for addresses and
offsets
0b0000 Same for binary numbers (digits are 0 and 1)
bold Used to emphasize a word
Screen Used for on-screen output and code related elements
or commands in body text
Courier + Bold Used to characterize user input and to separate it
from system output
Reference Used for references and for table and figure
descriptions
File > Exit Notation for selecting a submenu
<text> Notation for variables and keys
[text] Notation for software buttons to click on the screen
and parameter description
... Repeated item for example node 1, node 2, ..., node
12
.
.
.
.. Ranges, for example: 0..4 means one of the integers
Omission of information from example/command
that is not necessary at the time being
0,1,2,3, and 4 (used in registers)
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Page 18
About this Manual
Notation Description
| Logical OR
About this Manual
Indicates a hazardous situation which, if not avoided,
could result in death or serious injury
Indicates a hazardous situation which, if not avoided,
may result in minor or moderate injury
Indicates a property damage message
Summary of Changes
This is the initial version of the manual.
Part Number Publication Date Description
6806800K37A March 2010 GA version
6806800K37B August 2010 Updated the manual with new marketing numbers MITX-
6806800K37C May 2013 Updated Connectors on page 45, Safety Notes on page 109,
6806800K37D August 2014 Re-branded to Artesyn template.
No danger encountered. Pay attention to important
information
430/MITX-440-DVI-2E.
Sicherheitshinweise on page 113.
Added Declaration of Conformity on page26.
18
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Introduction
1.1 Features
The MITX-430 is a Mini-ITX motherboard based on the Intel® Atom™ D410 single-core or
D510 dual-core processor that offers improved processing and graphics performance over
existing Mini-ITX Intel Atom based products.
It is designed to allow easy, cost-effective replacement of the motherboard in a production
environment. There are two versions of MITX-430:
MITX-430 - Single core processor for low power consumption.
MITX-440-DVI-2E - Dual core processor with some additional features for higher
performance, which still retains the low power consumption.
MITX-430 uses the latest generation Unified Extensible Firmware Interface (UEFI) Basic Input
Output System (BIOS) from American Megatrends Inc (AMI). This manages the interaction
between the low-level hardware interfaces and the OS level in an efficient manner that
provides superior reliability.
Chapter 1
The following sections describe some of the key features of MITX-430 single core and MITX440-DVI-2E dual core processors.
1.1.1 MITX-430
The following table lists the features of the single core processor board:
Table 1-1 Single Core Processor Board Features
Function Features
CPU (uFCBGA) Intel Pineview-D SC Processor (D410)
Chipset Intel ICH8-M
Frequency: Pineview-D SC 1.66GHz with TDP less than 10W
Supports up to 4GB DDR2 SO-DIMM
Supports 667MHz
Integrated Graphic Process Unit
3rd generation graphics core, 400MHz render clock frequency
Supports one VGA
Supports one LVDS
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Introduction
Table 1-1 Single Core Processor Board Features (continued)
Function Features
System BIOS feature One piece 4MB SPI boot device
Super I/O W83627UHG-LF
RTC Integrated in ICH8-M
Audio Audio on board (ALC888-GR-LF)
LAN 10/100/1000M Ethernet PHY, Intel WG82567V
USB Supports 10 USB2.0 high speed ports (four rear, five on header, and one mini
Expansion slots One PCI-E x1 slot
Rear: Line-in, Line out, MIC-in
PCI-Express)
One Mini-PCIE card slot
One standard USB flash disk (2x5Pin, 2.54mmPitch)
Rear panel ports One 2xUSB2.0 ports stack one LAN (RJ-45)
One 2xUSB2.0 stack connector
One vertical triple stack (MIC-in, Line-in, Line-out)
One stack PS/2 port
One e-SATA port
One VGA DSUB-15
One stacked dual DSUB-9 serial port
Power connectors 24-pin ATX power connector
Fan Supports two smart fans (4 Pin), one for CPU and one for System
Serial ATA supports one e-SATA and two SATA ports
PATA Supports one Mini-IDE (44Pin)
Hardware monitor Voltage, temperature, and fan speed control
Watchdog Supports 1-255s or 1-255m watchdog
Trusted Platform
Module
Power management ACPI1.0b compatible
COM Port Supports 6 COM ports (two to DSUB-9 in rear I/O region, one
Supports one TPM connector (2x10, 2.54mm Pin header)
Supports ATX power supply
RS-232/422/485 port, two Power COM, and one to 2x5Pin header)
20
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Table 1-1 Single Core Processor Board Features (continued)
Function Features
LPT Port Supports one parallel port (2x13Pin Header)
Front panel 2x5Pin header, supports power button, reset button, power LED, HDD LED,
GPIO Supports 4 GPI and 4 GPO
Board size Mini-ITX 170mm x 170mm
1.1.2 MITX-440-DVI-2E
The following table lists the features of the dual core processor board:
Introduction
and standby LED
6 Layers PCB
Table 1-2 Dual Core Processor Board Features
Function Features
CPU (uFCBGA) Intel Pineview-D DC Processor (D510)
Frequency: Pineview-D DC 1.66GHz with TDP less than 13W
Supports up to 4GB DDR2 SO-DIMM
Supports 667MHz
Integrated Graphic Process Unit
3rd generation graphics core, 400MHz render clock frequency
Supports one VGA
Supports one LVDS
Supports one DVI (derived from LVDS)
Chipset Intel ICH8-M
System BIOS feature One piece 4MB SPI boot device
Super I/O W83627UHG-LF
RTC Integrated in ICH8-M
Audio Audio on board (ALC888-GR-LF)
Rear: Line-in, Line out, MIC-in
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Introduction
Table 1-2 Dual Core Processor Board Features (continued)
Function Features
LAN 10/100/1000M Ethernet PHY, Intel WG82567V
USB Supports 10 USB2.0 high speed ports (four rear, five on header, and one mini
Expansion slots One PCI-E x1 slot
Rear panel ports Two 2xUSB2.0 ports stack one LAN (RJ-45)
10/100/1000M Ethernet Controller, Intel WG82574L
PCI-Express)
One Mini-PCIE card slot
One standard USB flash disk (2x5Pin, 2.54mmPitch)
One vertical triple stack (MIC-in, Line-in, Line-out)
One stack PS/2 port
One e-SATA port
One VGA DSUB-15 stack DVI port
One stacked dual DSUB-9 serial port
22
Power connectors 24-pin ATX power connector
Fan Supports two smart fans (4 Pin), one for CPU and one for the system
Serial ATA supports one e-SATA and two SATA ports
PATA Support one Mini-IDE (44Pin)
Hardware monitor Voltage, temperature, and fan speed control
Watchdog Supports 1-255s or 1-255m watchdog
Trusted Platform
Module
Power management ACPI1.0b compatible
COM Port Supports 6 COM ports (two to DSUB-9 in rear I/O region, one
LPT Port Supports one parallel port (2x13Pin Header)
Front panel 2x5Pin Header, supports power button, reset button, power LED, HDD LED,
GPIO Supports 4 GPI and 4 GPO
Supports one TPM connector (2x10, 2.54mm Pin header)
Supports ATX power supply
RS-232/422/485 port, two power COM, and one to 2x5Pin header)
and standby LED
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Table 1-2 Dual Core Processor Board Features (continued)
Function Features
Board size Mini-ITX 170mm x 170mm
6 Layers PCB
1.2 Standard Compliances
MITX-430/MITX-440-DVI-2E meets the following standards.
Table 1-3 Standard Compliances
Standard Description
IEC 60950-1 General requirements of Safety-Part 1 of Information
Introduction
Technology Equipment.
EN55024 (EU) Limits and methods of measurements of immunity
characteristics of Information Technology Equipment.
FCC 47 CFR Part 15 Subpart B (US), Class B Federal Communications Commission Radio Frequency
Devices class B level requirements.
EN55022 Class B (EU) Limits and methods of measurements of radio
disturbance characteristics of Information Technology
Equipment.
AS/NZS CISPR 22 Class B (Australia/New
Zealand)
VCCI Class B (Japan) Voluntary Control Council for Interference by
Limits and methods of measurement of radio
disturbance characteristics of Information Technology
Equipment.
Information Technology Equipment.
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Introduction
Figure 1-1 Declaration of Conformity
E
C Declaration of Conformity
According to EN 17050-1:2004
Manufacturer’s Name:
Manufacturer’s Address:
Declares that the following product, in accordance with the requirements of 2004/108/EC, 2006/95/EC,
2011/65/EU and their amending directives,
Product:
Model Name/Number:
has been designed and manufactured to the following specifications:
EN55022: 2006 + (A1: 2007) Class B
EN55024: 1998 + (A1; 2001 + A2: 2003)
IEC 60950-1:2005 (2nd Edition), EN60950-1: 2005 2nd Edition + A1: 2009
2011/65/EU RoHS Directive
As manufacturer we hereby declare that the product named above has been designed to comply with the relevant sections of the above referenced specifications. This product complies with the essential health and safety
requirements of the above specified directives. We have an internal production control system that ensures
compliance between the manufactured products and the technical documentation.
Artesyn Embedded Technologies
Embedded Computing
Zhongshan General Carton Box Factory Co. Ltd. No 62, Qi
Guan Road West, Shiqi District, 528400 Zhongshan City
Guangdong, PRC
Computer Board
MITX-430, MITX-440-DVI-2E
24
___________________________________________________ ___
08/26/2014
______
Tom Tuttle, Manager, Product Testing Services Date (MM/DD/YYYY)
MITX-430/MITX-440-DVI-2E Installation and Use (6806800K37D)
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1.3 Mechanical Data
The following table provides details about the dimensions and weight of the board:
Table 1-4 Mechanical Data
Feature Value
Dimensions 170mm x 170mm
Weight Dual core board: 353g
1.4 Ordering Information
When ordering board variants or board accessories, use the order numbers given in the
following sections.
Introduction
Single core board: 325g
1.4.1 Supported Board Models
The following board models are supported:
Table 1-5 Available Board Variants
Order Number Description
MITX-430 Single-core Intel Atom based Mini-ITX board with standard I/O.
MITX-440-DVI-2E Dual-core Intel Atom based Mini-ITX with standard and optional I/O.
1.4.2 Board Accessories
The following accessories are shipped with the board:
Table 1-6 Available Board Accessories
Order Number Description
MITX-430 Two COM cables, one SATA power cable, one SATA data cable
MITX-440-DVI-2E Two COM cables, one SATA power cable, one SATA data cable
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Introduction
Table 1-6 Available Board Accessories (continued)
Order Number Description
MITX-430 One IO shield
MITX-440-DVI-2E One IO shield
1.5 Product Identification
The following graphic shows the location of the serial number label on the board.
Figure 1-2 Single Core Processor Board - Serial Number Location
26
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Figure 1-3 Dual Core Processor Board -Serial Number Location
Introduction
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Introduction
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Hardware Preparation and Installation
2.1 Environmental and Power Requirements
The following environmental and power requirements are applicable to the motherboard.
2.1.1 Environmental Requirements
You must make sure that the motherboard, when operated in your particular system
configuration, meets the environmental requirements specified below.
Operating temperatures refer to the temperature of the air circulating around the
motherboard and not to the component temperature.
Chapter 2
Product Damage
High humidity and condensation on surfaces cause short circuits.
Do not operate the product outside the specified environmental limits. Make sure the
product is completely dry and there is no moisture on any surface before applying power.
Overheating and Damage of the Product
Operating the product without forced air cooling can lead to overheating and thus damage
of the product.
When operating the product, make sure that forced air cooling is available in the shelf.
Table 2-1 Environmental Requirements
Requirement Operating Non-operating
o
Temperature 0
Humidity 10% to 90% non-condensing 5% to 95% non condensing
Vibration 0.01g^2/Hz at 5-500Hz random
MITX-430/MITX-440-DVI-2E Installation and Use (6806800K37D)
C to 55oC with CPU cooler -40oC to 85oC
vibration
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Hardware Preparation and Installation
Table 2-1 Environmental Requirements (continued)
Requirement Operating Non-operating
Shock 20G peak (half sine)
Altitude -60 to 4000 m ASL
2.1.2 Thermal Requirements
Table 2-2 Critical Temperature Spots
Item Thermal Dissipation Power (W) Maximum Allowable Temperature (0C)
11ms
CPU D510 <= 13W
D410 <= 10W
ICH8-M 3W 92 (Tc)
100 (Tj)
System Overheating
Cooling Vents
Improper cooling can lead to system damage and can void the manufacturer's warranty. To
ensure proper cooling and undisturbed airflow through the system do not obstruct the
ventilation openings of the system. Make sure that the fresh air supply is not mixed with hot
exhaust from other devices.
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Hardware Preparation and Installation
Personal Injury
During operation, hot surfaces may be present on the heat sinks and the components of the
product. To prevent injury from hot surface do not touch any of the exposed components
or heatsinks on the product. Use the handle and face plate, where applicable, or the board
edge when removing the product from the enclosure.
2.1.3 Power Requirements (Single Core Processor Board)
The power consumption is tested under the following conditions with:
1*2G memory
1*1G memory
One 2.5" ATA HDD
One infonion TPM module
One 3.5" SATA HDD
One SATA CD-ROM
One USB keyboard
One USB mouse
One PS/2 keyboard
One PS/2 mouse
2.1.3.1 Full Loading Running Burn-in Test
VGA display only
12V 5V 3.3V Total
Current(A) 0.30 1.8 0.3
Power(W) 3.6 9 0.99 13.59
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Hardware Preparation and Installation
VGA + LVDS dual display
12V 5V 3.3V Total
Current(A) 0.88 1.8 0.67
Power(W) 10.56 9 2.21 21.77
Tested with 12.1" LCD Panel (P/N: G121X1-L01). The LCD inverter uses 12V.
The test devices do not include PCIE x1 add-in card and Mini-PCIE card. The two SATA
devices are powered externally. If you use all the devices and power internally, then you
must add all the power consumption.
It is recommended to add more buffer while designing the ATX power supply.
2.1.3.2 Idle Mode Power Consumption
32
VGA + LVDS dual display
12V 5V 3.3V Total
Current(A) 0.78 1.7 0.73
Power(W) 9.76 8.5 2.4 20.66
Tested with 12.1" LCD Panel (P/N: G121X1-L01). The LCD inverter uses 12V.
The test devices do not include PCIE x1 add-in card and Mini-PCIE card. The two SATA
devices are powered externally. If you use all the devices and power internally, then you
must add all the power consumption.
It is recommended to add more buffer while designing the ATX power supply.
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2.1.3.3 Standby Mode Power Consumption
2.1.3.3.1 S3 Sleep Mode
5V standby
Current(A) 0.3
Power(W) 1.5
2.1.3.3.2 S5 Sleep mode
Hardware Preparation and Installation
5V standby
Current(A) 0.23
Power(W) 1.15
2.1.4 Power Requirements (Dual Core Processor Board)
The power consumption is tested under the following conditions with:
2*2G SO-DIMM
One 2.5” ATA HDD
One infonion TPM module
One USB keyboard
One USB mouse
One PS/2 keyboard
One PS/2 mouse
One 3.5” SATA HDD
One 3.5” SATA CD-ROM
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Hardware Preparation and Installation
2.1.4.1 Full Loading Running Burn-in Test
VGA and LVDS dual display, without DVI display.
12V 5V 3.3V Total (W)
Current (A) 1.18 2.25 1
Power (W) 14.16 11.25 3.3 28.71
Source ATX ATX ATX
Tested with 12.1" LCD Panel (P/N: G121X1-L01). The LCD inverter uses 12V.
The test devices do not include PCIE x1 add-in card and Mini-PCIE card. The two SATA
devices are powered externally. If you use all the devices and power internally, then you
must add all the power consumption.
It is recommended to add more buffer while designing the ATX power supply.
2.1.4.2 Idle Mode Power Consumption
VGA and LVDS dual display, without DVI display, tested 1minute after logging in Windows XP.
12V 5V 3.3V Total (W)
Current (A) 0.96 2.03 1.1
Power (W) 11.52 10.15 3.63 25.3
Source ATX ATX ATX
Tested with 12.1" LCD Panel (P/N: G121X1-L01). The LCD inverter uses 12V.
The test devices do not include PCIE x1 add-in card and Mini-PCIE card. The two SATA
devices are powered externally. If you use all the devices and power internally, then you
must add all the power consumption.
It is recommended to add more buffer while designing the ATX power supply.
34
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2.1.4.3 Standby Mode Power Consumption
2.1.4.3.1 S3 state
5V standby
Current(A) 0.19
Power(W) 0.95
Source ATX
2.1.4.3.2 S5 State
Hardware Preparation and Installation
5V standby
Current(A) 0.13A
Power(W) 0.65
Source ATX
2.2 Board Thermal Management and Placement
2.2.1 Board Thermal Management
The motherboard provides some thermal management strategy, including CPU junction
temperature monitor. It can take corresponding action to protect system at catastrophic
overheating.
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Hardware Preparation and Installation
Figure 2-1 shows the thermal management diagram.
Figure 2-1 Board Thermal Management
36
Two PNP thermal transistors are integrated in Pineview-D processor. It is used as a diode and
connects to an external digital thermal sensor EMC2103. CPU receives the data of junction
temperature through SMBus. Note that, this is an inaccurate value and the temperature offset
must be taken into account by reading MSR of CPU.
When the CPU junction temperature is more than 125C, CPU asserts the THERMTRIP# signal,
and then stops all bus activities, and the core power must be shut down in the specified time.
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Hardware Preparation and Installation
2.3 Unpacking and Inspecting the Board
Damage of Circuits
Electrostatic discharge and incorrect installation and removal of the product can damage
circuits or shorten their life.
Before touching the product make sure that your are working in an ESD-safe environment
or wear an ESD wrist strap or ESD shoes. Hold the product by its edges and do not touch any
components or circuits.
Shipment Inspection
To inspect the shipment, follow the steps mentioned below:
1. Verify that you have received all items of your shipment:
Quick Start Guide and Safety Notes summary
Motherboard
Two COM cables
One SATA power cable
One SATA data cable
Driver CD
I/O Shield
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Hardware Preparation and Installation
2. Check for damage and report any damage or differences to the customer service.
3. Remove the desiccant bag shipped together with the product.
Environmental Damage
Improper disposing of used products may harm the environment. Always dispose of used
products according to your country’s legislation and manufacturer’s instructions.
2.4 Preparing the Installation Environment
Before you install or replace components, pay attention to the following:
Wear an ESD-preventive wrist strap to prevent the static electricity from damaging the
device.
Keep the area where the components reside clean and keep the components away from
heat-generating devices, such as radiator.
Ensure that your sleeves are tightened or rolled up above the elbow. For safety purposes,
it is not recommended to wear jewelry, watch, glasses with metal frame, or clothes with
metal buttons.
Do not exert too much force, or insert or remove the components forcibly. Avoid damage
to the components or plug-ins.
Confirm the feasibility of the operation
The spare parts of the components to be installed or replaced are available in the
equipment warehouse. When the available spare parts are lacking, contact Artesyn
Embedded Technologies. For details on how to get help from Artesyn Embedded
Technologies, visit http://www.artesyn.com/computing/.
Make sure that the new components are in good condition, without defects such as
oxidation, chemical corrosion, missing components, or transportation damage.
Check the environment
Make sure that the power supply, temperature, and humidity meets the operating
requirements for the motherboard and its components. For details, refer to the respective
system documentation.
Prepare the parts and the tools
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Hardware Preparation and Installation
Prepare the components to be installed or replaced.
When you hold or transport the components, use the special antistatic package.
Prepare the cross screwdriver, screws, plastic supports, cooling gel, and ESD-preventive
wrist strap.
Confirm installation or changing position
Confirm the position where the MITX-430/MITX-440-DVI-2E will be installed.
Others
If a serious problem occurs and cannot be solved when you install or replace the
component, contact Artesyn Embedded Technologies for technical support.
2.5 Processor Cooler Installation and Removal
Installing the Processor Cooler
1. Wear the ESD-preventive wrist strap.
2. Tear down the thermal pad resistant paper from back of the cooler.
3. Adjust the optimal installation direction for cooler. Place the cooler over the processor and
align the two push-pins to the holes on the motherboard.
4. Push the two pins down and make sure that each of the push-pin is inserted correctly into
the hole and properly locked on the motherboard.
5. Connect the fan to its connector on the motherboard.
Removing the Processor Cooler
1. Wear the ESD-preventive wrist strap.
2. Disconnect the fan from the motherboard.
3. Turn over the motherboard to backside. Locate the cooler pins, pinch the ends of the push
tabs and push them out of the hole.
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Hardware Preparation and Installation
2.6 Memory Module Installation and Removal
When you install or replace the module, pay attention to the following:
The MITX-430/MITX-440-DVI-2E supports single channel DDR2 667MHz, two SO-DIMM
slots.
The SO-DIMMs must have the same sizes, frequencies, types and technologies, physical
designs, and manufacturers.
SO-DIMMs must be of single or dual rank type. Quad rank type modules are not
supported.
Pin Damage
Forcing the module into the system may damage connector pins. If the module hangs
during insertion, pull it out and insert it again.
40
Installing Memory Module
1. Wear the ESD-preventive wrist strap.
2. Lay the MITX-430/MITX-440-DVI-2E, where the SO-DIMM is to be installed on the
antistatic desktop.
3. Take the SO-DIMM out of the antistatic package, holding it by the edges.
4. Line up the notch located on the row of the metal pins at the bottom of the module with
the key in the SO-DIMM slot on the motherboard.
5. Insert the SO-DIMM in a slantwise position or at a 45o angle to slide the module into place.
6. Press down on the module against the motherboard until you hear it snap into place. The
modules must be properly aligned before you press it down into its final position. Remove
the module from the socket and reinstall it if you cannot press it down into its final
position.
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Hardware Preparation and Installation
Removing Memory Module
1. Wear the ESD-preventive wrist strap.
2. Release the module from the slot by pushing the spring latches on either side of the
module outward.
3. Lift the module from the motherboard.
Damage of the Product and Additional Devices and Modules
Incorrect installation or removal of additional devices or modules damages the product or
the additional devices or modules.
Before installing or removing additional devices or modules, read the respective
documentation and use appropriate tools.
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Hardware Preparation and Installation
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Controls, LEDs, and Connectors
3.1 Board Layout
Figure 3-1shows the location of the major components on the motherboard.
Figure 3-1 Single Core Motherboard Components
Chapter 3
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Controls, LEDs, and Connectors
Figure 3-2 Dual Core Motherboard Components
44
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3.2 Connectors
The following table lists the connectors and headers located on the MITX-430/MITX-440-DVI2E motherboard along with a link to each connectors associated pinout definition:
Table 3-1 MITX-430/MITX440-DVI-2E Connectors
Reference Designator Function Pinout Definition
P3 Clear CMOS See, Clear CMOS on page 46.
J5 LVDS Header See, LVDS Header Pin Definition on page 46.
P23 LVDS Backlight Header See, LVDS Backlight Header PIn Definition on
P5 LVDS Power See, LVDS Power on page 47.
J8 MINI IDE Header See, MINI IDE Header PIN Definition on page 48.
P10 USB Flash Header See, USB Flash Header Pin Definition on page 49.
Controls, LEDs, and Connectors
page 47.
P12 USB Header See, USB Header Pin Definition on page 49.
P6 ELO Touch Screen Header See, ELO Touch Screen Header Pin Definition on
page 49.
P4 GPIO Header See, GPIO Header Pin Definition on page 50.
P9, P27 COM Header See, COM3, COM6 Header Pin Definition on page
50.
P18 RS-232/422/485 See, RS-232/422/485 Header Pin Definition on
page 51 and RS-232/422/485 Jumper Selection
(P28) on page 51.
P8, P26 Power COM See, COM4, COM5 Header Pin Definition on page
51 and COM4, COM5 Pin9 Selection on page 52.
P2 TPM Header See, TPM Header Pin Definition on page 52.
P11 LPT Header See, LPT Header Pin Definition on page 53.
P15 Front Panel Header See, Front Panel Header Pin Definition on page
53.
P16 BIOS Program Header See, BIOS Program Header Pin Definition on page
54.
P1, P13 Fan Header See, Smart Fan Header Pin Definition on page 54
.
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Controls, LEDs, and Connectors
Table 3-1 MITX-430/MITX440-DVI-2E Connectors
Reference Designator Function Pinout Definition
P14 MINI PCIE LED See, MINI PCIE Wireless LAN LED Header Pin
P25 Case Open Header See, Case Open Header Pin Definition on page 55.
The following subsections describe the connectors used on the board.
3.2.1 Clear CMOS (P3)
Table 3-2 Clear CMOS
Header Mode
Definition on page 55.
1-2 short Clear CMOS
3.2.2 LVDS Header (J5)
Table 3-3 LVDS Header Pin Definition
PIN PIN Name PIN PIN Name
1 VCC_LVDS 2 VCC_LVDS
3 GND 4 GND
5 LVDS_A_A0_P 6 LVDS_A_CLK_P
7 LVDS_A_A0_N 8 LVDS_A_CLK_N
9 GND 10 GND
11 LVDS_A_A1_P 12 LDDC_CLK
13 LVDS_A_A1_N 14 LDDC_DATA
15 GND 16 GND
17 LVDS_A_A2_P 18 NC
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Table 3-3 LVDS Header Pin Definition (continued)
PIN PIN Name PIN PIN Name
19 LVDS_A_A2_N 20 NC
3.2.3 LVDS Backlight Header (P23)
Table 3-4 LVDS Backlight Header PIn Definition
PIN PIN Name
1 VCC12V
2 LVDS_BKLT_EN
3GND
Controls, LEDs, and Connectors
4 LCD_BKL_ADJ
5 VCC5V
3.2.4 LVDS Power (P5)
Header P5 selects the power of LCD Panel.
Table 3-5 LVDS Power
HEADER MODE
1-2 short 3.3V (default)
2-3 short 5V
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3.2.5 MINI IDE Header (J8)
Table 3-6 MINI IDE Header PIN Definition
PIN PIN Name PIN PIN Name
1 IDE_RST_R_N 2 GND
3 IDE_D7 4 IDE_D8
5 IDE_D6 6 IDE_D9
7 IDE_D5 8 IDE_D10
9 IDE_D4 10 IDE_D11
11 IDE_D3 12 IDE_D12
13 IDE_D2 14 IDE_D13
15 IDE_D1 16 IDE_D14
17 IDE_D0 18 IDE_D15
19 GND 20 NC
21 IDE_REQ 22 GND
23 IDE_IOW_N 24 GND
25 IDE_IOR_N 26 GND
27 IDE_IORDY 28 IDE_SEL
29 IDE_ACK_N 30 GND
31 IDE_IRQ 32 NC
33 IDE_A1 34 IDE_DET
35 IDE_A0 36 IDE_A2
37 IDE_CS1_N 38 IDE_CS3_N
39 IDE_ACT_N 40 GND
41 VCC5V 42 VCC5V
43 GND 44 GND
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3.2.6 USB Flash Header (P10)
Table 3-7 USB Flash Header Pin Definition
PIN PIN Name PIN PIN Name
1 VCC5V 2 VCC5V
3 USB0_N 4 USB1_N
5 USB0_P 6 USB1_P
7 GND 8 GND
9 KEY 10 NC
3.2.7 USB Header (P12)
Controls, LEDs, and Connectors
Table 3-8 USB Header Pin Definition
PIN PIN Name PIN PIN Name
1 VCC5V 2 VCC5V
3 USB0_N 4 USB1_N
5 USB0_P 6 USB1_P
7 GND 8 GND
9 KEY 10 GND
3.2.8 ELO Touch Screen Header (P6)
Table 3-9 ELO Touch Screen Header Pin Definition
PIN PIN Name PIN PIN Name
1 VCC5V 2 VCC5V
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Controls, LEDs, and Connectors
Table 3-9 ELO Touch Screen Header Pin Definition (continued)
PIN PIN Name PIN PIN Name
3 USB_N 4 GND
5 USB_P 6 NC
7GND8 KEY
3.2.9 GPIO Header (P4)
Table 3-10 GPIO Header Pin Definition
PIN PIN Name PIN PIN Name
1 GPO0 2 GPI0
3 GPO1 4 GPI1
5 GPO2 6 GPI2
7 GPO3 8 GPI3
9 VCC5DUAL 10 GND
3.2.10 COM Header (P9, P27)
Table 3-11 COM3, COM6 Header Pin Definition
PIN PIN Name PIN PIN Name
1 DCD 2 RXD
3 TXD 4 DTR
5 GND 6 DSR
7 RTS 8 CTS
9RING10KEY
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3.2.11 RS-232/422/485 (P18)
Table 3-12 RS-232/422/485 Header Pin Definition
PIN PIN Name
1 RS422TX_N
2 RS422TX_P
3 RS422RX_485DAT_P
4 RS422RX_485DAT_N
5GND
Table 3-13 RS-232/422/485 Jumper Selection (P28)
Controls, LEDs, and Connectors
PIN PIN Name
1-2 short RS-232
2-3 short RS422/RS-485
3.2.12 Power COM (P8, P26)
Table 3-14 COM4, COM5 Header Pin Definition
PIN PIN Name PIN PIN Name
1 DCD 2 RXD
3 TXD 4 DTR
5 GND 6 DSR
7 RTS 8 CTS
9 Pin9 Select 10 KEY
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Controls, LEDs, and Connectors
Table 3-15 COM4, COM5 Pin9 Selection
PIN PIN Name
P19 1-2 short COM4 Pin9 is Ring
P19 2-3 short
P20 1-2 short
P19 2-3 short
P20 2-3 short
P21 1-2 short COM5 Pin9 is Ring
P21 2-3 short
P22 1-2 short
P21 2-3 short
P22 2-3 short
3.2.13 TPM Header (P2)
Table 3-16 TPM Header Pin Definition
PIN PIN Name PIN PIN Name
1 PCI_CLK 2 GND
3 LPC_FRAME 4 KEY
5 TPM_RST# 6 VCC5V
COM4 Pin9 is 5V
COM4 Pin9 is 12V
COM5 Pin9 is 5V
COM5 Pin9 is 12V
52
7 LPC_AD3 8 LPC_AD2
9 VCC3V3 10 LPC_AD1
11 LPC_AD0 12 GND
13 SMB_CLK 14 SMB_DAT
15 VCC3V3DUAL 16 LPC_SERIRQ#
17 GND 18 CLKRUN#
19 TPM_LPC_PD# 20 TPM_LDRQ#
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3.2.14 LPT Header (P11)
Table 3-17 LPT Header Pin Definition
PIN PIN Name PIN PIN Name
1 STB# 2 PD0
3 PD1 4 PD2
5 PD3 6 PD4
7 PD5 8 PD6
9 PD7 10 ACK#
11 BUSY# 12 PE#
13 SLCT# 14 AFD#
Controls, LEDs, and Connectors
15 ERR# 16 INIT#
17 SLIN# 18 GND
19 GND 20 GND
21 GND 22 GND
23 GND 24 GND
25 GND 26 KEY
3.2.15 Front Panel Header (P15)
Table 3-18 Front Panel Header Pin Definition
PIN PIN Name PIN PIN Name
1 HDD_LED_PWR 2 PWR_LED
3 HDD_LED_N 4 GND
5 GND 6 POWER BUTTON#
7 SYSTEM RST# 8 GND
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Controls, LEDs, and Connectors
Table 3-18 Front Panel Header Pin Definition (continued)
PIN PIN Name PIN PIN Name
9 STANDBY LED PWR 10 STANDBY LED
3.2.16 BIOS Program Header (P16)
Table 3-19 BIOS Program Header Pin Definition
PIN PIN Name PIN PIN Name
1 VCC3V3DUAL 2 GND
3 SPI_CS0# 4 SPI_CLK
5 SPI_MISO 6 SPI_MOSI
7NC 8 NC
3.2.17 Fan Header (P1, P13)
Table 3-20 Smart Fan Header Pin Definition
PIN PIN Name
1GND
2 VCC12V
3TACH
4 PWM
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3.2.18 MINI PCIE LED (P14)
Table 3-21 MINI PCIE Wireless LAN LED Header Pin Definition
PIN PIN Name
1 VCC3V3
2 WWAN_LED#
3 WLAN_LED#
4GND
3.2.19 Case Open Header (P25)
Controls, LEDs, and Connectors
Table 3-22 Case Open Header Pin Definition
PIN PIN Name
1 Case_open#
2GND
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Controls, LEDs, and Connectors
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Functional Description
4.1 Block Diagram
Figure 4-1 provides an overview of the main functional blocks of the motherboard and how
they are interconnected.
Figure 4-1 Motherboard Block Diagram
Chapter 4
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Functional Description
4.2 Pineview-D Processor
The MITX-430/MITX-440-DVI-2E is designed to support the Pineview-D processor. The
processor features are as follows:
Single chip integrated processor, memory controller, graphic controller with small size of
22mm x 22mm.
Manufactured on 45nm process.
2 x 512KB L2 cache for D510 dual-core processor, 1 x 512KB L2 cache for D410 single-core
processor, 32KB instruction cache, and 24KB data cache.
Single channel DDR2 667MT/s, memory support up to 4GB, 64bit.
Improved graphic engine with render core frequency at 400MHz.
– Supports DirectX 9.0c and OpenGL 1.5.
– Supports VGA port and 18bit LVDS.
DMI link to ICH8-M.
Supports C0 and C1 power states.
Supports Intel thermal monitor with Adaptive Thermal Monitor 2 Enhancement.
Enhanced Intel SpeedStep technology.
Less TDP of 15W.
4.3 SMBus Interface and Devices
There is an SMBus on ICH8-M, which is I2C compatible. The following devices connect to
SMBus:
WG82574L LAN controller
PCIEx1 slot
Mini PCIE slot
TPM header
W83627UHG SIO
PCA9557PW GPIO
58
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EMC2103-2-AP CPU thermal sensor
9LPR501SGLFT CLK GEN
Memory slot
XDP header
Figure 4-2 shows the SMBus device connection diagram.
Figure 4-2 Board I2C Device Connection
Functional Description
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Functional Description
I2C device address is given in the table below:
Table 4-1 I2C Device Address
Device CK505* SPD0 SPD1 EMC2103* PCA9557 82574L W83627UHG
Address D2 A0 A2 5C 30 C2 5A
4.4 System Memory
The Pineview-D integrates a single channel 64bit non ECC DDR2 controller.
There are two 200pin SO-DIMM slots on MITX-430/MITX-440-DVI-2E, and supports up to 4GB
(assuming 2Gb density device technology) DDR2 memory at data transfer rate of 667MT/s.
4.5 Ethernet Interfaces
The MITX-430/MITX-440-DVI-2E provides two 10/100/1000 Ethernet, WG82567V and
WG82574L.
The WG82567V MAC is integrated in ICH8-M and uses WG82567V as GBE PHY. The connection
interface is GLCI between ICH8-M and WG82567V, and it occupies the PCIE port 6.
The WG82574L is a MAC and PHY GBE solution. The connection interface for WG82574L is PCIE
port 3.
4.6 PCI-E Port
There are total six PCI-E ports in ICH8-M, and Table 4-2 shows the PCI-E ports configuration.
Table 4-2 PCI-E Port
Port Configuration
1 Connects to PCIEx1 slot
2 Connects to Mini PCIE slot
3 Connects to WG82574L
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Table 4-2 PCI-E Port (continued)
Port Configuration
4Unused
5Unused
6 Used as GLCI
The PCIE supports 2.5G transmission rate.
Figure 4-3 shows the PCI-E connection diagram.
Figure 4-3 PCI-E Connection
Functional Description
4.7 USB Interface
The ICH8-M supports 10 USB2.0 interface using UHCI or EHCI. Four USB ports are routed to
USB+RJ45 connectors. Two USB ports are routed to USB headers, two for USB flash disk, and
one for ELO Touch Screen Module. One is routed to Mini PCIE slot.
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Functional Description
Figure 4-4 shows the routing diagram.
Figure 4-4 USB Ports Connection
4.8 VGA, LVDS, LPC, and Audio Interface
A separate VGA and LVDS display interface is connected to connector from CPU.
The VGA supports resolution of 2048x1536 at 60Hz. The LVDS is a single channel with 18bit
color definition, and supports resolution up to 1366 x 768.
The LPC is routed to super IO and TPM connector.
ICH8-M supports a high definition audio interface and ALC888GR is used as the audio codec.
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4.9 DVI Interface
The DVI is switched and derived from LVDS, so DVI and LVDS cannot be used at the same time.
For display combination, use VGA + LVDS or VGA + DVI. Select the combination in the BIOS.
4.10 BIOS Device
A 4MB SPI Flash is used as BIOS device.
4.11 SPI Flash
MITX-430/MITX-440-DVI-2E uses onboard 4MB SPI flash part to store the firmware including
the BIOS and GBE.
The SPI flash part type is AT25DF321A-SH-T from Atmel. The AT25DF321A-SH-T supports SPI,
and a high performance dual output SPI using four pins: serial clock, chipset select, serial data
I/O, and serial data out. SPI clock frequencies of up to 33MHz are supported.
Functional Description
4.12 GPIO Configuration
There are two GPIOs:
User defined GPIO which is generated from PCA9557PW
ICH8-M GPIO
4.12.1 User Defined GPIO
4 GPI, 4 GPO 5V referenced. The 4 GPOs are internally pulled up to 5V with 10K resistor. The 4
GPIs are internally pulled down to GND with 10K resistor. The GPIO is controlled through SMBus
and the state of GPO is not lost even in S3 and S5 sleep state.
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Functional Description
4.12.2 ICH8-M GPIO
Table 4-3 describes the ICH8-M GPIO definition.
Table 4-3 ICH8-M GPIO Definition
Name Type Tolerance
Power
Well Default Signal Description Implementation
GPIO0 I/O 3.3V Core GPI Multiplexed with
BM_BUSY#
GPIO1 I/O 3.3V Core GPI Multiplexed with
TACH1
GPIO2 I/OD 5V Core GPI Multiplexed with
PIRQ[H:E]#
GPIO3 I/OD 5V Core GPI Multiplexed with
PIRQ[H:E]#
GPIO4 I/OD 5V Core GPI Multiplexed with
PIRQ[H:E]#
GPIO5 I/OD 5V Core GPI Multiplexed with
PIRQ[H:E]#
GPIO6 I/O 3.3V Core GPI Unmultiplexed Used for board ID, PU
GPIO7 I/O 3.3V Core GPI Unmultiplexed Used for board ID, PU
GPIO8 I/O 3.3V Resume GPI Unmultiplexed Used as BIOS write
GPIO9 I/O 3.3V Resume GPI Multiplexed with
WOL_EN
GPIO10 I/O 3.3V Resume GPI Multiplexed with
SusPwrAck/ALERT#
GPIO11 I/O 3.3V Resume Native Multiplexed with
SMBALERT#
Unused, PU VCC3V3
Used as IDE 80 pin
cable detect
Unused, PU VCC3V3
Unused, PU VCC3V3
Unused, PU VCC3V3
Unused, PU VCC3V3
VCC3V3
VCC3V3
protect (WP) signal, PU
VCC3V3DUAL
Unused, PU
VCC3V3DUAL
Unused, PU
VCC3V3DUAL
Used for SMBus alert
signal, PU
VCC3V3DUAL
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Table 4-3 ICH8-M GPIO Definition (continued)
Power
Name Type Tolerance
GPIO12 I/O 3.3V Resume Native Natively used as
Well Default Signal Description Implementation
GLAN_DOCK#
Functional Description
Used as LAN_DISABLE#
signal, output low
active
GPIO13 I/O 3.3V Resume Native Natively used as
ENERGY_DETECT
GPIO14 I/O 3.3V Resume GPI Multiplexed with
AC_PRESENT
GPIO15
Desktop
only
GPIO16 I/O 3.3V Core Native Natively used as
GPIO17 I/O 3.3V Core GPI Multiplexed with
GPIO18 I/O 3.3V Core GPO Unmultiplexed Used as LVDS backlight
GPIO19 I/O 3.3V Core GPI Multiplexed with
GPIO20 I/O 3.3V Core GPO Unmultiplexed Unused, connect to a
I/O 3.3V Resume Native GPIO is not
implemented
and is used instead
as
STP_PCI#.
DPRSLPVR.
TACH0
SATA1GP
Unused, PU
VCC3V3DUAL
Unused, PU
VCC3V3DUAL
Used as STP_PCI#
Used as DPRSLPVR
Used as DVI detect
type selection
1 = DC mode; 0 = PWM
mode
Unused, PD GND
TP/used as a strap pin
GPIO21 I/O 3.3V Core GPI Multiplexed with
GPIO22 I/O 3.3V Core GPI Multiplexed with
GPIO23 I/O 3.3V Core Native Multiplexed with
MITX-430/MITX-440-DVI-2E Installation and Use (6806800K37D)
SATA0GP.
SCLOCK
LDRQ1#
Unused, PD GND
Unused, PU VCC3V3
By default unused,
optionally used as
LPC_DRQ1#,
connecting to TPM
connector
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Functional Description
Table 4-3 ICH8-M GPIO Definition (continued)
Name Type Tolerance
GPIO24 I/O 3.3V Resume GPO Multiplexed with
GPIO25
Desktop
only
I/O 3.3V Resume Native This GPIO is not
Power
Well Default Signal Description Implementation
Unused, connect to a
MEM_LED
implemented and is
used instead
as STP_CPU#
TP
Used as STP_CPU#
GPIO26 I/O 3.3V Resume Native Multiplexed with
S4_STATE#
GPIO27 I/O 3.3V Resume GPO ICH8 Base:
Unmultiplexed
GPIO28 I/O 3.3V Resume GPO ICH8 Base:
Unmultiplexed
GPIO29 I/O 3.3V Resume Native Multiplexed with
OC5#
GPIO30 I/O 3.3V Resume Native Multiplexed with
OC6#
GPIO31 I/O 3.3V Resume Native Multiplexed with
OC7#
GPIO32
Desktop
only
GPIO33 I/O 3.3V Core GPO Multiplexed with
GPIO34 I/O 3.3V Core GPO Multiplexed with
I/O 3.3V Core GPO This GPIO is not
implemented and is
used instead
as CLKRUN#
HDA_DOCK_EN#
HDA_DOCK_RST#
Unused, PD GND
Used as Mini-PCIE
Disable signal, Low
active
Used as LAN2 disable
signal, Low active
Used as USB OC func,
associated with USB4
USB5
Used as USB OC func,
associated with USB6
USB7
Used as USB OC func,
associated with USB6
USB7
Used as CLKRUN#
Unused, low active
Used as LVDS/DVI
display selection
1 = DVI; 0 = LVDS
66
GPIO35 I/O 3.3V Core GPO Multiplexed with
SATACLKREQ#
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Used as SATA clock
request
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Table 4-3 ICH8-M GPIO Definition (continued)
Power
Name Type Tolerance
GPIO36 I/O 3.3V Core GPI Multiplexed with
Well Default Signal Description Implementation
SATA2GP
Functional Description
Unused, PD GND
GPIO37 I/O 3.3V Core GPI Mobile:Unmultiple
xed.
GPIO38 I/O 3.3V Core GPI Multiplexed with
SLOAD
GPIO39 I/O 3.3V Core GPI Multiplexed with
SDATAOUT0
GPIO40 I/O 3.3V Resume Native Multiplexed with
OC[4:1]#
GPIO41 I/O 3.3V Resume Native Multiplexed with
OC[4:1]#
GPIO42 I/O 3.3V Resume Native Multiplexed with
OC[4:1]#
GPIO43 I/O 3.3V Resume Native Multiplexed with
OC[4:1]#
GPIO44 N/A N/A N/A N/A Not implemented NC
GPIO45 N/A N/A N/A N/A Not implemented NC
GPIO46 N/A N/A N/A N/A Not implemented NC
Unused, PD GND
Unused, PU VCC3V3
Unused, PU VCC3V3
Used as USB OC func,
associated with USB0
USB1
Used as USB OC func,
associated with USB2
USB3
Used as USB OC func,
associated with USB2
USB3
Used as USB OC func,
associated with USB4
USB5
GPIO47 N/A N/A N/A N/A Not implemented NC
GPIO48 I/O 3.3V Core GPI Multiplexed with
GPIO49 I/O V_CPU_IO V_CPU_IONative Multiplexed with
GPIO50 I/O 5.5V Core Native Multiplexed with
GPIO51 I/O 3.3V Core Native Multiplexed with
MITX-430/MITX-440-DVI-2E Installation and Use (6806800K37D)
Unused, PU VCC3V3
SDATAOUT1
Used as CPUPWRGD
CPUPWRGD
Unused, PU VCC3V3
REQ1#
Unused, connect to TP
GNT1#
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Functional Description
Table 4-3 ICH8-M GPIO Definition (continued)
Name Type Tolerance
GPIO52 I/O 5.5V Core Native Multiplexed with
Power
Well Default Signal Description Implementation
Unused, PU VCC3V3
REQ2#
GPIO53 I/O 3.3V Core Native Multiplexed with
GPIO54 I/O 5.5V Core Native Multiplexed with
GPIO55 I/O 3.3V Core Native Multiplexed with
4.13 Chipset
The MITX-430/MITX-440-DVI-2E is designed to use the Intel ICH8M I/O Hub. The ICH8 provides
extensive I/O support. Functions and capabilities are as follows:
PCI Express Base Specification, supports Revision 1.1.
PCI Local Bus Specification, supports Revision 2.3 for 33 MHz PCI operations.
Supports ACPI Power Management Logic.
Enhanced DMA controller, interrupt controller, and timer functions.
Integrated serial ATA host controllers with independent DMA operation on up to three
ports.
Integrated IDE controller supports Ultra ATA100/66/33.
USB host interface with support for up to ten USB ports, five UHCI host controllers, two
EHCI high-speed USB 2.0 host controllers.
Used as a strap pin
GNT2#
Unused, PU VCC3V3
REQ3#
Used as a strap pin
GNT3#
68
Integrated 10/100/1000 GbE MAC.
System Management Bus (SMBus) Specification, Version 2.0 with additional support for
most I2C devices.
Supports Intel high definition audio.
Low Pin Count (LPC) interface.
Supports Serial Peripheral Interface (SPI).
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4.14 Clock Generator
The MITX-430/MITX-440-DVI-2E contains a CK505 clock generator (ICS9LPR501) to provide
the clocks for various components.
4.15 Video
The graphic core is integrated in Pineview-D processor.
The GPU contains a refresh of 3rd generation graphics core, and improved GFX engine. The
GPU is a unified graphics driver which does end to end decode.
Supports Directx* 9 compliant Pixel Shader* 2.0.
Two display ports: LVDS and RGB.
– Single LVDS channel supporting resolution up to 1366 * 768, 18bpp.
Functional Description
– Analog RGB display output resolution up to 2048 * 1536 at 60 Hz.
Intel® Dynamic Video Memory Technology support 4.0.
Intel® Clear Video Technology.
– MPEG2 Hardware Acceleration
– ProcAmp
The MITX-430/MITX-440-DVI-2E supports dual-independent displays using the Intel PineviewD processor's Integrated Graphics Controller. The display is LVDS or VGA. During boot, the BIOS
detects whether a VGA monitor is attached or not. If VGA is attached, then the primary display
is VGA. If VGA is not detected, then BIOS defaults to LVDS.
4.16 Storage
SATA
MITX-430/MITX-440-DVI-2E supports two SATA ports and one E-SATA port integrated
onboard which supports SATA Gen 2(3.0Gb/s).
Two SATA ports are routed to internal connector and one is routed to the E-SATA port.
USB Solid State Drive
MITX-430/MITX-440-DVI-2E supports one standard USB flash disk (2x5Pin, 2.54mmPitch).
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Functional Description
IDE
The MITX-430/MITX-440-DVI-2E supports a 44pin Mini-IDE header on board.
The IDE interface supports up to two IDE devices providing an interface for IDE hard disks
and ATAPI devices. Each IDE device has independent timings. The IDE interface supports
PIO IDE transfers up to 16 MB/sec and Ultra ATA transfers up to 100 MB/sec. It does not
consume any legacy DMA resources. The IDE interface integrates 16*32-bit buffers for
optimal transfers.
The ICH8s IDE system contains a single, independent IDE signal channel that can be
electrically isolated. There are integrated series resistors on the data and control lines.
4.17 Super I/O
MITX-430/MITX-440-DVI-2E uses Winbond W83627UHG-LF as Super I/O.
Serial Port
MITX-430/MITX-440-DVI-2E supports six serial ports:
– Two to DSUB-9 in rear I/O region
– One RS-232/422/485 port
– Two power COM
– One to 2x5Pin header
Parallel Port
MITX-430/MITX-440-DVI-2E supports the parallel port integrated on board.
PS/2
MITX-430/MITX-440-DVI-2E supports the PS/2 keyboard or mouse integrated on board.
4.18 HW Monitor
Voltage monitor
MITX-430/MITX-440-DVI-2E uses W83627UHG hardware monitor as voltage monitor. It
implements voltage monitoring capability on 1.05V, 3.3V, 5V, 12V, and CPU core. Voltages
can be read in BIOS setup menu.
Temperature
MITX-430/MITX-440-DVI-2E uses EMC2103 to monitor the CPU temperature, and uses
W83627 hardware monitor to monitor the system temperature.
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Fan monitor and control
MITX-430/MITX-440-DVI-2E supports CPU fan and system fan speed control.
4.19 Watchdog Timer
MITX-430/MITX-440-DVI-2E implements the watchdog timer feature. The SIO chipset is used
to implement the watchdog function that supports 1-255s or 1-255m watchdog.
4.20 Debug
MITX-430/MITX-440-DVI-2E implements three ways for debugging:
VGA for text and graphic information output.
RS232 for AMI debugger. It can set, modify, or check the breakpoint, register value, and so
on.
Functional Description
Extended Debug Port (XDP) tool for processor run control and debug.
4.21 Power Management
MITX-430/MITX-440-DVI-2E supports ACPI S0, S3, S4, S5.
4.22 Manageability
MITX-430/MITX-440-DVI-2E does not support AMT feature.
4.23 RTC
MITX-430/MITX-440-DVI-2E supports a battery backed Real Time Clock (RTC). The ICH8
contains a Motorola MC146818A-compatible RTC with 256 bytes of battery backed RAM. The
RTC performs two key functions: keeping track of the time of day and storing system data, even
when the system is powered down. The RTC operates on a 32.768 KHz crystal and a 3V battery.
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Functional Description
The RTC also supports two lockable memory ranges. By setting bits in the configuration space,
two 8-byte ranges can be locked to read and write accesses. This prevents unauthorized
reading of passwords or other system security information.
The RTC also supports a data alarm that allows for scheduling a wakeup event up to 30 days in
advance, rather than just 24 hours in advance.
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Operation
5.1 POST
After power up or reset, the BIOS performs a self-test, POST, that attempts to determine if
further operation is possible and that the detected configuration is expected. This process
either completes normally or results in a warning or an error. The boot process does not stop
after a warning but displays a message on the primary display device.
To view all checkpoints generated by Aptio firmware, you require a checkpoint card, also
referred to as a POST Card or POST Diagnostic Card. These are LPC add-in cards that show the
value of I/O port 80h on a LED display.
5.2 Boot Process
While performing the functions of the traditional BIOS, Aptio 4.x core follows the firmware
model described by the Intel Platform Innovation Framework for EFI. The framework refers to
the following boot phases, which applies to various status code descriptions:
Chapter 5
Security (SEC) - initial low-level initialization
Pre-EFI Initialization (PEI) - memory initialization1
Driver Execution Environment (DXE) - main hardware initialization2
Boot Device Selection (BDS) - system setup, pre-OS user interface and selecting a bootable
device (CD/DVD, HDD, USB, Network, Shell, and so on)
5.3 Initiating Setup
During the boot, press the F2 key on the keyboard to launch the setup utility once the self-test
is complete and before searching for a boot device. If you exit setup without saving any
changes, the boot process continues with the search for a boot device. If changes are made,
the motherboard loads the new settings and resets, restarting the entire boot process.
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5.4 Setup Utility
The BIOS incorporates a setup utility that allows you to alter a variety of system options. This
section describes the operation of the utility by describing the various options available
through a set of hierarchical menus. Not all options are available with all products and some
depend on BIOS customizations.
The current settings are stored in the SPI FLASH NVRAM area and any changes can be copied
back to this area via the Exit menu.
To start the utility, press the F2 key during the early stages of POST after powerup. This
functionality operates with PS/2 keyboards, USB keyboards when enabled, and via the console
redirection facility when enabled. Table 5-1 briefly describes the primary menus.
Table 5-1 Setup Utility
Menu Options
Main BIOS information and date and time.
Advanced Advanced features including ACPI, CPU, IDE, USB, HW
Chipset Features including Host Bridge and South Bridge.
Boot Boot mode and boot options.
Security Administrator's password.
Save & Exit Save with or without changes, load or save default settings,
5.4.1 Main Menu
Table 5-2 Main Menu
Field Description
BIOS Vendor BIOS vendor name.
Core Version Aptio core version.
Project Version Project name and its version.
monitoring and serial port settings.
and Boot Device Selection.
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Table 5-2 Main Menu (continued)
Field Description
Build Date BIOS build date.
System Language System setup language. Only English is available.
System Date Set the time and date in month/day/year format. To change these values, go
System Time
to each field and enter the desired value. Press the tab key to move from hour to
minute to second, or from month to day to year. There is no default value.
5.4.2 Advanced Menu
Table 5-3 Legacy OPROM Support
Field Description
Operation
Launch PXE OpROM Enable or disable boot option for Legacy Network Devices. Default option
is Disabled.
Table 5-4 Advanced Menu
Field Description
ACPI Settings System ACPI Parameters, see Table 5-5 on page 76.
Trusted Computing Trusted Computing settings, see Table 5-6 on page 76.
S5 RTC Wake Settings Enable the system to wake from S5 using RTC alarm, see Table 5-7 on page
77.
CPU Configuration CPU Configuration Parameters, see Table 5-8 on page 77.
IDE Configuration Enter SATA device options settings, see Table 5-9 on page 78.
IGD- LCD Control Internal Graphics Device (IGD)-LCD control function, see Table 5-10 on page
79.
USB Configuration USB configuration parameters, see Table 5-11 on page 80.
EMC2103 H/W
Monitor
Monitor hardware status, see Table 5-12 on page 81.
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Table 5-4 Advanced Menu (continued)
Field Description
Super IO
Configuration
System super IO chip parameters, see Table 5-13 on page 81.
W83627UHG H/W
Monitor
Serial Port Console
Redirection
Monitor hardware status, see Table 5-22 on page 86.
Serial Port Console Redirection, see Table 5-23 on page 86.
Table 5-5 ACPI Settings
Field Description
Enable ACPI Auto
Configuration
ACPI Sleep State Select the highest ACPI sleep state the system enters when the SUSPEND
Enable or disable BIOS ACPI Auto Configuration. Default option is Disabled.
button is pressed. The states are:
Suspend Disabled
S3 (Suspend to RAM)
Default state is S3 (Suspend to RAM).
Table 5-6 Trusted Computing
76
Field Description
TPM SUPPORT Enable or disable TPM function. Default value is Disable.
When the field is disabled in BIOS, OS does not show TPM function.
TPM State Turn TPM On or Off. Default state is Disabled.
Pending TPM operation Schedule TPM operation, default option is none.
Current TPM Status Information
No TPM Hardware If no TPM is found.
TPM Enabled Status Show TPM status, Enabled or Disabled
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Table 5-6 Trusted Computing (continued)
Field Description
TPM Active Status Show current state of the TPM, Activated or Deactivated.
TPM Owner Status Show current TPM Ownership state, Owned or UnOwned.
Table 5-7 S5 RTC Wake Setting
Field Description
Operation
Wake system with Fixed
time
Wake up hour Select 0-23, for example, enter 3 for 3AM and 15 for 3PM.
Wake up minute 0-59. Default value is 0.
Wake up second 0-59. Default value is 0.
Wake system with
Dynamic time
Wake up minute increase 1-5. Default value is 1.
Enable or disable system wake on alarm event. When enabled, system
wakes on the specified hr::min::sec.
Default value is Disabled.
Default value is 0.
Enable or disable system wake on alarm event. When enabled, system
wakes on the current time + Increase minute(s). Default value is
Disabled.
Table 5-8 CPU Configuration
Field Description
Processor Type
EMT64 EMT64
Processor Speed Processor speed
System Bus Speed System bus speed
Ratio Status Ratio Status
Actual Ratio Actual ratio
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Table 5-8 CPU Configuration (continued)
Field Description
Processor Stepping Processor stepping
Microcode Revision Microcode revision
L1 Cache RAM L1 Cache RAM
L2 Cache RAM L2 Cache RAM
Processor Core Processor Core
Hyper-Threading Enabled for Windows XP and Linux (OS optimized for Hyper-Threading
Technology) and Disabled for other OS (OS not optimized for HyperThreading Technology). Default value is Enabled.
Execute Disable Bit XD prevents certain classes of malicious buffer overflow attacks when
combined with a supporting OS (Windows Server 2003 SP1, Windows XP
SP2, SuSE Linux 9.2, RedHat Enterprise 3 Update 3). Default value is
Enabled.
C-States Enable or disable C1. Default value is Enabled.
Table 5-9 IDE Configuration
Field Description
PATA Master Por t status
PATA Slave Port status
SATA Port 0 Port status
SATA Port 1 Port status
SATA Port 2 Port status
ATA /IDE Configuration Select ATA or IDE configuration. The configurations are:
Disabled
Compatible
Enhanced
Default value is Enhanced.
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Table 5-9 IDE Configuration (continued)
Field Description
Configure SATA as Enhanced: you can select the IDE, AHCI mode.
Compatible: you can select the legacy IDE Channels as SATA Only, SATA
Pri, PATA Sec, PATA only.
Table 5-10 IGD-LCD Control
Field Description
DVMT Mode Select Select DVMT Mode or Fixed Mode.
Default value is DVMT Mode.
DVMT/FIXED Memory Select DVMT or FIXED mode memory size used by internal graphics
device: The memory sizes are:
128MB
256MB
Maximum
Default value is 256MB.
IGD-Boot Type Select the Video Device which is activated during POST. This has no effect
if external graphic is present. The options are:
VBIOS Default
CRT
LFP
DVI
CRT +LFP
CRT +DVI
Default value is CRT +LFP.
Note that the optional value DVI and CRT+DVI are only for MITX-440-DVI-
2E.
LCD Panel Type Select LCD panel used by Internal Graphics Device by selecting the
appropriate setup item. The LCD panel types are:
800x600 LVDS
1024x768 LVDS
Default value is 1024x768 LVDS.
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Table 5-10 IGD-LCD Control (continued)
Field Description
LCD Mode Set LCD Mode as PWM Mode or DC Mode.
Default value is PWM Mode.
Table 5-11 USB Configuration
Field Description
USB Devices List of the USB devices attached.
Legacy USB Support Enables Legacy USB support. AUTO option disables legacy support if no
USB devices are connected. DISABLE option keeps USB devices available
only for EFI applications. Default value is Enabled.
EHCI Hand-off This is a workaround for OSs without EHCI hand-off support. The EHCI
ownership change should be claimed by EHCI driver. Default value is
Enabled.
80
Device Reset Timeout USB mass storage device Start Unit command timeout. The options are:
10 sec
20 sec
30 sec
40 sec
Default value is 20 sec.
Controller Timeout The time out value for control, bulk, and interrupt transfer. The options
are:
1sec
5 sec
10 sec
20 sec
30 sec
Default value is 20 sec.
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Table 5-12 EMC2103 H/W Monitor
Field Description
CPU Temperature CPU temperature.
CPU Fan Speed CPU fan speed.
CPU Fan Duty Cycle CPU fan duty cycle.
Automatic Fan Control Enable or disable the CPU fan speed control. Default value is Enabled.
Table 5-13 Super IO Configuration
Field Description
Super IO Chip Winbond W83627UHG.
Serial Port 1 Configuration Set Parameters of COM1, see Table 5-14 on page 82.
Serial Port 2 Configuration Set Parameters of COM2, see Table 5-15 on page 82.
Serial Port 3 Configuration Set Parameters of COM3, see Table 5-16 on page 83.
Serial Port 4 Configuration Set Parameters of COM4, see Table 5-17 on page 83.
Serial Port 5 Configuration Set Parameters of COM5, see Table 5-18 on page 84.
Serial Port 6 Configuration Set Parameters of COM6, see Table 5-19 on page 84.
Parallel Port Configuration Set Parameters of Parallel Port, see Table 5-20 on page 85.
Watchdog Timer Configuration Enable or disable WDT function, see Table 5-21 on page 85.
Intrusion Detect Select state for Intrusion Detect. The states are:
Disable
Enable
Clear
Default value is Disable.
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Table 5-14 Serial Port 1 Configuration
Field Description
Serial Port Enable or disable serial port. Default value is Enabled.
Change Settings Select an optimal settings for super IO device. The options are:
Auto
IO=3F8h; IRQ=4
IO=3F8h; IRQ=3,4,5,6,7,10,11,12
IO=2F8h; IRQ=3,4,5,6,7,10,11,12
IO=3E8h; IRQ=3,4,5,6,7,10,11,12
IO=2E8h; IRQ=3,4,5,6,7,10,11,12
Default value is Auto.
82
Table 5-15 Serial Port 2 Configuration
Field Description
Serial Port Enable or disable serial port. Default value is Enabled.
Change Settings Select an optimal settings for super IO device. The options are:
Auto
IO=2F8h; IRQ=3
IO=3F8h; IRQ=3,4,5,6,7,10,11,12
IO=2F8h; IRQ=3,4,5,6,7,10,11,12
IO=3E8h; IRQ=3,4,5,6,7,10,11,12
IO=2E8h; IRQ=3,4,5,6,7,10,11,12
Default value is Auto.
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Table 5-16 Serial Port 3 Configuration
Field Description
Serial Port Enable or disable serial port. Default value is Enabled.
Change Settings Select an optimal settings for super IO device.
Auto
IO=3E8h; IRQ=7
IO=3F8h; IRQ=7,10,11,12
IO=2F8h; IRQ=7,10,11,12
IO=3E8h; IRQ=7,10,11,12
IO=2E8h; IRQ=7,10,11,12
IO=2E0h; IRQ=7,10,11,12
IO=2F0h; IRQ=7,10,11,12
Default value is Auto.
Operation
Table 5-17 Serial Port 4 Configuration
Field Description
Serial Port Enable or disable serial port. Default value is Enabled.
Change Settings Select an optimal settings for super IO device. The options are:
Auto
IO=2E8h; IRQ=7
IO=3F8h; IRQ=7,10,11,12
IO=2F8h; IRQ=7,10,11,12
IO=3E8h; IRQ=7,10,11,12
IO=2E8h; IRQ=7,10,11,12
IO=2E0h; IRQ=7,10,11,12
IO=2F0h; IRQ=7,10,11,12
Default value is Auto.
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Table 5-18 Serial Port 5 Configuration
Field Description
Serial Port Enable or disable serial port. Default value is Enabled.
Change Settings Select an optimal settings for super IO device. The options are:
Auto
IO=2E0h; IRQ=10
IO=3F8h; IRQ=7,10,11,12
IO=2F8h; IRQ=7,10,11,12
IO=3E8h; IRQ=7,10,11,12
IO=2E8h; IRQ=7,10,11,12
IO=2E0h; IRQ=7,10,11,12
IO=2F0h; IRQ=7,10,11,12
Default value is Auto.
84
Table 5-19 Serial Port 6 Configuration
Field Description
Serial Port Enable or disable Serial Port. Default value is Enabled.
Change Settings Select an optimal settings for Super IO Device. The options are:
Auto
IO=2F0h; IRQ=10
IO=3F8h; IRQ=7,10,11,12
IO=2F8h; IRQ=7,10,11,12
IO=3E8h; IRQ=7,10,11,12
IO=2E8h; IRQ=7,10,11,12
IO=2E0h; IRQ=7,10,11,12
IO=2F0h; IRQ=7,10,11,12
Default value is Auto.
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Table 5-20 Parallel Port Configuration
Field Description
Parallel Port Enable or disable parallel port (LPT/LPTE). Default value is Enabled.
Change Settings Select an optimal settings for super IO device. The options are:
Auto
IO=378h; IRQ=5
IO=378h; IRQ=5,6,7,10,11,12
IO=278h; IRQ=5,6,7,10,11,12
IO=3BCh; IRQ=5,6,7,10,11,12
IO=378h
IO=278h
IO=3BCh
Default value is Auto.
Device Mode Change the Printer Port mode. The modes are:
STD Printer Mode
SPP Mode
EPP-1.9 and SPP Mode
EPP-1.7 and SPP Mode
ECP Mode
ECP and EPP 1.9 Mode
ECP and EPP 1.7 Mode
Table 5-21 Watchdog Timer Configuration
Field Description
Watchdog Timer Enable or disable WDT. Default value is Disabled.
WDT Mode Select watchdog mode, default is Minutes.
Time-Out Set time to wait before system reset without PS2 Keyboard or mouse
operation. Default value is 5.
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Table 5-22 W83627UHG H/W Monitor
Field Description
System temperature Shows system temperature.
System Fan Speed Shows system fan speed.
CPU_VCORE Monitors the CPU VCORE voltage.
1.05V Monitors the VCC 1.05V.
3.3V Monitors the VCC 3V.
5V Monitors the VCC 5V.
12V Monitors the VCC 12V.
Automatic Fan Control Enable or disable the system fan speed control. Default value is
Enabled.
86
Table 5-23 Serial Port Console Redirection
Field Description
COM1:Console Redirection Enable or disable console redirection. Default value is
Enabled.
COM1 Console Redirection
Settings
COM2: Console Redirection Enable or disable console redirection. Default value is
COM2: Console Redirection
Settings
Serial Port for Out-of-Band
Management/Windows
Emergency Management Services
(EMS): Console Redirection
See Table 5-24 on page 87.
Disabled.
See Table 5-24 on page 87.
Enable or disable console redirection. Default value is
Disabled.
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Table 5-23 Serial Port Console Redirection (continued)
Field Description
Serial Port for Out-of-Band
Management/Windows
Emergency Management Services
(EMS): Out-of-Band Mgmt Port
Serial Port for Out-of-Band
Management/Windows
Emergency Management Services
(EMS): Data Bits
Serial Port for Out-of-Band
Management/Windows
Emergency Management Services
(EMS): Parity
Serial Port for Out-of-Band
Management/Windows
Emergency Management Services
(EMS): Stop Bits
Serial Port for Out-of-Band
Management/Windows
Emergency Management Services
(EMS): Terminal Type
Microsoft Windows Emergency Management Services (EMS)
allows for remote management of Windows Server OS through
a serial port. The options are COM1 and COM2.
Default value is COM1.
8
None
1
VT100
Operation
Table 5-24 COM1 and COM2 Console Redirection Settings
Field Description
Terminal Type Emulation: ANSI: Extended ASCII char set.
VT100: ASCII char set.
VT100+: Extends VT100 to support color, function keys, and so on.
VT-UTF8: Uses UTF8 encoding to map Unicode chars onto 1 or more
bytes.
Default value is VT100.
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Table 5-24 COM1 and COM2 Console Redirection Settings (continued)
Field Description
Bits per second Selects serial port transmission speed. The speed must be matched on
the other side. Long or noisy lines may require lower speeds.
9600
19200
57600
115200
Default value is 115200.
Data Bits Data bits of 7 and 8. Default is 8.
Parity Parity bit is sent with the data bits to detect some transmission errors.
Even: parity bit is 0, if the number of 1s in the data bits is even.
Odd: parity bit is 0, if number of 1s in the data bits is odd.
Mark: parity bit is always 1.
Space: Parity bit is always 0.
Mark and Space Parity do not allow for error detection. They can be used
as an additional data bit.
None
Even
Odd
Mark
Space
Default value is None.
88
Stop Bits Stop bits indicate the end of a serial data packet. (Start bit indicates the
beginning). The standard setting is 1 stop bit. Communication with
slow devices may require more than 1 stop bit. The options are 1 and 2.
Default value is 1.
Flow Control Flow control prevents data loss from buffer overflow. While sending
data, if the receiving buffers are full, a stop signal is sent to stop the data
flow. Once the buffers are empty, a start signal is sent to restart the flow.
Hardware flow control uses two wires to send start/stop signals.
Options are None and Hardware RTS/CTS.
Default value is None.
Terminal Resolution Remote Terminal Resolution, 80x25 (default).
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5.4.3 Chipset Menu
Table 5-25 Chipset Menu
Field Description
Host Bridge Host Bridge Parameters, see Table 5-26 on page 89.
South Bridge South Bridge Parameters, see Table 5-27 on page 89.
Table 5-26 Host Bridge
Field Description
Initiate Graphic Adapter Select which graphics controller to use as the primary boot device. The
Operation
options are IGD and PEG.
Default value is IGD.
Memory Information
Memory Frequency Show memory frequency information.
Total Memory Show total memory information.
DIMM#0 DIMM#0 information.
DIMM#1 DIMM#1 information.
Table 5-27 South Bridge
Field Description
HD Audio Controller Enable or disable HD Audio Controller. Default value is Enabled.
82567V LAN Controller Enable or disable WG82567V LAN Controller. Default value is Enabled
PCI Express Port 0 Default value is Auto.
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Table 5-27 South Bridge (continued)
Field Description
PCI Express Port 1 Enable or disable PCI Express Root Port1. The options are:
Auto
Enabled
Disabled
Default value is Auto.
82574L LAN Controller Enable or disable on board WG82574L chip.
Default value is Enabled.
Note that this is only for MITX-440-DVI-2E.
Restore AC Power Loss Select AC power state when power is re-applied after a power failure.
The options are:
Power Off
Power On
Last State
Default value is Last State.
Spread Spectrum Enable or disable Spread Spectrum. The options are:
5.4.4 Boot Menu
Table 5-28 Boot Menu
Field Description
Quiet Boot Enable or disable Quiet Boot option. Default value is Disabled.
Setup Prompt Timeout Number of seconds to wait for setup activation key. 65535(0xFFFF)
Bootup NumLock State Select the keyboard NumLock state. Options are On and Off.
90
Enabled and Disabled. Default value is Enabled.
means indefinite waiting. 0 means no waiting (not recommended).
Default value is 3.
Default value is On.
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Table 5-28 Boot Menu (continued)
Field Description
Option ROM Messages Set display mode for Option ROM. The options are Force BIOS and Keep
Boot Option Priorities Sets the system boot order.
Hard Drive Boot Order Set the order of the legacy devices in this group.
5.4.5 Security Menu
Table 5-29 Security Menu
Field Description
Operation
Current.
Default value is Force BIOS.
Administrator Password Set Setup Administrator Password.
User Password Set Setup User Password.
5.4.6 Save & Exit Menu
Table 5-30 Save & Exit Menu
Field Description
Save Changes and Exit Exit system setup after saving the changes.
Discard Changes and Exit Exit system setup without saving any changes.
Save Changes and Reset Reset the system after saving the changes.
Discard Changes and
Reset
Save Changes Save changes done so far to any of the setup options.
Discard Changes Discard changes done so far to any of the setup options.
Restore Defaults Restore or load default values for all the setup options.
Reset system setup without saving any changes.
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Table 5-30 Save & Exit Menu (continued)
Field Description
Save as User Defaults Save the changes done so far as user defaults.
Restore User Defaults Restore the user defaults to all the setup options.
Boot Override Overrides the boot orders in Boot menu. So you can select the device
which you want to boot.
5.5 POST Codes
5.5.1 Status Code Ranges
92
Table 5-31 Status Code Ranges
Status Code Range Description
0x01 - 0x0F SEC Status Codes & Errors.
0x10 - 0x2F PEI execution up to and including memory detection.
0x30 - 0x4F PEI execution after memory detection.
0x50 - 0x5F PEI errors.
0x60 - 0xCF DXE execution up to BDS.
0xD0 - 0xDF DXE errors.
0xE0 - 0xE8 S3 Resume (PEI).
0xE9 - 0xEF S3 Resume errors (PEI).
0xF0 - 0xF8 Recovery (PEI).
0xF9 - 0xFF Recovery errors (PEI).
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5.5.2 Standard Status Codes
5.5.2.1 SEC Status Codes
Table 5-32 SEC Status Codes
Status Code Description
0x0 Unused.
Progress Codes
0x1 Power on. Reset type detection (soft/hard).
0x2 AP initialization before microcode loading.
0x3 North Bridge initialization before microcode loading.
Operation
0x4 South Bridge initialization before microcode loading.
0x5 OEM initialization before microcode loading.
0x6 Microcode loading.
0x7 AP initialization after microcode loading.
0x8 North Bridge initialization after microcode loading.
0x9 South Bridge initialization after microcode loading.
0xA OEM initialization after microcode loading.
0xB Cache initialization.
SEC Error Codes
0xC - 0xD Reserved for future AMI SEC error codes.
0xE Microcode not found.
0xF Microcode not loaded.
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5.5.2.2 PEI Status Codes
Table 5-33 PEI Status Codes
Status Code Description
Progress Codes
0x10 PEI Core is started.
0x11 Pre-memory CPU initialization is started.
0x12 CPU pre-memory initialization (CPU module specific).
0x13 CPU pre-memory initialization (CPU module specific).
0x14 CPU pre-memory initialization (CPU module specific).
0x15 Pre-memory North Bridge initialization is started.
0x16 Pre-memory North Bridge initialization (North Bridge module
specific).
94
0x17 Pre-Memory North Bridge initialization (North Bridge module
specific).
0x18 Pre-Memory North Bridge initialization (North Bridge module
specific).
0x19 Pre-memory South Bridge initialization is started.
0x1A Pre-memory South Bridge initialization (South Bridge module
specific).
0x1B Pre-memory South Bridge initialization (South Bridge module
specific).
0x1C Pre-memory South Bridge initialization (South Bridge module
specific).
0x1D - 0x2A OEM pre-memory initialization codes.
0x2B Memory initialization. Serial Presence Detect (SPD) data reading.
0x2C Memory initialization. Memory presence detection.
0x2D Memory initialization. Programming memory timing information.
0x2E Memory initialization. Configuring memory.
0x2F Memory initialization (other).
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Table 5-33 PEI Status Codes (continued)
Status Code Description
0x30 Reserved for ASL, see Table 5-38 on page 102.
0x31 Memory Installed.
0x32 CPU post-memory initialization is started.
0x33 CPU post-memory initialization. Cache initialization.
0x34 CPU post-memory initialization. Application Processor(s) (AP)
initialization.
0x35 CPU post-memory initialization. Boot Strap Processor (BSP) selection.
0x36 CPU post-memory initialization. System Management Mode (SMM)
initialization.
0x37 Post-Memory North Bridge initialization is started.
0x38 Post-Memory North Bridge initialization (North Bridge module
specific).
0x39 Post-Memory North Bridge initialization (North Bridge module
specific).
0x3A Post-Memory North Bridge initialization (North Bridge module
specific).
0x3B Post-Memory South Bridge initialization is started.
0x3C Post-Memory South Bridge initialization (South Bridge module
specific).
0x3D Post-Memory South Bridge initialization (South Bridge module
specific).
0x3E Post-Memory South Bridge initialization (South Bridge module
specific).
0x3F OEM post memory initialization codes.
0x4F DXE IPL is started.
PEI Error Codes
0x50 Memory initialization error. Invalid memory type or incompatible
memory speed.
0x51 Memory initialization error. SPD reading has failed.
0x52 Memory initialization error. Invalid memory size or memory modules
do not match.
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Table 5-33 PEI Status Codes (continued)
Status Code Description
0x53 Memory initialization error. No usable memory detected.
0x54 Unspecified memory initialization error.
0x55 Memory not installed.
0x56 Invalid CPU type or Speed.
0x57 CPU mismatch.
0x58 CPU self test failed or possible CPU cache error.
0x59 CPU micro-code is not found or micro-code update has failed.
0x5A Internal CPU error.
0x5B Reset PPI is not available.
0x5C-0x5F Reserved for future AMI error codes.
S3 Resume Progress Codes
96
0xE0 S3 resume is started (S3 resume PPI is called by the DXE IPL).
0xE1 S3 boot script execution.
0xE2 Video repost.
0xE3 OS S3 wake vector call.
0xE4-0xE7 Reserved for future AMI progress codes.
0xE0 S3 resume is started (S3 resume PPI is called by the DXE IPL).
S3 Resume Error Codes
0xE8 S3 resume failed in PEI.
0xE9 S3 resume PPI not found.
0xEA S3 resume boot script error.
0xEB S3 OS wake error.
0xEC-0xEF Reserved for future AMI error codes.
Recovery Progress Codes
0xF0 Recovery condition triggered by firmware (Auto recovery).
0xF1 Recovery condition triggered by user (Forced recovery).
0xF2 Recovery process started.
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Table 5-33 PEI Status Codes (continued)
Status Code Description
0xF3 Recovery firmware image found.
0xF4 Recovery firmware image loaded.
0xF5 - 0xF7 Reserved for future AMI progress codes.
Recovery Error Codes
0xF8 Recovery PPI is not available.
0xF9 Recovery capsule is not found.
0xFA Invalid recovery capsule.
0xFB - 0xFF Reserved for future AMI error codes.
5.5.2.3 PEI Beep Codes
Operation
Table 5-34 PEI Beep Codes
# of Beeps Description
1 Memory not Installed.
1 Memory was installed twice (InstallPeiMemory routine in PEI Core called
twice).
3 DXEIPL was not found.
3 DXE core firmware volume was not found.
7 Reset PPI is not available.
4 Recovery failed.
4 S3 resume failed.
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Operation
5.5.2.4 DXE Status Codes
Table 5-35 DXE Status Codes
Status Code Description
0x60 DXE Core is started.
0x61 NVRAM initialization.
0x62 Installation of the South Bridge Runtime Services.
0x63 CPU DXE initialization is started.
0x64 CPU DXE initialization (CPU module specific).
0x65 CPU DXE initialization (CPU module specific).
0x66 CPU DXE initialization (CPU module specific).
0x67 CPU DXE initialization (CPU module specific).
98
0x68 PCI host bridge initialization.
0x69 North Bridge DXE initialization is started.
0x6A North Bridge DXE SMM initialization is started.
0x6B North Bridge DXE initialization (North Bridge module specific).
0x6C North Bridge DXE initialization (North Bridge module specific).
0x6D North Bridge DXE initialization (North Bridge module specific).
0x6E North Bridge DXE initialization (North Bridge module specific).
0x6F North Bridge DXE initialization (North Bridge module specific).
0x70 South Bridge DXE initialization is started.
0x71 South Bridge DXE SMM initialization is started.
0x72 South Bridge devices initialization.
0x73 South Bridge DXE initialization (South Bridge module specific).
0x74 South Bridge DXE initialization (South Bridge module specific).
0x75 South Bridge DXE initialization (South Bridge module specific).
0x76 South Bridge DXE initialization (South Bridge module specific).
0x77 South Bridge DXE initialization (South Bridge module specific).
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Table 5-35 DXE Status Codes (continued)
Status Code Description
0x78 ACPI module initialization.
0x79 CSM initialization.
0x7A Reserved for future AMI DXE codes.
0x80 OEM DXE initialization codes.
0x90 Boot Device Selection (BDS) phase is started.
0x91 Driver connecting is started.
0x92 PCI Bus initialization is started.
0x93 PCI Bus hot plug controller initialization.
0x94 PCI Bus enumeration.
0x95 PCI Bus request resources.
0x96 PCI Bus assign resources.
Operation
0x97 Console output devices connect.
0x98 Console input devices connect.
0x99 Super IO Initialization.
0x9A USB initialization is started.
0x9B USB reset.
0x9C USB detect.
0x9D USB enable.
0x9E Reserved for future AMI codes.
0xA0 Reserved for ASL. See Table 5-38 on page 102.
0xA1 IDE initialization is started.
0xA2 IDE reset.
0xA3 IDE detect.
0xA4 IDE enable.
0xA5 SCSI initialization is started.
0xA6 SCSI reset.
0xA7 SCSI detect.
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Operation
Table 5-35 DXE Status Codes (continued)
Status Code Description
0xA8 SCSI enable.
0xA9 Setup verifying password.
0xAA Reserved for ASL. See Table 5-38 on page 102.
0xAB Start of setup.
0xAC Setup input wait.
0xAD Ready to boot event.
0xAE Legacy boot event.
0xAF Exit boot services event.
0xB0 Runtime set virtual address MAP begin.
0xB1 Runtime set virtual address MAP end.
0xB2 Legacy option ROM initialization.
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0xB3 System reset.
0xB4 USB hot plug.
0xB5 PCI bus hot plug.
0xB6 Clean-up of NVRAM.
0xB7 Configuration reset (reset of NVRAM settings).
0xB8 Reserved for future AMI codes.
0xC0 OEM BDS initialization codes.
DXE Error Codes
0xD0 CPU initialization error.
0xD1 North Bridge initialization error.
0xD2 South Bridge initialization error.
0xD3 Some of the Architectural Protocols are not available.
0xD4 PCI resource allocation error. Out of resources.
0xD5 No space for legacy option ROM.
0xD6 No console output devices are found.
0xD7 No console input devices are found.
MITX-430/MITX-440-DVI-2E Installation and Use (6806800K37D)
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