8
www.haojiyoubbs.com
QQ微信：181806465
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
Table of Contents
7
6 5 4 3
HeFei YIFEI MAC FIX
LAST_MODIFICATION=Fri Dec 20 23:04:51 2019
2 1
CK
ECNREV DESCRIPTION OF REVISION
DATESYNCCONTENTSCSAPAGEDATESYNCCONTENTSCSAPAGE
APPD
DATE
2019-12-2000214438996 ENGINEERING RELEASED
D
1
2
3
4
5
6
7
8
9
10
11
12
13
14
1
2
3
4
5
6
7
8
9
10
12
13
14
15
Table of Contents
BOM Configuration
BOM Configuration
PD Parts
CPU GFX and USB Type-C
CPU MISC/JTAG/CFG/RSVD
CPU LPDDR4x Interface
CPU & PCH Power
CPU & PCH Grounds
CPU Core Decoupling
PCH Decoupling
PCH SPI/SMB/UART/GPIO
PCH Power Management
PCH PCIE/USB/CLKS
myEE 03/01/2019 PMIC LDOs
myEE
myEE
myEE
myEE
myEE
myEE
myEE
myEE
myEE
myEE
myEE
myEE
myEE
03/01/2019
03/01/2019
03/01/2019
03/01/2019
03/01/2019
03/01/2019
03/01/2019
03/01/2019
03/01/2019
03/01/2019
03/01/2019
03/01/2019
03/01/2019
62
63
64
65
66
67
68
69
70
71
72
73
74
7961
80
81
82
84
85
86
87
88
89
90
96
98
120
PMIC GPIOs & Control
TBT 5V REGULATOR
Power FETs
LCD Backlight Driver
eDP Display Connector
S4E<0>
S4E<1>
S4E<2>
S4E<3> X1795_MIHIR
OCARINA PMIC & NAND VCC VR X1795_MIHIR 06/04/2019
SSD Support
Display Mux
Power Aliases - 1
myEE
myEE
myEE
myEE
myEE
myEE
X1795_MIHIR
X1795_MIHIR
X1795_MIHIR
myEE
myEE
myEE
03/01/2019
03/01/2019
03/01/2019
D
03/01/2019
03/01/2019
03/01/2019
05/15/2019
05/15/2019
05/15/2019
05/15/2019
03/01/2019
03/01/2019
03/01/2019
C
15
16
17
18
19
20
21
22
25
26
27
28
18
19
20
23
28
36
37
38
3923
4024
41
42
43
44
CPU/PCH Merged XDP
Chipset Shared Support
LPDDR4x Channels / Aliasing
USB-C
WIFI/BT: Support
WIFI/BT: MODULE 1
WIFI/BT: MODULE 2
SoC GPIO/SEP/USB/DDR/Test
SoC AOP/AON/SMC
SoC ISP/I2C/UART/SPI/I2S
SoC PCIe
SoC Power 1
SoC Power 2
myEE
J214_DAVID
J214_DAVID
myEE
X1795_AMIR
myEE
myEE
myEE
myEE
myEE
myEE
myEE
myEE
myEE
03/01/2019
03/20/2019
03/05/2019
03/01/2019
05/15/2019
03/01/2019
03/01/2019
03/01/2019
03/01/2019
03/01/2019
03/01/2019
03/01/2019
03/01/2019
03/01/2019
75
76
77
78
121
122
124
125
79 127 03/01/2019
12880
81
82
83
84
85
86
87
88
140
141
142
143
145
149
150
1
Power Aliases - 1
Signal Aliases
ICT FCT 1
ICT FCT 2
Desense Capacitors 1
Desense Capacitors 2
Dev Support 1
Dev Support 2
BOM Variants 1
BOM Variants 2
Alternates BOM Table
NAND BOM Config/Groups
References
LPDDR4x Sub-Channel
myEE
myEE
myEE
myEE
myEE
myEE
myEE
myEE
myEE
myEE
myEE
myEE
myEE
J79A_MLB
03/01/2019
03/01/2019
03/01/2019Chipset Support 2
03/01/2019
03/01/2019
03/01/2019
03/01/2019
03/01/2019
03/01/2019
03/01/2019
03/01/2019
03/01/2019
01/31/2017
C
B
29
30
31
32
33
34
35
36
37
38
39
40
41
42
45
46
47
48
49
50
51
52
53
54
55
56
57
58
SoC Power 3
SoC Ground
SoC Shared Support
SoC Project Support
T151
Secure Element
T139 Support
I2C Connections 1
I2C Connections 2
Power Sensors: High Side
Power Sensors: Load Side
Power Sensors: Extended
Power Sensors: Extended 2
Thermal Sensors
myEE
myEE
myEE
myEE
X1795_MIHIR
X1795_TAEWAN
myEE
myEE
myEE
Jack
Jack
Jack
Jack
X1412_JACK
03/01/2019
03/01/2019
03/01/2019
03/01/2019
05/30/2019
03/01/2019
03/01/2019
12/15/2019
12/15/2019
12/15/2019
12/15/2019
04/25/2019
89
90
91
92
93
94
95
96
9703/01/2019
100
101
102
1
1
1
1
2
3
1
2
198
1
2
1
LPDDR4x Sub-Channel
LPDDR4x Sub-Channel
LPDDR4x Sub-Channel
USB-C COMM + DEBUG X-T
USB-C COMM + DEBUG W-R05/17/2019
USB-C CONNECTOR
USB-C VRs AND POWER
BURNSIDE BRIDGE
ACE2 CONTROLLER
BURNSIDE BRIDGE
ACE2 CONTROLLER
BURNSIDE BRIDGE
ACE2 CONTROLLER
BURNSIDE BRIDGE
J79A_MLB
J79A_MLB
t290 icl yn
t290 icl yn
J132_RUENJOU
t290 icl yn
t290 icl yn
t290 icl yn
t290 icl yn
t290 icl yn
t290 icl yn
t290 icl yn
t290 icl yn
01/31/2017J79A_MLB
01/31/2017
01/31/2017
02/01/2018
02/01/2018
03/22/2017
02/01/20184
02/01/2018
02/01/2018
02/01/2018
02/01/2018299
02/01/2018
02/01/2018
02/01/2018
B
A
Schematic / PCB #'s
051-05198 SCH1
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
SCHEM,MLB-WELL,X1795
59
60
62
63
64
65
66
67
68
69
70
71
72
74
75
76
77
78
Power Sensors:Extended 3
Fans/SMC/AMUX Support
Audio Placeholder
Audio Jack Codec
Audio Left Amplifiers
Audio Right Amplifiers
Audio Flex Connectors
Keyboard & Trackpad 1
Keyboard & Trackpad 2
DC-In & Battery Connectors
PBUS Supply & Battery Charger
IMVP9 IC
IMVP9 POWER BLOCK
VR: VCCIN_AUX ISL
EMPTY
Power - 5V 3.3V Supply
VR: VCCPRIM_1P8
PMIC BUCKS AND SWs
CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION
CRITICAL
CRITICALPCBF,MLB-WELL,X1795820-01949 PCB1
SCH
PCB
Jack
myEE
myEE
J214_MIHIR
myEE
myEE
myEE
X1412_SHAN
myEE
myEE
myEE
J214_JACK
myEE
J214_JACK
myEE
myEE
myEE
myEE
12/15/2019
03/01/2019
03/01/2019
03/05/2019
03/01/2019
03/01/2019
03/01/2019
05/17/2019
03/01/2019
03/01/2019
03/01/2019
03/26/2019
03/01/2019
03/26/2019
03/01/2019
03/01/2019
03/01/2019
03/01/2019
103
104
105
106
107
108
109
2
1
1
1
1
1
1
ACE2 CONTROLLER
USB-C CONNECTOR A
USB-C CONNECTOR A
Power FETs TBT S0
Power FETs TBT S0
TBT 5V REGULATOR
TBT 5V REGULATOR
t290 icl yn
J132_RUENJOU
J132_RUENJOU
CPU_CARD_ICL_Y
CPU_CARD_ICL_Y
J132_JIN
J132_JIN
02/01/2018
03/22/2017
03/22/2017
06/08/2018
06/08/2018
08/24/2017
08/24/2017
Table of Contents
DRAWING TITLE
SCHEM,MLB-WELL,X1795
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
1 OF 150
SHEET
1 OF 109
A
SIZEDRAWING NUMBER
D
8
3
124567
Module Parts
www.haojiyoubbs.com
QQ微信：181806465
678
3 245
1
D
CPU
CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION
998-17651 CRITICAL CPU:SOCKET1 U0500
337S00709 U0500 CRITICAL1
337S00710
1
1337S00711
337S00778 1 U0500 CRITICAL CPU:BTR
337S00804 PRQ:BTRCRITICALU05001
337S00803
1 U0500 CRITICAL
CPU,ICLUN,QS3R,ES2,B4,1.4,0.7,BGA1344
CPU,ICLUN,QS3P,ES2,B4,1.4,0.7,BGA1344
CPU,ICLUN,QS3N,ES2,B4,1.8,0.9,BGA1344
CPU,ICLUN,QS3Q,ES2,B4,1.8,0.9,BGA1344
CPU,ICLUN,QS3M,ES2,B4,1.8,0.9,BGA1344
CPU,ICLUN,QSHZ,QS,D2,2.0,1.05,BGA1344
CPU,ICLUN,QSHY,QS,D2,2.3,1.1,BGA1344
CPU,ICLUN,QSHZ,QS,D2,2.0,1.05,BGA1344
CPU,ICLUN,QSHZ,QS,D2,2.3,1.1,BGA1344
SOCKET,CPU,CFL-U
CPU:QS3R
CPU:QS3PCRITICALU0500
U0500
CRITICAL
CPU:QS3N
U05001337S00712 CRITICAL CPU:QS3Q
CRITICAL337S00713 1 CPU:QS3MU0500
U0500337S00777 CRITICAL1 CPU:BST
PRQ:BST
P0a and P1a, the same D2
MM#:999D89
MM#:999D87
MM#:999D86
MM#:999D88
MM#:999D85
P1a D2
P1a D2
MM#:999H22
MM#:999H21
SOC
POP,SOC,GIBRALTAR+1GB 20NM,M,B0,CSP1406
339S00372 U3900
1 CRITICAL SOC:B0_2G
POP,SOC,GIBRALTAR+2GB 20NM,M,B0,CSP1406
U3900 SOC:B0_1GCRITICAL1339S00370
SOC Alternate Parts
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
TABLE_ALT_ITEM
Hynix 1GB SCK
TABLE_ALT_ITEM
Micron 1GB ATK
TABLE_ALT_ITEM
Hynix 1GB ATK
TABLE_ALT_ITEM
Hynix 2GB SCK
TABLE_ALT_ITEM
Micron 2GB ATK
TABLE_ALT_ITEM
Hynix 2GB ATK
339S00375
339S00378
PART NUMBER
339S00370339S00371 ALL
339S00370 ALL
339S00370 ALL339S00376
339S00372
SOC:B0_1G
SOC:B0_1G
SOC:B0_1G
SOC:B0_2G
SOC:B0_2G
SOC:B0_2G
ALL339S00373 339S00372
ALL339S00372339S00377
ALL
CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION
D
C
B
A
BURNSIDE BRIDGE
338S00561 BBR_TR:QSA1
4
ACE2
353S02158
353S01960 in P0a
4
PMU
1
CHARGER IC
353S01525
AMR
677-19902
OCARINA
338S00410
WIRELESS(Harpoon)
339S00609
1 CRITICAL
HARPOON Alternate Parts
PART NUMBER
339S00609339S00610
IC,TBT,BURNSIDE BRIDGE,PRQ,A1,BGA105
IC,CD3217,ACE2,B2,USB PWR SW W/HV,BGA123
IC,PMU-A,D2449A0C,CALPE,CSP324,&X28X7.32
IC,ISL9240HIB0Z,PMU,SUONA,WCSP40,2.1X3.3
677-10581 in P0a
SUBASSY (T&R) PCBA,AMR INTERPOSER,X1795
IC,PMU,OCARINA,D2499A0,OPT-AG,WLCSP56
IC,MODULE,HARPOON,ES7.9,LGA385,Murata
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
U3730
USI
U2800_X,U2800_R,U2800_W,U2800_T
U3100_X,U3100_R,U3100_W,U3100_T
U7800338S00267 CRITICAL
U7000
J4800, J4801
U9000
U3730
TABLE_ALT_HEAD
TABLE_ALT_ITEM
CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION
CRITICAL
CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION
CRITICAL
CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION
CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION
CRITICAL1
CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION
CRITICAL2
CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION
CRITICAL1
CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION
P1B:PRQ:BTR/BST
EVT:PRQ:BTR/BST
ACE2:B2
Programmables
BBR ROMs
IC,SPI SERIAL FLASH,8MBITS,3.0V,USON8
335S00133 CRITICAL1
341S01381
341S01382
341S01633
341S01634
1
1
BBR ROM Alternate Parts
PART NUMBER
335S00133335S00232
BT ROM
335S00256
341S01342
341S01644
1
BT ROM Alternate Parts
PART NUMBER
335S00248
335S00255
335S00256
WIFI ROM
335S00214 1 CRITICAL
341S01645
WIFI ROM Alternate Parts
PART NUMBER
335S00214335S00216
1 U3710
IC,SPI SERIAL FLASH,8MBITS,3.0V,USON8
IC,TBT-XT,(V18.3) NEW-PROTO-0,X1412
IC,TBT-WR (V18.3) NEW-PROTO-0,X1412
ROM,TBT-XT (Vxxxx) DFR-B,X1795
ROM,TBT-WR (Vxxxx) DFR-B,X1795
BT_ROM:BLANK
IC,SPI SERIAL FLASH,2MBIT,1.8V,DFN8
BT_ROM:BLANK
BT_ROM:BLANK
IC,EEPROM,SER,UWIRE,16K,1.8V,DFN8
WIFI_ROM:BLANK
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
U3060,UB260
IC,BT SFLASH ROM (V22_shared)
IC,BT SFLASH ROM (V39) X1795
U3750
U3750335S00256
IC,WIFI ROM (V01) WW1,X1795
U3710
Macronix
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
Macronix
Adesto
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
Rohm
CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION
U3060
UB260
U3060
UB260
U3060
UB260
CRITICAL BBR_XT_ROM:BLANK1335S00133
CRITICAL BBR_XT_ROM:P01
CRITICAL1
CRITICAL
CRITICAL
BBR_WR_ROM:BLANK
BBR_WR_ROM:P0
BBR_XT_ROM:PVT
BBR_WR_ROM:PVT
UB260U3060
TABLE_ALT_HEAD
P1 341S01411 341S01412
P0a 341S01466 341S01467
TABLE_ALT_ITEM
P1a 341S01511 341S01512
P1b 341S01511 341S01512
EVT 341S01511 341S01512
CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION
U37501
U3750
CRITICAL
CRITICAL
U3750 CRITICAL
BT_ROM:BLANK
BT_ROM:PVT
P1 BT ROM:341S01417
TABLE_ALT_HEAD
P0a BT ROM:341S01434, same as in J152
P1a BT ROM:341S01501, same as in J152
TABLE_ALT_ITEM
P1b BT ROM:341S01501, same as in P1a
EVT BT ROM:341S01501, same as in P1a
TABLE_ALT_ITEM
CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION
U3710
CRITICAL
WIFI_ROM:BLANK
WIFI_ROM:PVT
P1a WIFI ROM 341S00725
P1b WIFI ROM 341S00725
TABLE_ALT_HEAD
TABLE_ALT_ITEM
EVT WIFI ROM 341S00725
C
Strategic Silicon
TABLE_STRATEGIC_HEAD
PART# COMMENT
337S00456 08
333S00125
333S00126
333S00167 08
left
right
335S00322 10
335S00324 09
335S00325 09
335S00329
335S00330
335S00332
338S00285 08
353S01442
338S00408
353S01188
353S01525
BT_ROM:P01
353S00928 06
338S00253
353S4415
353S01320
338S1163
SYNC_MASTER=myEE SYNC_DATE=03/01/2019
PAGE TITLE
STRATEGIC VALUE
01333S00069
01333S00070
01
01
08333S00166
09339S00370
09339S00372
08338S00267
10335S00321
09335S00327
09
09
09
05
08
09
06
07353S00526
02353S01077
08353S01629
09
01
08
01
CPU
MEMORY
MEMORY
MEMORY
MEMORY
MEMORY
MEMORY
pSOC
pSOC
CALPE
NAND
NAND
NAND
NAND
NAND
NAND
NAND
NAND
OCARINA
ACE
TITAN RIDGE
DEBUG MUX2
SUONA
IMVP8
TPS62180
ISL95870HRUZ
TAS5770L
SECURE ELEMENT
BACKLIGHT CONTROLLER
MIPI SWITCH
ACCELEROMETER
TABLE_STRATEGIC__ITEM
TABLE_STRATEGIC__ITEM
TABLE_STRATEGIC__ITEM
TABLE_STRATEGIC__ITEM
TABLE_STRATEGIC__ITEM
TABLE_STRATEGIC__ITEM
TABLE_STRATEGIC__ITEM
TABLE_STRATEGIC__ITEM
TABLE_STRATEGIC__ITEM
TABLE_STRATEGIC__ITEM
TABLE_STRATEGIC__ITEM
TABLE_STRATEGIC__ITEM
TABLE_STRATEGIC__ITEM
TABLE_STRATEGIC__ITEM
TABLE_STRATEGIC__ITEM
TABLE_STRATEGIC__ITEM
TABLE_STRATEGIC__ITEM
TABLE_STRATEGIC__ITEM
TABLE_STRATEGIC__ITEM
TABLE_STRATEGIC__ITEM
TABLE_STRATEGIC__ITEM
TABLE_STRATEGIC__ITEM
TABLE_STRATEGIC__ITEM
TABLE_STRATEGIC__ITEM
TABLE_STRATEGIC__ITEM
TABLE_STRATEGIC__ITEM
TABLE_STRATEGIC__ITEM
TABLE_STRATEGIC__ITEM
TABLE_STRATEGIC__ITEM
TABLE_STRATEGIC__ITEM
TABLE_STRATEGIC__ITEM
B
A
BOM Configuration
SIZE
D
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
2 OF 150
SHEET
2 OF 109
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
BOM VariantsBOM Groups
D
BOM GROUP BOM OPTIONS
X1795_COMMON
X1795_COMMON1
X1795_COMMON2
X1795_COMMON3
X1795_PROGPARTS
X1795_DEVEL:ENG
X1795_DEVEL:DVT
X1795_DEVEL:PVT
USBC_MLB_TBT_OPTS
USBC_MLB_TBT
X1795_USBC
SCH,PCB,ALTERNATE,COMMON,X1795_COMMON1,X1795_COMMON2,X1795_COMMON3,X1795_PROGPARTS
X1795_USBC,SYSDET:FET,BOARD_ID,BOARD_REV:110
EDP_ENABLE,XDP:YES,SKIP_5V3V3:AUDIBLE,RF_TUNING
LOADRC:YES,SE:PROD_2019
BBR_XT_ROM:PVT,BBR_WR_ROM:PVT,WIFI_ROM:PVT,BT_ROM:PVT
ALTERNATE,ESPI_DBG,DBGLED,USBC_DBG,XDP_CONN:YES,WIFI_DBG,SSD_DBG,FAN_DBG,DEBUG_BUTTON,LOADISNS,SENSOR:DEV,BOOTCFG0
ALTERNATE,USBC_DBG,XDP_CONN:YES,WIFI_DBG
ALTERNATE
BBR_FORCE_PWR:ACE,BBR_GP6:BBR_S0
BBR_X_PWR:SWSW_VOUTLV,BBR_T_PWR:SWSW_VOUTLV,BBR_PERST:PLTRST,BBR_RST:SPLIT
BBR_TR:QSA1,ACE2:B2,USBC_MLB_TBT,USBC_MLB_TBT_OPTS
CMPT:THRSSD
CMPT:512GSSD
POLY:27UF
TABLE_BOMGROUP_HEAD
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
BOM NUMBER BOM NAME BOM OPTIONS
685-00325 COMMON BOM,MLB-WELL,X1795 X1795_COMMON
985-01186 X1795_DEVEL:ENG
939-08546
939-08545
DEV BOM,MLB-WELL,X1795
PCBA,MLB-WELL,NO CPU,X1795
PCBA,MLB-WELL,CPU SOCKET,X1795
BASE_BOM,DEVEL_BOM,ALTERNATE
BASE_BOM,DEVEL_BOM,ALTERNATE,CPU:SOCKET
P0: DC1 CPU SOCKET, DC2 NO CPU
Variable BOM Groups
Development/Base BOMs
CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION
685-00325 BASE1 CRITICAL BASE_BOM
985-01186
1 DEVEL CRITICAL DEVEL_BOMPOLY:33UF
COMMON BOM,MLB-WELL,X1795
DEV BOM,MLB-WELL,X1795
TABLE_BOMGROUP_HEAD
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
D
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
C
board_rev TABLE
P0a NO DFR: 000
P0a with DFR: 001
P1a NO DFR: 010
P1a with DFR: 011
P1b with DFR: 100
evt-01: 101
evt-02: 101
DFR: 110
APN POLY CAPS
128S00093
128S00093
128S00106
128S00106
41
15
41
15
TANT,PLOY,NEC 33uF, 16V
TANT,PLOY,NEC 33uF, 16V
TANT,PLOY,NEC 27uF, 18V
TANT,PLOY,NEC 27uF, 18V
C6480,C6481,C6482,C6483,C6484,C6485,C6580,C6581,C6582,C6583,C6584,C6585,C6907,C6908,C7210,C7211,C7212,C7213,C7220,C7221,C7222,C7223,C7230,C7231,C7232,C7233,C7240,C7241,C7242,C7402,C7403,C7404,C7405,C7406,C7407,C7600,C7660,C7661,C7662,C7675,C7702
C8100,C8109,C8111,C9079,C3502_VWR,C3503_VWR,C3504_VWR,C3502_VXT,C3503_VXT,C3504_VXT,C8172,C8173,C8174,C8175,C8176
C6480,C6481,C6482,C6483,C6484,C6485,C6580,C6581,C6582,C6583,C6584,C6585,C6907,C6908,C7210,C7211,C7212,C7213,C7220,C7221,C7222,C7223,C7230,C7231,C7232,C7233,C7240,C7241,C7242,C7402,C7403,C7404,C7405,C7406,C7407,C7600,C7660,C7661,C7662,C7675,C7702
C8100,C8109,C8111,C9079,C3502_VWR,C3503_VWR,C3504_VWR,C3502_VXT,C3503_VXT,C3504_VXT,C8172,C8173,C8174,C8175,C8176
CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION
CRITICAL
CRITICAL
CRITICAL
CRITICAL
POLY:33UF
C
POLY:33UF
POLY:27UF
POLY:27UF
B
DRAM
333S00180
333S00205 4
333S00218
333S00181
333S00206 4
333S00219
333S00204
333S00207
333S00220
4
4
4
4
4
4
4
IC,SDRAM,LPDDR4x-4266,16GBIT,19NM,HYN,BGA200
IC,SDRAM,LPDDR4x-4266,16GBIT,18NM,MIC,BGA200
IC,SDRAM,LPDDR4x-4266,16GBIT,19NM,SS,BGA200
IC,SDRAM,LPDDR4x-4266,32GBIT,21NM,HYN,BGA200
IC,SDRAM,LPDDR4x-4266,32GBIT,18NM,MIC,BGA200
IC,SDRAM,LPDDR4x-4266,32GBIT,19NM,SS,BGA200
IC,SDRAM,LPDDR4x-3733,64GBIT,19NM,HYN,H,BGA200
IC,SDRAM,LPDDR4x-4266,64GBIT,19NM,MIC,BGA200
IC,SDRAM,LPDDR4x-4266,64GBIT,16NM,MIC,BGA200
U2300_1,U2300_2,U2300_3,U2300_4
U2300_1,U2300_2,U2300_3,U2300_4
U2300_1,U2300_2,U2300_3,U2300_4
U2300_1,U2300_2,U2300_3,U2300_4
U2300_1,U2300_2,U2300_3,U2300_4
U2300_1,U2300_2,U2300_3,U2300_4
U2300_1,U2300_2,U2300_3,U2300_4
U2300_1,U2300_2,U2300_3,U2300_4
U2300_1,U2300_2,U2300_3,U2300_4
CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
DRAM:HY_8G
DRAM:MI_8G
DRAM:SS_8G
DRAM:HY_16G
DRAM:MI_16G
DRAM:SS_16G
DRAM:HY_32G
DRAM:MI_32G
DRAM:SS_32G
Main DRAM SPD Straps
BOM GROUP BOM OPTIONS
DRAMCFG:HY_8G
DRAMCFG:MI_8G
DRAMCFG:SS_8G
DRAMCFG:HY_16G
DRAMCFG:MI_16G
DRAMCFG:SS_16G
DRAMCFG:HY_32G
DRAMCFG:MI_32G
DRAMCFG:SS_32G
DRAM:HY_8G,RAMCFG3_L,RAMCFG2_L,RAMCFG1_L,RAMCFG0_L
DRAM:MI_8G,RAMCFG3_L,RAMCFG2_L,RAMCFG1_L
DRAM:SS_8G,RAMCFG3_L,RAMCFG2_L,RAMCFG0_L
DRAM:HY_16G,RAMCFG3_L,RAMCFG1_L,RAMCFG0_L
DRAM:MI_16G,RAMCFG3_L,RAMCFG1_L
DRAM:SS_16G,RAMCFG3_L,RAMCFG0_L
DRAM:HY_32G,RAMCFG2_L,RAMCFG1_L,RAMCFG0_L
DRAM:MI_32G,RAMCFG2_L,RAMCFG1_L
DRAM:SS_32G,RAMCFG2_L,RAMCFG0_L
B
TABLE_BOMGROUP_HEAD
NOTE
TABLE_BOMGROUP_ITEM
0x10
TABLE_BOMGROUP_ITEM
0x11
TABLE_BOMGROUP_ITEM
0x12
TABLE_BOMGROUP_ITEM
0x14
TABLE_BOMGROUP_ITEM
0x15
TABLE_BOMGROUP_ITEM
0x16
TABLE_BOMGROUP_ITEM
0x18
TABLE_BOMGROUP_ITEM
0x19
TABLE_BOMGROUP_ITEM
0x1A
A
8
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
PAGE TITLE
A
BOM Configuration
CPU DRAM CFG Chart
CAPACITY
8
16
32 SAMSUNG
RSVD
0
0
1
1
67
CFG 2CFG 3
0
1
0
1
35 4
VENDOR
HYNIX
MICRON
CFG 1
0
0
1
1RSVD
CFG 0
0
1
0
1
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
2
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
3 OF 150
SHEET
3 OF 109
1
SIZE
D
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
BOARD MECHANICALS
D
Shield Cans - BOTTOM SIDE
BURNSIDE BRIDGE - LEFT (U2800_T) - 806-12859
1
SH0418
SM
OMIT
FENCE-TITAN-RIDGE-X940
BURNSIDE BRIDGE - RIGHT (U2800_W) - 806-12859
1
SH0420
SM
OMIT
FENCE-TITAN-RIDGE-X940
LPDDR4 (U2300_1 ~ U2300_4) - 806-20740
Shield Cans - TOP SIDE
SOC (U3900) - 806-12855
1
SH0412
SM
FENCE-MLB-BTM-H9M-X940
DIPLEXERS - 806-12854
1
SH0411
SM
SHLD-MLB-DIPLEXERS-X940
CPU SLED (U0500) - 806-14839
POGO PINS
LIO and RIO -2X (870-09666)
SH0471
POGO-2.0OD-2.95H-SM
1
AROUND THE FAN AND CENTER - 8X (870-09667)
POGO-2.0OD-2.95H-SM
SH0463
POGO-2.3OD-4.0H-SM
SM-1
1
POGO-2.3OD-4.0H-SM POGO-2.3OD-4.0H-SM POGO-2.3OD-4.0H-SM
SH0472
SM-1SM-1
1
SH0464
SM-1 SM-1 SM-1
1
SH0465
1
SH0466
1
Cowling Bosses - BOTTOM SIDE
remove DFR TOUCH CONN (J4402) - 860-00414
USB-C CONN - LIO (J3300) - 860-00392
SH0445
3.4OD1.75ID-1.12H-SM3.4OD1.75ID-1.12H-SM
1
DFR DISPLAY CONN (J4401) - 860-00412
SH0446
1
D
C
1
SH0415
SM
OMIT
SHLD-FENCE-X379
removed NAND - TOP SOUTH (U8600)
removed NAND - BOTTOM SOUTH (U8700)
removed NAND - TOP NORTH (U8800)
removed NAND - BOTTOM NORTH (U8900)
806-24474
806-24476
1 SH0415 CRITICAL
J214 LPDDR shielding can
SHIELD FENCE,BURNSIDE BRIDGE,X1413
1
SH0423
SM
SLED-METAL-MATT-NICKEL-X940
CPU SLED (U0500) - 806-14839
1
SH0424
SM
SLED-METAL-MATT-NICKEL-X940
CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION
SH0418,SH04202 CRITICAL
SH0467
POGO-2.3OD-4.0H-SM POGO-2.3OD-4.0H-SM
SM-1
1
SH0468
1
SH0469
POGO-2.3OD-4.0H-SM
SM-1
1
SH0470
POGO-2.3OD-4.0H-SM
1
PLATED HOLES
Detail D Detail JDetail E
2X (998-19890) 1X (998-19892)
1
3.0R2.25-NSP
1
3.0R2.25-NSP
SH0480
OMIT_TABLE
SH0481
2X (998-19891)
OMIT_TABLEOMIT_TABLE
1
SL-1.86X3.27-2.61X4.02-NSP
TH-NSP
OMIT_TABLE
1
SL-1.86X3.27-2.61X4.02-NSP
TH-NSP
SH0482
SH0483
OMIT_TABLE
1
2.61R1.86-NSP
SH0484
REMOVE SH0426/SH0427
IPD CONN (J4501) - 860-00412
SM-1SM-1
SH0428
3.4OD1.75ID-1.7H-SM
1
3.4OD1.75ID-1.7H-SM
SH0429
1
DFR (J5110) - 860-01484
C
SH0430
3.4OD1.75ID-1.5H-SM
1
USB-C CONN - RIO (JB500) - 860-00392
SH0447
3.4OD1.75ID-1.12H-SM
1
3.4OD1.75ID-1.12H-SM
SH0448
1
B
Shield CAN Alignment Slots 14X - 998-04440 (1.2mm X 0.4mm)
SH0449
TH-NSP
1
SL-1.2X0.4-1.5X0.7
SH0455
TH-NSP
1
SL-1.2X0.4-1.5X0.7
SH0450
TH-NSP
1
SL-1.2X0.4-1.5X0.7
SH0461
TH-NSP
1
SL-1.2X0.4-1.5X0.7
SH0451
TH-NSP
1
SL-1.2X0.4-1.5X0.7
SH0457
TH-NSP
1
SL-1.2X0.4-1.5X0.7
SH0452
TH-NSP
1
SL-1.2X0.4-1.5X0.7
SH0458
TH-NSP
1
SL-1.2X0.4-1.5X0.7
TOP Rubber Mount Standoffs - 13X - (860-00430)
REMOVE SH0414
Thermal Stage Mounting Holes
Plated Through Hole - 3.15mm - APN 998-0845
SH0490
3P9R3P15
1
Plated Through Hole - 3.6mm - APN 998-03850
SH0491
1
SH0492
1
SH0493
4.0R3.6-NSP4.0R3.6-NSP4.0R3.6-NSP
1
AUDIO JACK CONN (J6600) - 860-00829
SH0432
2.7X1.8R-1.4ID-1.64H-SM
1
MESA CONN (J4900) - 860-00829
SH0433
2.7X1.8R-1.4ID-1.64H-SM
1
Bottom Thermal Stage Boss - 860-01604
NOSTUFF
SH0434
4.0OD1.6ID-0.92H-TH
1
B
A
SH0400
1
2
SH0404
2.8OD1.2ID-1.435H-SM
1
2
SH0408
1
2
SH0401
1
2
SH0405
1
2
SH0409
1
2
Bottom Rubber Mount Standoffs
SH0402
1
2
SH0406
1
2
SH0403
- 1X - (860-00476)
2.8OD1.2ID-1.435H-SM2.8OD1.2ID-1.435H-SM2.8OD1.2ID-1.435H-SM2.8OD1.2ID-1.435H-SM
1
SH0437
2.8OD1.2ID-3.25H-SM
2
1
2
SH0407
2.8OD1.2ID-1.435H-SM2.8OD1.2ID-1.435H-SM2.8OD1.2ID-1.435H-SM
1
2
Cowling Bosses - TOP SIDE
eDP CONN (J8500) - 860-00415
SH0421
3.4OD1.75ID-0.844H-SM3.4OD1.75ID-0.844H-SM
1
PAGE TITLE
SH0422
1
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
A
PD Parts
DRAWING NUMBER
051-05198
SH0410
2.8OD1.2ID-1.435H-SM2.8OD1.2ID-1.435H-SM2.8OD1.2ID-1.435H-SM
1
2
2.8OD1.2ID-1.435H-SM
SH0436
1
2
BOM_COST_GROUP=MECHANICALS
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
Apple Inc.
REVISION
6.0.0
BRANCH
evt-3
PAGE
4 OF 150
SHEET
4 OF 109
SIZE
D
8
67
35 4
2
1
D
www.haojiyoubbs.com
QQ微信：181806465
678
66B8
66B8
66B8
66B8
66B8
66B8
66B8
66B8
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
EDP_INT_ML_P<0>
EDP_INT_ML_N<0>
EDP_INT_ML_P<1>
EDP_INT_ML_N<1>
EDP_INT_ML_P<2>
EDP_INT_ML_N<2>
EDP_INT_ML_P<3>
EDP_INT_ML_N<3>
NC
NC
NC
NC
NC
NC
NC
NC
AH5
AH4
AJ5
AJ4
AE4
AE5
AC4
AC5
AV4
AV5
AT4
AT5
AN5
AN4
AL5
AL4
DDIA_TXP[0]
DDIA_TXN[0]
DDIA_TXP[1]
DDIA_TXN[1]
DDIA_TXP[2]
DDIA_TXN[2]
DDIA_TXP[3]
DDIA_TXN[3]
DDIB_TXP[0]
DDIB_TXN[0]
DDIB_TXP[1]
DDIB_TXN[1]
DDIB_TXP[2]
DDIB_TXN[2]
DDIB_TXP[3]
DDIB_TXN[3]
OMIT_TABLE
U0500
ICL-UN
ICL-UN-4+2
BGA
SYM 1 OF 19
GPP_A16/DDSP_HPDB/TIME_SYNC1
GPP_A15/DDSP_HPDC/TIME_SYNC0
DDI
DISPLAY SIDEBANDS
DDIA_AUX_P
DDIA_AUX_N
DDIB_AUX_P
DDIB_AUX_N
GPP_A17/DDSP_HPDA
EDP_BKLTEN
EDP_BKLTCTL
EDP_VDDEN
DISP_UTILS
DISP_RCOMP
AF4
AF5
AP4
AP5
DJ39
DC40
DH39
DC38
DC39
DC37
H6
AB2
EDP_INT_AUX_P
EDP_INT_AUX_N
NC
NC
CPU_DP_INT_HPD
PCH_WLAN_AUDIO_SYNC
PCH_BT_AUDIO_SYNC
EDP_BKLT_EN
BKLT_PWM_MLB2TCON
EDP_PANEL_PWR_EN
NC
DISP_RCOMP
1
R0531
150
1%
1/20W
MF
201
2
3 245
66B8
BI
66B8
BI
5A6 32C3
IN
5A6 17B1
IN
5A6 17B1
IN
5A6 65C7
OUT
17D3
OUT
66C8
OUT
1
D
C
B
PP3V3_S5
OMIT_TABLE
U0500
ICL-UN
ICL-UN-4+2
BGA
19D5
OUT
19D5
OUT
19D5
BI
19D5
BI
19D5
OUT
19D5
OUT
19D5
BI
19D5
BI
19D5
OUT
19C5
OUT
19C5
BI
19C5
BI
19C5
OUT
19C5
OUT
19C5
BI
19C5
BI
19C5
OUT
19C5
OUT
19C5
BI
19C5
BI
19C5
OUT
19C5
OUT
19C5
BI
19C5
BI
19B5
OUT
19B5
OUT
19B5
BI
19B5
BI
19B5
74B2 14A7 13A7 12B7
19B5
19B5
19B5
OUT
OUT
BI
BI
USBC_HSX_R2D_C_P<1>
USBC_HSX_R2D_C_N<1>
USBC_HSX_D2R_C_P<1>
USBC_HSX_D2R_C_N<1>
USBC_HSX_R2D_C_P<2>
USBC_HSX_R2D_C_N<2>
USBC_HSX_D2R_C_P<2>
USBC_HSX_D2R_C_N<2>
USBC_HST_R2D_C_P<1>
USBC_HST_R2D_C_N<1>
USBC_HST_D2R_C_P<1>
USBC_HST_D2R_C_N<1>
USBC_HST_R2D_C_P<2>
USBC_HST_R2D_C_N<2>
USBC_HST_D2R_C_P<2>
USBC_HST_D2R_C_N<2>
USBC_HSW_R2D_C_P<1>
USBC_HSW_R2D_C_N<1>
USBC_HSW_D2R_C_P<1>
USBC_HSW_R2D_C_P<2>
USBC_HSW_R2D_C_N<2>
USBC_HSW_D2R_C_P<2>
USBC_HSW_D2R_C_N<2>
USBC_HSR_R2D_C_P<1>
USBC_HSR_R2D_C_N<1>
USBC_HSR_D2R_C_P<1>
USBC_HSR_D2R_C_N<1>
USBC_HSR_R2D_C_P<2>
USBC_HSR_R2D_C_N<2>
USBC_HSR_D2R_C_P<2>
USBC_HSR_D2R_C_N<2>
BL5
BL6
BH1
BH2
BG5
BG6
BF2
BF1
BD6
BD5
BC1
BC2
BA5
BA6
BB2
BB1
BP5
BP6
BR2
BR1
BU6
BU5
BT1
BT2
BY5
BY6
BW2
BW1
CD6
CD5
CA1
CA2
TCP0_TX_P0
TCP0_TX_N0
TCP0_TXRX_P0
TCP0_TXRX_N0
TCP0_TX_P1
TCP0_TX_N1
TCP0_TXRX_P1
TCP0_TXRX_N1
TCP1_TX_P0
TCP1_TX_N0
TCP1_TXRX_P0
TCP1_TXRX_N0
TCP1_TX_P1
TCP1_TX_N1
TCP1_TXRX_P1
TCP1_TXRX_N1
TCP2_TX_P0
TCP2_TX_N0
TCP2_TXRX_P0
TCP2_TXRX_N0
TCP2_TX_P1
TCP2_TX_N1
TCP2_TXRX_P1
TCP2_TXRX_N1
TCP3_TX_P0
TCP3_TX_N0
TCP3_TXRX_P0
TCP3_TXRX_N0
TCP3_TX_P1
TCP3_TX_N1
TCP3_TXRX_P1
TCP3_TXRX_N1
SYM 8 OF 19
GPP_E13/DDPA_CTRLCLK/TBT_LSX0_TXD
GPP_E14/DDPA_CTRLDATA/TBT_LSX0_RXD
GPP_E15/DPPB_CTRLCLK/TBT_LSX1_TXD
GPP_E16/DPPB_CTRLDATA/TBT_LSX1_RXD
GPP_E17/DPPC_CTRLCLK/TBT_LSX2_TXD
GPP_E18/DPPC_CTRLDATA/TBT_LSX2_RXD
GPP_E11/TBT_LSX3_TXD
GPP_E12/TBT_LSX3_RXD
TCP0_AUX_P
TCP0_AUX_N
TCP1_AUX_P
TCP1_AUX_N
TCP2_AUX_P
TCP2_AUX_N
TCP3_AUX_P
TCP3_AUX_N
TC_RCOMP_P
TC_RCOMP_N
BJ6
BJ5
BB6
BB5
BR5
BR6
CB5
CB6
DE35
DC35
DH34
DJ34
DG35
DH35
DE25
DF25
BL1
BM1
USBC_HSX_AUXCH_C_P
USBC_HSX_AUXCH_C_N
USBC_HST_AUXCH_C_P
USBC_HST_AUXCH_C_N
USBC_HSW_AUXCH_C_P
USBC_HSW_AUXCH_C_N
USBC_HSR_AUXCH_C_P
USBC_HSR_AUXCH_C_N
LSX_HSX_R2P
LSX_HSX_P2R
LSX_HST_R2P
LSX_HST_P2R
LSX_HSW_R2P
LSX_HSW_P2R
LSX_HSR_R2P
LSX_HSR_P2R
TC_RCOMP_P
TC_RCOMP_NUSBC_HSW_D2R_C_N<1>
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
R0530
150
1/20W
1%
MF
201
21
19D5 78C4
19D5 78C4
19C5 78C4
19C5 78C4
19C5 78C4
19C5 78C4
19B5 78C4
19B5 78C4
5B6 15B6 19D5
15B6 19D5
5B6 15B6 19C5
15B6 19C5
5A6 15A6 19C5
19C5
5A6 15B6 19B5
15B6 19B5
PLACE_NEAR=U0500.BL1:12.7MM
C
B
A
R0561
R0562
R0563
R0564
10K
10K
10K
10K
21
MF1/20W
21
MF1/20W
21
MF1/20W
21
MF1/20W
LSX_HS_P2R PD in USBC block
R0557
R0558
R0559
R0560
100K
100K
100K
100K
21
MF1/20W
21
MF1/20W
21
MF1/20W
21
MF1/20W
2015%
LSX_HSX_R2P
LSX_HST_R2P
2015%
LSX_HSW_R2P
2015%
LSX_HSR_R2P
2015%
CPU_DP_INT_HPD
2015%
PCH_WLAN_AUDIO_SYNC
2015%
EDP_BKLT_EN
2015%
PCH_BT_AUDIO_SYNC
2015%
5C3 15B6 19D5
5C3 15B6 19C5
5B3 15A6 19C5
5B3 15B6 19B5
5D3 32C3
5D3 17B1
5D3 65C7
5D3 17B1
15A8
FIVR_VLOAD_GTM
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
AH10
AJ10
AP10
AW10
BA10
BF34
BH34
BH38
BH9
BN34
BP10
BR10
C3
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
OMIT_TABLE
U0500
ICL-UN
ICL-UN-4+2
BGA
SYM 19 OF 19
SPARE
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
CJ40
CL38
CW35
DB33
DB36
DF1
DF3
DH3
DJ3
F1
H1
M36
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NCNC
DESIGN: X502/DEV_MLB_U
LAST CHANGE: Tue Apr 28 20:32:21 2015
SYNC_MASTER=myEE SYNC_DATE=03/01/2019
PAGE TITLE
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
BOM_COST_GROUP=CPU & CHIPSET
IV ALL RIGHTS RESERVED
CPU GFX and USB Type-C
DRAWING NUMBER
051-05198
Apple Inc.
REVISION
6.0.0
BRANCH
evt-3
PAGE
5 OF 150
SHEET
5 OF 109
A
SIZE
D
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
77D2 75B4 64A2 54B3 31B6 16C7 13D8 10B3 8C7 8A5
PP1V05_VCCSTG_OUT_LGC
8B7 15D2
31A3
BI
CPU_PROCHOT_L
PP1V05_S0_CPU_VCCST
R0610
1K
5%
1/20W
MF
201
PLACE_NEAR=U0500.E2:254MM
1
R0612
1K
5%
1/20W
MF
201
2
J2
CK6
J1
E2
C4
N2
N1
P1
P2
H2
E4
CF41
CN1
OMIT_TABLE
CATERR*
PECI
PROCHOT*
THRMTRIP*
SKTOCC*
BPM[0]*
BPM[1]*
BPM[2]*
BPM[3]*
PROC_PRDY*
PROC_PREQ*
PROC_POPIRCOMP
PCH_OPIRCOMP
U0500
ICL-UN
ICL-UN-4+2
BGA
SYM 4 OF 19
JTAG
CPU MISC
PROC_TCK
PROC_TDI
PROC_TDO
PROC_TMS
PROC_TRST*
PCH_TCK
PCH_TDI
PCH_TDO
PCH_TMS
PCH_TRST*
PCH_JTAGX
AC8
Y6
V6
T6
AA2
AA8
Y5
V5
T5
AA1
W1
XDP_CPU_TCK
XDP_CPU_TDI
XDP_CPU_TDO
XDP_CPU_TMS
XDP_CPU_TRST_L
XDP_PCH_TCK
XDP_PCH_TDI
XDP_PCH_TDO
XDP_PCH_TMS
XDP_PCH_TRST_L
PCH_JTAGX
IN
IN
OUT
IN
IN
IN
IN
OUT
IN
IN
IN
D
15C8 15D2
15C1
15C1 15D2
15C1
15C1
15C6 15D2
15B1 15D2
15B1 15D2
15B1 15D2
15B1
15C8
49.9
1%
1/20W
MF
201
1
2
R0613
1
62B6 77C2
2
R0611
510
2 1
5%
1/20W
MF
201
31C2
31B6 62D6 77C2 80A6
6A7 15D6 77D3
6A7 15D6
6A7
6A7
15D6
15D6
OUT
BI
OUT
BI
BI
BI
BI
OUT
IN
CPU_CATERR_L
CPU_PECI
CPU_PROCHOT_R_L
PM_THRMTRIP_L
NC_SKTOCC_L
CPU_BPM_L<0>
CPU_BPM_L<1>
TP_CPU_BPM_L<2>
TP_CPU_BPM_L<3>
XDP_CPU_PRDY_L
XDP_CPU_PREQ_L
PROC_POPIRCOMP
PCH_OPIRCOMP
C
B
PPVCCIO_OUT
R0660
R0661
R0662
R0663
R0664
R0665
R0666
R0640
R0641
R0642
R0643
NOSTUFF
1K
21
1K
21
21
21
1K
21
1K
21
1K
21
10K
21
10K
21
10K
21
10K
21
75A2 15C7
PLACE_NEAR=J1800.10:20MM
NO_XNET_CONNECTION=1
5% 1/20W MF 201
PLACE_NEAR=J1800.12:20MM
NO_XNET_CONNECTION=1
MF1/20W5%
MF1/20W5%
MF1/20W5%
MF
201MF1/20W5%
201
201
201
2015%
PLACE_NEAR=J1800.9:20MM
NO_XNET_CONNECTION=1
5% MF1K201
1/20W
PLACE_NEAR=J1800.11:20MM
NO_XNET_CONNECTION=1
5% 1/20W MF1K201
PLACE_NEAR=J1800.15:20MM
NO_XNET_CONNECTION=1
PLACE_NEAR=J1800.27:20MM
NO_XNET_CONNECTION=1
PLACE_NEAR=J1800.29:20MM
NO_XNET_CONNECTION=1
NO_XNET_CONNECTION=1
1/20W
NO_XNET_CONNECTION=1
5% 201
1/20W MF
NO_XNET_CONNECTION=1
5% 201
1/20W MF
NO_XNET_CONNECTION=1
5% 201
1/20W MF
CPU_CFG<0>
CPU_CFG<1>
CPU_CFG<8>
CPU_CFG<9>
CPU_CFG<10>
CPU_CFG<12>
CPU_CFG<13>
CPU_BPM_L<0>
CPU_BPM_L<1>
TP_CPU_BPM_L<2>
TP_CPU_BPM_L<3>
6C5 15C8 15D6
6C5 15D6
6B5 15D3
6B5 15D3
6B5 15D3
6B5 15D3
6B5 15D3
6D5 15D6 77D3
6D5 15D6
6D5
6D5
49.9
1%
1/20W
MF
201
1
2
R0681
PLACE_NEAR=U0500.CF41:12.7MM
R0682
49.9
1%
1/20W
MF
201
(IPU)
(IPU)
(IPU)
(IPU)
(IPU)
(IPU)
(IPU)
(IPU)
(IPU)
(IPU)
(IPU)
(IPU)
(IPU)
(IPU)
(IPU)
(IPU)
(IPU)
(IPU)
(IPU)
(IPU)
R0680
49.9
1%
1/20W
MF
201
SD3_RCOMP
1
2
PLACE_NEAR=U0500.CN1:12.7MM
15D6
R0622
6B7 15C8
BI
6B7 15D6
BI
15D6
BI
15D6
BI
6A8 15D6
BI
15D6
BI
15C6
BI
15C6
BI
6B7 15D3
BI
6B7 15D3
BI
6B7 15D3
BI
15D3
BI
6B7 15D3
BI
6B7 15D3
BI
15C3
BI
15C3
BI
15D3
BI
15D3
BI
15D3
BI
15D3
BI
1
200
1%
1/20W
MF
201
2
CPU_CFG<0>
CPU_CFG<1>
CPU_CFG<2>
CPU_CFG<3>
CPU_CFG<4>
CPU_CFG<5>
CPU_CFG<6>
CPU_CFG<7>
CPU_CFG<8>
CPU_CFG<9>
CPU_CFG<10>
CPU_CFG<11>
CPU_CFG<12>
CPU_CFG<13>
CPU_CFG<14>
CPU_CFG<15>
CPU_CFG<16>
CPU_CFG<17>
CPU_CFG<18>
CPU_CFG<19>
PLACE_NEAR=U0500.CU47:12.7MM
CPU_CFG_RCOMP
15C2
1
2
OUT
ITP_PMODE
FIVR_PROBE_ANA_0
15A6
FIVR_PROBE_ANA_1
15A6
FIVR_PROBE_DIG_0
15A6
FIVR_PROBE_DIG_1
15A6
FIVR_ANAPB0
15A6
FIVR_ANAPB1
15A6
CU47
BF10
BD10
BG10
CU33
CV32
SD3_RCOMP
G9
H8
G8
K5
K6
N4
N5
K4
R5
R6
R8
T8
N6
Y8
V8
T4
M5
M6
U2
U1
R1
K1
BE9
OMIT_TABLE
ICL-UN-4+2
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
CFG[18]
CFG[19]
CFG_RCOMP
DBG_PMODE
IST_TP[0]
IST_TP[1]
IST_TRIG[0]
IST_TRIG[1]
PCH_IST_TP[0]
PCH_IST_TP[1]
SYM 18 OF 19
U0500
ICL-UN
BGA
RESERVED
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
TP
TP
TP
TP
A43
AB1
AL10
AT10
AV1
AV2
AV10
AW1
AW2
B44
BG9
BK34
BL2
BM2
CE10
CG10
CN32
CP33
CT33
CU32
CY10
DC1
DD1
DH9
DH20
DJ9
K2
R33
T33
CR32
CV10
DJ45
DJ46
DDR_VIEW_0
TP_CPU_RSVD_AB1
FIVR_VLOAD_SA
FIVR_VLOAD_CORE1
NC_TP_CPU_RSVD_AV1
TP_CPU_RSVD_AV2
FIVR_VLOAD_CORE3
NC_TP_CPU_RSVD_AW1
TP_CPU_RSVD_AW2
DDR_VIEW_1
FIVR_VLOAD_TCSS
FIVR_VLOAD_CORE2
NC_TP_CPU_RSVD_BL2
NC_TP_CPU_RSVD_BM2
PEG_VIEW_2
PEG_VIEW_3
NC_TP_CPU_RSVD_CN32
NC_TP_CPU_RSVD_CP33
FIVR_VLOAD_VCCIO
FIVR_VLOAD_VNN
FIVR_VLOAD_1P05
NC_TP_CPU_RSVD_DC1
NC_TP_CPU_RSVD_DD1
NC_TP_CPU_RSVD_DH9
NC_TP_CPU_RSVD_DH20
NC_TP_CPU_RSVD_DJ9
TP_CPU_RSVD_K2
FIVR_VLOAD_CCF
FIVR_VLOAD_CORE0
NC_TP_CPU_RSVD_CR32
NC_TP_CPU_RSVD_CV10
NC_TP_CPU_RSVD_DJ45
NC_TP_CPU_RSVD_DJ46
15A8
15A8
15A8
76B3
15A8
76C3
15A8
15A8
15A8
76B3
76C3
15A8
15A8
76C3
76C3
15A6
15A6
15A6
76C3
76C3
76C3
76C3
76C3
15A8
15A8
76B3
76C3
76C3
76C3
C
B
A
1
2
1
R0650
100K
5%
1/16W
MF-LF
402
2
CFG<4> :eDP ENABLE/DISABLE 1 = DISABLED 0 = ENABLED
CPU_CFG<4>
6B5 15D6
EDP_ENABLE
R0634
1K
5%
1/20W
MF
201
8
NOSTUFF
IFDIM TRIGGER
DESIGN: X502/DEV_MLB_U
LAST CHANGE: Mon Apr 27 22:56:39 2015
A
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
PAGE TITLE
CPU MISC/JTAG/CFG/RSVD
DRAWING NUMBER
051-05198
Apple Inc.
REVISION
6.0.0
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
BOM_COST_GROUP=CPU & CHIPSET
67
35 4
IV ALL RIGHTS RESERVED
2
BRANCH
evt-3
PAGE
6 OF 150
SHEET
6 OF 109
1
SIZE
D
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
C
B
18D5
18D5
18D5
18D5
18D5
18D5
18D5
18D5
18D5
18D5
18D5
18D5
18D5
18D5
18D5
18D5
18C5
18C5
18C5
18C5
18C5
18C5
18C5
18C5
18C5
18C5
18C5
18C5
18C5
18C5
18C5
18C5
18C5
18C5
18C5
18C5
18C5
18C5
18C5
18C5
18C5
18B5
18B5
18B5
18B5
18B5
18B5
18B5
18B5
18B5
18B5
18B5
18B5
18B5
18B5
18B5
18B5
18B5
18B5
18B5
18B5
18B5
18B5
18B5
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
MEM_A_DQ_0<0>
MEM_A_DQ_0<1>
MEM_A_DQ_0<2>
MEM_A_DQ_0<3>
MEM_A_DQ_0<4>
MEM_A_DQ_0<5>
MEM_A_DQ_0<6>
MEM_A_DQ_0<7>
MEM_A_DQ_1<0>
MEM_A_DQ_1<1>
MEM_A_DQ_1<2>
MEM_A_DQ_1<3>
MEM_A_DQ_1<4>
MEM_A_DQ_1<5>
MEM_A_DQ_1<6>
MEM_A_DQ_1<7>
MEM_A_DQ_2<0>
MEM_A_DQ_2<1>
MEM_A_DQ_2<2>
MEM_A_DQ_2<3>
MEM_A_DQ_2<4>
MEM_A_DQ_2<5>
MEM_A_DQ_2<6>
MEM_A_DQ_2<7>
MEM_A_DQ_3<0>
MEM_A_DQ_3<1>
MEM_A_DQ_3<2>
MEM_A_DQ_3<3>
MEM_A_DQ_3<4>
MEM_A_DQ_3<5>
MEM_A_DQ_3<6>
MEM_A_DQ_3<7>
MEM_B_DQ_0<0>
MEM_B_DQ_0<1>
MEM_B_DQ_0<2>
MEM_B_DQ_0<3>
MEM_B_DQ_0<4>
MEM_B_DQ_0<5>
MEM_B_DQ_0<6>
MEM_B_DQ_0<7>
MEM_B_DQ_1<0>
MEM_B_DQ_1<1>
MEM_B_DQ_1<2>
MEM_B_DQ_1<3>
MEM_B_DQ_1<4>
MEM_B_DQ_1<5>
MEM_B_DQ_1<6>
MEM_B_DQ_1<7>
MEM_B_DQ_2<0>
MEM_B_DQ_2<1>
MEM_B_DQ_2<2>
MEM_B_DQ_2<3>
MEM_B_DQ_2<4>
MEM_B_DQ_2<5>
MEM_B_DQ_2<6>
MEM_B_DQ_2<7>
MEM_B_DQ_3<0>
MEM_B_DQ_3<1>
MEM_B_DQ_3<2>
MEM_B_DQ_3<3>
MEM_B_DQ_3<4>
MEM_B_DQ_3<5>
MEM_B_DQ_3<6>
MEM_B_DQ_3<7>
BW46
BW44
BW47
BU47
BW43
BU44
BU43
BU46
BT40
BT37
BT41
BV36
BT36
BV37
BV40
BV41
BP46
BP44
BP47
BM47
BP43
BM44
BM43
BM46
BL40
BL37
BL41
BN36
BL36
BN37
BN40
BN41
AW46
AW44
AW47
AU43
AW43
AU44
AU46
AU47
AU37
AV37
AU36
AV40
AV36
AU40
AV41
AU41
AP46
AP44
AP47
AM46
AP43
AM44
AM43
AM47
AM37
AN36
AM36
AN40
AN37
AM40
AN41
AM41
OMIT_TABLE
DDRA_DQ0[0]
DDRA_DQ0[1]
DDRA_DQ0[2]
DDRA_DQ0[3]
DDRA_DQ0[4]
DDRA_DQ0[5]
DDRA_DQ0[6]
DDRA_DQ0[7]
DDRA_DQ1[0]
DDRA_DQ1[1]
DDRA_DQ1[2]
DDRA_DQ1[3]
DDRA_DQ1[4]
DDRA_DQ1[5]
DDRA_DQ1[6]
DDRA_DQ1[7]
DDRA_DQ2[0]
DDRA_DQ2[1]
DDRA_DQ2[2]
DDRA_DQ2[3]
DDRA_DQ2[4]
DDRA_DQ2[5]
DDRA_DQ2[6]
DDRA_DQ2[7]
DDRA_DQ3[0]
DDRA_DQ3[1]
DDRA_DQ3[2]
DDRA_DQ3[3]
DDRA_DQ3[4]
DDRA_DQ3[5]
DDRA_DQ3[6]
DDRA_DQ3[7]
DDRB_DQ0[0]
DDRB_DQ0[1]
DDRB_DQ0[2]
DDRB_DQ0[3]
DDRB_DQ0[4]
DDRB_DQ0[5]
DDRB_DQ0[6]
DDRB_DQ0[7]
DDRB_DQ1[0]
DDRB_DQ1[1]
DDRB_DQ1[2]
DDRB_DQ1[3]
DDRB_DQ1[4]
DDRB_DQ1[5]
DDRB_DQ1[6]
DDRB_DQ1[7]
DDRB_DQ2[0]
DDRB_DQ2[1]
DDRB_DQ2[2]
DDRB_DQ2[3]
DDRB_DQ2[4]
DDRB_DQ2[5]
DDRB_DQ2[6]
DDRB_DQ2[7]
DDRB_DQ3[0]
DDRB_DQ3[1]
DDRB_DQ3[2]
DDRB_DQ3[3]
DDRB_DQ3[4]
DDRB_DQ3[5]
DDRB_DQ3[6]
DDRB_DQ3[7]
U0500
ICL-UN
ICL-UN-4+2
BGA
SYM 2 OF 19
LPDDR4 NON-INTERLEAVED0
DDRA_CLK_P
DDRA_CLK_N
DDRB_CLK_P
DDRB_CLK_N
DDRA_CKE0
DDRA_CKE1
DDRB_CKE0
DDRB_CKE1
DDRA_CS[0]
DDRA_CS[1]
DDRB_CS[0]
DDRB_CS[1]
DDRA_CA0
DDRA_CA1
DDRA_CA2
DDRA_CA3
DDRA_CA4
DDRA_CA5
DDRB_CA0
DDRB_CA1
DDRB_CA2
DDRB_CA3
DDRB_CA4
DDRB_CA5
DDRA_DQSN[0]
DDRA_DQSN[1]
DDRA_DQSN[2]
DDRA_DQSN[3]
DDRA_DQSP[0]
DDRA_DQSP[1]
DDRA_DQSP[2]
DDRA_DQSP[3]
DDRB_DQSN[0]
DDRB_DQSN[1]
DDRB_DQSN[2]
DDRB_DQSN[3]
DDRB_DQSP[0]
DDRB_DQSP[1]
DDRB_DQSP[2]
DDRB_DQSP[3]
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
DDR0_VREF_CA
DDR1_VREF_CA
DDR_VTT_CTL
BJ44
BJ46
BB41
BB40
BG47
BH45
BB36
BB38
BF36
BF40
BH40
BC40
BG46
BD44
BD43
BG44
BG43
BB47
BF37
BE40
BC41
BF38
BF41
BC36
BV45
BT38
BN45
BL38
BV44
BV38
BN44
BN38
AV44
AU38
AN44
AM38
AV45
AV38
AN45
AN38
BD47
BC44
BC37
BC45
BB46
BJ47
BE36
BB44
BD46
BJ43
BH44
BE37
BB43
BB37
C42
E42
M37
MEM_A_CLK_P
MEM_A_CLK_N
MEM_B_CLK_P
MEM_B_CLK_N
MEM_A_CKE<0>
MEM_A_CKE<1>
MEM_B_CKE<0>
MEM_B_CKE<1>
MEM_A_CS_L<0>
MEM_A_CS_L<1>
MEM_B_CS_L<0>
MEM_B_CS_L<1>
MEM_A_CA<0>
MEM_A_CA<1>
MEM_A_CA<2>
MEM_A_CA<3>
MEM_A_CA<4>
MEM_A_CA<5>
MEM_B_CA<0>
MEM_B_CA<1>
MEM_B_CA<2>
MEM_B_CA<3>
MEM_B_CA<4>
MEM_B_CA<5>
MEM_A_DQS_N<0>
MEM_A_DQS_N<1>
MEM_A_DQS_N<2>
MEM_A_DQS_N<3>
MEM_A_DQS_P<0>
MEM_A_DQS_P<1>
MEM_A_DQS_P<2>
MEM_A_DQS_P<3>
MEM_B_DQS_N<0>
MEM_B_DQS_N<1>
MEM_B_DQS_N<2>
MEM_B_DQS_N<3>
MEM_B_DQS_P<0>
MEM_B_DQS_P<1>
MEM_B_DQS_P<2>
MEM_B_DQS_P<3>
NC
CPU_DDR0_ALERT_L
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
18D8
18D8
18C8
18C8
18D8
18D8
18C8
18C8
18D8
18D8
18C8
18C8
18D8
18D8
18D8
18D8
18D8
18D8
18C8
18C8
18C8
18C8
18C8
18C8
18A5
18A5
18A5
18A5
18A5
18A5
18A5
18A5
18A5
18A5
18A5
18A5
18A5
18A5
18A5
18A5
R0730
0
5%
1/20W
MF
0201
OMIT_TABLE
U0500
ICL-UN
ICL-UN-4+2
BGA
18D3
BI
18D3
BI
18D3
BI
18D3
BI
18D3
BI
18D3
BI
18D3
BI
18D3
BI
18D3
BI
18D3
BI
18D3
BI
18D3
BI
18D3
BI
18D3
BI
18D3
BI
18D3
BI
18C3
BI
18C3
BI
18C3
BI
18C3
BI
18C3
BI
18C3
BI
18C3
BI
18C3
BI
18C3
BI
18C3
BI
18C3
BI
18C3
BI
18C3
BI
18C3
BI
18C3
BI
18C3
BI
18C3
BI
18C3
BI
18C3
BI
18C3
BI
18C3
BI
18C3
BI
18C3
BI
18C3
BI
18C3
BI
18B3
BI
18B3
BI
21
18B3
18B3
18B3
18B3
18B3
18B3
18B3
18B3
18B3
18B3
18B3
18B3
18B3
18B3
18B3
18B3
18B3
18B3
18B3
18B3
18B3
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
MEM_C_DQ_0<0>
MEM_C_DQ_0<1>
MEM_C_DQ_0<2>
MEM_C_DQ_0<3>
MEM_C_DQ_0<4>
MEM_C_DQ_0<5>
MEM_C_DQ_0<6>
MEM_C_DQ_0<7>
MEM_C_DQ_1<0>
MEM_C_DQ_1<1>
MEM_C_DQ_1<2>
MEM_C_DQ_1<3>
MEM_C_DQ_1<4>
MEM_C_DQ_1<5>
MEM_C_DQ_1<6>
MEM_C_DQ_1<7>
MEM_C_DQ_2<0>
MEM_C_DQ_2<1>
MEM_C_DQ_2<2>
MEM_C_DQ_2<3>
MEM_C_DQ_2<4>
MEM_C_DQ_2<5>
MEM_C_DQ_2<6>
MEM_C_DQ_2<7>
MEM_C_DQ_3<0>
MEM_C_DQ_3<1>
MEM_C_DQ_3<2>
MEM_C_DQ_3<3>
MEM_C_DQ_3<4>
MEM_C_DQ_3<5>
MEM_C_DQ_3<6>
MEM_C_DQ_3<7>
MEM_D_DQ_0<0>
MEM_D_DQ_0<1>
MEM_D_DQ_0<2>
MEM_D_DQ_0<3>
MEM_D_DQ_0<4>
MEM_D_DQ_0<5>
MEM_D_DQ_0<6>
MEM_D_DQ_0<7>
MEM_D_DQ_1<0>
MEM_D_DQ_1<1>
MEM_D_DQ_1<2>
MEM_D_DQ_1<3>
MEM_D_DQ_1<4>
MEM_D_DQ_1<5>
MEM_D_DQ_1<6>
MEM_D_DQ_1<7>
MEM_D_DQ_2<0>
MEM_D_DQ_2<1>
MEM_D_DQ_2<2>
MEM_D_DQ_2<3>
MEM_D_DQ_2<4>
MEM_D_DQ_2<5>
MEM_D_DQ_2<6>
MEM_D_DQ_2<7>
MEM_D_DQ_3<0>
MEM_D_DQ_3<1>
MEM_D_DQ_3<2>
MEM_D_DQ_3<3>
MEM_D_DQ_3<4>
MEM_D_DQ_3<5>
MEM_D_DQ_3<6>
MEM_D_DQ_3<7>
AJ46
AJ44
AJ47
AG43
AJ43
AG44
AG46
AG47
AG37
AG36
AJ37
AJ41
AJ36
AJ40
AG41
AG40
AD46
AD44
AD47
AB47
AD43
AB46
AB44
AB43
AD37
AD36
AB36
AD40
AB37
AD41
AB41
AB40
J46
J43
J47
G44
J44
G43
G46
E45
J36
G37
G36
G40
J37
J40
G41
J41
B40
E40
A40
D38
D40
E38
B38
A38
B33
E33
A33
E35
D33
D35
B35
A35
DDRC_DQ0[0]
DDRC_DQ0[1]
DDRC_DQ0[2]
DDRC_DQ0[3]
DDRC_DQ0[4]
DDRC_DQ0[5]
DDRC_DQ0[6]
DDRC_DQ0[7]
DDRC_DQ1[0]
DDRC_DQ1[1]
DDRC_DQ1[2]
DDRC_DQ1[3]
DDRC_DQ1[4]
DDRC_DQ1[5]
DDRC_DQ1[6]
DDRC_DQ1[7]
DDRC_DQ2[0]
DDRC_DQ2[1]
DDRC_DQ2[2]
DDRC_DQ2[3]
DDRC_DQ2[4]
DDRC_DQ2[5]
DDRC_DQ2[6]
DDRC_DQ2[7]
DDRC_DQ3[0]
DDRC_DQ3[1]
DDRC_DQ3[2]
DDRC_DQ3[3]
DDRC_DQ3[4]
DDRC_DQ3[5]
DDRC_DQ3[6]
DDRC_DQ3[7]
DDRD_DQ0[0]
DDRD_DQ0[1]
DDRD_DQ0[2]
DDRD_DQ0[3]
DDRD_DQ0[4]
DDRD_DQ0[5]
DDRD_DQ0[6]
DDRD_DQ0[7]
DDRD_DQ1[0]
DDRD_DQ1[1]
DDRD_DQ1[2]
DDRD_DQ1[3]
DDRD_DQ1[4]
DDRD_DQ1[5]
DDRD_DQ1[6]
DDRD_DQ1[7]
DDRD_DQ2[0]
DDRD_DQ2[1]
DDRD_DQ2[2]
DDRD_DQ2[3]
DDRD_DQ2[4]
DDRD_DQ2[5]
DDRD_DQ2[6]
DDRD_DQ2[7]
DDRD_DQ3[0]
DDRD_DQ3[1]
DDRD_DQ3[2]
DDRD_DQ3[3]
DDRD_DQ3[4]
DDRD_DQ3[5]
DDRD_DQ3[6]
DDRD_DQ3[7]
SYM 3 OF 19
LPDDR4 NON-INTERLEAVED
DDRC_CLK_P
DDRC_CLK_N
DDRD_CLK_P
DDRD_CLK_N
DDRC_CKE0
DDRC_CKE1
DDRD_CKE0
DDRD_CKE1
DDRC_CS[0]
DDRC_CS[1]
DDRD_CS[0]
DDRD_CS[1]
DDRC_CA0
DDRC_CA1
DDRC_CA2
DDRC_CA3
DDRC_CA4
DDRC_CA5
DDRD_CA0
DDRD_CA1
DDRD_CA2
DDRD_CA3
DDRD_CA4
DDRD_CA5
DDRC_DQSN[0]
DDRC_DQSN[1]
DDRC_DQSN[2]
DDRC_DQSN[3]
DDRC_DQSP[0]
DDRC_DQSP[1]
DDRC_DQSP[2]
DDRC_DQSP[3]
DDRD_DQSN[0]
DDRD_DQSN[1]
DDRD_DQSN[2]
DDRD_DQSN[3]
DDRD_DQSP[0]
DDRD_DQSP[1]
DDRD_DQSP[2]
DDRD_DQSP[3]
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
DRAM_RESET*
DDR_RCOMP[0]
DDR_RCOMP[1]
DDR_RCOMP[2]
W44
W46
M40
M41
U43
V44
M38
P41
U40
U37
W37
T37
P47
P44
U47
M43
M44
P43
W38
W40
U38
V45
T36
U46
AH44
AG38
AC45
AD38
AH45
AJ38
AC44
AB38
H45
G38
C39
D34
H44
J38
D39
C34
M46
M47
T40
N45
P40
W47
P37
N44
P46
W43
U44
U41
U36
P36
CB43
D44
E44
C43
MEM_C_CLK_P
MEM_C_CLK_N
MEM_D_CLK_P
MEM_D_CLK_N
MEM_C_CKE<0>
MEM_C_CKE<1>
MEM_D_CKE<0>
MEM_D_CKE<1>
MEM_C_CS_L<0>
MEM_C_CS_L<1>
MEM_D_CS_L<0>
MEM_D_CS_L<1>
MEM_C_CA<0>
MEM_C_CA<1>
MEM_C_CA<2>
MEM_C_CA<3>
MEM_C_CA<4>
MEM_C_CA<5>
MEM_D_CA<0>
MEM_D_CA<1>
MEM_D_CA<2>
MEM_D_CA<3>
MEM_D_CA<4>
MEM_D_CA<5>
MEM_C_DQS_N<0>
MEM_C_DQS_N<1>
MEM_C_DQS_N<2>
MEM_C_DQS_N<3>
MEM_C_DQS_P<0>
MEM_C_DQS_P<1>
MEM_C_DQS_P<2>
MEM_C_DQS_P<3>
MEM_D_DQS_N<0>
MEM_D_DQS_N<1>
MEM_D_DQS_N<2>
MEM_D_DQS_N<3>
MEM_D_DQS_P<0>
MEM_D_DQS_P<1>
MEM_D_DQS_P<2>
MEM_D_DQS_P<3>
NC
CPU_DDR1_ALERT_L
NC
PP1V1_S3_CPU
NC
NC
1
NC
NC
NC
NC
R0740
470
1%
1/20W
MF
201
2
NC
MEM_RESET_R_L
NC
NC
NC
NC
CPU_DDR_RCOMP<0>
CPU_DDR_RCOMP<1>
CPU_DDR_RCOMP<2>
R0741
1/20W
0201
R0750
100
1%
1/20W
MF
201
0
5%
MF
1
2
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
18C8
18C8
18B8
18B8
18C8
18C8
18B8
18B8
18C8
18C8
18B8
18B8
18C8
18C8
18C8
18C8
18C8
18C8
18B8
18B8
18B8
18B8
18B8
18B8
18A3
18A3
18A3
18A3
18A3
18A3
18A3
18A3
18A3
18A3
18A3
18A3
18A3
18A3
18A3
18A3
79C4
21
77B4 75A1 8D7
MEM_RESET_L
NOSTUFF
1
C0741
0.1UF
10%
16V
2
X5R-CERM
0201
R0751
100
1%
1/20W
MF
201
R0731
0
5%
1/20W
MF
0201
1
2
R0752
21
100
1%
1/20W
MF
201
OUT
1
2
18B8 18C8
18D8
D
C
B
A
BOM_COST_GROUP=CPU & CHIPSET
PLACE_NEAR=U0500.C43:12.7mm
PLACE_NEAR=U0500.E44:12.7mm
PLACE_NEAR=U0500.D44:12.7mm
PAGE TITLE
CPU LPDDR4x Interface
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-05198
REVISION
BRANCH
PAGE
7 OF 150
SHEET
7 OF 109
6.0.0
evt-3
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
SIZE
A
D
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
C
B
A
A13
A15
A18
A20
A23
A25
A28
A30
AA10
AB11
AC10
AD1
AD11
AE10
AF1
AF10
AG1
AH1
B10
B12
B13
B15
B17
B18
B20
B22
B23
B25
B26
B28
B30
BN9
BR34
BR9
BT34
BT9
BU10
BU35
BV34
BV9
BW10
BW34
BW35
BW8
BY10
BY35
BY9
C10
CA34
CA36
CA9
CB10
CB35
CC34
CC36
CC9
CD10
CD33
CD35
CD36
CD9
CE32
CE8
CF33
CF35
CF36
CF9
CG32
CH32
CH33
CH35
CJ33
CJ35
CJ36
CK32
CL33
CL35
CL36
CM32
CM33
CM35
CP35
CP36
CT35
CU35
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
PPVCCIN_S0_CPU
OMIT_TABLE
U0500
ICL-UN
ICL-UN-4+2
BGA
SYM 11 OF 19
POWER 1
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN
VCCIN_SENSE
VSSIN_SENSE
VIDALERT*
VIDSCK
VIDSOUT
80D8 79D6 77D2 75C3 40B4
79C4 77B4 75A1 7B1
VCCIN
0 - 1.89V
80A IccMax
from IBL# 575925
D13
D15
D18
D20
D23
D25
D28
D30
E10
E12
E13
E15
E17
E18
E20
E22
E23
E25
E26
E28
E30
F13
F15
F18
F20
F23
F25
F28
G12
G13
G15
G17
G18
G20
G22
G23
G25
G26
G28
J11
J13
J14
J16
J17
J19
J21
J22
J24
J26
J27
J29
K10
K15
K18
K20
K23
K25
K28
K30
K9
L1
L11
M10
M11
M9
N10
P11
R10
T10
T11
U11
V1
V10
W11
Y10
Y11
Y9
B9
D9
H5
G6
G5
13D8 10B3 8A5 6D6
64A2 54B3 31B6 16C7
77D2 75A3 10B3
77D2 16C2 11B8 11A5
PLACE_NEAR=U0500.B9:12.7mm
NO_XNET_CONNECTION=1
CPU_VCCSENSE_P
CPU_VCCSENSE_N
CPU_VIDALERT_R_L
CPU_VIDSCLK_R
CPU_VIDSOUT_R
77D2 75B4
6D7 15D2
PP1V1_S3_CPU
VDDQ
1.1V +/- 5%
3.5A IccMax
from IBL# 572795
PP1V05_S0_CPU_VCCST
1.05V, 750mA
PP1V05_S0SW_VCCSTG
1.05V, 150mA
PP1V05_VCCSTG_OUT
Bypass only
VOLTAGE=1.05V
PP1V05_VCCSTG_OUT_LGC
Reference Power rail for all Legacy
Signals Pull-up on Platform
1
R0805
100
5%
1/20W
MF
201
2
R0800.2:
PLACE_NEAR=U0500.H5:12.7mm
PLACE_NEAR=U0500.D9:12.7mm
1
R0804
100
5%
1/20W
MF
201
2
NO_XNET_CONNECTION=1
R0811
0
2 1
R0812
0
2 1
5% 0201
1/20WMF
5% 0201
R0801.2:
54D8
OUT
54D8
OUT
1/20WMF
OMIT_TABLE
U0500
ICL-UN
ICL-UN-4+2
AA33
AA35
AA46
AB34
AC33
AC35
AD33
AD34
AE34
AF35
AF46
AG34
AH35
AJ34
AK34
AL35
AL46
AM34
AN34
AN35
AR34
AT35
AT46
AU34
AU35
AV34
AY34
BA35
BA46
BB34
BB35
CF1
CE1
G31
G33
G34
J31
J33
J34
K33
PLACE_NEAR=U0500.G6:12.7mm
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VCCST
VCCSTG
VCCSTG_OUT
VCCSTG_OUT
VCCSTG_OUT
VCCSTG_OUT
VCCSTG_OUT
VCCSTG_OUT
VCCSTG_OUT
F2
VCCSTG_OUT_LGC
SYM 13 OF 19
POWER 3
NOSTUFF
R0800
56
1%
1/20W
MF
201
1
2
R0801
43
1%
1/20W
MF
201
1
2
R0810
0
2 1
5% 0201
MF 1/20W
BGA
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VCCPLL
VCCPLL
VCCPLL_OC
VCCPLL_OC
VCCPLL_OC
VCCPLL_OC
VCC1P8A
VCC1P8A
VCC1P8A
VCC1P8A
VCC1P8A
VCC1P8A
VCC1P8A
VCC1P8A
VCC1P8A
BC34
BD35
BE34
BF35
BF46
BG35
BH36
BK35
BL34
BL46
BM35
BP35
BT46
CA46
K34
K46
M34
N33
N35
P34
R35
T34
T35
T46
V35
W34
Y33
Y34
CJ1
CK1
CC44
CC45
CD40
CD41
BJ10
BK9
BL10
BL9
BM10
BM8
CD1
CD2
CE2
PP1V05_S0_CPU_VCCST
R0802.2:
PLACE_NEAR=U0500.G5:12.7mm
1
R0802
100
1%
1/20W
MF
201
2
CPU_VIDALERT_L
CPU_VIDSCLK
CPU_VIDSOUT
IN
OUT
BI
PP1V05_S0_CPU_VCCPLL
1.05V, 90mA, bypass only
PP1V1_S0SW
1.1V, 160mA
PP1V8_S0SW
1.8V, 700mA
54B2
54B2
54B2
80D8 79C6 77D2 75B3 40A5 16D2
56D8
OUT
56D8
OUT
75A3 10C3
77D2 75A4 11D8
79A6 75C1 11C8
74B2 15B4 11B8
77D2 75B4 64A2 54B3 31B6 16C7 13D8 10B3 8C7 6D6
77D2 11C8 11A5
74B2 11C8
74B4 8B1
77D2 74A4 8B1
PPVCCIN_AUX_PCH_PRIM
PLACE_NEAR=U0500.AW8:50.8MM
1
R0820
100
5%
1/20W
MF
201
2
PCH_VCCINSENSE_P
PCH_VCCINSENSE_N
PLACE_NEAR=U0500.AV8:50.8MM
1
R0821
100
5%
1/20W
MF
201
2
77D2 75B4 10C3
77D2 75A4 64D1 10C3
PP1V05_PRIM_OUT_PCH
Bypass only
PP1V8_S5
1.8V, 1.3A
PP3V3_S5
3.3V, 202mA
PP1V05_S5_PCH_VCCDSW
Bypass only
PP3V3_S5
3.3V, 4mA
PLACE_NEAR=U0500.DA15:30MM
PPVNN_PCH_EXT
PLACE_NEAR=U0500.DA17:30MM
PP1P05_PCH_EXT
VCCIN_AUX
1.8V typ
19A IccMax
from IBL# 575925
XW0850
SHORT-14L-0.1MM-SM
XW0853
SHORT-14L-0.1MM-SM
AG9
AH8
AJ8
AJ9
AK9
AL1
AL8
AM1
AM9
AN10
AN9
AP1
AP8
AR1
AR9
AT8
AU9
AV9
AY9
BB10
BB9
BC9
AW8
AV8
CP37
CT37
CU37
DA18
DA20
DA21
DA23
DA33
DB18
DB20
DB21
DB23
DD18
DD20
DD21
DD23
DA37
DA25
DA26
DA28
DB25
DB26
DB28
DD25
DD26
DD28
DG32
DH32
CW33
21
21
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX_VCCSENSE
VCCIN_AUX_VSSSENSE
VCCPRIM_1P05
VCCPRIM_1P05
VCCPRIM_1P05
VCCPRIM_1P8
VCCPRIM_1P8
VCCPRIM_1P8
VCCPRIM_1P8
VCCPRIM_1P8
VCCPRIM_1P8
VCCPRIM_1P8
VCCPRIM_1P8
VCCPRIM_1P8
VCCPRIM_1P8
VCCPRIM_1P8
VCCPRIM_1P8
VCCPRIM_1P8
VCCPRIM_3P3
VCCPRIM_3P3
VCCPRIM_3P3
VCCPRIM_3P3
VCCPRIM_3P3
VCCPRIM_3P3
VCCPRIM_3P3
VCCPRIM_3P3
VCCPRIM_3P3
VCCPRIM_3P3
VCCDSW_1P05
VCCDSW_1P05
VCCDSW_3P3
PVCC_FB_P
P1VPRIM_FB_R
OMIT_TABLE
U0500
ICL-UN
ICL-UN-4+2
BGA
SYM 12 OF 19
POWER 2
GPP_B0/CORE_VID0
GPP_B1/CORE_VID1
OMIT_TABLE
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
VCCIN_AUX
U0500
ICL-UN
ICL-UN-4+2
BGA
SYM 14 OF 19
VCC_V1P05EXT_1P05
VCC_V1P05EXT_1P05
VCC_V1P05EXT_1P05
VCC_VNNEXT_1P05
VCC_VNNEXT_1P05
VCC_VNNEXT_1P05
VCCA_CLKLDO_1P8
VCCA_CLKLDO_1P8
VCCIO_OUT
VCCLDOSTD_0P85
VCCLDOSTD_0P85
VCCPGPPR
VCCRTC
POWER 4
VCCDPHY_1P24
VCCDPHY_1P24
CKPLUS_WAIVE=MISS_N_DIFFPAIR
VCCRTC
VCCSPI
VCCSPI
VCC1P05
VCC1P05
VCC1P05
R0850
R0853
PAGE TITLE
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
BOM_COST_GROUP=CPU & CHIPSET
IV ALL RIGHTS RESERVED
CH10
CH9
CJ11
CK10
CK9
CL11
CM10
CM9
CN10
CN11
CN8
CN9
CP1
CP11
CR1
CR10
CR8
CR9
CT11
CU1
CU10
CU11
CW11
CG44
CG43
DA17
DB17
DD17
DA15
DB15
DD15
DG13
DH13
AN8
DG27
DH27
DD30
DG38
DH38
DA30
DB30
DG16
DH16
CH1
CH2
CJ2
NOSTUFF
NOSTUFF
D
PCH_CORE_VID0
PCH_CORE_VID1
BI
BI
17D3
17D3
C
PP1P05_PCH_EXT
1.05V, 200mA
PPVNN_PCH_EXT
1.05V, 200mA
PP1V8_PCH_CLKLDO
1.8V, 165mA
PPVCCIO_OUT
Pull ups only
PP0V85_LDOSTD
Bypass only
PP1V8_S5
1.8V, 5mA
PP3V_G3H_RTC
3.3V, 2mA
PP1V8_S5
3.3V, 3mA
PP1V24_S5_PCH_VCCDPHY
Bypass only
PP1V05_PCH_OUT_FET
Output to VCCST and VCCSTG
PLACE_NEAR=R7819.2:5MM
21
0
5%
PLACE_NEAR=R7820.2:5MM
21
PVCCPCOREPRIM_FB_P
1/20W 0201MF
P1VPRIM_FB
02015%01/20W MF
75C1
75B1
OUT
OUT
CPU & PCH Power
DRAWING NUMBER
051-05198
Apple Inc.
REVISION
6.0.0
BRANCH
evt-3
PAGE
8 OF 150
SHEET
8 OF 109
74B4 8A4
77D2 75A4
74C2 11B8
77C2 75B4
60B6
60B6
77D2 74A4 8A4
77D2 11C3 11B5
77D2 11D8 11A5
B
77D2 11D8 11A5
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
SIZE
A
D
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
C
B
A3
A5
A6
A9
A12
A17
A22
A26
A45
A46
AA4
AA5
AA6
AA9
AA42
AA45
AC1
AC2
AC6
AC9
AC42
AC46
AD2
AD35
AE6
AE8
AE9
AE36
AE37
AE38
AE40
AE41
AF2
AF6
AF8
AF42
AF45
AG2
AH2
AH6
AH42
AH46
AJ6
AJ35
AK1
AK2
AK36
AK37
AK38
AK40
AK41
AL2
AL6
AL42
AL45
AM2
AN6
AN42
AN46
AP2
AP6
AP35
AR2
AR36
AR37
AR38
AR40
AR41
AT1
AT2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
OMIT_TABLE
U0500
ICL-UN
ICL-UN-4+2
BGA
SYM 15 OF 19
GND1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AT6
AT42
AT45
AV6
AV42
AV46
AW4
AW5
AW6
AW35
AY1
AY2
AY36
AY37
AY38
AY40
AY41
B2
B4
B6
B7
B31
B34
B36
B39
B42
B46
B47
BA4
BA8
BA42
BA45
BB4
BB8
BC38
BC42
BC46
BD4
BD8
BE1
BE2
BE38
BE41
BF4
BF5
BF6
BF8
BF42
BF45
BG4
BG8
BH37
BH41
BH42
BH46
BJ1
BJ2
BJ4
BJ8
BJ35
BK36
BK37
BK38
BK40
BK41
BL4
BL8
BL42
BL45
BM4
BM5
BM6
BN1
BN2
BN42
BN46
BP4
BP8
BR4
BR8
BR35
BR36
BR37
BR38
BR40
BR41
BT42
BT45
BU4
BU8
BV1
BV2
BV42
BV46
BW4
BW5
BW6
BW36
BW37
BW38
BW40
BW41
BY4
BY8
C1
C7
C31
C36
C47
CA37
CA42
CA45
CB1
CB2
CB4
CB8
CC42
CC46
CD4
CD8
CD38
CE4
CE5
CE6
CF2
CF37
CF42
CF46
CG8
CH4
CH8
CH36
CH42
CH46
CJ37
CJ38
CJ41
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
OMIT_TABLE
U0500
ICL-UN
ICL-UN-4+2
BGA
SYM 16 OF 19
GND2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
CK2
CK8
CL37
CL42
CL45
CL46
CM4
CM8
CM36
CM37
CM38
CM40
CM41
CN6
CN42
CN46
CP2
CP38
CR2
CR6
CT36
CT38
CT42
CT45
CT46
CU2
CU6
CU8
CU9
CU36
CV6
CV42
CV46
CW36
CW37
CW38
CW40
CY6
CY12
CY14
CY16
CY17
CY19
CY21
CY22
CY24
CY25
CY27
CY29
CY30
CY32
D6
D7
D12
D17
D22
D26
D46
D47
DA6
DA10
DA13
DA31
DA35
DA42
DA45
DA46
DB13
DB31
DB37
DB43
DB47
DC6
DC10
DC44
DC45
DC46
DD12
DD13
DD31
DD33
DE7
DE9
DE10
DE13
DE16
DE18
DE21
DE24
DE27
DE30
DE32
DE38
DE41
DE46
DE47
DF4
DF45
DG7
DG47
DH1
DH4
DH7
DH42
DH45
DH47
DJ4
DJ6
DJ42
DJ44
E1
E5
E9
E36
F12
F17
F22
F26
F30
F31
F33
F34
F39
G4
G10
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
OMIT_TABLE
U0500
ICL-UN
ICL-UN-4+2
BGA
SYM 17 OF 19
GND 3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
G30
G47
H4
H9
H10
H42
H46
K8
K13
K17
K22
K26
K31
K42
K45
L2
L33
L35
L36
L37
L38
L40
L41
M4
M8
N8
N9
N42
N46
P38
R2
R4
R9
T9
T38
T41
T42
T45
U34
V2
V4
V9
V33
V42
V46
W2
W36
W41
Y4
Y35
Y36
Y37
Y38
Y40
Y41
D
C
B
A
8
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
PAGE TITLE
A
CPU & PCH Grounds
DRAWING NUMBER
051-05198
Apple Inc.
REVISION
6.0.0
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
BOM_COST_GROUP=CPU & CHIPSET
67
35 4
IV ALL RIGHTS RESERVED
2
BRANCH
evt-3
PAGE
9 OF 150
SHEET
9 OF 109
1
SIZE
D
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
75C3
PPVCCIN_S0_CPU
PLACE_SIDE=TOP
1
C1000
1UF
20%
6.3V
2
X6S-CERM
0201
PLACE_SIDE=TOP
1
C100F
1UF
20%
6.3V
2
X6S-CERM
0201
PLACE_SIDE=TOP
1
C100U
1UF
20%
6.3V
2
X6S-CERM
0201
1
2
1
2
1
2
PLACE_SIDE=TOP
PLACE_SIDE=TOP
C1001
1UF
20%
6.3V
X6S-CERM
0201
PLACE_SIDE=TOP
C100G
1UF
20%
6.3V
X6S-CERM
0201
PLACE_SIDE=TOP
C100V
1UF
20%
6.3V
X6S-CERM
0201
1
2
PLACE_SIDE=TOP
1
2
PLACE_SIDE=TOP
1
2
C1002
1UF
20%
6.3V
X6S-CERM
0201
C100H
1UF
20%
6.3V
X6S-CERM
0201
C100W
1UF
20%
6.3V
X6S-CERM
0201
PLACE_SIDE=TOP
1
C1003
1UF
20%
6.3V
2
X6S-CERM
0201
PLACE_SIDE=TOP
1
C100I
1UF
20%
6.3V
2
X6S-CERM
0201
PLACE_SIDE=TOP
1
C100X
1UF
20%
6.3V
2
X6S-CERM
0201
1
2
1
2
1
2
PLACE_SIDE=TOP
PLACE_SIDE=TOP
C1004
1UF
20%
6.3V
X6S-CERM
0201
PLACE_SIDE=TOP
C100J
1UF
20%
6.3V
X6S-CERM
0201
PLACE_SIDE=TOP
C100Y
1UF
20%
6.3V
X6S-CERM
0201
1
2
PLACE_SIDE=TOP
1
2
PLACE_SIDE=TOP
1
2
C1005
1UF
20%
6.3V
X6S-CERM
0201
C100K
1UF
20%
6.3V
X6S-CERM
0201
C100Z
1UF
20%
6.3V
X6S-CERM
0201
PLACE_SIDE=TOP
1
C1006
1UF
20%
6.3V
2
X6S-CERM
0201
PLACE_SIDE=TOP
1
C100L
1UF
20%
6.3V
2
X6S-CERM
0201
PLACE_SIDE=TOP
1
C1080
1UF
20%
6.3V
2
X6S-CERM
0201
1
2
1
2
1
2
PLACE_SIDE=TOP
PLACE_SIDE=TOP
C1007
1UF
20%
6.3V
X6S-CERM
0201
PLACE_SIDE=TOP
C100M
1UF
20%
6.3V
X6S-CERM
0201
PLACE_SIDE=TOP
C1081
1UF
20%
6.3V
X6S-CERM
0201
1
2
PLACE_SIDE=TOP
1
2
PLACE_SIDE=TOP
1
2
C1008
1UF
20%
6.3V
X6S-CERM
0201
C100N
1UF
20%
6.3V
X6S-CERM
0201
C1082
1UF
20%
6.3V
X6S-CERM
0201
PLACE_SIDE=TOP
1
C1009
1UF
20%
6.3V
2
X6S-CERM
0201
PLACE_SIDE=TOP
1
C100O
1UF
20%
6.3V
2
X6S-CERM
0201
PLACE_SIDE=TOP
1
C1083
1UF
20%
6.3V
2
X6S-CERM
0201
1
2
1
2
1
2
PLACE_SIDE=TOP
PLACE_SIDE=TOP
C100A
1UF
20%
6.3V
X6S-CERM
0201
PLACE_SIDE=TOP
C100P
1UF
20%
6.3V
X6S-CERM
0201
PLACE_SIDE=TOP
C1084
1UF
20%
6.3V
X6S-CERM
0201
1
2
PLACE_SIDE=TOP
1
2
PLACE_SIDE=TOP
1
2
C100B
1UF
20%
6.3V
X6S-CERM
0201
C100Q
1UF
20%
6.3V
X6S-CERM
0201
C1085
1UF
20%
6.3V
X6S-CERM
0201
PLACE_SIDE=TOP
1
C100C
1UF
20%
6.3V
2
X6S-CERM
0201
PLACE_SIDE=TOP
1
C100R
1UF
20%
6.3V
2
X6S-CERM
0201
PLACE_SIDE=TOP
1
C1086
1UF
20%
6.3V
2
X6S-CERM
0201
1
2
1
2
1
2
PLACE_SIDE=TOP
PLACE_SIDE=TOP
C100D
1UF
20%
6.3V
X6S-CERM
0201
PLACE_SIDE=TOP
C100S
1UF
20%
6.3V
X6S-CERM
0201
PLACE_SIDE=TOP
C1087
1UF
20%
6.3V
X6S-CERM
0201
1
2
PLACE_SIDE=TOP
1
2
PLACE_SIDE=TOP
1
2
C100E
1UF
20%
6.3V
X6S-CERM
0201
C100T
1UF
20%
6.3V
X6S-CERM
0201
C1088
1UF
20%
6.3V
X6S-CERM
0201
PP1V1_S3_CPU
75A1
1
C10A0
1UF
20%
6.3V
2
X6S-CERM
0201
1
C10A8
10UF
20%
6.3V
2
CER-X6S
0402
1
C10A1
1UF
20%
6.3V
2
X6S-CERM
0201
1
C10A9
10UF
20%
6.3V
2
CER-X6S
0402
1
C10A2
1UF
20%
6.3V
2
X6S-CERM
0201
1
C10B0
10UF
20%
6.3V
2
CER-X6S
0402
1
C10A3
1UF
20%
6.3V
2
X6S-CERM
0201
1
C10B1
10UF
20%
6.3V
2
CER-X6S
0402
1
C10A4
1UF
20%
6.3V
2
X6S-CERM
0201
NOSTUFF
1
C10B2
10UF
20%
6.3V
2
CER-X6S
0402
1
C10A5
1UF
20%
6.3V
2
X6S-CERM
0201
NOSTUFF
1
C10B3
10UF
20%
6.3V
2
CER-X6S
0402
NOSTUFF
1
C10A6
1UF
20%
6.3V
2
X6S-CERM
0201
NOSTUFF
1
C10A7
1UF
20%
6.3V
2
X6S-CERM
0201
D
C
PLACE_SIDE=TOP
PLACE_SIDE=TOP
1
C1089
1UF
20%
6.3V
2
X6S-CERM
0201
MIRROR_WITH=C1011
1
C1010
10UF
20%
6.3V
2
CER-X6S
0402
1
C1025
10UF
20%
6.3V
2
CER-X6S
0402
MIRROR_WITH=C1041
1
C1040
10UF
20%
6.3V
2
CER-X6S
0402
1
C108A
1UF
20%
6.3V
2
X6S-CERM
0201
1
C1011
10UF
20%
6.3V
2
CER-X6S
0402
MIRROR_WITH=C1027
1
C1026
10UF
20%
6.3V
2
CER-X6S
0402
1
C1041
10UF
20%
6.3V
2
CER-X6S
0402
PLACE_SIDE=TOP
PLACE_SIDE=TOP
1
C108B
1UF
20%
6.3V
2
X6S-CERM
0201
MIRROR_WITH=C1013
1
C1012
10UF
20%
6.3V
2
CER-X6S
0402
1
C1027
10UF
20%
6.3V
2
CER-X6S
0402
MIRROR_WITH=C1043
1
C1042
10UF
20%
6.3V
2
CER-X6S
0402
1
C108C
1UF
20%
6.3V
2
X6S-CERM
0201
1
C1013
10UF
20%
6.3V
2
CER-X6S
0402
MIRROR_WITH=C1029
1
C1028
10UF
20%
6.3V
2
CER-X6S
0402
1
C1043
10UF
20%
6.3V
2
CER-X6S
0402
PLACE_SIDE=TOP
PLACE_SIDE=TOP
1
C108D
1UF
20%
6.3V
2
X6S-CERM
0201
MIRROR_WITH=C1015
1
C1014
10UF
20%
6.3V
2
CER-X6S
0402
1
C1029
10UF
20%
6.3V
2
CER-X6S
0402
MIRROR_WITH=C1045
1
C1044
10UF
20%
6.3V
2
CER-X6S
0402
1
C108E
1UF
20%
6.3V
2
X6S-CERM
0201
1
C1015
10UF
20%
6.3V
2
CER-X6S
0402
MIRROR_WITH=C1031
1
C1030
10UF
20%
6.3V
2
CER-X6S
0402
1
C1045
10UF
20%
6.3V
2
CER-X6S
0402
PLACE_SIDE=TOP
PLACE_SIDE=TOP
1
C108F
1UF
20%
6.3V
2
X6S-CERM
0201
MIRROR_WITH=C1017
1
C1016
10UF
20%
6.3V
2
CER-X6S
0402
1
C1031
10UF
20%
6.3V
2
CER-X6S
0402
MIRROR_WITH=C1047
1
C1046
10UF
20%
6.3V
2
CER-X6S
0402
1
C108G
1UF
20%
6.3V
2
X6S-CERM
0201
1
C1017
10UF
20%
6.3V
2
CER-X6S
0402
MIRROR_WITH=C1033
1
C1032
10UF
20%
6.3V
2
CER-X6S
0402
1
C1047
10UF
20%
6.3V
2
CER-X6S
0402
MIRROR_WITH=C1019
1
C1018
10UF
20%
6.3V
2
CER-X6S
0402
1
C1033
10UF
20%
6.3V
2
CER-X6S
0402
MIRROR_WITH=C1049
1
C1048
10UF
20%
6.3V
2
CER-X6S
0402
1
C1019
10UF
20%
6.3V
2
CER-X6S
0402
MIRROR_WITH=C1035
1
C1034
10UF
20%
6.3V
2
CER-X6S
0402
1
C1049
10UF
20%
6.3V
2
CER-X6S
0402
MIRROR_WITH=C1021
1
C1020
10UF
20%
6.3V
2
CER-X6S
0402
1
C1035
10UF
20%
6.3V
2
CER-X6S
0402
MIRROR_WITH=C1051
1
C1050
10UF
20%
6.3V
2
CER-X6S
0402
1
C1021
10UF
20%
6.3V
2
CER-X6S
0402
MIRROR_WITH=C1037
1
C1036
10UF
20%
6.3V
2
CER-X6S
0402
1
C1051
10UF
20%
6.3V
2
CER-X6S
0402
MIRROR_WITH=C1023
1
C1022
10UF
20%
6.3V
2
CER-X6S
0402
1
C1037
10UF
20%
6.3V
2
CER-X6S
0402
MIRROR_WITH=C1053
1
C1052
10UF
20%
6.3V
2
CER-X6S
0402
1
C1023
10UF
20%
6.3V
2
CER-X6S
0402
MIRROR_WITH=C1039
1
C1038
10UF
20%
6.3V
2
CER-X6S
0402
1
C1053
10UF
20%
6.3V
2
CER-X6S
0402
MIRROR_WITH=C1025
1
C1024
10UF
20%
6.3V
2
CER-X6S
0402
1
C1039
10UF
20%
6.3V
2
CER-X6S
0402
MIRROR_WITH=C1055
1
C1054
10UF
20%
6.3V
2
CER-X6S
0402
77D2 75B4 8C4
77D2 75A4 64D1 8C4
PP1V05_S0_CPU_VCCPLL
C10C2
X6S-CERM
75A3 8C4
PP1V1_S0SW
C10C4
X6S-CERM
1UF
20%
6.3V
0201
1UF
20%
6.3V
0201
PP1V8_S0SW
CRITICAL
1
C10C0
10UF
20%
6.3V
2
CER-X6S
0402
NOSTUFF
CRITICAL
1
C10C1
10UF
20%
6.3V
2
CER-X6S
0402
NOSTUFF
CRITICAL
1
C10CA
22UF
20%
10V
2
X5R
0402
NOSTUFF
1
2
1
C10C3
1UF
20%
6.3V
2
X6S-CERM
0201
C
NOSTUFF
1
2
1
C10C5
1UF
20%
6.3V
2
X6S-CERM
0201
B
1
2
1
3 2
C1055
10UF
20%
6.3V
CER-X6S
0402
CRITICAL
C1060
180UF
20%
2.5V
POLY-AL
SM
MIRROR_WITH=C1057
1
2
1
3 2
NOSTUFF
C1057
10UF
20%
6.3V
CER-X6S
0402
C1061
180UF
20%
2.5V
POLY-AL
SM
NOSTUFF
1
C1056
10UF
20%
6.3V
2
CER-X6S
0402
MIRROR_WITH=C1059
1
2
CRITICAL
NOSTUFF
C1058
10UF
20%
6.3V
CER-X6S
0402
3 2
NOSTUFF
1
C1059
10UF
20%
6.3V
2
CER-X6S
0402
CRITICAL
1
C1062
180UF
20%
2.5V
POLY-AL
SM
1
3 2
CRITICAL
C1063
180UF
20%
2.5V
POLY-AL
SM
77D2 75A3 8C7
77D2 75B4 64A2 54B3 31B6 16C7 13D8 8C7 8A5 6D6
PP1V05_S0SW_VCCSTG
1UF
20%
6.3V
0201
1
2
C10C6
X6S-CERM
PP1V05_S0_CPU_VCCST
1UF
20%
6.3V
0201
1
2
C10C8
X6S-CERM
NOSTUFF
1
C10C7
1UF
20%
6.3V
2
X6S-CERM
0201
NOSTUFF
1
C10C9
1UF
20%
6.3V
2
X6S-CERM
0201
B
A
8
SYNC_MASTER=myEE SYNC_DATE=03/01/2019
PAGE TITLE
A
CPU Core Decoupling
DRAWING NUMBER
051-05198
Apple Inc.
REVISION
6.0.0
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
BOM_COST_GROUP=CPU & CHIPSET
67
35 4
IV ALL RIGHTS RESERVED
2
BRANCH
evt-3
PAGE
10 OF 150
SHEET
10 OF 109
1
SIZE
D
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
77D2 11A5 8B1
77D2 11A5 8B1
77D2 75A4 8B4
PP1V24_S5_PCH_VCCDPHY
BYPASS=U0500.DG16:DE16:3MM
PP0V85_LDOSTD
BYPASS=U0500.DG27:DE27:2.54MM
PP1V05_PRIM_OUT_PCH
BYPASS=U0500.CP37:CM37:3MM
C1305
2.2UF
20%
4V
X6S-CERM
0201
1
C1224
4.7UF
20%
6.3V
2
X6S
0402
1
2
1
C1201
1UF
20%
6.3V
2
X6S-CERM
0201
PPVCCIN_AUX_PCH_PRIM
75B3
MIRROR_WITH=C1261
1
C1260
10UF
20%
6.3V
2
CER-X6S
0402
MIRROR_WITH=C1267
1
C1266
10UF
20%
6.3V
2
CER-X6S
0402
PLACE_SIDE=TOP
1
C1290
1UF
20%
6.3V
2
X6S-CERM
0201
1
C1261
10UF
20%
6.3V
2
CER-X6S
0402
1
C1267
10UF
20%
6.3V
2
CER-X6S
0402
PLACE_SIDE=TOP
1
C1291
1UF
20%
6.3V
2
X6S-CERM
0201
MIRROR_WITH=C1263
1
C1262
10UF
20%
6.3V
2
CER-X6S
0402
MIRROR_WITH=C1269
1
C1268
10UF
20%
6.3V
2
CER-X6S
0402
NOSTUFF
PLACE_SIDE=TOP
1
C1292
1UF
20%
6.3V
2
X6S-CERM
0201
1
C1263
10UF
20%
6.3V
2
CER-X6S
0402
1
C1269
10UF
20%
6.3V
2
CER-X6S
0402
NOSTUFF
PLACE_SIDE=TOP
1
2
C1293
1UF
20%
6.3V
X6S-CERM
0201
MIRROR_WITH=C1265
1
C1264
10UF
20%
6.3V
2
CER-X6S
0402
MIRROR_WITH=C1271
1
C1270
10UF
20%
6.3V
2
CER-X6S
0402
NOSTUFF
PLACE_SIDE=TOP
1
C1294
1UF
20%
6.3V
2
X6S-CERM
0201
1
C1265
10UF
20%
6.3V
2
CER-X6S
0402
1
C1271
10UF
20%
6.3V
2
CER-X6S
0402
NOSTUFF
PLACE_SIDE=TOP
1
C1295
1UF
20%
6.3V
2
X6S-CERM
0201
MIRROR_WITH=C1273
1
C1272
10UF
20%
6.3V
2
CER-X6S
0402
NOSTUFF
PLACE_SIDE=TOP
1
C1296
1UF
20%
6.3V
2
X6S-CERM
0201
1
C1273
10UF
20%
6.3V
2
CER-X6S
0402
NOSTUFF
PLACE_SIDE=TOP
1
C1297
1UF
20%
6.3V
2
X6S-CERM
0201
MIRROR_WITH=C1275
1
C1274
10UF
20%
6.3V
2
CER-X6S
0402
NOSTUFF
PLACE_SIDE=TOP
1
C1298
1UF
20%
6.3V
2
X6S-CERM
0201
1
C1275
10UF
20%
6.3V
2
CER-X6S
0402
NOSTUFF
PLACE_SIDE=TOP
1
C1299
1UF
20%
6.3V
2
X6S-CERM
0201
MIRROR_WITH=C1277
1
C1276
10UF
20%
6.3V
2
CER-X6S
0402
NOSTUFF
1
C1277
10UF
20%
6.3V
2
CER-X6S
0402
NOSTUFF
D
C
79A6 75C1 8B4
77D2 11A5 8A4
74B2 8A4
PP1V8_S5
PP1V05_S5_PCH_VCCDSW
BYPASS=U0500.DG32:DE32:3MM
PP3V3_S5
BYPASS=U0500.DB28:DE30:3MM
1
C1206
1UF
20%
6.3V
2
X6S-CERM
0201
1
C1232
1UF
20%
6.3V
2
X6S-CERM
0201
1
C1221
1UF
20%
6.3V
2
X6S-CERM
0201
BYPASS=U0500.DD18:DE18:3MM
75B1
PLACE_SIDE=TOP
1
C1280
1UF
20%
6.3V
2
X6S-CERM
0201
1
2
PLACE_SIDE=TOP
PLACE_SIDE=TOP
C1281
1UF
20%
6.3V
X6S-CERM
0201
1
2
PP1V8_S5
PLACE_NEAR=U0500.CJ11:12.7mm
C1282
1UF
20%
6.3V
X6S-CERM
0201
PLACE_SIDE=TOP
1
C1283
1UF
20%
6.3V
2
X6S-CERM
0201
1
2
0.6UH-20%-2.8A-0.02OHM
PLACE_SIDE=TOP
PLACE_SIDE=TOP
C1284
1UF
20%
6.3V
X6S-CERM
0201
1
2
NOSTUFF
L1250
21
XFL4012-SM
R1250
0.01
1%
1/3
MF
0402
21
PP1V8_PCH_CLKLDO_R
C1285
1UF
20%
6.3V
X6S-CERM
0201
R1251
VOLTAGE=1.8V
0.0025
1%
1/3W
MF
0402
C
PP1V8_PCH_CLKLDO
1
2
77D2 11B5 8B1
B
74C2 8B1
74B2 15B4 8B4
77D2 16C2 11A5 8C7
PP3V_G3H_RTC
BYPASS=U0500.DH38:DE38:3MM BYPASS=U0500.DG38:DE38:3MM
PP3V3_S5
BYPASS=U0500.DA28:CY29:3MM BYPASS=U0500.DB25:DE24:3MM
PP1V05_VCCSTG_OUT
BYPASS=U0500.J31:K31:3MM
1
C1227
1UF
20%
6.3V
2
X6S-CERM
0201
1
C1207
1UF
20%
6.3V
2
X6S-CERM
0201
1
C1233
1UF
20%
6.3V
2
X6S-CERM
0201
1
C1228
0.1UF
10%
10V
2
X6S-CERM
0201
1
C1208
0.1UF
10%
10V
2
X6S-CERM
0201
NOSTUFF
1
C1234
1UF
20%
6.3V
2
X6S-CERM
0201
BYPASS=U0500.G31:F31:3MM
77D2 11C3 8B1
77D2 11D8 8B1
77D2 16C2 11B8 8C7
Aliases for Bypass Pins
PP1V8_PCH_CLKLDO
PP1V24_S5_PCH_VCCDPHY
PP1V05_VCCSTG_OUT
4V
X6S
1
2
C1250
22UF
0603-3
BYPASS=U0500.CJ11::12.7mm
BYPASS=U0500.CJ11::12.7mm
1
20% 20%
4V
2
X6S
C1251
22UF
0603-3
PP1V8_PCH_CLKLDO
MIN_LINE_WIDTH=0.4500
MIN_NECK_WIDTH=0.0750
VOLTAGE=1.8V
MAKE_BASE=TRUE
PP1V24_S5_PCH_VCCDPHY
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=1.24V
MAKE_BASE=TRUE
PP1V05_VCCSTG_OUT
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=1.05V
MAKE_BASE=TRUE
1
C1252
1UF
20%
6.3V
2
X6S-CERM
0201
B
A
8
77D2 11C8 8A4
77D2 11D8 8B1
PP1V05_S5_PCH_VCCDSW
PP0V85_LDOSTD
PP1V05_S5_PCH_VCCDSW
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=1.05V
MAKE_BASE=TRUE
PP0V85_LDOSTD
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=0.85V
MAKE_BASE=TRUE
PAGE TITLE
A
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
PCH Decoupling
DRAWING NUMBER
051-05198
Apple Inc.
REVISION
6.0.0
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
BOM_COST_GROUP=CPU & CHIPSET
67
35 4
IV ALL RIGHTS RESERVED
2
BRANCH
evt-3
PAGE
12 OF 150
SHEET
11 OF 109
1
SIZE
D
678
www.haojiyoubbs.com
QQ微信：181806465
OMIT_TABLE
3 245
1
U0500
ICL-UN
ICL-UN-4+2
BGA
SYM 5 OF 20
D
12A6 20C3
IN OUT
12A6 20D5
OUT
12A6 20D5
OUT
12A6 20C3
IN
12A6 19C3 77D4
IN
12A6 19C3 77D4
OUT
PCH_UART_BT_D2R
PCH_UART_BT_R2D
PCH_UART_BT_RTS_L
PCH_UART_BT_CTS_L
PCH_UART_DEBUG_D2R_1
PCH_UART_DEBUG_R2D_1
DJ37
DH37
DF39
DE39
DF37
DE37
GPP_D8/UART0A_RXD
GPP_D9/UART0A_TXD
GPP_D10/UART0A_RTS*
GPP_D11/UART0A_CTS*
GPP_B17/UART2A_RXD
GPP_B18/UART2A_TXD
OMIT_TABLE
SMBUS,SMLINK
UART
ESPI
GPP_A7/SMBCLK
GPP_A8/SMBDATA
GPP_A9/SMBALERT*
GPP_E9/SML0CLK
GPP_E10/SML0DATA
GPP_A0/ESPI_IO0
GPP_A1/ESPI_IO1
GPP_A2/ESPI_IO2
GPP_A3/ESPI_IO3
GPP_A4/ESPI_CS*
GPP_A5/ESPI_CLK
GPP_A6/ESPI_RESET*
CM43
CM47
CN45
DE28
DF28
CU40
CU38
CP40
CU41
CP41
CT40
CT41
SMBUS_PCH_CLK
SMBUS_PCH_DATA
NC_PCH_GPP_A9
PCH_I2C_UPC_SCL
PCH_I2C_UPC_SDA
ESPI_IO<0>
ESPI_IO<1>
ESPI_IO<2>
ESPI_IO<3>
ESPI_CS_L
ESPI_CLK60M_R
ESPI_RESET_L
OUT
OUT
OUT
BI
BI
BI
BI
BI
BI
15C6 36D8
15C6 36D8
15B6 36B6
15B6 36B6
24A7 24B6
24A7 24B6
24A7 24B6
24A7 24B6
24A7 24B6
24B6
D
22
21
R1327
2015% 1/20W MF
ESPI_CLK60M
OUT
24B6
C
U0500
ICL-UN
ICL-UN-4+2
BGA
SYM 6 OF 19
21B3 21C1
OUT
17D2 17D6 21C3
OUT
17D6 24D6 80A7
OUT
19D3 36B3 36B6
BI
12A6 23D6
IN
12A6 19C3
PCH_BT_ROM_BOOT_L
NC_TP_PCH_GPP_A11
76C3
NC_TP_PCH_GPP_A19
76C3
PCH_WLAN_PERST_L
SOC_PERST_L
PCH_UPC_I2C_INT_L
JTAG_ISP_TCK
12A6 19C3
JTAG_ISP_TDI
12A6 19C3
PCH_SOC_SYNC
NC_TP_PCH_GPP_C8
76C3
NC_TP_PCH_GPP_C9
76D3
NC_TP_PCH_GPP_C10
76C3
PCH_BBR_FORCE_PWR
OUT
JTAG_TBT_W_TMS
12B6 19C3
JTAG_TBT_R_TMS
12B6 19C3
NC_TP_PCH_GPP_D19
76D3
NC_TP_PCH_GPP_D20
76D3
XDP_PCH_STRP_GPP_E0
12A6 15B8
XDP_PCH_STRP_CNV_DISABLE
12B6 15B8
XDP_MEM_OK
12A6 15B8
XDP_PCH_STRP_SPIROM_SAF
12A6 15B8
XDP_PCH_OBSDATA_B0
15B8
XDP_PCH_OBSDATA_B1
15B8
XDP_PCH_OBSDATA_B2
12A6 15B8
CU43
CU44
CR46
CH44
CH45
CA41
DC42
DB41
DG41
DH41
DE42
DF44
DG44
DA40
DA41
DA38
DB38
DF34
DE31
DE34
DG30
DH31
DH28
DJ31
GPP_A10/CPU_GP0
GPP_A11/CPU_GP1
GPP_A19/PCHHOT*
GPP_B3/CPU_GP2
GPP_B4/CPU_GP3
GPP_B11/PMCALERT*
GPP_C1
GPP_C2
GPP_C7
GPP_C8
GPP_C9
GPP_C10
GPP_C13
GPP_D17
GPP_D18
GPP_D19
GPP_D20
GPP_E0
GPP_E1
GPP_E2
GPP_E3
GPP_E4
GPP_E5
GPP_E6
GPP_G0
GPP_G7
GPP_G6
GPP_G2
GPP_G3
GPP_G4
GPP_G5
GPP_H3
GPP_H4
GPP_H5
GPP_H8
GPP_H18
GPP_H19
GPP_H21
GPP_H22
GPP_R5
GPP_R6
GPD2/LAN_WAKE*
GPD7
CB46
CF45
CE47
CB47
CE43
CE44
CE46
CV44
CV45
CY46
CY47
CY43
CY44
DA36
DB35
DB40
CW41
CF38
CL40
MLB_RAMCFG0
JTAG_TBT_T_TMS
JTAG_TBT_X_TMS
MLB_RAMCFG1
MLB_RAMCFG2
MLB_RAMCFG3
MLB_RAMCFG4
TBT_POC_RESET
JTAG_ISP_TDO
NC_TP_PCH_GPP_H5
DP_INT_HPD_MASK
NC_TP_PCH_GPP_H18
NC_TP_PCH_GPP_H19
NC_TP_PCH_GPP_H21
NC_TP_PCH_GPP_H22
NC_TP_PCH_GPP_R5
NC_TP_PCH_GPP_R6
PCH_LAN_WAKE_L
PCH_STRP_GPD7
12A5
12B6 19C3
12B6 19C3
12A5
12A5
12A5
12A5
12A6 19C3
OUT
12B6 19C3
76D3
32A6 32C3
IN
76D3
76D3
76D3
76D3
76D3
76D3
12A6
12A6 19C3
C
B
PP3V3_S5
R1355
R1356
R1357
R1358
R1359
R1376
R1351
10K
10K
10K
10K
10K
100K
100K
74B2 14A7 13A7 5B7
21
5% 201
21
21
21
21
21
21
1/20W MF
5% 201
1/20W MF
5% 201
1/20W MF
5% 201
1/20W MF
5% 201
1/20W MF
5% 201
1/20W MF
5% 201
1/20W MF
JTAG_TBT_X_TMS
JTAG_TBT_T_TMS
JTAG_TBT_W_TMS
JTAG_TBT_R_TMS
JTAG_ISP_TDO
XDP_PCH_STRP_CNV_DISABLE
PCH_LAN_WAKE_L
12C2 19C3
12C2 19C3
12C5 19C3
12C5 19C3
12C2 19C3
12C5 15B8
12C2
XDP_PCH_OBSDATA_B3
15B8
XDP_PCH_OBSFN_C0
15A8
FIVR_DIGPB_1
15A6
NC_TP_PCH_GPP_E20
76D3
NC_TP_PCH_GPP_E21
76D3
NC_TP_PCH_GPP_E22
76D3
NC_TP_PCH_GPP_E23
76D3
DJ28
DH30
DF31
DJ25
DH24
DH25
DG24
GPP_E7
GPP_E8
GPP_E19/PCIE_LNK_DOWN
GPP_E20
GPP_E21
GPP_E22
GPP_E23
MEMORY CONFIGURATION STRAPS.
B
A
NOSTUFF
NOSTUFF
PP1V8_S5
R1352
R1353
R1362
R1363
R1364
R1365
R1367
R1377
R1371
R1370
R1368
R1369
R1360
R1361
R1374
R1375
47K
47K
47K
47K
47K
47K
1K
100K
100K
100K
100K
100K
100K
100K
100K
100K
21
5% 201
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
1/20W MF
5% 2011/20W MF
5% 201
1/20W MF
5% 201
1/20W MF
5% 201
1/20W MF
5% 201
1/20W MF
5% 201
1/20W MF
5% 201
1/20W MF
5% 201
1/20W MF
5% 201
1/20W MF
5% 201
1/20W MF
5% 201
1/20W MF
5% 201
1/20W MF
5% 201
1/20W MF
5% 201
1/20W MF
5% 201
1/20W MF
75B1 24A8 17B7 14A7
PCH_UART_DEBUG_D2R_1
PCH_UART_DEBUG_R2D_1
PCH_UART_BT_D2R
PCH_UART_BT_R2D
PCH_UART_BT_RTS_L
PCH_UART_BT_CTS_L
XDP_PCH_STRP_SPIROM_SAF
XDP_PCH_OBSDATA_B2
PCH_STRP_GPD7
XDP_MEM_OK
XDP_PCH_STRP_GPP_E0
PCH_BBR_FORCE_PWR
JTAG_ISP_TCK
JTAG_ISP_TDI
PCH_SOC_SYNC
TBT_POC_RESET
12D5 20C3
12D5 20D5
12D5 20D5
12D5 20C3
12B5 15B8
12B5 15B8
12C2 19C3
12B5 15B8
12C5 15B8
12C5 19C3
12C5 19C3
12C5 19C3
12C5 23D6
12C2 19C3
77D4 19C3 12D5
77D4 19C3 12D5
MLB_RAMCFG0
12C2
MLB_RAMCFG1
12C2
MLB_RAMCFG2
12C2
MLB_RAMCFG3
12C2
MLB_RAMCFG4
12C2
BOM GROUP BOM OPTIONS
PCH INTERNAL PULL-UPS ARE TO 1.8V.
RAMCFG4_L
1
R1334
1K
5%
1/20W
MF
201
2
RAMCFG3_L
1
R1333
1K
5%
1/20W
MF
201
2
RAMCFG2_L
1
R1332
1K
5%
1/20W
MF
201
2
RAMCFG4_L,RAMCFG3_L,RAMCFG2_L,RAMCFG1_L,RAMCFG0_LRAMCFG_SLOT
RAMCFG1_L
1
R1331
1K
5%
1/20W
MF
201
2
RAMCFG0_L
1
R1330
1K
5%
1/20W
MF
201
2
PAGE TITLE
TABLE_BOMGROUP_HEAD
TABLE_BOMGROUP_ITEM
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
BOM_COST_GROUP=CPU & CHIPSET
IV ALL RIGHTS RESERVED
DESIGN: X502/MLB
LAST CHANGE: Tue Feb 2 13:18:21 2016
PCH SPI/SMB/UART/GPIO
DRAWING NUMBER
051-05198
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
REVISION
BRANCH
PAGE
13 OF 150
SHEET
12 OF 109
6.0.0
evt-3
SIZE
D
A
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
8
67
35 4
2
1
D
www.haojiyoubbs.com
QQ微信：181806465
77D2 75B4 64A2 54B3 31B6 16C7 10B3 8C7 8A5 6D6
16B5
IN
PP1V05_S0_CPU_VCCST
NOSTUFF
R1410
VCCST_PWRGD
VCCST_PWRGD 1V TOLERANT
1K
5%
1/20W
MF
201
678
3 245
1
U0500
ICL-UN
15C1 31C1 77C2
IN
PLACE_NEAR=U0500.CN10:5mm
NOSTUFF
1
C1400
100PF
2
PLACE_NEAR=U0500.BJ2:38mm
5%
25V
C0G
0201
1
2
31B6 77C2
13A6 17A4 17B4
OUT
17D8 20C5 20D5
15C8 16B7 17B8 17C6
IN
19C3 77C2
R1406
1%
60.4
201
64A5
OUT
R1409
100K
21
MF 1/20W
1
5%
1/20W
MF
201
2
R1408
0201
PLACE_NEAR=U0500.CN2:15mm
0
MF
21
5%
1/20W
31C1 77C2
16A5 17B8
77C2
16A2
TP_DSWLDO_MON
PLT_RST_L
PM_SYSRST_L
PM_RSMRST_L
TP_CPU_PWRGD
VCCST_PWRGD_R
VCCST_OVERRIDE
VCCSTPWRGOOD_TCSS
PM_PCH_SYS_PWROK
IN
PM_PCH_PWROK
IN
PM_PCH_DPWROK
IN
PCIE_WAKE_L
13A6
CA40
CG46
DF42
CA38
CG6
CL1
CN2
CL2
DE44
CF40
CC37
CB44
DSWLDO_MON
GPP_B13/PLTRST*
SYS_RESET*
RSMRST*
PROCPWRGD
VCCST_PWRGD
VCCST_OVERRIDE
VCCSTPWRGOOD_TCSS
SYS_PWROK
PCH_PWROK
DSW_PWROK
WAKE*
ICL-UN-4+2
BGA
SYM 10 OF 19
SYSTEM POWER MANAGEMENT
GPP_H10/CPU_C10_GATE*
GPP_B12/SLP_S0*
GPD4/SLP_S3*
GPD5/SLP_S4*
GPD10/SLP_S5*
SLP_SUS*
GPD3/PWRBTN*
GPD0/BATLOW*
GPP_B2/VRALERT*
CG47
CL41
CH38
CD37
CH37
CU46
CH41
CH40
CC41
PM_SLP_S0_3V3_L
PM_SLP_S3_L_1
PM_SLP_S4_L
PM_SLP_S5_L
PM_SLP_SUS_L
CPU_C10_GATE_L
PCH_PWRBTN_L
PCH_BATLOW_L
PCH_WLAN_DEV_WAKE
13A6 16B4
OUT
13A6 16A7 16B7 19B5 62D6 64A6 64B5 64C3 77C2 81C3
OUT
13A6 81C3
OUT
13A6 81C3
OUT
13A6 16B7 17C8 59C7
OUT
13A6 16C4 64B4
OUT
13A6 15C8 62C6 77C2
IN
13A6
21B6
OUT
D
C
C
B
R1451
R1452
100K
10K
PP3V3_S5
21
21
1/20W MF
5% 1/20W 201MF
74B2 14A7 12B7 5B7
PCH_BATLOW_L
2015%
PCIE_WAKE_L
B
13C3
13C6
NOSTUFF
A
R1463
R1447
R1448
R1460
R1454
R1455
R1456
R1457
R1458
8
1K
100K
100K
100K
100K
100K
100K
100K
100K
21
5% 1/20W
21
5%
21
5% 1/20W MF
21
21
21
21
21
21
PCH_PWRBTN_L
201MF
CPU_C10_GATE_L
201MF1/20W
201
13D3 15C8 62C6 77C2
13D3 16C4 64B4
DESIGN: X502/MLB
MF1/20W 2015%
PM_SLP_S5_L
PLT_RST_L
MF1/20W
MF1/20W
MF1/20W
MF1/20W
MF1/20W
2015%
PM_SLP_S4_L
2015%
PM_SLP_S3_L_1
2015%
PM_SLP_S0_3V3_L
2015%
PM_SLP_SUS_L
2015%
13D6 17A4 17B4 17D8 20C5 20D5 31B6 77C2
13D3 81C3
13D3 81C3
16B4 13D3
13D3 16B7 17C8 59C7
LAST CHANGE: Tue Apr 5 13:08:54 2016
SYNC_MASTER=myEE SYNC_DATE=03/01/2019
PAGE TITLE
81C3 77C2 64C3 64B5 64A6 62D6 19B5 16B7 16A7 13D3
PCH Power Management
DRAWING NUMBER
SIZE
051-05198
Apple Inc.
REVISION
A
D
6.0.0
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
BOM_COST_GROUP=CPU & CHIPSET
67
35 4
IV ALL RIGHTS RESERVED
2
BRANCH
evt-3
PAGE
14 OF 150
SHEET
13 OF 109
1
D
www.haojiyoubbs.com
QQ微信：181806465
C
PCIe Port Assignments:
SOC lane 0
SOC lane 1
SOC lane 2
SOC lane 3
AirPort
EXT A (SS,DCI)
Fixture USB-A
EXT USB-A
PLACE_NEAR=U0500.CE6:12.7mm
100
1%
1/20W
MF
201
1
2
R1504
26D7
26D7
32D8
32D8
26D7
26D7
32D8
32D8
26D7
26D7
32C8
32D8
26D7
26D7
32C8
32C8
21D1
21D1
21C1
21C1
19D3
19D3
19D3
19D3
76B3 78A6
76B3 78A8
76B3 78A6
76B3 78A8
78A6
78A8
78A6
78A8
IN
IN
OUT
OUT
IN
IN
OUT
OUT
IN
IN
OUT
OUT
IN
IN
OUT
OUT
IN
IN
OUT
OUT
IN
IN
OUT
OUT
IN
IN
OUT
OUT
IN
IN
OUT
OUT
678
PCIE_SOC_D2R_N<0>
PCIE_SOC_D2R_P<0>
PCIE_SOC_R2D_C_N<0>
PCIE_SOC_R2D_C_P<0>
PCIE_SOC_D2R_N<1>
1
PCIE_SOC_D2R_P<1>
PCIE_SOC_R2D_C_N<1>
PCIE_SOC_R2D_C_P<1>
PCIE_SOC_D2R_N<2>
PCIE_SOC_D2R_P<2>
PCIE_SOC_R2D_C_N<2>
PCIE_SOC_R2D_C_P<2>
PCIE_SOC_D2R_N<3>
PCIE_SOC_D2R_P<3>
PCIE_SOC_R2D_C_N<3>
PCIE_SOC_R2D_C_P<3>
PCH_PCIE_WLAN_D2R_N
PCH_PCIE_WLAN_D2R_P
PCH_PCIE_WLAN_R2D_C_N
PCH_PCIE_WLAN_R2D_C_P
USB3_BSSB_D2R_N
USB3_BSSB_D2R_P
USB3_BSSB_R2D_C_N
USB3_BSSB_R2D_C_P
USB3_EXTC_D2R_N
USB3_EXTC_D2R_P
USB3_EXTC_R2D_C_N
USB3_EXTC_R2D_C_P
USB3_EXTD_D2R_N
USB3_EXTD_D2R_P
USB3_EXTD_R2D_C_N
USB3_EXTD_R2D_C_P
PCH_PCIE_RCOMP_N
PCH_PCIE_RCOMP_P
NC
NC
NC
NC
NC
NC
NC
NC
DA1
DA2
CV8
CV9
DB1
DB2
CY8
CY9
CU5
CU4
DA12
DB12
CV4
CV5
DF11
DE11
CY4
CY5
DH10
DG10
DA5
DA4
DJ11
DH11
CV1
CV2
DA9
DA8
CW2
CW1
DC8
DC9
DC5
DC4
DH14
DJ14
DE5
DE4
DF14
DE14
DD2
DC2
OMIT_TABLE
PCIE1_RXN
PCIE1_RXP
PCIE1_TXN
PCIE1_TXP
PCIE2_RXN
PCIE2_RXP
PCIE2_TXN
PCIE2_TXP
PCIE3_RXN
PCIE3_RXP
PCIE3_TXN
PCIE3_TXP
PCIE4_RXN/USB30_3_RXN
PCIE4_RXP/USB30_3_RXP
PCIE4_TXN/USB30_3_TXN
PCIE4_TXP/USB30_3_TXP
PCIE5_RXN/USB30_2_RXN
PCIE5_RXP/USB30_2_RXP
PCIE5_TXN/USB30_2_TXN
PCIE5_TXP/USB30_2_TXP
PCIE6_RXN/USB30_1_RXN
PCIE6_RXP/USB30_1_RXP
PCIE6_TXN/USB30_1_TXN
PCIE6_TXP/USB30_1_TXP
PCIE7_RXN
PCIE7_RXP
PCIE7_TXN
PCIE7_TXP
USB30_4_RXN/PCIE8_RXN
USB30_4_RXP/PCIE8_RXP
USB30_4_TXN/PCIE8_TXN
USB30_4_TXP/PCIE8_TXP
USB31_1_RXN
USB31_1_RXP
USB31_1_TXN
USB31_1_TXP
USB31_2_RXN
USB31_2_RXP
USB31_2_TXN
USB31_2_TXP
PCIE_RCOMPN
PCIE_RCOMPP
U0500
ICL-UN
ICL-UN-4+2
BGA
SYM 7 OF 19
USB2
PCIE/USB3/SATA
USB2N_1
USB2P_1
USB2N_2
USB2P_2
USB2N_3
USB2P_3
USB2N_4
USB2P_4
USB2N_5
USB2P_5
USB2N_6
USB2P_6
GPP_A12/USB_OC1*
GPP_A13/USB_OC2*
GPP_A14/USB_OC3*
GPP_A18/USB_OC0*
USB2_COMP
USB_ID
USB_VBUSSENSE
DF20
DE20
DH18
DG18
DE23
DF23
DJ17
DH17
DJ23
DH23
DF17
DE17
CR44
CN44
CR47
CR43
DJ20
DH21
DG21
USB2_TBT_X_N
USB2_TBT_X_P
USB2_TBT_T_N
USB2_TBT_T_P
USB2_TBT_W_N
USB2_TBT_W_P
USB2_TBT_R_N
USB2_TBT_R_P
USB_FIXT1_N
USB_FIXT1_P
USB_FIXT2_N
USB_FIXT2_P
XDP_USB_EXTD_OC_L
XDP_USB_EXTC_OC_L
XDP_USB_EXTB_OC_L
XDP_USB_EXTA_OC_L
PCH_USB2_COMP
PCH_USB2_VBUSSENSE
3 245
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
14A6
14A6 15B1
14A6
14A6
19D5
19D5
19C5
19C5
19B5
19B5
19B5
19B5
76B3 78A6
76B3 78A8
76B3 78A6
76B3 78A8
X RP
T RP
W RP
R RP
TP for Fixture
TP for Fixture
GROUNDED PER CFL EDS.
1
R1581
10K
5%
1/20W
MF
201
2
1
R1501
113
1%
1/20W
MF
201
2
PLACE_NEAR=U0500.DJ20:12.7MM
1
D
C
B
A
NOSTUFF
NOSTUFF
NOSTUFF
R1550
R1551
R1552
R1553
R1533
R1534
R1535
R1520
100K
100K
100K
100K
47K
47K
60.4
PP3V3_S5
21
5% 201
21
21
21
1/20W MF
5% 201
1/20W MF
5% 201
1/20W MF
5% 201
1/20W MF
PP1V8_S5
21
5% 201
1/20W MF
21
21
21
PLACE_NEAR=U0500.DF9:25.4mm
1/20W MF
1% 201
1/20W MF
ANY CLKREQ CAN MAP TO ANY CLK.
ANY CLKREQ OR CLK CAN MAP TO ANY PCIE PORT.
UNUSED CLKREQS AND CLKS SHOULD BE DISABLED.
PER SKYLAKE PDG, SKYLAKE PCH EDS.
74B2 13A7 12B7 5B7
XDP_USB_EXTA_OC_L
XDP_USB_EXTB_OC_L
XDP_USB_EXTC_OC_L
XDP_USB_EXTD_OC_L
75B1 24A8 17B7 12A7
SOC_CLKREQ_BUF_L
PCH_WLAN_CLKREQ_L
2015%
PCH_STRP_NO_REBOOT
2015%1K1/20W MF
PCH_DIFFCLK_BIASREF
14C3
14C3
14C3 15B1
14D3
14A6 15A2 17B5
14A6 17C8
14A6
14A3
B
OMIT_TABLE
U0500
ICL-UN
ICL-UN-4+2
BGA
SYM 9 OF 19
CLOCK SIGNALS
NC_PCIE_CLK100M0P
NC_PCIE_CLK100M0N
NC_DEBUG_CLKREQ_L
21D3 78D8
OUT
21D3 78D8
OUT
14A6 17C8
IN
PCH_PCIE_CLK100M_WLAN_P
PCH_PCIE_CLK100M_WLAN_N
PCH_WLAN_CLKREQ_L
NC_PCIE_CLK100M2P
NC_PCIE_CLK100M2N
PCH_STRP_NO_REBOOT
14A6
NC_PCIE_CLK100M3P
NC_PCIE_CLK100M3N
NC_ENETSD_CLKREQ_L
NC_PCIE_CLK100M4P
NC_PCIE_CLK100M4N
NC_GPU_CLKREQ_L
26C6 78D8
OUT
26C6 78D8
OUT
14A6 15A2 17B5
IN
PCIE_CLK100M_SOC_P
PCIE_CLK100M_SOC_N
SOC_CLKREQ_BUF_L
GPP_B10 PU is on XDP page
CR4
CR5
CM46
CH5
CH6
CK46
CM6
CM5
CK47
CK5
CK4
CK43
CG5
CG4
CK44
CN5
CN4
CM44
CLKOUT_PCIE_P0
CLKOUT_PCIE_N0
GPP_B5/SRCCLKREQ0*
CLKOUT_PCIE_P1
CLKOUT_PCIE_N1
GPP_B6/SRCCLKREQ1*
CLKOUT_PCIE_P2
CLKOUT_PCIE_N2
GPP_B7/SRCCLKREQ2*
CLKOUT_PCIE_P3
CLKOUT_PCIE_N3
GPP_B8/SRCCLKREQ3*
CLKOUT_PCIE_P4
CLKOUT_PCIE_N4
GPP_B9/SRCCLKREQ4*
CLKOUT_PCIE_P5
CLKOUT_PCIE_N5
GPP_B10/SRCCLKREQ5*
XTAL_IN
XTAL_OUT
XCLK_BIASREF
RTCX1
RTCX2
SRTCRST*
RTCRST*
DH6
DF6
DF9
DB46
DB44
CC38
CC40
NC
PCH_CLK38M4_XTALIN
PCH_CLK38M4_XTALOUT
PCH_DIFFCLK_BIASREF
PMU_CLK32K_PCH_1V0
PCH_RTC_RESET_L
PCH_RTC_RESET_L
14A6
OUT
IN
IN
IN
16C8
16D8
17D3
77C2
17D2
62C3
R1573
100K
1%
1/20W
MF
201
1
R1572
127K
1%
1/20W
MF
201
2
21
BOM_COST_GROUP=CPU & CHIPSET
PMU_CLK32K_PCH
PLACE_NEAR=U0500.DB46:5MM
PLACE_NEAR=U0500.DB46:5MM
IN
62D7
SYNC_MASTER=myEE SYNC_DATE=03/01/2019
PAGE TITLE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DESIGN: X502/MLB
LAST CHANGE: Thu Jun 18 20:05:18 2015
PCH PCIE/USB/CLKS
DRAWING NUMBER
051-05198
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
REVISION
6.0.0
BRANCH
evt-3
PAGE
15 OF 150
SHEET
14 OF 109
A
SIZE
D
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
Primary / Merged (CPU/PCH) Micro2-XDP
D
C
XDP:YES
13D6 16B7 17B8 17C6 19C3
77C2
IN
PM_RSMRST_L
PLACE_NEAR=U0500.CA38:18MM
R1800
1K
XDP:YES
13A6 13D3 62C6 77C2
PCH_PWRBTN_L
OUT
PLACE_NEAR=U0500.CH41:8MM MF1/20W 2015%
R1802
DEBUG:STUFF R1840 TO DELIBERATELY STALL AFTER RESET
CPU_CFG<0>
6B7 6C5 15D6
R1841
10
75A2 6B7
1K
PPVCCIO_OUT
R1840
1K
5%
1/20W
MF
201
Hook3 Components do not have XDP BOMOPTION
because they serve as CLKREQ_L PU
15A4
6D2 15D2
6D2
OUT
OUT
OUT
SOC_CLKREQ_BUF_L
XDP_CPU_TCK
PCH_JTAGX
NOSTUFF
21
75B1 15B4 15B3
R1870
R1835
1K
0
PP1V8_S5
NO_XNET_CONNECTION
XDP:YES
21
21
21
MF1/20W 2015%
XDP:YES
150
5%
1/20W
MF
201
MF1/20W 2015%
MF1/20W
1
NO_XNET_CONNECTION
2
MF1/20W 2015%
0201
R1872
21
1K
5%
1/20W
MF
201
1
2
R1871
21
5%
PLACE_NEAR=J1800.58:28MM
6D5
6D5
6B7 6C5 15C8
6B7 6C5
6C5
6C5
6A7 6D5 77D3
6A7 6D5
6A8 6B5
6B5
6B5
6B5
BI
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
PLACE_NEAR=U0500.K5:2.54MM
XDP_PRESENT_CPU_L
15B4
XDP_CPU_PREQ_L
XDP_CPU_PRDY_L
CPU_CFG<0>
CPU_CFG<1>
CPU_CFG<2>
CPU_CFG<3>
CPU_BPM_L<0>
CPU_BPM_L<1>
CPU_CFG<4>
CPU_CFG<5>
CPU_CFG<6>
CPU_CFG<7>
XDP_PM_RSMRST_L
XDP_CPU_PWRBTN_L
XDP_HOOK2
XDP_HOOK3
SMBUS_PCH_DATA
12D2 36D8
SMBUS_PCH_CLK
12D2 36D8
6D2 15D2
XDP_PCH_TCK
OUT
NOSTUFF
R1801
1K
5%
1/20W
MF
NO_XNET_CONNECTION
201
XDP:YES
C1804
0.1UF
X5R-CERM
0201
PLACE_NEAR=J1800.42:28MM PLACE_NEAR=J1800.47:28MM
1
2
10%
10V
PP1V05_PCH_OUT_FET
75B3
SKL/KBL/CFL
PULL CFG<3> LOW
WHEN XDP PRESENT
1
2
XDP_PIN_1
OBSFN_A0
OBSFN_A1
OBSDATA_A0
OBSDATA_A1
OBSDATA_A2
OBSDATA_A3
OBSFN_B0
OBSFN_B1
OBSDATA_B0
OBSDATA_B1
OBSDATA_B2
OBSDATA_B3
HOOK0
HOOK1
VCC_OBS_AB
HOOK2
HOOK3
SDA
SCL
TCK1
TCK0
XDP:YES
C1800
0.1UF
10%
10V
X5R-CERM
0201
PLACE_NEAR=J1800.44:28MM
NOTE: This is not the standard XDP pinout.
PP1V05_VCCSTG_OUT_LGC
6D7 8B7
XDP_CONN:YES
Use with 921-0133 Adapter Flex to
support chipset debug.
J1800
0
0
NOSTUFF
21
XDP:YES
21
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
5%
6B5
6B5
6B5 6B7
6B5 6B7
6B5 6B7
6B5
6B5
6B5
6B5 6B7
6B5 6B7
6B5
6B5
MF1/20W 0201
0201MF1/20W5%
ROUTE IN STAR TOPOLOGY FROM XDP CONNECTOR.
R1821
PLACE_NEAR=J1800.51:2.54MM
R1822
PLACE_NEAR=J1800.53:2.54MM
R1823
PLACE_NEAR=J1800.55:2.54MM
R1824
PLACE_NEAR=J1800.57:2.54MM
1
R1830
1K
5%
1/20W
MF
201
2
IN
0
0
0
0
XDP_PCH_TDO
6D2 15B1
XDP_PCH_TDI
6D2 15B1
XDP_PCH_TMS
6D2 15B1
XDP_CPU_TDO
6D2 15C1
XDP_CPU_TCK
6D2 15C8
XDP_PCH_TCK
6D2 15C6
PLACE_NEAR=J1800.45:28MM
6B5
21
XDP:YES
XDP:YES
5%
21
21
5% 1/20W
21
5%
XDP:YES
XDP:YES
PLACE_NEAR=U0500.V5:28MM MF1/20W 2015%
R1890
100
XDP:YES
PLACE_NEAR=U0500.Y5:28MM MF1/20W 2015%
R1891
51
XDP:YES
PLACE_NEAR=U0500.T5:28MM MF1/20W 2015%
R1892
51
XDP:YES
PLACE_NEAR=U0500.V6:28MM MF1/20W 2015%
R1810
100
XDP:YES
PLACE_NEAR=U0500.AC8:28MM MF1/20W 2015%
R1813
51
NOSTUFF
PLACE_NEAR=U0500.AA8:28MM MF1/20W 2015%
R1897
51
XDP:YES
R1806
0
21
PM_SYSRST_L
5%
1/20W
MF
0201
XDP_CPU_TDO
0201MF1/20W
XDP_CPU_TRST_L
0201MF5% 1/20W
XDP_CPU_TDI
MF
0201
XDP_CPU_TMS
MF1/20W
0201
OUT
OUT
OUT
IN
6D2 15D2
6D2
6D2
6D2
21
12
D
12
21
12
12
13D6 31C1 77C2
BI
C
DF40RC-60DP-0.4V
1
2
M-ST-SM1
62
2 1
4 3
6 5
8 7
10 9
12 11
14 13
16 15
18 17
20 19
22 21
24 23
26 25
28 27
30 29
32 31
34 33
36 35
38 37
40 39
42 41
44 43
46 45
48 47
50 49
52 51
54 53
56 55
58 57
60 59
64 63
61
518S0847
PPVCCIO_OUT
75A2
OBSFN_C0
OBSFN_C1
OBSDATA_C0
OBSDATA_C1
OBSDATA_C2
OBSDATA_C3
OBSFN_D0
OBSFN_D1
OBSDATA_D0
OBSDATA_D1
OBSDATA_D2
OBSDATA_D3
ITPCLK/HOOK4
ITPCLK#/HOOK5
VCC_OBS_CD
RESET#/HOOK6
DBR#/HOOK7
TDO
TRSTn
TDI
TMS
XDP_PRESENT#
XDP:YES
1
C1801
0.1UF
10%
10V
2
X5R-CERM
0201
PLACE_NEAR=J1800.43:28MM
NC
NC
CPU_CFG<17>
CPU_CFG<16>
CPU_CFG<8>
CPU_CFG<9>
CPU_CFG<10>
CPU_CFG<11>
CPU_CFG<19>
CPU_CFG<18>
CPU_CFG<12>
CPU_CFG<13>
CPU_CFG<14>
CPU_CFG<15>
VOLTAGE=1.05V
PPVCC_OBS_CD
ITP_PMODE
XDP_DBRESET_L
XDP:YES
1
C1806
0.1UF
10%
10V
2
X5R-CERM
0201
R1860
R1861
B
12A6 12C5
12B6 12C5
12A6 12B5
12A6 12B5
12B5
12B5
12A6 12B5
12B5
12B5
BI
BI
BI
BI
BI
BI
BI
BI
BI
PCH XDP Signals
These signals do not connect to the Primary (Merged) XDP connector in this architecture.
The PDG puts them on a secondary XDP connector that is only needed in some PCH debugging situation.
They are listed here to show their secondary XDP functions and to provide test points for signals that are not used elsewhere.
PCH/XDP Signals
XDP_PCH_STRP_GPP_E0
XDP_PCH_STRP_CNV_DISABLE
XDP_MEM_OK
XDP_PCH_STRP_SPIROM_SAF
XDP_PCH_OBSDATA_B0
XDP_PCH_OBSDATA_B1
XDP_PCH_OBSDATA_B2
XDP_PCH_OBSDATA_B3
XDP_PCH_OBSFN_C0
OBSDATA_A0
OBSDATA_A1
OBSDATA_A2
OBSDATA_B0
OBSDATA_B1
OBSDATA_B2
OBSDATA_B3
1
TP
TP-P6
1
TP
TP-P6
1
TP
TP-P6
1
TP
TP-P6
1
TP
TP-P6
1
TP
TP-P6
1
TP
TP-P6
1
TP
TP-P6
1
TP
TP-P6
TP1840
TP1841
TP1842
TP1843
TP1868
TP1869
TP1870
TP1871
TP1867
12D2 36B6
BI
12D2 36B6
BI
5A6 5B3 19B5
BI
5B3 19B5
BI
5B6 5C3 19D5
BI
5C3 19D5
BI
5B6 5C3 19C5
BI
5B3 19C5
BI
5A6 5B3 19C5
BI
PCH_I2C_UPC_SCL
PCH_I2C_UPC_SDA
LSX_HSR_R2P
LSX_HSR_P2R
LSX_HSX_R2P
LSX_HSX_P2R
LSX_HST_R2P
LSX_HST_P2R
LSX_HSW_R2P
OBSDATA_C0
OBSDATA_C1
OBSDATA_C2
OBSDATA_C3OBSDATA_A3
OBSDATA_C4
OBSDATA_C5
OBSDATA_C6
OBSDATA_C7
OBSFN_C1OBSFN_C0
1
TP
TP-P6
1
TP
TP-P6
1
TP
TP-P6
1
TP
TP-P6
1
TP
TP-P6
1
TP
TP-P6
1
TP
TP-P6
1
TP
TP-P6
1
TP
TP-P6
TP1844
TP1845
TP1846
TP1847
TP1848
TP1849
TP1850
TP1851
TP1852
75B1 15C7 15B3
PP1V8_S5
74B2 11B8 8B4
15D6
XDP_PRESENT_CPU_L
NOSTUFF
R1850
100K
1/20W
201
PP3V3_S5
1
5%
MF
2
NO_XNET_CONNECTION
XDP:YES
R1876
10K
5%
1/20W
MF
201
XDP_PRESENT1_L
1
XDP:YES
2
R1874
MF
0201
0
21
1/20W
5%
Per Intel comments
POD_PRESENT2_N going to logic control
R1873
NEED TO CONNECT TO VCCST, *STG POWER LOGIC
75B1 15C7 15B4
XDP_PRESENT2_L
PP1V8_S5
XDP:YES
21
1K
2
1
XDP:YES
6
VCC
U1870
74AUP1G07GF
SOT891
GND
3
MF1/20W 2015%
XDP:YES
C1870
X5R-CERM
4
YA
5
NCNC
XDP_PCH_TDO
XDP_PCH_TRST_L
XDP_PCH_TDI
XDP_PCH_TMS
XDP_USB_EXTC_OC_L
1
0.1UF
10%
10V
2
0201
XDP_PRESENT_L
NCNC
R1875
100K
5%
1/20W
MF
201
6D2 15D2
IN
6D2
OUT
6D2 15D2
OUT
6D2 15D2
OUT
14A6 14C3
OUT
B
1
2
24C6 64A5
OUT
A
Other Debug Signals
6B3
BI
6B3
BI
6C3 6B5
BI
6B3
BI
6B3
BI
6B3
BI
6B3
BI
6B3
BI
6B3
BI
6C3
BI
6B3
BI
5A6
BI
PEG_VIEW_2
PEG_VIEW_3
DDR_VIEW_0 FIVR_PROBE_DIG_0
DDR_VIEW_1
FIVR_VLOAD_CORE0
FIVR_VLOAD_CORE1
FIVR_VLOAD_CORE2
FIVR_VLOAD_CORE3
FIVR_VLOAD_CCF
FIVR_VLOAD_SA
FIVR_VLOAD_TCSS
FIVR_VLOAD_GTM
1
TP
TP-P6
1
TP
TP-P6
1
TP
TP-P6
1
TP
TP-P6
1
TP
TP-P6
1
TP
TP-P6
1
TP
TP-P6
1
TP
TP-P6
1
TP
TP-P6
1
TP
TP-P6
1
TP
TP-P6
1
TP
TP-P6
TP1872
TP1878
TP1879
TP1880
TP1881
TP1882
TP1883
TP1884
TP1885
TP1886
TP1887
TP1888
6B5
6B5
6B5
6B3
6B3
6B3
6A5
6A5
12B5
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
FIVR_PROBE_ANA_0
FIVR_PROBE_ANA_1
FIVR_PROBE_DIG_1
FIVR_VLOAD_1P05
FIVR_VLOAD_VCCIO
FIVR_VLOAD_VNN
FIVR_ANAPB0
FIVR_ANAPB1
FIVR_DIGPB_1
1
TP
TP-P6
1
TP
TP-P6
1
TP
TP-P6
1
TP
TP-P6
1
TP
TP-P6
1
TP
TP-P6
1
TP
TP-P6
1
TP
TP-P6
1
TP
TP-P6
1
TP
TP-P6
TP1889
TP1890
TP1891
TP1892
TP1893
TP1894
TP1895
TP1896
TP1897
TP1898
SOC_CLKREQ_BUF_L
15C8
Per Intel comments HOOK3
HOOK3 connected to GPP_B10
SOC_CLKREQ_BUF_L
MAKE_BASE=TRUE
14A6 17B5
BOM_COST_GROUP=DEBUG
SYNC_MASTER=myEE SYNC_DATE=03/01/2019
PAGE TITLE
CPU/PCH Merged XDP
SIZE
D
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
18 OF 150
SHEET
15 OF 109
A
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
VCCIN_AUX DISCHARGE
Ensure VCCIN_AUX decays below 200mV within 100ms (PDG requirement tPCH35)
D
14A3
14A3
PCH_CLK38M4_XTALOUT
IN
PCH_CLK38M4_XTALIN
OUT
PLACE_NEAR=U0500.DF6:2MM
200K
1%
1/20W
MF
201
1
2
R1901
38.4MHZ CRYSTAL
R1900
0
21
5%
1/20W
MF
0201
R1902
0
21
5%
1/20W
MF
0201
PCH_CLK38M4_XTALOUT_R
38.4MHZ-10PPM-8PF-30OHM
PCH_CLK38M4_XTALIN_R
CRITICAL
Y1900
2.5X2.0-SM
CRITICAL
C1900
5.6PF
+/-0.05PF
C0G-CERM
1
2
4
3
CRITICAL
C1901
5.6PF
+/-0.05PF
C0G-CERM
25V
0201
25V
0201
80D8 79C6 77D2 75B3 40A5 8D4
PP3V3_G3H_RTC
75C4
1
21
R1961
100K
5%
1/20W
MF
201
2
PVCCINAUX_DSCHG_EN
6
D
R1960
0
21
56A6 56C6
IN
21
PVCCINAUX_DSCHG_EN_LVCCINAUX1_EN_R
MF1/20W
02015%
2
G
Q1960
DMN5L06VK-7
S
SOT563
VER-4
1
NOSTUFF
C1960
47PF
5%
25V
C0G
0201
1
2
5
G
PPVCCIN_AUX_PCH_PRIM
PVCCINAUX_DSCHG
3
D
Q1960
DMN5L06VK-7
S
SOT563
VER-4
4
1
R1962
47
5%
1/16W
MF-LF
402
2
D
VCCSTG_OUT DISCHARGE
C
B
Ensure VCCSTG_OUT <= VCCST during power-down (required at all times)
77D2 11B8 11A5 8C7
75B4 64D5
VCCIN VR EN and VCCST_PWRGD Generation
77D2 75B4 64A2 54B3 31B6 13D8 10B3 8C7 8A5 6D6
62A6 62C6 77C2
IN
13A6 13D3 16A7 19B5 62D6 64A6 64B5 64C3 77C2 81C3
IN
ALL_SYS_PWRGD
PM_SLP_S3_L_1
R1910
13D6 15C8 17B8 17C6 19C3 77C2
IN
13A6 13D3 17C8 59C7
IN
PM_RSMRST_L
PM_SLP_SUS_L
0
5%
1/20W
MF
0201
PP1V05_S0_CPU_VCCST
10%
16V
0201
1
2
NC
21
C1910
0.1UF
X5R-CERM
CPUVRENA
NOSTUFF
R1911
0
MF 1/20W
5%
0201
21
6
VCC
1
A Y
2
5
B
NC
AND
GND
3
BYPASS=U1912.6:3:5MMBYPASS=U1910::5mm
U1910
74AUP1G08
X1-DFN1010-6
4
C1912
0.1UF
X5R-CERM
0201
CPUVRENB
10%
16V
NC
13A6 13D3 64B4
IN
1
2
U1912
74AUP1G08
6
X1-DFN1010-6
VCC
1
A Y
2
AND
B
4
CPU_VR_EN
OUT
54B3
64A3
P1V05_VCCST_EN
IN
1/20W
R1912
5
NC
GND
3
0
5%
1/20W
MF
0201
21
VCCST_PWRGD
OUT
13D8
13A6 13D3 24B6 77C2 81A8 81C3
PM_SLP_S0_3V3_L
IN
R1950
0
1/20W5% 0201MF
NOSTUFF
21
R1953
0
2 1
MF5%0201
75B1
PVCCSTG_DSCHG_EN_LCPU_C10_GATE_L
SLP_S0# 1.8V Level Shifter
PP1V8_S5
BYPASS=U1930::5mm
PM_SLP_S0_3V3_L
MAKE_BASE=TRUE
C1930
0.1UF
10%
6.3V
CERM-X5R
0201
2
G
1
2
2
6
D
Q1950
DMN5L06VK-7
S
5
NC
1
NC
SOT563
VER-4
1
U1930
74AUP1G34GX
SOT1226
4
3
PM_SLP_S0_L
1
R1930
100K
5%
1/20W
MF
201
2
PP3V3_G3H
C1950
NOSTUFF
47PF
5%
25V
C0G
0201
1
2
OUT
PP1V05_VCCSTG_OUT
1
R1951
100K
5%
1/20W
MF
201
2
PVCCSTG_DSCHGPVCCSTG_DSCHG_EN
3
D
Q1950
5
G
DMN5L06VK-7
S
SOT563
VER-4
4
NOSTUFF
1
R1952
300
1%
1/20W
MF
201
2
C
B
A
PCH_PWROK Generation
74B2 31C1 17C7
BYPASS=U1915::5mm
13A6 13D3 16B7 19B5 62D6 64A6 64B5 64C3 77C2 81C3 13C6
31C1
PM_SLP_S3_L_1
PM_PCH_PWROK_R
IN
PP3V3_S5
10%
16V
0201
1
2
NC
C1915
0.1UF
X5R-CERM
VCC
1
A Y
2
AND
B
5
NC
GND
U1915
74AUP1G08
6
X1-DFN1010-6
3
R1915
0
5%
MF
0201
21
13C6 17B8 77C2
OUT
32A6
SMC_DPWROK1V8 SMC_DPWROK1V8_RPM_PCH_PWROK
4
PCHPWROK_R PM_PCH_DPWROK
1
R1917
100K
5%
1/20W
MF
201
2
1/20W
R1921
NOSTUFF
PP3V3_S5
74B2
0
5%
1/20W
MF
0201
21
DSW_PWROK 3.3V Level Shifter
BYPASS=U1920::2MM
10%
6.3V
0201
1
2
U1920
74AUP1T97
5
SOT891
1
2
4
6
3
1
R1920
100K
5%
1/20W
MF
201
2
OUTIN
C1920
0.1UF
CERM-X5R
1
R1922
100K
5%
1/20W
MF
201
2
R1916
0
5%
MF
0201
21
BOM_COST_GROUP=CPU & CHIPSET
PM_PCH_PWROK_R
MAKE_BASE=TRUE
1/20W
PAGE TITLE
Chipset Shared Support
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
SYNC_DATE=03/20/2019SYNC_MASTER=J214_DAVID
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
19 OF 150
SHEET
16 OF 109
A
SIZE
D
8
67
35 4
2
1
Platform Reset Connections
www.haojiyoubbs.com
QQ微信：181806465
678
3 245
1
D
PP1V8_S5
75B1
PP3V3_S5
74B2
REMOVED J2001 ESPI ANALYZER CONNECTOR etc
1
C2005
0.1UF
10%
16V
2
X5R-CERM
0201
1
VCCA VCCB
6
U2002
20C5 20D5
13A6 13D6
IN
17A4 17B4
31B6 77C2
PLT_RST_L
R2002
R2001
SLSV1T34AMU-COMBO
NC
2
5
UDFN
NC
GND
3
100K
100K
BA
21
1/20W5%
21
1
2
4
R2003
C2006
0.1UF
10%
16V
X5R-CERM
0201
PLT_RST_3V3_L
1
100K
5%
1/20W
MF
201
2
PCH_WLAN_PERST_L
201MF
SOC_PERST_L
201MF1/20W5%
OUT
19C3
12C5 17D2 21C3
OUT
12C5 24D6 80A7
OUT
PCH_RTC_RESET_L
14A3
PCH_WLAN_PERST_L
21A3
BKLT_PWM_MLB2TCON
5D3
8C1
8C1
PCH_CORE_VID0
PCH_CORE_VID1
SIGNAL ALIASES
MAKE_BASE=TRUE
PCH_RTC_RESET_L
MAKE_BASE=TRUE
PCH_WLAN_PERST_L
MAKE_BASE=TRUE
BKLT_PWM_MLB2TCON
MAKE_BASE=TRUE
PCH_CORE_VID0
MAKE_BASE=TRUE
PCH_CORE_VID1
D
14A3 62C3 77C2
12C5 17D6 21C3
66C1 77D5
56A5 64A5
56A5 64A5
C
14A6
BI BI
PCH_WLAN_CLKREQ_L
R2010
1K
21
PCH_WLAN_CLKREQ_R_L
1/20W5% 201MF
RSMRST override
Force PCH-side RSMRST low if SLP_SUS is low, in case of uncontrolled shutdown
PP3V3_S5
10%
16V
0201
1
2
NC
C2070
0.1UF
X5R-CERM
6
VCC
1
A Y
2
AND
B
5
NC
GND
3
U2070
74AUP1G08
X1-DFN1010-6
4
RSMRSTL_R
1
R2072
100K
5%
1/20W
MF
201
2
13A6 13D3 16B7 59C7
31B1
74B2 31C1 16A7
IN
PM_SLP_SUS_L
PM_RSMRST_R_L
IN
BYPASS=U2070::5mm
SOC_CLKREQ_L ISOLATION SWITCH & DELAY
21A2 21C3
R2071
0
5%
1/20W
MF
0201
NOSTUFF
R2070
0
21
5%
1/20W
MF
0201
C
BT_AUDIO_SYNC ISOLATION BUFFER
21
PM_RSMRST_L
13D6 15C8 16B7 17B8 19C3 77C2
OUT
75C1 17B4
21B3 21C2 21C7
PP1V8_G3S
IN
BT_AUDIO_SYNC
1
C2030
0.1UF
10%
16V
2
X5R-CERM
0201
U2030
74AUP1G126GX
5
X2SON5
2
A
OE
3
4
Y
1
PCH_BT_AUDIO_SYNC
OUT
5A6 5D3
B
13A6 13D6 17A4 17D8 20C5 20D5 31B6 77C2
IN
0
5%
MF
0201
5%
MF
201
PP1V8_S5
21
SOC_CLKREQ_SW_EN
BYPASS=U2050::2MM
C2050
D2050
LGA
K A
RB522ES-30
NO_XNET_CONNECTION=1
0.1UF
10%
16V
X5R-CERM
0201
1
2
C2
1
C2051
0.022UF
10%
6.3V
2
X5R-CERM
0201
A2
V+
U2050
TS5A3166YZPR
XBGA
IN
GND
C1
COM
NO
B1
A1
SOC_CLKREQ_BUF_L
SOC_CLKREQ_L
PCH latches SOC_CLKREQ_L boot strap
65us after RSMRST# de-assertion
BI
BI
14A6 15A2
26D7
75C1 17C4
21A2 21C5 21D7 23D2
13A6 13D6 17B4 17D8 20C5 20D5 31B6 77C2
IN
75B1 24A8 14A7 12A7
NOSTUFF
R2050
13C6 16A5 77C2
IN
13D6 15C8 16B7 17C6 19C3 77C2
IN
PM_PCH_PWROK
170us-nom delay
PM_RSMRST_L
1/20W
R2051
20K
2 1
1/20W
R2052
33
21
SOC_CLKREQ_SW_EN_D
5%
1/20W
MF
201
NO_XNET_CONNECTION=1
PLT_RST_L
WLAN_AUDIO_SYNC ISOLATION BUFFER
PP1V8_G3S
WLAN_AUDIO_SYNC
PLT_RST_L
1
C2020
0.1UF
10%
16V
2
X5R-CERM
0201
R2030
2
A
3
117S0201
0
21
5%
1/20W
MF
0201
NOSTUFF
U2020
74AUP1G126GX
5
X2SON5
4
Y
OE
1
117S0201
PCH_WLAN_AUDIO_SYNC
B
5A6 5D3
OUTIN
A
SOC SWD <=> DEBUG MUX PATH
SOC
24C3 77D4
OUT
24C3 77C4 19D3
BI
SWD_SOC_SWCLK
SWD_SOC_SWDIO SWD_SOC_SWDIO_R
R2008
33
21
5%
1/20W
MF
201
R2009
33
21
5%
1/20W
MF
201
DEBUG MUX
SWD_SOC_SWCLK_R
IN
19D3
BI
R2021
0
21
5%
1/20W
MF
0201
BOM_COST_GROUP=CPU & CHIPSET
NOSTUFF
SYNC_MASTER=J214_DAVID SYNC_DATE=03/05/2019
PAGE TITLE
Chipset Support 2
SIZE
D
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
20 OF 150
SHEET
17 OF 109
A
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
C
B
CHANNEL A
88C6 7D5
88C6 7D5 7C5
88C6 7D5
CHANNEL B
89C6 7D5
89C6 7C5
89C6 7D5
CHANNEL C
90C6 7D1
90C6 7D1 7C1
90C6 7D1
CHANNEL D
91C6 7D1
91C6 7C1
91C6 7D1
LPDDR4x SUB CHANNELS
LPDDR4X
PP1V8_S3_MEM
PP1V1_S3
PP0V6_S3
MEM_A_DQ_2<7..0>
MEM_A_DQ_0<7..0>
MEM_A_DQ_3<7..0>
MEM_A_DQ_1<7..0>
MEM_A_DQS_P<3..0>
MEM_A_DQS_N<3..0>
PP1V8_S3_MEM
PP1V1_S3
PP0V6_S3
MEM_B_DQ_2<7..0>
MEM_B_DQ_0<7..0>
MEM_B_DQ_3<7..0>
MEM_B_DQ_1<7..0>
MEM_B_DQS_P<3..0>
MEM_B_DQS_N<3..0>
PP1V8_S3_MEM
PP1V1_S3
PP0V6_S3
MEM_C_DQ_1<7..0>
MEM_C_DQ_3<7..0>
MEM_C_DQ_0<7..0>
MEM_C_DQ_2<7..0>
MEM_C_DQS_P<3..0>
MEM_C_DQS_N<3..0>
PP1V8_S3_MEM
PP1V1_S3
PP0V6_S3
MEM_D_DQ_1<7..0>
MEM_D_DQ_3<7..0>
MEM_D_DQ_0<7..0>
MEM_D_DQ_2<7..0>
MEM_D_DQS_P<3..0>
MEM_D_DQS_N<3..0>
88D3
88B3
88D3
88B3
7B1 18B8 18C8 91B5 90B5 89B5 88B5
7D5 88C6
7D5 88C6
MEM_RESET_L
MEM_A_CLK_P
MEM_A_CLK_N
MEM_A_CS_L<1..0>
MEM_A_CA<5..0>
MEM_A_CKE<1..0>
7B1 18B8 18C8 18D8 91B5 90B5 89B5 88B5
7D5 89C6
7D5 89C6
MEM_RESET_L
MEM_B_CLK_P
MEM_B_CLK_N
MEM_B_CS_L<1..0>
MEM_B_CA<5..0>
MEM_B_CKE<1..0>
7B1 18B8 18C8 18D8 91B5 90B5 89B5 88B5
7D1 90C6
7D1 90C6
MEM_RESET_L
MEM_C_CLK_P
MEM_C_CLK_N
MEM_C_CS_L<1..0>
MEM_C_CA<5..0>
MEM_C_CKE<1..0>
MEM_RESET_L
7B1 18C8 18D8 91B5 90B5 89B5 88B5
MEM_D_CLK_P
7D1 91C6
MEM_D_CLK_N
7D1 91C6
MEM_D_CS_L<1..0>
MEM_D_CA<5..0>
MEM_D_CKE<1..0>
RESET_L
CLK_P
CLK_N
CS_L<1..0>
CA<5..0>
RESET_L
CLK_P
CLK_N
CS_L<1..0>
CA<5..0>
RESET_L
CLK_P
CLK_N
CS_L<1..0>
CA<5..0>
RESET_L
CLK_P
CLK_N
CS_L<1..0>
CA<5..0>
PP1V8
PP1V1
PP0V6
DQ_0<7..0>
DQ_1<7..0>
DQ_2<7..0>
DQ_3<7..0>
DQS_P<3..0>
DQS_N<3..0>CKE<1..0>
LPDDR4X
PP1V8
PP1V1
PP0V6
DQ_0<7..0>
DQ_1<7..0>
DQ_2<7..0>
DQ_3<7..0>
DQS_P<3..0>
DQS_N<3..0>CKE<1..0>
LPDDR4X
PP1V8
PP1V1
PP0V6
DQ_0<7..0>
DQ_1<7..0>
DQ_2<7..0>
DQ_3<7..0>
DQS_P<3..0>
DQS_N<3..0>CKE<1..0>
LPDDR4X
PP1V8
PP1V1
PP0V6
DQ_0<7..0>
DQ_1<7..0>
DQ_2<7..0>
DQ_3<7..0>
DQS_P<3..0>
DQS_N<3..0>CKE<1..0>
Memory Bit & Byte Swizzle
MAKE_BASE=TRUE
MEM_A_DQ_0<0>
7D8
MEM_A_DQ_0<1>
7D8
MEM_A_DQ_0<2>
7D8
MEM_A_DQ_0<3>
88D3 89D3 90D3 91D3 77B4 74D4 63B6 63A6 18C6 18B6
88A3 89A3 90A3
88D5 18C4
88D5 18D4
88C5 18C4
88C5 18D4
88C5 88B5 18A4
88C5 18A4
88A3 89A3 90A3 91A3
89D5 18B4
89D5 18C4
89C5 18B4
89C5 18C4 18B4
89C5 89B5 18A4
89C5 18A4
88A3 89A3 90A3 91A3
90D5 18D2
90D5 18C2
90C5 18D2
90C5 18C2
90C5 90B5 18A2
90C5 18A2
88A3 89A3 90A3
91D5 18C2 18B2
91D5 18B2
91C5 18C2
91C5 18B2
91C5 91B5 18A2
91C5 18A2
91A3 80C8 80B8 79B6 75A1 63C2 63A8 63A5 18C6 18B6
88B3 89B3 90B3 91B3 79C6 77B4 75A1 63A6 18C6 18B6
89D3 90D3 91D3 77B4 74D4 63B6 63A6 18D6 18C6 18B6
80C8 80B8 79B6 75A1 63C2 63A8 63A5 18D6 18C6 18B6
89B3 90B3 91B3 79C6 77B4 75A1 63A6 18D6 18C6 18B6
89D3 90D3 91D3 77B4 74D4 63B6 63A6 18D6 18C6 18B6
80C8 80B8 79B6 75A1 63C2 63A8 63A5 18D6 18C6 18B6
89B3 90B3 91B3 79C6 77B4 75A1 63A6 18D6 18C6 18B6
88D3 89D3 90D3 91D3 77B4 74D4 63B6 63A6 18D6 18C6
91A3 80C8 80B8 79B6 75A1 63C2 63A8 63A5 18D6 18C6
88B3 89B3 90B3 91B3 79C6 77B4 75A1 63A6 18D6 18C6
7D8
MEM_A_DQ_0<4>
7D8
MEM_A_DQ_0<5>
7D8
MEM_A_DQ_0<6>
7D8
MEM_A_DQ_0<7>
7D8
MEM_A_DQ_1<0>
7D8
MEM_A_DQ_1<1>
7D8
MEM_A_DQ_1<2>
7D8
MEM_A_DQ_1<3>
7D8
MEM_A_DQ_1<4>
7D8
MEM_A_DQ_1<5>
7D8
MEM_A_DQ_1<6>
7D8
MEM_A_DQ_1<7>
7D8
MEM_A_DQ_2<0>
7D8
MEM_A_DQ_2<1>
7D8
MEM_A_DQ_2<2>
7C8
MEM_A_DQ_2<3>
7C8
MEM_A_DQ_2<4>
7C8
MEM_A_DQ_2<5>
7C8
MEM_A_DQ_2<6>
7C8
MEM_A_DQ_2<7>
7C8
MEM_A_DQ_3<0>
7C8
MEM_A_DQ_3<1>
7C8
MEM_A_DQ_3<2>
7C8
MEM_A_DQ_3<3>
7C8
MEM_A_DQ_3<4>
7C8
MEM_A_DQ_3<5>
7C8
MEM_A_DQ_3<6>
7C8
MEM_A_DQ_3<7>
7C8
MEM_B_DQ_0<0>
7C8
MEM_B_DQ_0<1>
7C8
MEM_B_DQ_0<2>
7C8
MEM_B_DQ_0<3>
7C8
MEM_B_DQ_0<4>
7C8
MEM_B_DQ_0<5>
7C8
MEM_B_DQ_0<6>
7C8
MEM_B_DQ_0<7>
7C8
MEM_B_DQ_1<0>
7C8
MEM_B_DQ_1<1>
7C8
MEM_B_DQ_1<2>
7C8
MEM_B_DQ_1<3>
7B8
MEM_B_DQ_1<4>
7B8
MEM_B_DQ_1<5>
7B8
MEM_B_DQ_1<6>
7B8
MEM_B_DQ_1<7>
7B8
MEM_B_DQ_2<0>
7B8
MEM_B_DQ_2<1>
7B8
MEM_B_DQ_2<2>
7B8
MEM_B_DQ_2<3>
7B8
MEM_B_DQ_2<4>
7B8
MEM_B_DQ_2<5>
7B8
MEM_B_DQ_2<6>
7B8
MEM_B_DQ_2<7>
7B8
MEM_A_DQ_0<0>
MEM_A_DQ_0<1>
MEM_A_DQ_0<2>
MEM_A_DQ_0<3>
MEM_A_DQ_0<4>
MEM_A_DQ_0<5>
MEM_A_DQ_0<6>
MEM_A_DQ_0<7>
MEM_A_DQ_1<0>
MEM_A_DQ_1<1>
MEM_A_DQ_1<2>
MEM_A_DQ_1<3>
MEM_A_DQ_1<4>
MEM_A_DQ_1<5>
MEM_A_DQ_1<6>
MEM_A_DQ_1<7>
MEM_A_DQ_2<0>
MEM_A_DQ_2<1>
MEM_A_DQ_2<2>
MEM_A_DQ_2<3>
MEM_A_DQ_2<4>
MEM_A_DQ_2<5>
MEM_A_DQ_2<6>
MEM_A_DQ_2<7>
MEM_A_DQ_3<0>
MEM_A_DQ_3<1>
MEM_A_DQ_3<2>
MEM_A_DQ_3<3>
MEM_A_DQ_3<4>
MEM_A_DQ_3<5>
MEM_A_DQ_3<6>
MEM_A_DQ_3<7>
MEM_B_DQ_0<0>
MEM_B_DQ_0<1>
MEM_B_DQ_0<2>
MEM_B_DQ_0<3>
MEM_B_DQ_0<4>
MEM_B_DQ_0<5>
MEM_B_DQ_0<6>
MEM_B_DQ_0<7>
MEM_B_DQ_1<0>
MEM_B_DQ_1<1>
MEM_B_DQ_1<2>
MEM_B_DQ_1<3>
MEM_B_DQ_1<4>
MEM_B_DQ_1<5>
MEM_B_DQ_1<6>
MEM_B_DQ_1<7>
MEM_B_DQ_2<0>
MEM_B_DQ_2<1>
MEM_B_DQ_2<2>
MEM_B_DQ_2<3>
MEM_B_DQ_2<4>
MEM_B_DQ_2<5>
MEM_B_DQ_2<6>
MEM_B_DQ_2<7>
88D5 18D6
88D5 18D6
88D5 18D6
88D5 18D6
88D5 18D6
88D5 18D6
88D5 18D6
88D5 18D6
88C5 18D6
88C5 18D6
88C5 18D6
88C5 18D6
88C5 18D6
88C5 18D6
88C5 18D6
88C5 18D6
88D5 18D6
88D5 18D6
88D5 18D6
88D5 18D6
88D5 18D6
88D5 18D6
88D5 18D6
88D5 18D6
88C5 18D6
88C5 18D6
88C5 18D6
88C5 18D6
88C5 18D6
88C5 18D6
88C5 18D6
88C5 18D6
89D5 18C6
89D5 18C6
89D5 18C6
89D5 18C6
89D5 18C6
89D5 18C6
89D5 18C6
89D5 18C6
89C5 18C6
89C5 18C6
89C5 18C6
89C5 18C6
89C5 18C6
89C5 18C6
89C5 18C6
89C5 18C6
89D5 18C6
89D5 18C6
89D5 18C6
89D5 18C6
89D5 18C6
89D5 18C6
89D5 18C6
89D5 18C6
MAKE_BASE=TRUE
MEM_C_DQ_0<0>
7D4
MEM_C_DQ_0<1>
7D4
MEM_C_DQ_0<2>
7D4
MEM_C_DQ_0<3>
7D4
MEM_C_DQ_0<4>
7D4
MEM_C_DQ_0<5>
7D4
MEM_C_DQ_0<6>
7D4
MEM_C_DQ_0<7>
7D4
MEM_C_DQ_1<0>
7D4
MEM_C_DQ_1<1>
7D4
MEM_C_DQ_1<2>
7D4
MEM_C_DQ_1<3>
7D4
MEM_C_DQ_1<4>
7D4
MEM_C_DQ_1<5>
7D4
MEM_C_DQ_1<6>
7D4
MEM_C_DQ_1<7>
7D4
MEM_C_DQ_2<0>
7D4
MEM_C_DQ_2<1>
7D4
MEM_C_DQ_2<2>
7C4
MEM_C_DQ_2<3>
7C4
MEM_C_DQ_2<4>
7C4
MEM_C_DQ_2<5>
7C4
MEM_C_DQ_2<6>
7C4
MEM_C_DQ_2<7>
7C4
MEM_C_DQ_3<0>
7C4
MEM_C_DQ_3<1>
7C4
MEM_C_DQ_3<2>
7C4
MEM_C_DQ_3<3>
7C4
MEM_C_DQ_3<4>
7C4
MEM_C_DQ_3<5>
7C4
MEM_C_DQ_3<6>
7C4
MEM_C_DQ_3<7>
7C4
MEM_D_DQ_0<0>
7C4
MEM_D_DQ_0<1>
7C4
MEM_D_DQ_0<2>
7C4
MEM_D_DQ_0<3>
7C4
MEM_D_DQ_0<4>
7C4
MEM_D_DQ_0<5>
7C4
MEM_D_DQ_0<6>
7C4
MEM_D_DQ_0<7>
7C4
MEM_D_DQ_1<0>
7C4
MEM_D_DQ_1<1>
7C4
MEM_D_DQ_1<2>
7C4
MEM_D_DQ_1<3>
7B4
MEM_D_DQ_1<4>
7B4
MEM_D_DQ_1<5>
7B4
MEM_D_DQ_1<6>
7B4
MEM_D_DQ_1<7>
7B4
MEM_D_DQ_2<0>
7B4
MEM_D_DQ_2<1>
7B4
MEM_D_DQ_2<2>
7B4
MEM_D_DQ_2<3>
7B4
MEM_D_DQ_2<4>
7B4
MEM_D_DQ_2<5>
7B4
MEM_D_DQ_2<6>
7B4
MEM_D_DQ_2<7>
7B4
MEM_C_DQ_0<0>
MEM_C_DQ_0<1>
MEM_C_DQ_0<2>
MEM_C_DQ_0<3>
MEM_C_DQ_0<4>
MEM_C_DQ_0<5>
MEM_C_DQ_0<6>
MEM_C_DQ_0<7>
MEM_C_DQ_1<0>
MEM_C_DQ_1<1>
MEM_C_DQ_1<2>
MEM_C_DQ_1<3>
MEM_C_DQ_1<4>
MEM_C_DQ_1<5>
MEM_C_DQ_1<6>
MEM_C_DQ_1<7>
MEM_C_DQ_2<0>
MEM_C_DQ_2<1>
MEM_C_DQ_2<2>
MEM_C_DQ_2<3>
MEM_C_DQ_2<4>
MEM_C_DQ_2<5>
MEM_C_DQ_2<6>
MEM_C_DQ_2<7>
MEM_C_DQ_3<0>
MEM_C_DQ_3<1>
MEM_C_DQ_3<2>
MEM_C_DQ_3<3>
MEM_C_DQ_3<4>
MEM_C_DQ_3<5>
MEM_C_DQ_3<6>
MEM_C_DQ_3<7>
MEM_D_DQ_0<0>
MEM_D_DQ_0<1>
MEM_D_DQ_0<2>
MEM_D_DQ_0<3>
MEM_D_DQ_0<4>
MEM_D_DQ_0<5>
MEM_D_DQ_0<6>
MEM_D_DQ_0<7>
MEM_D_DQ_1<0>
MEM_D_DQ_1<1>
MEM_D_DQ_1<2>
MEM_D_DQ_1<3>
MEM_D_DQ_1<4>
MEM_D_DQ_1<5>
MEM_D_DQ_1<6>
MEM_D_DQ_1<7>
MEM_D_DQ_2<0>
MEM_D_DQ_2<1>
MEM_D_DQ_2<2>
MEM_D_DQ_2<3>
MEM_D_DQ_2<4>
MEM_D_DQ_2<5>
MEM_D_DQ_2<6>
MEM_D_DQ_2<7>
90C5 18C6
90C5 18C6
90C5 18C6
90C5 18C6
90C5 18C6
90C5 18C6
90C5 18C6
90C5 18C6
90D5 18C6
90D5 18C6
90D5 18C6
90D5 18C6
90D5 18C6
90D5 18C6
90D5 18C6
90D5 18C6
90C5 18C6
90C5 18C6
90C5 18C6
90C5 18C6
90C5 18C6
90C5 18C6
90C5 18C6
90C5 18C6
90D5 18C6
90D5 18C6
90D5 18C6
90D5 18C6
90D5 18C6
90D5 18C6
90D5 18C6
90D5 18C6
91C5 18B6
91C5 18B6
91C5 18B6
91C5 18B6
91C5 18B6
91C5 18B6
91C5 18B6
91C5 18B6
91D5 18B6
91D5 18B6
91D5 18B6
91D5 18B6
91D5 18B6
91D5 18B6
91D5 18B6
91D5 18B6
91C5 18B6
91C5 18B6
91C5 18B6
91C5 18B6
91C5 18B6
91C5 18B6
91C5 18B6
91C5 18B6
Current LPDDR4x APNs for BOM:
Hynix (MPN -- APN):
H9HCNNNBKMALHR-NEE, 333S00180
H9HCNNNCPMALHR-NEE, 333S00181
H9HCNNNFAMALTR-NME, PENDING
Micron (MPN -- APN):
MT53E512M32D2NP-046 WT:E, PENDING
MT53E1G32D4NQ-046 WT:E, PENDING
MT53E2G32D8QD-046 WT:E, PENDING
Samsung (MPN -- APN):
K4UBE3D4AM-MGCJT00, 333S00194
K4UCE3Q4AM-AGCJT00, 333S00195
D
C
B
MEM_B_DQ_3<0>
7B8
MEM_B_DQ_3<1>
7B8
MEM_B_DQ_3<2>
7B8
MEM_B_DQ_3<3>
7B8
MEM_B_DQ_3<4>
7B8
MEM_B_DQ_3<5>
7B8
MEM_B_DQ_3<6>
7B8
MEM_B_DQ_3<7>
7B8
MAKE_BASE=TRUE
MEM_A_DQS_P<0>
7C5
MEM_A_DQS_N<0>
7C5
MEM_A_DQS_P<1>
7C5
MEM_A_DQS_N<1>
7C5
MEM_A_DQS_P<2>
7C5
MEM_A_DQS_N<2>
7C5
MEM_A_DQS_P<3>
7C5
MEM_A_DQS_N<3>
7C5
MEM_B_DQ_3<0>
MEM_B_DQ_3<1>
MEM_B_DQ_3<2>
MEM_B_DQ_3<3>
MEM_B_DQ_3<4>
MEM_B_DQ_3<5>
MEM_B_DQ_3<6>
MEM_B_DQ_3<7>
MEM_A_DQS_P<0>
MEM_A_DQS_N<0>
MEM_A_DQS_P<1>
MEM_A_DQS_N<1>
MEM_A_DQS_P<2>
MEM_A_DQS_N<2>
MEM_A_DQS_P<3>
MEM_A_DQS_N<3>
89C5 18C6
89C5 18C6
89C5 18C6
89C5 18C6
89C5 18C6
89C5 18C6
89C5 18C6
89C5 18C6
MEM_D_DQ_3<0>
7B4
MEM_D_DQ_3<1>
7B4
MEM_D_DQ_3<2>
7B4
MEM_D_DQ_3<3>
7B4
MEM_D_DQ_3<4>
7B4
MEM_D_DQ_3<5>
7B4
MEM_D_DQ_3<6>
7B4
MEM_D_DQ_3<7>
7B4
MEM_D_DQ_3<0>
MEM_D_DQ_3<1>
MEM_D_DQ_3<2>
MEM_D_DQ_3<3>
MEM_D_DQ_3<4>
MEM_D_DQ_3<5>
MEM_D_DQ_3<6>
MEM_D_DQ_3<7>
91D5 18B6
91D5 18B6
91D5 18B6
91D5 18B6
91D5 18B6
91D5 18B6
91D5 18B6
91D5 18B6
MAKE_BASE=TRUE
88C5 18D6
88C5 18D6
88B5 18D6
88C5 18D6
88C5 18D6
88C5 18D6
88C5 18D6
88C5 18D6
MEM_C_DQS_P<0>
7C1
MEM_C_DQS_N<0>
7C1
MEM_C_DQS_P<1>
7C1
MEM_C_DQS_N<1>
7C1
MEM_C_DQS_P<2>
7C1
MEM_C_DQS_N<2>
7C1
MEM_C_DQS_P<3>
7C1
MEM_C_DQS_N<3>
7C1
MEM_C_DQS_P<0>
MEM_C_DQS_N<0>
MEM_C_DQS_P<1>
MEM_C_DQS_N<1>
MEM_C_DQS_P<2>
MEM_C_DQS_N<2>
MEM_C_DQS_P<3>
MEM_C_DQS_N<3>
90C5 18C6
90C5 18C6
90C5 18C6
90C5 18C6
90B5 18C6
90C5 18C6
90C5 18C6
90C5 18C6
A
8
MEM_B_DQS_P<0>
7C5
MEM_B_DQS_N<0>
7C5
MEM_B_DQS_P<1>
7C5
MEM_B_DQS_N<1>
7C5
MEM_B_DQS_P<2>
7C5
MEM_B_DQS_N<2>
7C5
MEM_B_DQS_P<3>
7C5
MEM_B_DQS_N<3>
7C5
67
MEM_B_DQS_P<0>
MEM_B_DQS_N<0>
MEM_B_DQS_P<1>
MEM_B_DQS_N<1>
MEM_B_DQS_P<2>
MEM_B_DQS_N<2>
MEM_B_DQS_P<3>
MEM_B_DQS_N<3>
89C5 18C6
89C5 18C6
89B5 18C6
89C5 18C6
89C5 18C6
89C5 18C6
89C5 18C6
89C5 18C6
MEM_D_DQS_P<0>
7C1
MEM_D_DQS_N<0>
7C1
MEM_D_DQS_P<1>
7C1
MEM_D_DQS_N<1>
7C1
MEM_D_DQS_P<2>
7C1
MEM_D_DQS_N<2>
7C1
MEM_D_DQS_P<3>
7C1
MEM_D_DQS_N<3>
7C1
35 4
MEM_D_DQS_P<0>
MEM_D_DQS_N<0>
MEM_D_DQS_P<1>
MEM_D_DQS_N<1>
MEM_D_DQS_P<2>
MEM_D_DQS_N<2>
MEM_D_DQS_P<3>
MEM_D_DQS_N<3>
BOM_COST_GROUP=DRAM
91C5 18B6
91C5 18B6
91C5 18B6
91C5 18B6
91B5 18B6
91C5 18B6
91C5 18B6
91C5 18B6
PAGE TITLE
LPDDR4x Channels / Aliasing
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
2
DRAWING NUMBER
051-05198
REVISION
BRANCH
PAGE
SHEET
1
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
SIZE
6.0.0
evt-3
23 OF 150
18 OF 109
A
D
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
5C6 94D6
5C6 94D6
5C6 94D6
5C6 94D6
5C6 94D6
5C6 94D6
5C6 94D6
5C6 94D6
5C3 78C4 94D6
BI
5C3 78C4 94D6
BI
5B6 5C3 15B6 94D6
BI
5C3 15B6 94D6
BI
14D3 94D6
BI
14D3 94D6
BI
5C6 94D2
5C6 94D2
5B6 94D2
5B6 94D2
5C6 94D2
5C6 94D2
5B6 94D2
5B6 94D2
5C3 78C4 94D2
BI
5C3 78C4 94D2
BI
5B6 5C3 15B6 94D2
BI
5B3 15B6 94D2
BI
14D3 94D2
BI
14D3 94D2
BI
USBC_HSX_R2D_C_P<1>
IN
USBC_HSX_R2D_C_N<1>
IN
USBC_HSX_R2D_C_P<2>
IN
USBC_HSX_R2D_C_N<2>
IN
USBC_HSX_D2R_C_P<1>
OUT
USBC_HSX_D2R_C_N<1>
OUT
USBC_HSX_D2R_C_P<2>
OUT
USBC_HSX_D2R_C_N<2>
OUT
USBC_HSX_AUXCH_C_P
USBC_HSX_AUXCH_C_N
LSX_HSX_R2P
LSX_HSX_P2R
USB2_TBT_X_P
USB2_TBT_X_N
USBC_HST_R2D_C_P<1>
IN
USBC_HST_R2D_C_N<1>
IN
USBC_HST_R2D_C_P<2>
IN
USBC_HST_R2D_C_N<2>
IN
USBC_HST_D2R_C_P<1>
OUT
USBC_HST_D2R_C_N<1>
OUT
USBC_HST_D2R_C_P<2>
OUT
USBC_HST_D2R_C_N<2>
OUT
USBC_HST_AUXCH_C_P
USBC_HST_AUXCH_C_N
LSX_HST_R2P
LSX_HST_P2R
USB2_TBT_T_P
USB2_TBT_T_N
USBC_X_HS_R2D_C_P<1>
USBC_X_HS_R2D_C_N<1>
USBC_X_HS_R2D_C_P<2>
USBC_X_HS_R2D_C_N<2>
USBC_X_HS_D2R_C_P<1>
USBC_X_HS_D2R_C_N<1>
USBC_X_HS_D2R_C_P<2>
USBC_X_HS_D2R_C_N<2>
USBC_X_HS_AUXCH_C_P
USBC_X_HS_AUXCH_C_N
USBC_X_HS_LSX_R2P
USBC_X_HS_LSX_P2R
USB2_TBT_X_P
USB2_TBT_X_N
USBC_T_HS_R2D_C_P<1>
USBC_T_HS_R2D_C_N<1>
USBC_T_HS_R2D_C_P<2>
USBC_T_HS_R2D_C_N<2>
USBC_T_HS_D2R_C_P<1>
USBC_T_HS_D2R_C_N<1>
USBC_T_HS_D2R_C_P<2>
USBC_T_HS_D2R_C_N<2>
USBC_T_HS_AUXCH_C_P
USBC_T_HS_AUXCH_C_N
USBC_T_HS_LSX_R2P
USBC_T_HS_LSX_P2R
USB2_TBT_T_P
USB2_TBT_T_N
USBC
USB3_BSSB_R2D_C_P
USB3_BSSB_R2D_C_N
USB3_BSSB_D2R_P
USB3_BSSB_D2R_N
UPC_XT_GPIO7
SWD_SOC_SWDIO
SWD_SOC_SWCLK
SOC_FORCE_DFU
SOC_DFU_STATUS
SMC_DEBUGPRT_TX
SMC_DEBUGPRT_RX
PCH_I2C_UPC_SDA
PCH_I2C_UPC_SCL
PCH_UPC_I2C_INT_L
I2C_UPC_SDA
I2C_UPC_SCL
UPC_I2C_INT_L
USB_SOC_P
USB_SOC_N
TBT_POC_RESET
UPC_PMU_RESET
PCH_BBR_FORCE_PWR
PCH_STRP_GPD7
PMU_ACTIVE_READY
TBT_PWR_EN
PM_RSMRST_L
PLT_RST_3V3_L
USB3_BSSB_R2D_C_P
USB3_BSSB_R2D_C_N
USB3_BSSB_D2R_P
USB3_BSSB_D2R_N
SOC_DOCK_CONNECT
SWD_SOC_SWDIO_R
SWD_SOC_SWCLK_R
SOC_FORCE_DFU
SOC_DFU_STATUS
SMC_DEBUGPRT_TX
SMC_DEBUGPRT_RX
PCH_I2C_UPC_SDA
PCH_I2C_UPC_SCL
PCH_UPC_I2C_INT_L
I2C_UPC_SDA
I2C_UPC_SCL
UPC_I2C_INT_L
USB_SOC_P
USB_SOC_N
TBT_POC_RESET
UPC_PMU_RESET
PCH_BBR_FORCE_PWR
PCH_STRP_GPD7
PMU_ACTIVE_READY
TBT_PWR_EN
PM_RSMRST_L
PLT_RST_3V3_L
14C6 92C1
IN
14C6 92C1
IN
14C6 92C1
OUT
14C6 92C1
OUT
24A7 24C3 77D4 92C3
OUT
17A5 92C5
BI
17A5 92C5
BI
23D3 62C7 77D4 81B7 92C7
BI
23C3 77D4 81A4 92C7
BI
24A3 77C4 92C1
BI
24A3 77C4 92C1
BI
36B3 92D2
BI
36B3 92D2
BI
12C5 36B3 36B6 92D2
OUT
24B6 36B3 92D5
BI
24B6 36B3 92C5
BI
24B3 92D2
OUT
77D4 81C3 94D7
BI
77D4 81C3 94C7
BI
12A6 12C2 92C3
IN
52C2 62D6 77B2 80A7 92C3
OUT
12A6 12C5 92C3
IN
12A6 12C2 92A7
IN
23D3 62A6 62D6 77B2 81A8 92C7
IN
62B3 95C6
IN
13D6 15C8 16B7 17B8 17C6 77C2 95C6
IN
17D6 92B7
IN
D
C
B
SWD_SOC_SW* Placement Topology
SWD_SOC_SWCLK
H9M
U3900
Front
ACE
1
2
R
SWD_SOC_SWCLK_T
Rear
ACE
5B6 94C6
5B6 94C6
5B6 94C6
5B6 94C6
5B6 94C6
5B6 94C6
5B6 94C6
5B6 94C6
5C3 78C4 94B6
BI
5C3 78C4 94B6
BI
5A6 5B3 15A6 94B6
BI
5B3 94B6
BI
14D3 94B6
BI
14D3 94B6
BI
5B6 94C2
5B6 94C2
5B6 94C2
5B6 94C2
5B6 94C2
5B6 94C2
5B6 94C2
5B6 94C2
5C3 78C4 94B2
BI
5C3 78C4 94B2
BI
5A6 5B3 15B6 94B2
BI
5B3 15B6 94B2
BI
14D3 94B2
BI
14D3 94B2
BI
USBC_HSW_R2D_C_P<1>
IN
USBC_HSW_R2D_C_N<1>
IN
USBC_HSW_R2D_C_P<2>
IN
USBC_HSW_R2D_C_N<2>
IN
USBC_HSW_D2R_C_P<1>
OUT
USBC_HSW_D2R_C_N<1>
OUT
USBC_HSW_D2R_C_P<2>
OUT
USBC_HSW_D2R_C_N<2>
OUT
USBC_HSW_AUXCH_C_P
USBC_HSW_AUXCH_C_N
LSX_HSW_R2P
LSX_HSW_P2R
USB2_TBT_W_P
USB2_TBT_W_N
USBC_HSR_R2D_C_P<1>
IN
USBC_HSR_R2D_C_N<1>
IN
USBC_HSR_R2D_C_P<2>
IN
USBC_HSR_R2D_C_N<2>
IN
USBC_HSR_D2R_C_P<1>
OUT
USBC_HSR_D2R_C_N<1>
OUT
USBC_HSR_D2R_C_P<2>
OUT
USBC_HSR_D2R_C_N<2>
OUT
USBC_HSR_AUXCH_C_P
USBC_HSR_AUXCH_C_N
LSX_HSR_R2P
LSX_HSR_P2R
USB2_TBT_R_P
USB2_TBT_R_N
USBC_W_HS_R2D_C_P<1>
USBC_W_HS_R2D_C_N<1>
USBC_W_HS_R2D_C_P<2>
USBC_W_HS_R2D_C_N<2>
USBC_W_HS_D2R_C_P<1>
USBC_W_HS_D2R_C_N<1>
USBC_W_HS_D2R_C_P<2>
USBC_W_HS_D2R_C_N<2>
USBC_W_HS_AUXCH_C_P
USBC_W_HS_AUXCH_C_N
USBC_W_HS_LSX_R2P
USBC_W_HS_LSX_P2R
USB2_TBT_W_P
USB2_TBT_W_N
USBC_R_HS_R2D_C_P<1>
USBC_R_HS_R2D_C_N<1>
USBC_R_HS_R2D_C_P<2>
USBC_R_HS_R2D_C_N<2>
USBC_R_HS_D2R_C_P<1>
USBC_R_HS_D2R_C_N<1>
USBC_R_HS_D2R_C_P<2>
USBC_R_HS_D2R_C_N<2>
USBC_R_HS_AUXCH_C_P
USBC_R_HS_AUXCH_C_N
USBC_R_HS_LSX_R2P
USBC_R_HS_LSX_P2R
USB2_TBT_R_P
USB2_TBT_R_N
PCH_UART_DEBUG_R2D
PCH_UART_DEBUG_D2R
JTAG_ISP_TDI
JTAG_ISP_TDO
JTAG_ISP_TCK
JTAG_TBT_X_TMS
JTAG_TBT_T_TMS
JTAG_TBT_W_TMS
JTAG_TBT_R_TMS
PPDCIN_G3H
PPVIN_5VUSBC
PP5V_G3S_USBC
PP3V3_VIN_X
PP3V3_VIN_T
PP3V3_VIN_W
PP3V3_VIN_R
PP3V3_S0_TBT_XT
PP3V3_S0_TBT_WR
PP3V3_G3H_UPC5VEN
PP1V8_VDDIO
TBT_X_THERM_D_P
TBT_X_THERM_D_N
TBT_T_THERM_D_P
TBT_T_THERM_D_N
TBT_W_THERM_D_P
TBT_W_THERM_D_N
TBT_R_THERM_D_P
TBT_R_THERM_D_N
PCH_UART_DEBUG_R2D_1
PCH_UART_DEBUG_D2R_1
JTAG_ISP_TDI
JTAG_ISP_TDO
JTAG_ISP_TCK
JTAG_TBT_X_TMS
JTAG_TBT_T_TMS
JTAG_TBT_W_TMS
JTAG_TBT_R_TMS
PPDCIN_G3H
PPBUS_G3H
PP5V_G3S
PP3V3_G3H_RTC
PP3V3_S0_TBT_XT_ISNS_R
PP3V3_S0_TBT_WR_ISNS_R
PP3V3_G3H_RTC
PP1V8_SLPS2R
TBT_X_THERM_D_P
TBT_X_THERM_D_N
TBT_T_THERM_D_P
TBT_T_THERM_D_N
TBT_W_THERM_D_P
TBT_W_THERM_D_N
TBT_R_THERM_D_P
TBT_R_THERM_D_N
12A6 12D5 77D4 92C6
IN
12A6 12D5 77D4 92B6
OUT
12A6 12C5 92D2
IN
12B6 12C2 92D2
OUT
12A6 12C5 92D2
IN
12B6 12C2 92D6
IN
12B6 12C2 92D2
IN
12B6 12C5 93D6
IN
12B6 12C5 93D2
IN
53B1 53D7 75B7 77C4 77D2 77D4 95A3
IN
75D7 95C6
IN
75B7 79A8 95C6
IN
19B3 75D4 92C4 92C8 95B6 95C6
IN
75D3 95D6
IN
75D3 95C6
IN
19B3 75D4 92C4 92C8 95B6 95C6
IN
71A7 74C6 95A3
IN
42B5 42D6 92D7
OUT
42D6 92D7
OUT
42D4 42D5 92D3
OUT
42C6 92D3
OUT
42B5 42C5 93D7
OUT
42C6 93D7
OUT
42B5 42C5 93D3
OUT
42C6 93D3
OUT
C
B
T
X
SoC SWD
FAN TACH
SMC UART
DCI
SoC SWD
SoC USB2
x86 UART
NORMAL SITTING MACBOOK PRO.
VIEW FROM TOP
W
R
13A6 13D3 16A7 16B7 62D6 64A6 64B5 64C3 77C2 81C3
92D4
IN
PM_SLP_S3_L_1
PM_SLP_S3_L
UPC_DBG0_W
UPC_DBG1_W
P5VUSBC_POS_XT
P5VUSBC_NEG_XT
P5VUSBC_POS_WR
P5VUSBC_NEG_WR
SMC_FAN_0_TACH
SMC_FAN_1_TACH
P5VUSBC_POS_XT
P5VUSBC_NEG_XT
P5VUSBC_POS_WR
P5VUSBC_NEG_WR
24A3 44C6 93C6
IN
24A3 44C8 93C6
IN
41B4 95C5
OUT
41B4 95C5
OUT
41A5 95A5
OUT
41A5 95A5
OUT
A
Port I2C_ADDR
X GND (0)
T
W
R
FLOAT (7)
OVERRIDE OTP (3)
OVERRIDE OTP (4)
ALL 4 BURNSIDE BRIDGE I2C ADDRESS = 0x18
8
I2CM_CNFG
PU (3)
PU (3)
OVERRIDE OTP (3)
OVERRIDE OTP (3)
I2C1_OA
0x38
0x3F
0x3B
0x3C
I2C1_AA
0x6B
0x6B
0x6B
0x6B
I2C2_OA
0x38
0x3F
0x3B
0x3C
67
I2C2_AA
0x6B
0x6B
0x6B
0x6B
SYNC_MASTER=X1795_AMIR SYNC_DATE=05/15/2019
PAGE TITLE
A
USB-C
DRAWING NUMBER
051-05198
Apple Inc.
REVISION
6.0.0
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
BOM_COST_GROUP=TBT
35 4
IV ALL RIGHTS RESERVED
2
BRANCH
evt-3
PAGE
28 OF 150
SHEET
19 OF 109
1
SIZE
D
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
75C1 20C6
12A6 12D5
13A6 13D6 17A4 17B4 17D8 20C5 31B6 77C2
PP1V8_G3S_WLANBT
BYPASS=U3640::5mm
IN
IN
IN
PCH_UART_BT_R2D
PLT_RST_L
C3640
0.1UF
X5R-CERM
10%
10V
0201
1
2
8
VCC
U3640
74LVC2G126
X2-DFN2010-COMBO
2
1
5
7
1OE
A2
2OE
CRITICAL
GND
4
Y1A1
Y2
6
3
BT UART BUFFERS
UART_BT_BUF_CTS_LPCH_UART_BT_RTS_L
UART_BT_BUF_R2D
NOSTUFF
1
R3641
100K
5%
1/20W
MF
201
2
NOSTUFF
1
R3642
100K
5%
1/20W
MF
201
2
OUT
OUT
D
21B2 21C3 12A6 12D5
21B3 21C3
C
21B2 21C3
21B2 21C3
75C1 20D5
IN
IN
PP1V8_G3S_WLANBT
NOSTUFF
1
R3651
100K
5%
1/20W
MF
201
2
NOSTUFF
1
R3652
100K
5%
1/20W
MF
201
2
UART_BT_BUF_RTS_L
UART_BT_BUF_D2R
13A6 13D6 17A4 17B4 17D8 20D5 31B6 77C2
PLT_RST_L
BYPASS=U3650::5mm
C3650
0.1UF
X5R-CERM
10%
10V
0201
1
2
VCC
8
C
U3650
74LVC2G126
X2-DFN2010-COMBO
2
1
1OE
5
7
CRITICAL
A2
2OE
GND
Y1A1
Y2
4
PCH_UART_BT_CTS_L
6
PCH_UART_BT_D2R
3
OUT
OUT
12A6 12D5
12A6 12D5
B
radar 47644489
311S00437 in P0 BOM
311S00112 in P1 BOM
B
A
8
SYNC_MASTER=myEE SYNC_DATE=03/01/2019
PAGE TITLE
A
WIFI/BT: Support
DRAWING NUMBER
051-05198
Apple Inc.
REVISION
6.0.0
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
BOM_COST_GROUP=WIRELESS
67
35 4
IV ALL RIGHTS RESERVED
2
BRANCH
evt-3
PAGE
36 OF 150
SHEET
20 OF 109
1
SIZE
D
TP3700
www.haojiyoubbs.com
QQ微信：181806465
TP3701
TP3702
TP3703
TP3704
TP-P5
A
TP-P5
A
TP-P5
A
TP-P5
A
TP-P5
A
1
WLAN_JTAG_SEL
1
WLAN_JTAG_TCK
1
WLAN_JTAG_TDI
1
AP_PCIE_WAKE_L
WLAN_JTAG_TRST_L
21A7 21C6
21C6
21A4 21C6
21C3
21C6
79C7 77B4 75D1 21D3 21A7
PLACE_NEAR=U3730.63:2MM
1
C3724
10UF
20%
6.3V
2
CERM-X5R
0402-4
678
PLACE_NEAR=U3730.89:2MM
1
C3725
10UF
20%
6.3V
2
CERM-X5R
0402-4
PP3V3_G3S_WLANBT
PLACE_NEAR=U3730.74:2MM
1
C3721
10UF
20%
6.3V
2
CERM-X5R
0402-4
PLACE_NEAR=U3730.35:2MM
1
C3722
10UF
20%
6.3V
2
CERM-X5R
0402-4
79C7 77B4 75D1 21D6 21A7
3 245
PP3V3_G3S_WLANBT
PLACE_NEAR=U3730.89:1MM
DESENSE
1
C3713
12PF
5%
25V
2
NP0-C0G
0201
PLACE_NEAR=U3730.89:1MM
DESENSE
1
C3714
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
PLACE_NEAR=U3730.74:1MM
PLACE_NEAR=U3730.74:1MM
DESENSE
1
C3715
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
C3716
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
PLACE_NEAR=U3730.63:1MM
PLACE_NEAR=U3730.63:1MM
DESENSE
1
C3717
12PF
5%
25V
2
NP0-C0G
0201
PLACE_NEAR=U3730.35:1MM
DESENSE
1
C3718
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
1
PLACE_NEAR=U3730.35:1MM
DESENSE
1
C3719
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
C3720
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
D
TP3715
TP3716
TP3718
TP3719
TP3721
TP3722
TP3724
TP3725
C
TP-P5
A
TP-P5
A
TP-P5
A
TP-P5
A
TP-P5
A
TP-P5
A
TP-P5
A
TP-P5
A
1
WLAN_AUDIO_SYNC
1
WLAN_HOST_WAKE
1
BT_AUDIO_SYNC
1
BT_GPIO_4
1
BT_DEV_WAKE
1
BT_HOST_WAKE
1
WLAN_JTAG_TMS
1
WLAN_JTAG_TDO
17B4 21A2 21C5 23D2
21A3 21B6 24B3
17B4 21B3 21C2
21C3
21B3 24C6
21B3 24B3
21C6
21C6
75C1 21D3 21C2 21B8
21B2 25A6
21A2 25A6
PP1V8_G3S_WLANBT
1
R3715
100K
5%
1/20W
MF
201
2
1
R3717
100K
5%
1/20W
MF
201
2
1
R3714
100K
5%
1/20W
MF
201
2
22D1
22D1
22C1
22C1
22B1
22B1
BI
BI
BI
BI
BI
BI
50_G_0_MATCH
50_A_0_MATCH
50_G_1_MATCH
50_A_1_MATCH
50_G_2_MATCH
50_A_2_MATCH
WLAN_JTAG_SEL
21A7 21D7
WLAN_JTAG_TCK
21D7
WLAN_JTAG_TDI
21A4 21D7
WLAN_JTAG_TMS
21C7
WLAN_JTAG_TRST_L
21D7
WLAN_JTAG_TDO
21C7
UART_WLAN_R2D
21B3 25A6
UART_WLAN_D2R
UART_WLAN_D2R_CTS_L
UART_WLAN_R2D_RTS_L
21A2 25A6
SPROM_DOUT
21A7
SPROM_DIN
21A6
SPROM_CLK
21A7
SPROM_CS
21A7
NC_WLAN_GPIO_13
WLAN_CONTEXT_B
78B4
WLAN_AUDIO_SYNC
17B4 21A2 21D7 23D2
WLAN_SROM_STRAP
21A8
TP_WLAN_PMU_TEST
NC_WLAN_GPIO_14
WLAN_CONTEXT_A
78B4
WLAN_HOST_WAKE
21A3 21D7 24B3
PCH_WLAN_DEV_WAKE
13C3
NC
91
2G_ANT_CORE0
87
5G_ANT_CORE0
76
2G_ANT_CORE1
72
5G_ANT_CORE1
49
2G_ANT_CORE2
65
5G_ANT_CORE2
44
BT_ONLY_ANT
1
WL_JTAG_SEL
81
WL_JTAG_TCK
82
WL_JTAG_TDI
83
WL_JTAG_TMS
84
WL_JTAG_TRST
85
WL_JTAG_TDO
93
WL_UART_RX
94
WL_UART_TX
95
WL_UART_RTS
96
WL_UART_CTS
67
WL_SPROM_MO
68
WL_SPROM_MI
69
WL_SPROM_CLK
70
WL_SPROM_CS
97
WL_GPIO_13
100
WL_GPIO_21
99
WL_GPIO_20
98
WL_GPIO_17
159
WL_PMU_TEST_O
161
WL_GPIO_14
163
WL_GPIO_12
78
WL_HOST_WAKE
79
WL_DEV_WAKE
30
29
VDDBAT_HP
28
VDDBAT_LP
42
VDD3P3_BT
35
89
74
VDD3P3_PAD
63
18
17
VDDIO_PMU
VDDIO_RFSW
3
VDDIO_DIG
2
VDD3P3_SD&OTP
VDD3P3_FEM_CORE0
VDD3P3_FEM_CORE1
VDD3P3_FEM_CORE2
OMIT_TABLE
U3730
LBEE5ZZ1HP-049
LGA
SYM 1 OF 3
CRITICAL
339S00404
(GPIO2, 100K IPU VDDIO)
(GPIO4, IPD)
(GPIO6, ACTIVE LOW)
(GPIO5)
(100K IPU VDDIO)
(EXT PU NEEDED)
(ACTIVE LOW, EXT PU NEEDED)
(ACTIVE LOW, 100K IPU VDDIO)
(ACTIVE HIGH)
(NC)
(MOTION CONTEXT B)
(WIFI TIME SYNC, EXT PD NEEDED)
(ACTIVE LOW SROM PRESENCE)
(NOTE DEFINED)
(NC) (BT TIME STAMP)
(MOTION CONTEXT A)
(EXT PULL NEEDED)
(IPD) (IPD)
(ACTIVE LOW, IPU VDDIO)
(ACTIVE LOW, EXT PU NEEDED)
(40K IPD)
(I2S:EXT PD NEEDED, UART:NONE?)
(EXT PU NEEDED)
(EXT PU NEEDED)
(IPU VDDIO)
(EXT PU NEEDED)(GPIO3, 100K IPU VDDIO)
BT_GPIO_2/BT_SF_STRAP
(NOT DEFINED)
(ACTIVE LOW)
(I2S:IPD, UART:IPU)
(I2S:IPD, UART:NONE)
(I2S:IPD, UART:NONE)
(BT TIME SYNC)
(RSVD)
(EXT PULL NEEDED)
PLACE_NEAR=U3730.3:1MM
PCIE_REFCLK_P
PCIE_REFCLK_N
PCIE_TX_P
PCIE_TX_N
PCIE_RX_P
PCIE_RX_N
PCIE_CLKREQ*
PCIE_WAKE*
PERST*
BT_UART_RX
BT_UART_TX
BT_UART_CTS
BT_UART_RTS
BT_JTAG_STRAP
BT_SF_CS
BT_SF_CLK
BT_SF_MISO
BT_SF_MOSI
BT_I2S_WS
BT_I2S_DO
BT_I2S_CLK
BT_I2S_DI
BT_GPIO_3
BT_GPIO_4
BT_DEV_WAKE
BT_HOST_WAKE
PP1V8_G3S_WLANBT
1
C3723
0.1UF
10%
6.3V
2
CERM-X5R
0201
6
PCH_PCIE_CLK100M_WLAN_P
5
PCH_PCIE_CLK100M_WLAN_N
9
PCH_PCIE_WLAN_D2R_C_P
8
PCH_PCIE_WLAN_D2R_C_N
12
PCH_PCIE_WLAN_R2D_P
11
PCH_PCIE_WLAN_R2D_N
14
PCH_WLAN_CLKREQ_R_L
15
AP_PCIE_WAKE_L
16
PCH_WLAN_PERST_L
54
UART_BT_BUF_R2D
55
UART_BT_BUF_D2R
56
UART_BT_BUF_CTS_L
57
UART_BT_BUF_RTS_L
53
BT_ROM_BOOT_HPN_L
60
NC
36
BT_SPI2_CSN
BT_SPI2_CLK
37
BT_SPI2_MISO
38
39
BT_SPI2_MOSI
40
UART_BT_LH_R2D
41
TP_I2S_BT_D2R
123
UART_BT_LH_D2R
124
TP_I2S_BT_R2D
59
BT_AUDIO_SYNC
58
BT_GPIO_4
61
BT_DEV_WAKE
62
BT_HOST_WAKE
DESENSE
1
CC800
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC801
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
14A6
IN
78D8
14A6
IN
78D8
17C6 21A2
21D7
12C5 17D2 17D6
20D3 21B3
20C6 21B2
20D3 21B2
20C6 21B2
21B8
21B7
21B6
21B6
21B2 25A6
BT_AUDIO_SYNC
MAKE_BASE=TRUE
21C7
21B3 21C7 24C6
21B3 21C7 24B3
75C1 21C6 21C2 21B8
C3707
GND_VOID=TRUE
U3730.9:2mm
C3706
GND_VOID=TRUE
U3730.8:2mm
C3709
GND_VOID=TRUE
C3708
GND_VOID=TRUE
PP1V8_G3S_WLANBT
1
R3716
100K
5%
1/20W
MF
201
2
17B4 21B3 21C7
132S0395
2 1
2 1
2 1
2 1
R3785
5%01/20W MF 0201
0.1UF
6.3V X6S 0201
10%
0.1UF
10%
U0500.DG10:2mm
0.1UF
6.3V X6S 0201
10%
U0500.DH10:2mm
0.1UF
6.3V X6S 0201
10%
75B1 62B7
X6S6.3V 0201
PP1V8_S5
PCH_BT_ROM_BOOT_L
21
PCH_PCIE_WLAN_D2R_P
PCH_PCIE_WLAN_D2R_N
PCH_PCIE_WLAN_R2D_C_P
PCH_PCIE_WLAN_R2D_C_N
10K
5%
1/20W
MF
201
1
2
R3780
(PCH)
75C1 21D3 21C6 21B8
OUT
OUT
IN
IN
IN
D
14C6
14C6
14C6
14C6
12C5 21B3
C
B
A
21D3 21C6 21C2
PP1V8_G3S_WLANBT
75C1
R3751
100K
5%
1/20W
MF
201
21C3
BOOT_STRAPS
WLAN_SROM_STRAP WLAN_JTAG_SEL
21C6 21C6 21D7
R3705
WLAN_SROM_STRAP:
LOW: SROM Enabled
HIGH: SROM Disabled
1
2
10K
1/20W
R3752
100K
1
5%
MF
201
2
5%
1/20W
MF
201
1
R3753
2
10K
5%
1/20W
MF
201
1
2
R3754
1K
21
5%
1/20W
MF
201
BT_SFLASH_WP_L
BT_SFLASH_HOLD_L
SPROM_CS
21C6
10K
5%
MF
201
1
2
R3700
1/20W
WLAN_JTAG_SEL:
LOW: Some JTAG are GPIOs
HIGH: JTAG Enabled
BLUETOOTH SERIAL FLASH
8
VCC
U3750
PLACE_NEAR=U3750.8:2MM
1
C3710
0.1UF
10%
6.3V
2
CERM-X5R
0201
2MBIT
21C3 21C3
BT_SPI2_CLK BT_SPI2_MOSI
6
CLK
USON
DI(IO0)
5
W25Q20EWUXIE
BT_SFLASH_CS_LBT_SPI2_CSN
79C7 77B4 75D1 21D6 21D3
1
CS*
3
WP*(IO2)
7
HOLD*(IO3)
PP3V3_G3S_WLANBT
OMIT_TABLE
GND
4
DO(IO1)
EPAD
9
2
BT_SPI2_MISO
R3701
R3702
10K
5%
1/20W
MF
201
1K
21
1
2
5%
1/20W
MF
201
SPROM_DOUT
21C6
SPROM_CS_R
SPROM_CLK
21C6
NC
1
CS
2
SK
7
PE
8
VCC
U3710
CAS93C86B
UDFN8
ORG
OMIT_TABLE
EPADGND
9
5
DODI
WLAN SERIAL EEPROM
PLACE_NEAR=U3750.8:4MM
1
C3712
10UF
20%
6.3V
2
CERM-X5R
0402-4
21C3
1
C3711
0.1UF
10%
6.3V
2
CERM-X5R
0201
43
6
WIFI_SROM_ORG
PLACE_NEAR=U3710.8:2MM
SPROM_DIN
21C6
R3712
10K
2 1
5%
1/20W
MF
201
P1V5_WLANBT_VLX
21B4
DIDT=TRUE
SWITCH_NODE=TRUE
P1V2_WLANBT_VLX
21B4
DIDT=TRUE
SWITCH_NODE=TRUE
PVIN_RFLDO_WLANBT_VLX
21B4
DIDT=TRUE
SWITCH_NODE=TRUE
BT_REG_ON
WL_REG_ON
19
WLAN_PWR_EN
21A3 62B3
21
20
PP1V5_WLANBT
BT_PWR_EN
21B3 62B3
L3701
2.2UH-1.2A
0806
PLACE_NEAR=U3730.23:4MM
L3702
1UH-20%-4.1A-0.048OHM
2520-1
PLACE_NEAR=U3730.25:4MM
L3703
2.2UH-1.2A
2 1
0806
PLACE_NEAR=U3730.24:4MM
62D6
PMU_CLK32K_WLANBT
IN
WLAN_JTAG_TDI
25B3
VDD1P5_1X1
SR1P4_VLX
SR1P8_VLX
VIN_RFLDO
22
23
P1V5_WLANBT_VLX
21B3
21B5
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0540
VOLTAGE=1.5V
21
PP1V5_WLANBT_C
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0540
VOLTAGE=1.2V
PP1V2_WLANBT_C
21
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0540
VOLTAGE=1.8V
34
24
PPVIN_RFLDO_WLANBT
PVIN_RFLDO_WLANBT_VLX
21A3
21A5
PLACE_NEAR=L3701.2:1MM
PLACE_NEAR=L3702.2:1MM
PPVIN_RFLDO_WLANBT_C
PLACE_NEAR=L3703.1:1MM
SR1P2_VLX
26
25
P1V2_WLANBT_VLX
21A5
0402-THICKSTNCL
0402-THICKSTNCL
0402-THICKSTNCL
VDD1P2_3X3
33
32
PP1V2_WLANBT
21A3
PMU_CLK32K_WLANBT
MAKE_BASE=TRUE
WLAN_JTAG_TDI
CLK32K
52
PMU_CLK32K_WLANBT
21A2 21A4
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0540
C3701
1
4
2
VOLTAGE=1.5V
3
PP1V5_WLANBT
7.5UF
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0540
VOLTAGE=1.2V
C3702
PP1V2_WLANBT
1
3
7.5UF
4
2
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0540
VOLTAGE=1.8V
C3703
1
3
7.5UF
4
2
MAKE_BASE=TRUE
PPVIN_RFLDO_WLANBT
21A2 21B4
20%
4V
20%
4V
20%
4V
21C6 21D7
21B4
21B4
21B4
WIFI_DBG
J3740
505070-1222
M-ST-SM
UART_BT_BUF_R2D
20D3 21C3
PCH_BT_ROM_BOOT_L UART_BT_BUF_CTS_L
12C5 21C1 20D3 21C3
BT_DEV_WAKE
21B3 21C7 24C6
BT_HOST_WAKE
21B3 21C7 24B3
BT_PWR_EN
21B5 62B3
BT_AUDIO_SYNC
17B4 21C2 21C7
15
DEBUG CONNECTORS
J3750
505070-1222
M-ST-SM
UART_WLAN_R2D
21C6 25A6
NC
WLAN_HOST_WAKE
21B6 21D7 24B3
WLAN_PWR_EN
21B5 62B3
PCH_WLAN_PERST_L
17D3
BOM_COST_GROUP=WIRELESS
NC
15
WIFI_DBG
1413
21
UART_BT_BUF_D2R
43
65
UART_BT_BUF_RTS_L
87
UART_BT_LH_R2D
109
UART_BT_LH_D2R
1211
NC
16
1413
21
43
65
87
109
1211
16
UART_WLAN_D2R
UART_WLAN_R2D_RTS_L
UART_WLAN_D2R_CTS_L
PCH_WLAN_CLKREQ_R_L
WLAN_AUDIO_SYNC
PMU_CLK32K_WLANBT
SYNC_MASTER=myEE SYNC_DATE=03/01/2019
PAGE TITLE
20C6 21C3
20C6 21C3
21C3 25A6
21C3 25B6
21C6 25A6
21C6 25A6
21C6 25A6
17C6 21C3
17B4 21C5 21D7 23D2
21A4 21B4
WIFI/BT: MODULE 1
DRAWING NUMBER
051-05198
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
REVISION
6.0.0
BRANCH
evt-3
PAGE
37 OF 150
SHEET
21 OF 109
B
A
SIZE
D
8
67
35 4
2
1
D
www.haojiyoubbs.com
QQ微信：181806465
C
B
A
10
13
27
31
43
45
46
47
48
50
51
64
66
71
73
75
77
80
86
88
90
92
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
4
7
OMIT_TABLE
U3730
LBEE5ZZ1HP-049
LGA
SYM 2 OF 3
CRITICAL
GND
THRM_PAD
THRM_PAD
154
155
156
157
158
160
162
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
OMIT_TABLE
U3730
LBEE5ZZ1HP-049
LGA
SYM 3 OF 3
CRITICAL
THRM_PAD THRM_PAD
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
678
3 245
RF_TUNING
CRITICAL
1
L3811
1.4NH+/-0.1NH-1.1A
21
0201
RF_TUNING
CRITICAL
L3814
2.5NH+/-0.1NH-0.6A
21
0201
RF_TUNING
CRITICAL
NO STUFF
1
C3810
0.2PF
+/-0.05PF
25V
2
COG-CERM
0201
NO_TEST=1NO_TEST=1
50_G_0_MATCH50_G_0_DIPLEXER
1
NOSTUFF
L3813
5.1NH-3%-0.4A
0201
2
21D6
D
21D6
RF_TUNING
CRITICAL
J3810
20449-001E-03
F-ST-SM
4
3
2
1
NO_TEST=1
50_0_ANT
NO STUFF
C3817
0.2PF
+/-0.05PF
COG-CERM
25V
0201
CORE0 DIPLEXER AND MATCHING
2
RF_TUNING
COM
RF_TUNING
CRITICAL
L3810
1.2NH-+/-0.05NH-1.1A-0.04OHM
21
0201
1
2
NOSTUFF
1
C3816
0.2PF
+/-0.05PF
25V
2
COG-CERM
0201
DPX205950DT-9063B3SJ
NO_TEST=1
50_0_COM
U3810
0805
CRITICAL
GND
5
3
1
HI
LO
NO_TEST=1 NO_TEST=1
50_A_0_DIPLEXER 50_A_0_MATCH
NO STUFF
C3812
0.2PF
+/-0.05PF
COG-CERM
4
6
NO STUFF
C3815
+/-0.05PF
COG-CERM
1
25V
2
0201
0.2PF
25V
0201
1
2
L3821
RF_TUNING
CRITICAL
J3820
20449-001E-03
F-ST-SM
4
3
2
1
NO_TEST=1
50_1_ANT
NO STUFF
C3827
0.2PF
+/-0.05PF
COG-CERM
25V
0201
CORE1 DIPLEXER AND MATCHING
2
RF_TUNING
U3820
CRITICAL
COM
5
RF_TUNING
CRITICAL
L3820
1.2NH-+/-0.05NH-1.1A-0.04OHM
21
0201
1
2
NOSTUFF
1
C3826
0.2PF
+/-0.05PF
25V
2
COG-CERM
0201
DPX205950DT-9063B3SJ
NO_TEST=1
50_1_COM
0805
GND
3
1.2NH-+/-0.05NH-1.1A-0.04OHM
21
NO STUFF
25V
0201
25V
0201
1
2
2.5NH+/-0.1NH-0.6A
1
2
C3822
0.2PF
+/-0.05PF
COG-CERM
4
HI
6
LO
1
NO_TEST=1
50_G_1_DIPLEXER
NO STUFF
C3825
0.2PF
+/-0.05PF
COG-CERM
0201
RF_TUNING
CRITICAL
L3824
21
0201
RF_TUNING
CRITICAL
50_A_1_MATCH50_A_1_DIPLEXER
1
2
1
2
NO_TEST=1NO_TEST=1
NO STUFF
C3820
0.2PF
+/-0.05PF
25V
COG-CERM
0201
NO_TEST=1
50_G_1_MATCH
NOSTUFF
L3823
5.1NH-3%-0.4A
0201
21D6
C
21D6
L3831
2.2NH+/-0.1NH-0.6A
21
0201-1
RF_TUNING
CRITICAL
L3834
21
0201
NO_TEST=1
50_G_2_MATCH
NO STUFF
1
C3830
0.2PF
+/-0.05PF
25V
2
COG-CERM
0201
1
NOSTUFF
L3833
5.1NH-3%-0.4A
0201
2
21C6
21C6
B
A
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
RF_TUNING
CRITICAL
J3830
20449-001E-03
F-ST-SM
4
3
2
1
NO_TEST=1
50_G_2_DIPLEXER
25V
0201
25V
0201
1
2
1.2NH-+/-0.05NH-1.1A-0.04OHM
1
2
PAGE TITLE
CORE2/Aux DIPLEXER AND MATCHING
RF_TUNING
CRITICAL
L3830
NO_TEST=1 NO_TEST=1
50_2_ANT 50_A_2_MATCH
NO STUFF
C3837
0.2PF
+/-0.05PF
25V
COG-CERM
0201
1.2NH-+/-0.05NH-1.1A-0.04OHM
21
0201
1
2
NOSTUFF
1
C3836
0.2PF
+/-0.05PF
25V
2
COG-CERM
0201
NO_TEST=1
50_2_COM
2
DPX205950DT-9163C2SJ
5
3
COM
CRITICAL
0805
U3830
RF_TUNING
GND
1
4
LO
6
HI
50_A_2_DIPLEXER
C3832
0.2PF
+/-0.05PF
COG-CERM
NO STUFF
NO_TEST=1
NO STUFF
C3835
0.2PF
+/-0.05PF
COG-CERM
WIFI/BT: MODULE 2
SIZE
D
BOM_COST_GROUP=WIRELESS
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
38 OF 150
SHEET
22 OF 109
8
67
35 4
2
1
Note 1) IPU represents SW configured state, not HW default
www.haojiyoubbs.com
QQ微信：181806465
678
3 245
1
D
C
76B8
76D8
76D8
46B1
34A7 34C6
12A6 12C5
32B8
33A1 33A7
76A8
31C8
47B7 47C8 48B7 48C8
47B7 47D8 48B7 48D7
31C8
51A7
67C7 68C7 69C7 70C7 72D3
34A7 34C5
31D8
31D8
31D8
32A6 71B7 77A2
35D4 77D8
OUT
OUT
OUT
IN
OUT
IN
IN
OUT
OUT
IN
IN
OUT
IN
OUT
OUT
OUT
IN
IN
IN
OUT
IN
NC_PLCAM_TX_THROTTLE
NC_GNSS_HOST_TIME
CODEC_INT_L
SE_CTLR_FW_DWLD
PCH_SOC_SYNC
MESA_INT
MESA_PWR_EN
NC_WLAN_DEV_WAKE
BOARD_REV0
SPKRAMP_INT_L
SPKRAMP_RESET_L
BOARD_REV1
TPAD_SPI_EN
SSD_BFH
SE_DEV_WAKE
BOOT_CONFIG0
BOOT_CONFIG1
BOOT_CONFIG2
SSD_PMU_RESET_L
DFR_DISP_INT
A13
A12
B12
AJ36
R36
AB36
AC36
V34
V36
AA36
U36
U35
V32
R32
L36
M33
J33
P33
K32
J32
AA34
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
OMIT_TABLE
CRITICAL
U3900
H9M
BGA
SYM 3 OF 18
GPIO/TEST/MISC
(IPD)
(MESA:IPD, GFX:IPU)
(IPU)
(IPD)
(IPD)
(IPD)
TMR32_PWM0
TMR32_PWM1
TMR32_PWM2
CFSB
FORCE_DFU
DFU_STATUS
HOLD_RESET
ANALOGMUX_OUT
TST_CLKOUT
TESTMODE
DROOP
SOCHOT
XO0
XI0
L33
L35
K36
K34
W32
V33
J34
AN36
P32
C12
L32
L34
AV23
AV24
WLAN_AUDIO_SYNC_R
DFR_PWR_EN
SOC_KBD_BKLT_PWMNC_GNSS_DEV_WAKE
PMU_ACTIVE_READY
SOC_FORCE_DFU
SOC_DFU_STATUS
SOC_HOLD_RESET
TEST_SOC_AMUXOUT
TEST_SOC_TST_CLKOUT
SOC_TESTMODE
PMU_DROOP_L
SOC_SOCHOT_L
SOC_XTAL24M_OUT
SOC_XTAL24M_IN
35C8
OUT
32A8
OUT
19C3 62A6 62D6 77B2 81A8
IN
19D3 62C7 77D4 81B7
IN
19D3 77D4 81A4
OUT
23A7
23A7
62A6 62D3
IN
23A7 62D6
OUT
77B2 80A8
1
R3940
511K
1%
1/20W
MF
201
2
1/20W MF 02015%
76D6
76D6
NOSTUFF
R3900
0
R3941
0
24MHZ-30PPM-9.5PF-60OHM
21
WLAN_AUDIO_SYNC
21
SOC_XTAL24M_OUT_R
0201MF1/20W 5%
Y3940
1.60X1.20MM-SM
17B4 21A2 21C5 21D7
IN
D
C
B
31B6
31B8
49D7
49D7
49D7
77A4 81C2
77A4 81C2
BI
OUT
OUT
OUT
OUT
BI
BI
I2C_SEP_SDA
I2C_SEP_SCL
SEP_CAM_DISABLE_L
SEP_DMIC_DISABLE_L
SEP_DISABLE_STROBE
USB_SOC_P
USB_SOC_N
NC_SOC_USB_ID
76A8
SOC_USB_VBUS
23A7 77D4
SOC_USB_REXT
1
R3960
200
1%
1/20W
MF
201
2
AV8
SEP_I2C0_SDA
AT7
SEP_I2C0_SCL
AU9
SEP_SPI0_MISO
AV9
SEP_SPI0_MOSI
AT8
SEP_SPI0_SCLK
B23
USB_DP
A23
USB_DM
D23
USB_ID
E23
USB_VBUS
F22
USB_REXT
(IPD)
OMIT_TABLE
CRITICAL
U3900
H9M
BGA
SYM 7 OF 18
SEP/USB/DDR
DDR0_RREF
DDR1_RREF
DDR2_RREF
DDR3_RREF
DDR0_ZQ
DDR3_ZQ
DDR0_RET*
DDR1_RET*
DDR2_RET*
DDR3_RET*
DDR0_SYS_ALIVE
DDR1_SYS_ALIVE
DDR2_SYS_ALIVE
DDR3_SYS_ALIVE
H3
H35
AL3
AL35
N2
AF36
H4
H34
AL4
AL34
G3
G35
AM3
AM35
240
1%
1/20W
MF
201
1
2
R3970
SOC_DDR0_RREF
SOC_DDR1_RREF
SOC_DDR2_RREF
SOC_DDR3_RREF
SOC_DDR0_ZQ
SOC_DDR3_ZQ
AON_SLEEP1_RESET_L
PMU_SYS_ALIVE
R3971
240
1%
1/20W
MF
201
IN
IN
C3940
12PF
5%
25V
CERM
0201
240
1%
1/20W
MF
201
1
2
1
2
R3972
24C3
24B6 62A6 62C6 71B7 77B2 80A8
1
2
R3973
240
1%
1/20W
MF
201
NC GND
4312
1
2
1
C3941
12PF
5%
25V
2
CERM
0201
R3974
240
1%
1/20W
MF
201
PP1V1_SLPDDR
240
1%
1/20W
MF
201
1
2
1
2
R3975
74C4
B
A
PP1V8_AWAKE
R3932
PP1V8_SLPS2R
R3934
R3937
R3939
8
117S0201
0
10K
10K
47K
SYNC_MASTER=myEE SYNC_DATE=03/01/2019
PAGE TITLE
74B6 32A7 31D6 31D5 31C6 26A7
21
5%
21
21
21
MF1/20W 0201
81B8 74C6 32A7
MF1/20W 2015%
MF1/20W 2015%
MF1/20W 2015%
SOC_USB_VBUS
SOC_HOLD_RESET
SOC_TESTMODE
SOC_SOCHOT_L
23B6 77D4
23C3
23C3
23C3 62D6 77B2 80A8
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
BOM_COST_GROUP=SOC
67
35 4
IV ALL RIGHTS RESERVED
2
SoC GPIO/SEP/USB/DDR/Test
SIZE
Apple Inc.
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
39 OF 150
SHEET
23 OF 109
1
A
D
D
www.haojiyoubbs.com
QQ微信：181806465
678
3 245
1
OMIT_TABLE
CRITICAL
U3900
H9M
76B6
12C5 17D6 80A7
76D8
76B8
37C6
37C6
OUT
IN
IN
OUT
OUT
BI
NC_WLAN_CONTEXT_A
NC_WLAN_CONTEXT_B
NC_GYRO_INT1
NC_GYRO_INT2
SE_HOST_WAKE_R
SOC_PERST_L
NC_ALTIMETER_INT
NC_SPI_GYRO_CS_L
NC_SPI_ALTIMETER_CS_L
NC_I2C_AOP_SCL
NC_I2C_AOP_SDA
D3
AOP_FUNC[0]
F4
AOP_FUNC[1]
M6
AOP_FUNC[2]
D4
AOP_FUNC[3]
F3
AOP_FUNC[4]
K6
AOP_FUNC[5]
E4
AOP_FUNC[6]
J3
AOP_FUNC[7]
H6
AOP_FUNC[8]
N6
AOP_I2C0_SCL
G5
AOP_I2C0_SDA
(IPD)
(IPD)
(IPD)
BGA
SYM 6 OF 18
AOP
(IPU)
(IPU)
(IPU)
(IPD)
(IPD)
AOP_PDM_CLK0
AOP_PDM_CLK1
AOP_PDM_CLK2
AOP_PDM_CLK3
AOP_PDM_CLK4
AOP_PDM_DATA0
AOP_PDM_DATA1
AOP_SPI_MOSI
AOP_SPI_SCLK
AOP_SPI_MISO
P6
K2
J6
L6
L5
J5
K4
D2
F2
E2
PDM_DMIC_CLK0_R
PDM_DMIC_CLK1_R
TP_SMC_FIXTURE_MODE_L
NC_PLCAM_PROX_INT_L
NC_PLCAM_ROMEO_B2B_DETECT
PDM_DMIC_DATA0
PDM_DMIC_DATA1
NC_SPI_AOP_SENSOR_MOSI_R
NC_SPI_AOP_SENSOR_CLK_R
NC_SPI_AOP_SENSOR_MISO
OUT
OUT
IN
IN
IN
IN
IN
32B8
32B8
76D6 77B2
76C8
76C8
49D1
49C1
D
C
62C6
62C6
OUT
BI
SPMI_CLK
R4036
R4037
PLACE_NEAR=U3900.AD6:5MM
PLACE_NEAR=U7800.M7:5MM
20
21
21
MF1/20W5% 201
2015%201/20W MF
32B8
31B4
76B8
76B8
15B1 64A5
46B1
21B3 21C7
76C8
76D8
32B8
76B8
76D8
62C6
62D7 77A4
49D6 62A6 62D6 77B2 80A7
IN
IN
IN
OUT
IN
OUT
OUT
IN
OUT
IN
IN
IN
IN
IN
IN
DFR_TOUCH_INT_L
CPU_SMC_THRMTRIP_L
NC_SMC_GFX_SELF_THROTTLE
NC_SMC_TOPBLK_SWP_L
XDP_PRESENT_L
CODEC_RESET_L
BT_DEV_WAKE
NC_PCIEDN_WAKE_L
NC_ENET_LOW_PWR
TPAD_SPI_INT_L
NC_SDCONN_STATE_CHANGE_L
NC_ENET_MEDIA_SENSE
PMU_INT_L
SPMI_CLK_R
SPMI_DATA_RSPMI_DATA
PMU_CLK32K_SOC
SOC_COLD_RESET_L
4.7K
R4039
5% 201
1/20W MF
21
PMU_COLD_RESET_L
AL6
AON_GPIO0
AE6
AON_GPIO1
AT5
AON_GPIO2
AN4
AON_GPIO3
AK4
AON_GPIO4
AV5
AON_GPIO5
AR3
AON_GPIO6
AG6
AON_GPIO7
AU5
AON_GPIO8
AP2
AON_GPIO9
AR4
AON_GPIO10
AN3
AON_GPIO11
AT6
AON_GPIO12
AD6
AON_SPMI_SCLK
AR2
AON_SPMI_SDATA
AR5
RT_CLK32768
AK2
COLD_RESET*
AK3
CFSB_AON
(IPU)
(IPD)
(IPU)
(IPU)
(IPD)
(IPU)
OMIT_TABLE
CRITICAL
U3900
H9M
BGA
SYM 5 OF 18
AON
(IPU)
(IPU)
(IPU)
(IPD)
(IPU)
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST*
JTAG_SEL
DOCK_CONNECT
AON_SWD0_TMS
AON_SWD1_TMS
AON_SWD01_TCK
WDOG
AON_SLEEP1_RESET*
AK6
AN5
AH6
AP4
AJ6
AC6
AN2
AJ4
AH4
AJ2
AJ5
AF6
SWD_SOC_SWCLK
SWD_SOC_SWDIO
TP_JTAG_SOC_TDI
TP_JTAG_SOC_TDO
TP_JTAG_SOC_TRST_L
SOC_JTAG_SEL
(DAP=0, TAP=1)
SOC_DOCK_CONNECT
NC_SWD_WLAN_SWDIO
NC_MESA_MENUKEY_L
NC_SWD_WLAN_SWDCLK
SOC_WDOG
AON_SLEEP1_RESET_L
IN
77C4
77C4
77C4
24A7
IN
IN
OUT
OUT
OUT
17A6 77D4
17A6 77C4
BI
19D3 24A7 77D4
76A8
BI
76D8
76A8
62D6 77B2 80A7
23B3
C
B
A
PP1V8_S5
R4046
R4047
R4054
R4055
R4056
R4057
R4059
10K
100K
100K
100K
100K
100K
100K
75B1 17B7 14A7 12A7
21
5% 201
21
21
21
21
21
21
1/20W MF
5% 201
1/20W MF
5% 201
1/20W MF
5% 201
1/20W MF
5% 201
1/20W MF
5% 201
1/20W MF
5% 201
1/20W MF
SOC_JTAG_SEL
SOC_DOCK_CONNECT
ESPI_IO<0>
ESPI_IO<1>
ESPI_IO<2>
ESPI_IO<3>
ESPI_CS_L
24C3
19D3 24C3 77D4
12D2 24B6
12D2 24B6
12D2 24B6
12D2 24B6
12D2 24B6
12D2 24A7
12D2 24A7
12D2 24A7
12D2 24A7
12D1
12D2 24A7
12D2
31C4
31D4
31C5
31C5
31B5
31C5
16B2 77C2 81A8 81C3
31A6 32B1 54C2
23A3 62A6 62C6 71B7 77B2 80A8
19C3 36B3
19D3 36B3
36C3
36C3
36B8
36B8
36D6
36D6
36D3 77C4
36D3 77C4
36C6
36C6
36B8
36B8
BI
BI
BI
BI
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
IN
BI
IN
OUT
BI
OUT
BI
OUT
BI
OUT
BI
OUT
BI
OUT
BI
OUT
BI
ESPI_IO<0>
ESPI_IO<1>
ESPI_IO<2>
ESPI_IO<3>
ESPI_CLK60M
ESPI_CS_L
ESPI_RESET_L
SMC_PECI_RX
SMC_PECI_TX
SMC_PCH_PWROK
SMC_PCH_SYS_PWROK
SMC_RSMRST_L
SMC_SYSRST_L
PM_SLP_S0_L
SMC_PROCHOT_L
PMU_SYS_ALIVE
I2C_UPC_SCL
I2C_UPC_SDA
I2C_SNS0_S0_SCL
I2C_SNS0_S0_SDA
I2C_SNS1_S0_SCL
I2C_SNS1_S0_SDA
I2C_DISP_SCL
I2C_DISP_SDA
I2C_PWR_SCL
I2C_PWR_SDA
I2C_SNS_G3S_SCL
I2C_SNS_G3S_SDA
I2C_SSD_SCL
I2C_SSD_SDA
V2
SMC_ESPI_IO0
U3
SMC_ESPI_IO1
U4
SMC_ESPI_IO2
V8
SMC_ESPI_IO3
U2
SMC_ESPI_CLK
V7
SMC_ESPI_CS*
V6
SMC_ESPI_RESET*
M5
SMC_PECI_IN
T6
SMC_PECI_OUT
W7
PCH_PWROK
W8
SYS_PWROK
W6
RSMRST*
W4
SYS_RESET*
AA4
SLP_S0B
R5
PROCHOT*
AA6
SYS_ALIVE
M3
SMC_I2C0_SCL
J4
SMC_I2C0_SDA
N4
SMC_I2C1_SCL
P4
SMC_I2C1_SDA
U5
SMC_I2C2_SCL
M2
SMC_I2C2_SDA
U6
SMC_I2C3_SCL
R4
SMC_I2C3_SDA
P3
SMC_I2C4_SCL
T4
SMC_I2C4_SDA
R2
SMC_I2C5_SCL
P2
SMC_I2C5_SDA
R3
SMC_I2C6_SCL
T2
SMC_I2C6_SDA
OMIT_TABLE
CRITICAL
U3900
H9M
BGA
SYM 9 OF 18
SMC
(IPD)
(IPD)
(IPD)
(IPU)
(IPU)
(IPU)
(IPD)
(IPU)
(IPD)
(IPD)
(IPD)
SMC_GPIO0
SMC_GPIO1
SMC_GPIO2
SMC_GPIO3
SMC_GPIO4
SMC_GPIO5
SMC_GPIO6
SMC_GPIO7
SMC_GPIO8
SMC_GPIO9
SMC_GPIO10
SMC_GPIO11
SMC_GPIO12
SMC_GPIO13
SMC_GPIO14
SMC_GPIO15
SMC_ADC0
SMC_ADC1
SMC_ADC2
SMC_ADC3
SMC_ADC4
SMC_ADC5
SMC_ADC6
SMC_ADC7
REFP_ADC
REFM_ADC
SMC_PWM0
SMC_TACH0
SMC_PWM1
SMC_TACH1
SMC_PWM2
SMC_UART0_RXD
SMC_UART0_TXD
SWD_OUT0_TCK
SWD_OUT0_TMS
SWD_OUT1_TCK
SWD_OUT1_TMS
Y4
Y8
Y5
AA2
Y7
Y6
AB2
AD5
AD2
AB4
AC2
AC3
AA8
AB3
AE2
L4
AG2
AC4
AH3
AD4
AB6
AH2
AG4
AC5
AF4
AG3
J2
L3
R6
L2
M4
V4
V5
AE3
AA5
AF2
AA7
CODEC_WAKE_L
BT_HOST_WAKE
WLAN_HOST_WAKE
DP_INT_HPD_MASK
SMC_LID_RIGHT
NC_PCC_EVENT
NC_TPAD_VIBE_L
TPAD_KBD_WAKE_L
SMC_LID_LEFT
SMC_DPWROK1V8
NC_DISP_GCON_INT_L
NC_SOC_PCH_GCON_INT_L
TPAD_ACTUATOR_DISABLE_L
NC_TBT_WAKE_L
UPC_I2C_INT_L
DP_INT_HPD_L
SMC_CPU_HS_ISENSE
SMC_PBUS_VSENSE
SMC_BMON_ISENSE
SMC_DCIN_ISENSE
SMC_DCIN_VSENSE
SMC_PP3V3_WLANBT_ISENSE
SMC_CPUVCCIN_ISENSE
SMC_CPUVCCIN_VSENSE
PP1V25_SLPS2R_SMC_AVREF
GND_SMC_AVSS
SMC_FAN_0_PWM
SMC_FAN_0_TACH
SMC_FAN_1_PWM
SMC_FAN_1_TACH
NC_SMC_LED_ONEWIRE
SMC_DEBUGPRT_RX
SMC_DEBUGPRT_TX
SSD0_SWCLK
SSD0_SWDIO
NC_SSD1_SWCLK_UART_R2D
NC_SSD1_SWDIO_UART_D2R
46B1
IN
21B3 21C7
IN
21A3 21B6 21D7
IN
32A8
OUT
32C3
IN
76D8
IN
76A8
OUT
32B8
IN
BI
32A8
OUT
76D8
IN
76D8
OUT
BI
76A6
IN
19C3
IN
32A8
IN
44D2
IN
44D2
IN
44D2
IN
44D2
IN
44D2
IN
44D2
IN
44D2
IN
44D2
IN
31A6
PLACE_NEAR=U3900.AF3:4MM
44C6
OUT
19B3 44C6
IN
44C8
OUT
19B3 44C8
IN
BI
19D3 77C4
IN
19D3 77C4
OUT
32B8 67C7 68C7 69C7 70C7 72D5
OUT
BI
76B8
OUT
BI
32D2
32A8
XW4089
SM
21
76B8
32B8 67C7 68C7 69C7 70C7 72D5
76B8
BOM_COST_GROUP=SOC
PAGE TITLE
SoC AOP/AON/SMC
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
40 OF 150
SHEET
24 OF 109
B
A
SIZE
D
8
67
35 4
2
1
D
www.haojiyoubbs.com
QQ微信：181806465
678
3 245
1
OMIT_TABLE
CRITICAL
U3900
H9M
66A6 78D6
IN
66A6 78D6
IN
76D6
IN
76D6
IN
66B6 78D6
IN
66B6 78D6
IN
76D6
IN
76D6
IN
76D6
IN
76D6
IN
76D6 76C8
IN
76D6
IN
35D1
OUT
35C1
OUT
35D1
OUT
35D1
OUT
MIPI_FTCAM_DATA_P<0>
MIPI_FTCAM_DATA_N<0>
GND
GND
MIPI_FTCAM_CLK_P
MIPI_FTCAM_CLK_N
GND
GND
GND
GND
GND NC_PLCAM_TX_CLK12M_R
GND
MIPI_DFR_DATA_P
MIPI_DFR_DATA_N
MIPI_DFR_CLK_P
MIPI_DFR_CLK_N
SOC_MIPI0C_REXT
SOC_MIPI1C_REXT
SOC_MIPID_REXT
B27
MIPI0C_DATA0_P
A27
MIPI0C_DATA0_N
B25
MIPI0C_DATA1_P
A25
MIPI0C_DATA1_N
B26
MIPI0C_CLK_P
A26
MIPI0C_CLK_N
B28
MIPI1C_DATA0_P
A28
MIPI1C_DATA0_N
B30
MIPI1C_DATA1_P
A30
MIPI1C_DATA1_N
B29
MIPI1C_CLK_P
A29
MIPI1C_CLK_N
B33
MIPID_DATA0_P
A33
MIPID_DATA0_N
B32
MIPID_CLK_P
A32
MIPID_CLK_N
F23
MIPI0C_REXT
F26
MIPI1C_REXT
F27
MIPID_REXT
BGA
SYM 4 OF 18
ISP
(IPD)
(IPD)
ISP_I2C0_SDA
ISP_I2C0_SCL
ISP_I2C1_SDA
ISP_I2C1_SCL
SENSOR0_CLK
SENSOR0_RST
SENSOR0_ISTRB
SENSOR1_CLK
SENSOR1_RST
SENSOR1_ISTRB
SENSOR2_CLK
SENSOR2_RST
SENSOR_INT
DISP_TE
DISP_VSYNC
CLK32K_OUT
AF32
AH36
AB32
AG32
AK35
AK34
AJ33
AD33
AC32
AC34
AD32
AJ32
AA33
H32
T36
AK33
I2C_FTCAM_SDA
I2C_FTCAM_SCL
NC_I2C_PLCAM_SDA
NC_I2C_PLCAM_SCL
NC_FTCAM_CLK12M_R
NC_FTCAM_RESET_L
DFR_TOUCH_RESET_L
NC_PLCAM_RX_CLK12M_R
NC_PLCAM_RX_RESET_L
DFR_DISP_RESET_L
NC_PLCAM_TX_RESET_L
NC_PLCAM_TX_INT
DFR_DISP_TE
BOARD_REV2
DFR_TOUCH_CLK32K_RESET_L
BI
37B4
OUT
BI
37D6
OUT
76D8
OUT
76D8
OUT
35B7 35C7 77C8
OUT
76C8
OUT
76C8
OUT
35B7 35C4 77D8
OUT
OUT
76B8
OUT
76C8
IN
35D4 77D8
IN
31C8
IN
35C5 77C8
OUT
37B6
37D6
D
C
B
1
R4100
4.02K
1%
1/20W
MF
201
2
1
R4101
4.02K
1%
1/20W
MF
201
2
37D8
37D8
37C8
37C8
37C8
37C8
37B8
37B8
37A8
37A8
37D6
37D6
48C3 77B7
47C3 77C7
76D6 77C4
76D6 77C4
34A7 34C6
34A7 34C6
34A7 34C6
34A7 34C6
76A8
76A8
76A8
76A8
21B2 21C3
21B2 21C3
76A8
76A8
21B2 21C6
21B3 21C6
21A2 21C6
21A2 21C6
BI
OUT
BI
OUT
BI
OUT
BI
OUT
BI
OUT
BI
OUT
IN
IN
IN
OUT
IN
OUT
IN
OUT
IN
OUT
IN
OUT
IN
OUT
IN
OUT
IN
OUT
IN
OUT
1
R4102
4.02K
1%
1/20W
MF
201
2
I2C_SPKRAMP_L_SDA
I2C_SPKRAMP_L_SCL
I2C_SPKRAMP_R_SDA
I2C_SPKRAMP_R_SCL
I2C_CODEC_SDA
I2C_CODEC_SCL
I2C_ALS_SDA
I2C_ALS_SCL
I2C_DFR_SDA
I2C_DFR_SCL
NC_I2C_SOC_5_SDA
NC_I2C_SOC_5_SCL
SPKR_ID1
SPKR_ID0
TP_SOC_DEBUGPRT_RX
TP_SOC_DEBUGPRT_TX
UART_SE_D2R
UART_SE_R2D
UART_SE_D2R_CTS_L
UART_SE_R2D_RTS_L
NC_UART_BT_D2R
NC_UART_BT_R2D
NC_UART_BT_D2R_CTS_L
NC_UART_BT_R2D_RTS_L
UART_BT_LH_D2R
UART_BT_LH_R2D
NC_UART_GNSS_D2R_CTS_L
NC_UART_GNSS_R2D_RTS_L
UART_WLAN_D2R
UART_WLAN_R2D
UART_WLAN_D2R_CTS_L
UART_WLAN_R2D_RTS_L
AE35
AD35
AF34
AG35
M34
R33
Y32
AE34
T34
U32
R35
U33
P34
R34
Y33
Y34
B15
A15
C15
D15
J36
J35
N32
M32
M36
N36
M35
U34
B14
A14
C14
C13
I2C0_SDA
I2C0_SCL
I2C1_SDA
I2C1_SCL
I2C2_SDA
I2C2_SCL
I2C3_SDA
I2C3_SCL
I2C4_SDA
I2C4_SCL
I2C5_SDA
I2C5_SCL
I2C6_SDA
I2C6_SCL
UART0_RXD
UART0_TXD
UART1_RXD
UART1_TXD
UART1_CTS*
UART1_RTS*
UART2_RXD
UART2_TXD
UART2_CTS*
UART2_RTS*
UART3_RXD
UART3_TXD
UART3_CTS*
UART3_RTS*
UART4_RXD
UART4_TXD
UART4_CTS*
UART4_RTS*
(IPU)
(IPU)
(IPU)
OMIT_TABLE
CRITICAL
U3900
H9M
BGA
SYM 2 OF 18
I2C/UART/SPI/I2S
(IPU)
(IPD)
(IPD)
(IPD)
(IPD)
SPI0_MISO
SPI0_MOSI
SPI0_SCLK
SPI0_SSIN
SPI1_MISO
SPI1_MOSI
SPI1_SCLK
SPI1_SSIN
SPI2_MISO
SPI2_MOSI
SPI2_SCLK
SPI2_SSIN
SPI3_MISO
SPI3_MOSI
SPI3_SCLK
SPI3_SSIN
I2S0_DIN
I2S0_DOUT
I2S0_BCLK
I2S0_LRCK
I2S0_MCK
I2S1_DIN
I2S1_DOUT
I2S1_BCLK
I2S1_LRCK
I2S1_MCK
I2S2_DIN
I2S2_DOUT
I2S2_BCLK
I2S2_LRCK
I2S2_MCK
I2S3_DIN
I2S3_DOUT
I2S3_BCLK
I2S3_LRCK
I2S3_MCK
AR9
AR7
AU7
AT9
P36
N34
P35
T32
A19
A20
C19
A18
C17
C18
B18
A17
AC33
AG34
AA32
AG33
AR35
B20
C20
C21
A21
D21
AH34
AB34
AF33
AH35
AR33
AD36
AB35
AE36
W34
AG36
SPI_SOCROM_MISO
SPI_SOCROM_MOSI_R
SPI_SOCROM_CLK_R SPI_SOCROM_CLK
SPI_SOCROM_CS_L
SPI_TPAD_MISO
SPI_TPAD_MOSI_R
SPI_TPAD_CLK_R
SPI_TPAD_CS_L
SPI_MESA_MISO
SPI_MESA_MOSI_R
SPI_MESA_CLK_R
WLAN_JTAG_TDI
SPI_DFR_MISO
SPI_DFR_MOSI_R
SPI_DFR_CLK_R
SPI_DFR_CS_L
I2S_SPKRAMP_L_D2R
I2S_SPKRAMP_L_R2D_R
I2S_SPKRAMP_L_BCLK_R
I2S_SPKRAMP_L_LRCLK
NC_DFR_TOUCH_RSVD
I2S_SPKRAMP_R_D2R
I2S_SPKRAMP_R_R2D_R
I2S_SPKRAMP_R_BCLK_R
I2S_SPKRAMP_R_LRCLK
NC_PCHROM_SW_EN
76B8
I2S_CODEC_D2R
I2S_CODEC_R2D_R
I2S_CODEC_BCLK_R
I2S_CODEC_LRCLK
NC_I2S_CODEC_MCLK
NC_I2S_HAWKING_D2R
NC_I2S_CODEC1_R2D_R
NC_I2S_HAWKING_BCLK_R
NC_I2S_HAWKING_LRCLK
NC_I2S_CODEC1_MCLK
31B1 31C8
IN
31B4
OUT
31C8 32B6
IN
32C8
OUT
32C8
OUT
51D8
OUT
33A1 33D8
IN
32B8
OUT
32B8
OUT
21A5
OUT
32B6
IN
32B8
OUT
32B8
OUT
35D7 77D8
OUT
47B8 47C8 48B8 48C8
IN
32C8
OUT
32C8
OUT
32C6
OUT
76D8
BI
32A6
IN
32C8
OUT
32C8
OUT
32C6
OUT
46B1
IN
32C8
OUT
32C8
OUT
32C6
OUT
76D8
OUT
76D8
IN
76D8
OUT
76D8
OUT
76D8
OUT
76D8
OUT
R4171
R4172
PLACE_NEAR=U3900.AR7:5MM
PLACE_NEAR=U3900.AU7:5MM
20
20
21
21
MF1/20W
SPI_SOCROM_MOSI
2015%
MF1/20W
2015%
OUT
OUT
C
31B1 31C8
31B4 31C8
B
A
8
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
PAGE TITLE
A
SoC ISP/I2C/UART/SPI/I2S
DRAWING NUMBER
051-05198
Apple Inc.
REVISION
6.0.0
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
BOM_COST_GROUP=SOC
67
35 4
IV ALL RIGHTS RESERVED
2
BRANCH
evt-3
PAGE
41 OF 150
SHEET
25 OF 109
1
SIZE
D
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
OMIT_TABLE
CRITICAL
D
14D6
14D6
14D6
14D6
14D6
14D6
14D6
14D6
17B5
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
PCIE_SOC_D2R_P<0>
PCIE_SOC_D2R_N<0>
PCIE_SOC_D2R_P<1>
PCIE_SOC_D2R_N<1>
PCIE_SOC_D2R_P<2>
PCIE_SOC_D2R_N<2>
PCIE_SOC_D2R_P<3>
PCIE_SOC_D2R_N<3>
SOC_CLKREQ_L
(All Caps)
GND_VOID=TRUE
C4210
0.22UF
C4211
0.22UF
C4212
0.22UF
C4213
0.22UF
C4214
0.22UF
C4215
0.22UF
C4216
0.22UF
C4217
0.22UF
R4218
100
21
21
21
21
21
21
21
21
6.3V X5R 020120%
6.3V X5R
6.3V X5R 020120%
6.3V X5R
6.3V X5R
6.3V X5R
6.3V X5R
6.3V X5R
21
5% 2011/20W MF
U3900
H9M
PCIE_SOC_D2R_C_P<0>
PCIE_SOC_D2R_C_N<0>
020120%
32D6
32D6
IN
IN
PCIE_SOC_R2D_P<0>
PCIE_SOC_R2D_N<0>
PCIE_SOC_D2R_C_P<1>
PCIE_SOC_D2R_C_N<1>
020120%
020120%
32D6
32D6
IN
IN
PCIE_SOC_R2D_P<1>
PCIE_SOC_R2D_N<1>
PCIE_SOC_D2R_C_P<2>
PCIE_SOC_D2R_C_N<2>
020120%
020120%
32D6
32C6
IN
IN
PCIE_SOC_R2D_P<2>
PCIE_SOC_R2D_N<2>
PCIE_SOC_D2R_C_P<3>
PCIE_SOC_D2R_C_N<3>
020120%
32C6
32C6
IN
IN
PCIE_SOC_R2D_P<3>
PCIE_SOC_R2D_N<3>
SOC_CLKREQ_R_L
14A6 78D8
IN
14A6 78D8
IN
PCIE_CLK100M_SOC_P
PCIE_CLK100M_SOC_N
SOC_PCIE_UP_REXT
1
R4200
3.01K
1%
1/20W
MF
201
2
B10
PCIE_UP_TX0_P
C10
PCIE_UP_TX0_N
E10
PCIE_UP_RX0_P
F10
PCIE_UP_RX0_N
A9
PCIE_UP_TX1_P
B9
PCIE_UP_TX1_N
D9
PCIE_UP_RX1_P
E9
PCIE_UP_RX1_N
B8
PCIE_UP_TX2_P
C8
PCIE_UP_TX2_N
E8
PCIE_UP_RX2_P
F8
PCIE_UP_RX2_N
A7
PCIE_UP_TX3_P
B7
PCIE_UP_TX3_N
D7
PCIE_UP_RX3_P
E7
PCIE_UP_RX3_N
B21
PCIE_UP_CLKREQ*
G13
PCIE_UP_EXT_REFCLK_P
G12
PCIE_UP_EXT_REFCLK_N
G11
PCIE_UP_REXT
BGA
SYM 1 OF 18
PCIE UP/DN
PCIE_DN_TX0_P
PCIE_DN_TX0_N
PCIE_DN_RX0_P
PCIE_DN_RX0_N
PCIE_DN_TX1_P
PCIE_DN_TX1_N
PCIE_DN_RX1_P
PCIE_DN_RX1_N
PCIE_DN_TX2_P
PCIE_DN_TX2_N
PCIE_DN_RX2_P
PCIE_DN_RX2_N
PCIE_DN_TX3_P
PCIE_DN_TX3_N
PCIE_DN_RX3_P
PCIE_DN_RX3_N
PCIE_DN_REFCLK0_P
PCIE_DN_REFCLK0_N
PCIE_DN_CLKREQ0*
PCIE_DN_PERST0*
PCIE_DN_REFCLK1_P
PCIE_DN_REFCLK1_N
PCIE_DN_CLKREQ1*
PCIE_DN_PERST1*
PCIE_DN_REFCLK2_P
PCIE_DN_REFCLK2_N
PCIE_DN_CLKREQ2*
PCIE_DN_PERST2*
AV31
AU31
AR31
AP31
AU30
AT30
AP30
AN30
AV29
AU29
AR29
AP29
AU28
AT28
AP28
AN28
AP26
AR26
AM33
AN34
AN25
AP25
AN35
AK32
AU26
AV26
AH32
AE32
NC_PCIE_WLAN_R2D_C_P
NC_PCIE_WLAN_R2D_C_N
NC_PCIE_WLAN_D2R_P
NC_PCIE_WLAN_D2R_N
NC_PCIE_ENET_R2D_C_P
NC_PCIE_ENET_R2D_C_N
NC_PCIE_ENET_D2R_P
NC_PCIE_ENET_D2R_N
NC_PCIE_DN2_R2D_CP
NC_PCIE_DN2_R2D_CN
NC_PCIE_DN2_D2RP
NC_PCIE_DN2_D2RN
NC_PCIE_DN3_R2D_CP
NC_PCIE_DN3_R2D_CN
NC_PCIE_DN3_D2RP
NC_PCIE_DN3_D2RN
NC_PCIE_CLK100M_WLAN_P
NC_PCIE_CLK100M_WLAN_N
NC_WLAN_CLKREQ_L
NC_WLAN_PERST_L
NC_PCIE_CLK100M_ENET_P
NC_PCIE_CLK100M_ENET_N
ENET_CLKREQ_L
NC_ENET_RESET_L
NC_PCIE_CLK100M_DN2P
NC_PCIE_CLK100M_DN2N
NC_PCIEDN2_CLKREQ_L
NC_PCIEDN2_RESET_L
OUT
OUT
IN
IN
OUT
OUT
IN
IN
76B8
76B8
76B8
76B8
76B8
76B8
76B8
76B8
OUT
OUT
IN
OUT
OUT
OUT
26A7
OUT
76B8
76B8
76A8
76A8
76C8
76C8
76C8
76C8
76C8
76C8
76C8
76C8
76C8
76C8
76A8
76A8
76C8
76C8
76D8
D
(UID_MODE strap on A00)
C
B
67C2
67C2
67C2 78D8
67C2 78D8
68C2
68C2
68C2
68C2
69C2
69C2
69C2
69C2
70C2
70C2
70C2
70C2
OUT
OUT
IN
IN
OUT
OUT
IN
IN
OUT
OUT
IN
IN
OUT
OUT
IN
IN
PCIE_SSD0_R2D_C_P<0>
PCIE_SSD0_R2D_C_N<0>
PCIE_SSD0_D2R_P<0>
PCIE_SSD0_D2R_N<0>
PCIE_SSD0_R2D_C_P<1>
PCIE_SSD0_R2D_C_N<1>
PCIE_SSD0_D2R_P<1>
PCIE_SSD0_D2R_N<1>
PCIE_SSD0_R2D_C_P<2>
PCIE_SSD0_R2D_C_N<2>
PCIE_SSD0_D2R_P<2>
PCIE_SSD0_D2R_N<2>
PCIE_SSD0_R2D_C_P<3>
PCIE_SSD0_R2D_C_N<3>
PCIE_SSD0_D2R_P<3>
PCIE_SSD0_D2R_N<3>
AU11
AT11
AP11
AN11
AV12
AU12
AR12
AP12
AU13
AT13
AP13
AN13
AV14
AU14
AR14
AP14
PCIE_STG0_TX0_P
PCIE_STG0_TX0_N
PCIE_STG0_RX0_P
PCIE_STG0_RX0_N
PCIE_STG0_TX1_P
PCIE_STG0_TX1_N
PCIE_STG0_RX1_P
PCIE_STG0_RX1_N
PCIE_STG0_TX2_P
PCIE_STG0_TX2_N
PCIE_STG0_RX2_P
PCIE_STG0_RX2_N
PCIE_STG0_TX3_P
PCIE_STG0_TX3_N
PCIE_STG0_RX3_P
PCIE_STG0_RX3_N
OMIT_TABLE
CRITICAL
U3900
H9M
BGA
SYM 8 OF 18
PCIE STG 0/1
PCIE_DN_REFCLK3_P
PCIE_DN_REFCLK3_N
PCIE_DN_CLKREQ3*
PCIE_DN_PERST3*
PCIE_DN_EXT_REFCLK_P
PCIE_DN_EXT_REFCLK_N
PCIE_DN_REXT
PCIE_STG1_TX0_P
PCIE_STG1_TX0_N
PCIE_STG1_RX0_P
PCIE_STG1_RX0_N
PCIE_STG1_TX1_P
PCIE_STG1_TX1_N
PCIE_STG1_RX1_P
PCIE_STG1_RX1_N
PCIE_STG1_TX2_P
PCIE_STG1_TX2_N
PCIE_STG1_RX2_P
PCIE_STG1_RX2_N
PCIE_STG1_TX3_P
PCIE_STG1_TX3_N
PCIE_STG1_RX3_P
PCIE_STG1_RX3_N
AT25
AU25
AJ34
AK36
AM27
AM26
AM25
AU16
AT16
AP16
AN16
AV17
AU17
AR17
AP17
AU18
AT18
AP18
AN18
AV19
AU19
AR19
AP19
NC_PCIE_CLK100M_DN3P
NC_PCIE_CLK100M_DN3N
NC_PCIEDN3_CLKREQ_L
NC_PCIEDN3_RESET_L
SOC_PCIE_DN_REXT
R4201
3.01K
1%
1/20W
MF
201
NC_PCIE_SSD1_R2D_C_P<0>
NC_PCIE_SSD1_R2D_C_N<0>
NC_PCIE_SSD1_D2R_P<0>
NC_PCIE_SSD1_D2R_N<0>
NC_PCIE_SSD1_R2D_C_P<1>
NC_PCIE_SSD1_R2D_C_N<1>
NC_PCIE_SSD1_D2R_P<1>
NC_PCIE_SSD1_D2R_N<1>
NC_PCIE_SSD1_R2D_C_P<2>
NC_PCIE_SSD1_R2D_C_N<2>
NC_PCIE_SSD1_D2R_P<2>
NC_PCIE_SSD1_D2R_N<2>
NC_PCIE_SSD1_R2D_C_P<3>
NC_PCIE_SSD1_R2D_C_N<3>
NC_PCIE_SSD1_D2R_P<3>
NC_PCIE_SSD1_D2R_N<3>
76A8
76A8
76A8
76A8
1
2
76C8
OUT
76C8
OUT
76C8
IN
76C8
IN
76C8
OUT
76C8
OUT
76C8
IN
76C8
IN
76C8
OUT
76C8
OUT
76C8
IN
76C8
IN
76C8
OUT
76C8
OUT
76C8
IN
76C8
IN
C
B
A
PP1V8_AWAKE
R4232
47K
67C3 68C3 78C8 78D8
67C3 68C3 78C8 78D8
32A6 67C3
32A6 68C3
69C3 70C3 78C8 78D8
69C3 70C3 78C8 78D8
32A6 69C3
32A6 70C3
32A6 67C7 68C7 69C7 70C7
32B8
OUT
OUT
IN
IN
OUT
OUT
IN
IN
OUT
OUT
PCIE_CLK100M_SSD0_01_P
PCIE_CLK100M_SSD0_01_N
SSD0_CLKREQ0_L
SSD0_CLKREQ1_L
PCIE_CLK100M_SSD0_23_P
PCIE_CLK100M_SSD0_23_N
SSD0_CLKREQ2_L
SSD0_CLKREQ3_L
SSD0_PCIE_RESET_L
SSD0_CLK24M_R
AP21
AR21
AT33
AR34
AN22
AP22
AP34
AN33
AR36
AP7
AM14
AM15
PCIE_STG0_REFCLK01_P
PCIE_STG0_REFCLK01_N
PCIE_STG0_CLKREQ0*
PCIE_STG0_CLKREQ1*
PCIE_STG0_REFCLK23_P
PCIE_STG0_REFCLK23_N
PCIE_STG0_CLKREQ2*
PCIE_STG0_CLKREQ3*
PCIE_STG0_PERST*
PCIE_STG0_NANDCLK
PCIE_STG0_EXT_REFCLK_P
PCIE_STG0_EXT_REFCLK_N
PCIE_STG1_REFCLK01_P
PCIE_STG1_REFCLK01_N
PCIE_STG1_CLKREQ0*
PCIE_STG1_CLKREQ1*
PCIE_STG1_REFCLK23_P
PCIE_STG1_REFCLK23_N
PCIE_STG1_CLKREQ2*
PCIE_STG1_CLKREQ3*
PCIE_STG1_PERST*
PCIE_STG1_NANDCLK
PCIE_STG1_EXT_REFCLK_P
PCIE_STG1_EXT_REFCLK_N
AU21
AV21
B17
D18
AT22
AU22
C16
A16
AP36
AV7
AM19
AM20
NC_PCIE_CLK100M_SSD1_01_P
NC_PCIE_CLK100M_SSD1_01_N
NC_SSD1_CLKREQ0_L
NC_SSD1_CLKREQ1_L
NC_PCIE_CLK100M_SSD1_23_P
NC_PCIE_CLK100M_SSD1_23_N
NC_SSD1_CLKREQ2_L
NC_SSD1_CLKREQ3_L
NC_SSD1_PCIE_RESET_L
NC_SSD1_CLK24M_R
OUT
OUT
IN
IN
OUT
OUT
IN
IN
OUT
OUT
76C8
76C8
76B8
76B8
76C8
76C8
76B8
76B8
76B8
76B8
PAGE TITLE
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
A
SoC PCIe
SOC_PCIE_STG0_REXT
1
R4250
3.01K
1%
74B6 32A7 31D6 31D5 31C6 23A7
21
MF1/20W
ENET_CLKREQ_L
2015%
26C3
1/20W
MF
201
2
AM16
PCIE_STG0_REXT
PCIE_STG1_REXT
AM21
SOC_PCIE_STG1_REXT
R4251
3.01K
1%
1/20W
MF
201
DRAWING NUMBER
051-05198
1
Apple Inc.
REVISION
SIZE
D
6.0.0
NOTICE OF PROPRIETARY PROPERTY:
2
BOM_COST_GROUP=SOC
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
BRANCH
evt-3
PAGE
42 OF 150
SHEET
26 OF 109
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
C
Current estimates @ 105C & 2GB from Gibraltar Power Specification Rev 0.5.3
74D6 32D8
PPVDDCPU_AWAKE
0.625V - 1.06V
11.6A Max
C4300
9.1UF
20%
4V
CERM
0402
1
3
4
2
C4305
9.1UF
20%
4V
CERM
0402
1
3
4
2
C4320
4.3UF
20%
4V
CERM
0402
1
3
4
2
C4330
4.3UF
20%
4V
CERM
0402
1
3
C4301
9.1UF
20%
4V
CERM
0402
1
3
4
2
C4306
9.1UF
20%
4V
CERM
0402
1
3
4
2
C4321
4.3UF
20%
4V
CERM
0402
1
3
4
2
C4331
4.3UF
20%
4V
CERM
0402
1
3
C4302
9.1UF
20%
4V
CERM
0402
1
3
4
2
C4307
9.1UF
20%
4V
CERM
0402
1
3
4
2
C4322
4.3UF
20%
4V
CERM
0402
1
3
4
2
C4332
4.3UF
20%
4V
CERM
0402
1
3
C4303
9.1UF
20%
4V
CERM
0402
1
3
4
2
C4308
9.1UF
20%
4V
CERM
0402
1
3
4
2
C4323
4.3UF
20%
4V
CERM
0402
1
3
4
2
C4333
4.3UF
20%
4V
CERM
0402
1
3
C4304
9.1UF
20%
4V
CERM
0402
1
3
4
2
C4309
9.1UF
20%
4V
CERM
0402
1
3
4
2
C4324
4.3UF
20%
4V
CERM
0402
1
3
4
2
C4334
4.3UF
20%
4V
CERM
0402
1
3
AA12
AA14
AA16
AB11
AB13
AB15
AC12
AC14
AC16
AD11
AD13
AD15
AD17
AE10
AE12
AE14
AE16
AE18
P11
P13
P15
P17
R12
R14
R16
T11
T13
T15
U12
U14
U16
V17
W12
W14
W16
Y17
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
VDD_CPU
OMIT_TABLE
CRITICAL
U3900
H9M
BGA
SYM 10 OF 18
VDD_CPU_SRAM
VDD_CPU_SRAM
VDD_CPU_SRAM
VDD_CPU_SRAM
VDD_CPU_SRAM
VDD_CPU_SRAM
VDD_CPU_SRAM
VDD_CPU_SRAM
VDD_CPU_SRAM
VDD_CPU_SRAM
VDD_CPU_SRAM
VDD_CPU_SRAM
VDD_CPU_SRAM
VDD_CPU_SENSE
VSS_CPU_SENSE
AA10
AB17
AC10
R10
T17
U10
V11
V13
V15
W10
Y11
Y13
Y15
N18
N17
C4350
9.1UF
20%
4V
CERM
0402
1
3
4
2
C4355
4.3UF
20%
4V
CERM
0402
1
3
4
2
C4351
1
C4356
1
C4360
4.3UF
20%
4V
CERM
0402
1
SOC_VDDCPU_SENSE
NC_SOC_VSSCPU_SENSE
3
4
2
9.1UF
20%
4V
CERM
0402
4
2
4.3UF
20%
4V
CERM
0402
4
2
3
3
OUT
76A8
C4352
9.1UF
20%
4V
CERM
0402
1
4
2
62C3 78D4
PPVDDCPUSRAM_AWAKE
74D6
0.8V - 1.06V
0.9A Max
C4353
9.1UF
20%
4V
CERM
0402
3
1
3
C4354
9.1UF
20%
4V
CERM
0402
1
3
C4357
9.1UF
20%
4V
CERM
0402
1
3
D
4
4
4
2
2
2
C
B
A
74D6 32D8
PP0V82_SLPDDR
5.6A Max
4
4
4
4
4
2
2
2
2
2
OMIT_TABLE
CRITICAL
U3900
H9M
C4370
9.1UF
20%
4V
CERM
0402
1
3
4
2
C4380
4.3UF
20%
4V
CERM
0402
1
3
4
2
C4385
4.3UF
20%
4V
CERM
0402
1
3
4
2
C4371
9.1UF
20%
4V
CERM
0402
1
3
4
2
C4381
4.3UF
20%
4V
CERM
0402
1
3
4
2
C4386
4.3UF
20%
4V
CERM
0402
1
3
4
2
C4372
9.1UF
20%
4V
CERM
0402
1
3
4
2
C4373
9.1UF
20%
4V
CERM
0402
1
3
4
2
AA20
AA22
AA24
AA26
AA28
AC18
AC20
AC22
AC24
AC26
AC28
AE20
AE22
AE24
AE26
AE28
AG10
AG12
AG14
AG16
AG18
AG20
AG22
AG24
AG26
AG28
AJ10
AJ12
AJ14
AJ16
AJ18
AJ20
AJ22
AJ24
AJ26
AJ28
J10
J12
J14
J16
J18
J20
BGA
VDD_SOC VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
SYM 11 OF 18
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC
VDD_SOC_SENSE
VSS_SENSE
J22
J24
J26
J28
L10
L12
L14
L16
L18
L20
L22
L24
L26
L28
N10
N12
N14
N16
N20
N22
N24
N26
N28
R18
R20
R22
R24
R26
R28
U18
U20
U22
U24
U26
U28
W20
W22
W24
W26
W28
AD27
AD28
NC_SOC_VDDSOC_SENSE
NC_SOC_VSSSOC_SENSE
76A8
76A8
PAGE TITLE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
BOM_COST_GROUP=SOC
IV ALL RIGHTS RESERVED
SoC Power 1
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
43 OF 150
SHEET
27 OF 109
B
A
SIZE
D
8
67
35 4
2
1
D
www.haojiyoubbs.com
QQ微信：181806465
C
B
A
678
Current estimates @ 105C & 2GB from Gibraltar Power Specification Rev 0.5.3
PP1V1_SLPDDR
74C4
0.86A Max
PP0V9_SLPDDR
74B4
1.9A Max
74B4 28B3 28A3
PP0V9_SLPDDR
74B4
25mA Max
PP0V9_SLPDDR
330mA Max
C4400
9.1UF
20%
4V
CERM
0402
1
2
C4405
4.3UF
20%
4V
CERM
0402
1
2
C4410
4.3UF
20%
4V
CERM
0402
1
2
9mA Max
PP0V9_SLPDDR
74B4
PP0V9_SLPDDR
74B4
5mA Max
PP0V8_SLPS2R
74D2
102mA Max
20%
4V
0201
20%
4V
0201
K19
K21
K23
K25
K27
M11
M13
M15
M17
M19
M21
M23
M25
M27
P19
P21
P23
P25
P27
T19
T21
T23
T25
T27
V19
V21
V23
V25
V27
Y19
Y21
Y23
Y25
Y27
AL14
AL16
AL12
AK13
AK15
AK17
AL18
AL20
AL22
AK19
AK21
AL17
AL26
AL28
AL30
AK25
AK27
AK29
AK23
AJ15
AL24
AJ21
AJ27
1
2
1
2
C4450
2.2UF
X6S-CERM
C4454
2.2UF
X6S-CERM
3
C4402
9.1UF
20%
4V
CERM
0402
1
3
4
2
C4420
4.3UF
20%
4V
CERM
0402
1
2
C4423
2.2UF
X6S-CERM
0201
C4426
4.3UF
20%
4V
CERM
0402
1
2
4
20%
4
4V
U3900
H9M
AB19
AB21
AB23
AB25
AB27
AD19
AD21
AD23
AD25
AF11
AF13
AF15
AF17
AF19
AF21
AF23
AF25
AF27
AH11
AH13
AH15
AH17
AH19
AH21
AH23
AH25
AH27
AK11
3
1
2
3
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
K11
VDD_FIXED
K13
VDD_FIXED
K15
VDD_FIXED
K17
VDD_FIXED
W18
VDD_FIXED_CPU
G22
VDD_FIXED_USB
H23
VDD_FIXED_MIPI
H25
VDD_FIXED_MIPI
H27
VDD_FIXED_MIPI
AB9
VDD_LOW
AD9
VDD_LOW
P9
VDD_LOW
T9
VDD_LOW
V9
VDD_LOW
Y9
VDD_LOW
H11
VDD_FIXED_UP_PCIE_ANA
H13
VDD_FIXED_UP_PCIE_ANA
H15
VDD_FIXED_UP_PCIE_ANA
J15
VDD_FIXED_UP_PCIE_CLK
J11
VDD_FIXED_UP_PCIE_CLK
J13
VDD_FIXED_UP_PCIE_CLK
BGA
SYM 12 OF 18
OMIT_TABLE
CRITICAL
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED
VDD_FIXED_STG0_PCIE_ANA
VDD_FIXED_STG0_PCIE_ANA
VDD_FIXED_STG0_PCIE_ANA
VDD_FIXED_STG0_PCIE_CLK
VDD_FIXED_STG0_PCIE_CLK
VDD_FIXED_STG0_PCIE_CLK
VDD_FIXED_STG1_PCIE_ANA
VDD_FIXED_STG1_PCIE_ANA
VDD_FIXED_STG1_PCIE_ANA
VDD_FIXED_STG1_PCIE_CLK
VDD_FIXED_STG1_PCIE_CLK
VDD_FIXED_STG1_PCIE_CLK
VDD_FIXED_DN_PCIE_ANA
VDD_FIXED_DN_PCIE_ANA
VDD_FIXED_DN_PCIE_ANA
VDD_FIXED_DN_PCIE_CLK
VDD_FIXED_DN_PCIE_CLK
VDD_FIXED_DN_PCIE_CLK
VDD_FIXED_PCIE_REFBUF
VDD_FIXED_PCIE_REFBUF
VDD_FIXED_PCIE_REFBUF
VDD_FIXED_PCIE_REFBUF
VDD_FIXED_PCIE_REFBUF
C4401
9.1UF
20%
4V
CERM
0402
3
4
1
3
4
2
C4406
4.3UF
20%
4V
CERM
0402
3
4
1
3
4
2
C4411
4.3UF
20%
4V
CERM
0402
3
4
1
3
4
2
C4425
4.3UF
20%
4V
CERM
0402
1
4
2
C4451
2.2UF
20%
4V
X6S-CERM
0201
C4455
2.2UF
20%
4V
X6S-CERM
0201
1
2
1
2
C4430
4.3UF
20%
4V
CERM
0402
1
3
4
2
C4435
4.3UF
20%
4V
CERM
0402
1
3
4
2
C4440
4.3UF
20%
4V
CERM
0402
1
3
4
2
C4445
4.3UF
20%
4V
CERM
0402
1
3
4
2
C4452
2.2UF
20%
4V
X6S-CERM
0201
C4456
2.2UF
20%
4V
X6S-CERM
0201
C4431
4.3UF
1
C4436
4.3UF
1
C4441
4.3UF
1
PP0V9_SLPDDR_SOC_PCIEREFBUF
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
VOLTAGE=0.9V
1
2
1
2
20%
4V
CERM
0402
2
20%
4V
CERM
0402
2
20%
4V
CERM
0402
2
3
4
3
4
3
4
20%
4V
0201
20%
4V
0201
1
2
1
2
C4453
2.2UF
X6S-CERM
C4457
2.2UF
X6S-CERM
PP0V9_SLPDDR
PP0V9_SLPDDR
PP0V9_SLPDDR
C2
E1
G1
H8
J9
K8
L9
M8
N9
P1
R1
U1
C36
E37
G37
H30
J29
K30
L29
M30
N29
P37
R37
U37
AB1
AD1
AE1
AF9
AG8
AH9
AJ8
AK9
AL8
AM1
AP1
AT2
AB37
AD30
AD37
AE29
AE37
AF30
AG29
AH30
AJ29
AM37
AP37
AT36
VDDIO11_DDR0
VDDIO11_DDR0
VDDIO11_DDR0
VDDIO11_DDR0
VDDIO11_DDR0
VDDIO11_DDR0
VDDIO11_DDR0
VDDIO11_DDR0
VDDIO11_DDR0
VDDIO11_DDR0
VDDIO11_DDR0
VDDIO11_DDR0
VDDIO11_DDR1
VDDIO11_DDR1
VDDIO11_DDR1
VDDIO11_DDR1
VDDIO11_DDR1
VDDIO11_DDR1
VDDIO11_DDR1
VDDIO11_DDR1
VDDIO11_DDR1
VDDIO11_DDR1
VDDIO11_DDR1
VDDIO11_DDR1
VDDIO11_DDR2
VDDIO11_DDR2
VDDIO11_DDR2
VDDIO11_DDR2
VDDIO11_DDR2
VDDIO11_DDR2
VDDIO11_DDR2
VDDIO11_DDR2
VDDIO11_DDR2
VDDIO11_DDR2
VDDIO11_DDR2
VDDIO11_DDR2
VDDIO11_DDR3
VDDIO11_DDR3
VDDIO11_DDR3
VDDIO11_DDR3
VDDIO11_DDR3
VDDIO11_DDR3
VDDIO11_DDR3
VDDIO11_DDR3
VDDIO11_DDR3
VDDIO11_DDR3
VDDIO11_DDR3
VDDIO11_DDR3
R4445
2 1
1/20W
0201
OMIT_TABLE
CRITICAL
U3900
SYM 13 OF 18
330mA Max
330mA Max
330mA Max
0
5%
MF
PP0V9_SLPDDR
H9M
BGA
3 245
VDDIO11_PLL_DDR
VDDIO11_PLL_DDR
VDDIO11_PLL_DDR
VDDIO11_PLL_DDR
VDDIO11_RET_DDR
VDDIO11_RET_DDR
VDDIO11_RET_DDR
VDDIO11_RET_DDR
74B4 28B3 28A8 28A3
74B4 28B3 28A8 28A3
74B4 28B3 28A8 28A3
G9
G29
AM9
AK30
G4
G34
AM4
AM34
45mA Max
1
C4460
0.22UF
20%
6.3V
2
X6S-CERM
0201
1
C4470
2.2UF
20%
4V
2
X6S-CERM
0201
PP1V1_SLPDDR
74C4
8mA Max
1
C4461
0.22UF
20%
6.3V
2
X6S-CERM
0201
1
C4471
2.2UF
20%
4V
2
X6S-CERM
0201
74B4 28B3 28A8 28A3
BOM_COST_GROUP=SOC
1
C4462
0.22UF
20%
6.3V
2
X6S-CERM
0201
1
C4472
2.2UF
20%
4V
2
X6S-CERM
0201
PAGE TITLE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PP1V1_SLPDDR_SOC_VDDIOPLLDDR_F
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
1
C4463
0.22UF
20%
6.3V
2
X6S-CERM
0201
VOLTAGE=1.1V
PP1V1_SLPS2R
Current included in VDD2
1
C4473
2.2UF
20%
4V
2
X6S-CERM
0201
SoC Power 2
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
1
R4460
5.1
L4460
120-OHM-25%-0.48A-0.21DCR
0201
21
MF1/20W
02011%
21
74C4
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
44 OF 150
SHEET
28 OF 109
D
C
B
A
SIZE
D
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
Current estimates @ 105C & 2GB from Gibraltar Power Specification Rev 0.5.3
3 245
1
D
C
B
A
PP1V8_AWAKE
74B6
40mA Max
74C6
74C6
PP1V8_AWAKE
74B6
2mA Max
74C6
PP1V8_SLPS2R
1mA Max
PP1V8_SLPS2R
1mA Max
C4521
2.2UF
X6S-CERM
74B6
74B6
PP1V8_SLPS2R
74C6
134mA Max
PP1V8_SLPS2R
20mA Max
20%
4V
0201
1
2
C4522
X6S-CERM
PP1V8_AWAKE
20mA Max
PP1V8_AWAKE
1mA Max
2.2UF
20%
4V
0201
R4530
0
5%
1/20W
MF
0201
R4515
49.9
1/20W
R4519
49.9
1/20W
1
2
21
C4530
C4540
21
1%
MF
201
21
1%
MF
201
C4523
2.2UF
X6S-CERM
0201
1UF
20%
6.3V
X6S-CERM
0201
0.1UF
10%
6.3V
X6S
0201
C4500
2.2UF
X6S-CERM
C4510
2.2UF
20%
4V
X6S-CERM
0201
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
PP1V8_SLPS2R_SOC_LPADC_RC
PP1V8_SLPS2R_SOC_LPOSC_RC
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
1
20%
4V
2
PP1V8_AWAKE_SOC_TSADC_RC
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
1
2
1
2
R4545
1
20%
4V
2
0201
1
2
C4511
1
C4524
4.3UF
20%
4V
CERM
0402
1
4
2
PP1V8_AWAKE
74B6
7mA Max
49.9
1/20W
1%
MF
201
21
C4501
2.2UF
X6S-CERM
4.3UF
20%
4V
CERM
0402
3
4
2
3
C4545
1UF
20%
6.3V
X6S-CERM
0201
1
20%
4V
2
0201
C4512
4.3UF
1
C4525
4.3UF
20%
4V
CERM
0402
1
4
2
PP1V8_AWAKE_SOC_FMON_RC
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
1
2
C4502
20%
4V
CERM
0402
4
2
C4519
X6S-CERM
3
C4535
X6S-CERM
2.2UF
20%
X6S-CERM
0201
3
2.2UF
20%
4V
0201
C4526
4.3UF
20%
4V
CERM
0402
1
2
2.2UF
20%
4V
0201
1
4V
2
C4513
0.1UF
1
2
3
4
1
2
C4503
X6S-CERM
10%
6.3V
X6S
0201
C4515
X6S-CERM
C4527
4.3UF
1
C4536
2.2UF
20%
4V
0201
1
2
20UF
20%
2.5V
0402
20%
4V
CERM
0402
3
4
2
0.1UF
10%
6.3V
X6S
0201
D
OMIT_TABLE
CRITICAL
U3900
H9M
A4
VDD1 VDD12_CPU_UVD
AV34
1
2
AB8
AB10
1
2
1
2
AA29
AB30
AC29
V30
W29
Y30
H17
H19
H21
AK31
AM31
AL11
AM10
AA18
P16
AD16
AF18
H28
G23
G25
G27
H22
AF12
AM30
AK12
VDD1
AV4
VDD1
B35
VDD1
W1
VDD1
W37
VDD1
Y1
VDD1
Y37
VDD1
AA9
VDDIO18_AOP1
P8
VDDIO18_AOP1
R9
VDDIO18_AOP1
T8
VDDIO18_AOP1
U9
VDDIO18_AOP1
W9
VDDIO18_AOP1
AC9
VDDIO18_AOP2
AD8
VDDIO18_AOP2
AE9
VDDIO18_AOP2
VDD18_LPADC
VDD18_LPOSC
VDDIO18_GRP1
VDDIO18_GRP1
VDDIO18_GRP1
P30
VDDIO18_GRP1
R29
VDDIO18_GRP1
T30
VDDIO18_GRP1
U29
VDDIO18_GRP1
VDDIO18_GRP1
VDDIO18_GRP1
VDDIO18_GRP1
G16
VDDIO18_GRP2
G18
VDDIO18_GRP2
G20
VDDIO18_GRP2
VDDIO18_GRP2
VDDIO18_GRP2
VDDIO18_GRP2
VDDIO18_GRP3
VDDIO18_GRP3
VDDIO18_GRP4
VDDIO18_GRP4
VDD18_TSADC
VDD18_TSADC
VDD18_TSADC
VDD18_TSADC
VDD18_TSADC
VDD18_MIPI
VDD18_MIPI
VDD18_MIPI
VDD18_USB
VDD18_FMON
VDD18_EFUSE1
VDD18_EFUSE2
SYM 14 OF 18
BGA
VDD12_PLL_CPU
VDD12_PCIE_REFBUF
VDD12_PCIE_REFBUF
VDD12_DN_PCIE
VDD12_UP_PCIE
VDD12_STG0_PCIE
VDD12_STG1_PCIE
VDD12_PLL_SOC
VDD12_PLL_SOC
VDD12_PLL_SOC
VDD2
VDD2
VDD2
VDD2
VDD2
VDD2
VDD2
VDD2
VDD2
VDD2
VDD2
VDD2
VDD2
VDD2
VDD2
VDD2
VDD2
VDD2
VDD2
VDD2
VDD2
VDD2
VDD2
VDD2
VDD11_XTAL
VDD33_USB
Y18
V18
AK24
AM23
AM29
G14
AM13
AM18
AC23
AD24
AE23
AG1
AG37
AJ1
AJ37
AK1
AK37
AU3
AU34
AU35
AU4
B3
B4
C34
D34
J1
J37
K1
K37
M1
M37
W3
W35
Y3
Y35
AN23
F21
PP1V2_AWAKE
10mA Max
1
C4550
2.2UF
20%
4V
2
X6S-CERM
0201
VOLTAGE=1.2V
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
PP1V2_AWAKE_SOC_PLLCPU_F
PP1V2_AWAKE_SOC_PCIEREFBUF_F
VOLTAGE=1.2V
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
PP1V2_AWAKE_SOC_PCIEPLL_F
VOLTAGE=1.2V
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
PP1V2_AWAKE_SOC_PLLSOC_F
VOLTAGE=1.2V
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
1
C4580
2.2UF
20%
4V
2
X6S-CERM
0201
1
C4581
2.2UF
20%
4V
2
X6S-CERM
0201
1
2
PP1V1_SLPDDR_SOC_XTAL_F
VOLTAGE=1.1V
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
PP3V3_AWAKE
74B2
12mA Max
1
C4595
0.1UF
10%
6.3V
2
X6S
0201
74C2
C4560
0.1UF
10%
6.3V
X6S
0201
C4565
2.2UF
20%
4V
X6S-CERM
0201
C4570
0.1UF
10%
6.3V
X6S
0201
C4582
2.2UF
20%
4V
X6S-CERM
0201
C4590
C4555
0.1UF
R4560
0
5%
1
2
1
2
1
2
0.1UF
6.3V
0201
1/20W
MF
0201
C4566
2.2UF
X6S-CERM
C4571
0.1UF
PP1V1_SLPS2R
1
C4583
2.2UF
20%
4V
2
X6S-CERM
0201
FERR-240OHM-25%-350MA
1
10%
2
X6S
10%
6.3V
X6S
0201
21
20%
4V
0201
10%
6.3V
X6S
0201
R4590
L4590
1
2
1
2
1
2
1
2
5.1
0201
R4555
0
5%
1/20W
MF
0201
C4561
0.1UF
10%
6.3V
X6S
0201
C4567
2.2UF
X6S-CERM
0201
R4570
0
5%
1/20W
MF
0201
21
MF1/20W
02011%
21
PP1V2_AWAKE
21
PP1V2_AWAKE
1
2
1
20%
4V
2
21
1
2
1.74A Max
1
C4591
2.2UF
20%
4V
2
X6S-CERM
0201
C4562
2.2UF
20%
4V
X6S-CERM
0201
20%
4V
0201
1
2
C4568
2.2UF
X6S-CERM
PP1V2_AWAKE
C4572
2.2UF
20%
4V
X6S-CERM
0201
74C4
PP1V1_SLPDDR
R4565
PAGE TITLE
13mA Max
80mA Max
0
21
5%
1/20W
MF
0201
31mA Max
4mA Max
74C2
74C2 29C1
PP1V2_AWAKE
74C2
74C4
60mA Max
C
74C2 29C2
B
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
A
8
SoC Power 3
DRAWING NUMBER
051-05198
Apple Inc.
REVISION
6.0.0
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
BOM_COST_GROUP=SOC
67
35 4
IV ALL RIGHTS RESERVED
2
BRANCH
evt-3
PAGE
45 OF 150
SHEET
29 OF 109
1
SIZE
D
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
C
B
A1
A10
A11
A2
A22
A24
A3
A31
A34
A35
A36
A37
A5
A6
A8
AA1
AA11
AA13
AA15
AA17
AA19
AA21
AA23
AA25
AA27
AA3
AA30
AA31
AA35
AA37
AB12
AB14
AB16
AB18
AB20
AB22
AB24
AB26
AB28
AB29
AB31
AB33
AB5
AB7
AC1
AC11
AC13
AC15
AC17
AC19
AC21
AC25
AC27
AC30
AC31
AC35
AC37
AC7
AC8
AD10
AD12
AD14
AD18
AD20
AD22
AD26
AD29
AD3
AD31
AD34
AD7
AE11
AE13
AE15
AE17
AE19
AE21
AE25
AE27
AE30
AE31
AE33
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
U3900
H9M
BGA
SYM 15 OF 18
OMIT_TABLE
CRITICAL
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE4
AE5
AE7
AE8
AF1
AF10
AF14
AF16
AF20
AF22
AF24
AF26
AF28
AF29
AF3
AF31
AF35
AF37
AF5
AF7
AF8
AG11
AG13
AG15
AG17
AG19
AG21
AG23
AG25
AG27
AG30
AG31
AG5
AG7
AG9
AH1
AH10
AH12
AH14
AH16
AH18
AH20
AH22
AH24
AH26
AH28
AH29
AH31
AH33
AH37
AH5
AH7
AH8
AJ11
AJ13
AJ17
AJ19
AJ23
AJ25
AJ3
AJ30
AJ31
AJ35
AJ7
AJ9
AK10
AK14
AK16
AK18
AK20
AK22
AK26
AK28
AK5
AK7
AK8
AL1
AL10
AL13
AL15
AL19
AL2
AL21
AL23
AL25
AL27
AL29
AL31
AL32
AL33
AL36
AL37
AL5
AL7
AL9
AM11
AM12
AM17
AM2
AM22
AM24
AM28
AM32
AM36
AM5
AM6
AM7
AM8
AN1
AN10
AN12
AN14
AN15
AN17
AN19
AN20
AN21
AN24
AN26
AN27
AN29
AN31
AN32
AN37
AN6
AN7
AN8
AN9
AP10
AP15
AP20
AP23
AP24
AP27
AP3
AP32
AP33
AP35
AP5
AP6
AP8
AP9
AR1
AR10
AR11
AR13
AR15
AR16
AR18
AR20
AR22
AR23
AR24
AR25
AR27
AR28
AR30
AR32
AR37
AR6
AR8
AT1
AT10
AT12
AT14
AT15
AT17
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
U3900
H9M
BGA
SYM 16 OF 18
OMIT_TABLE
CRITICAL
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AT19
AT20
AT21
AT23
AT24
AT26
AT27
AT29
AT3
AT31
AT32
AT34
AT35
AT37
AT4
AU1
AU10
AU15
AU2
AU20
AU23
AU24
AU27
AU32
AU33
AU36
AU37
AU6
AU8
AV1
AV10
AV11
AV13
AV15
AV16
AV18
AV2
AV20
AV22
AV25
AV27
AV28
AV3
AV30
AV32
AV33
AV35
AV36
AV37
AV6
B1
B11
B13
B16
B19
B2
B22
B24
B31
B34
B36
B37
B5
B6
C1
C11
C22
C23
C24
C25
C26
C27
C28
C29
C3
C30
C31
C32
C33
C35
C37
C4
C5
C6
C7
C9
D1
D10
D11
D12
D13
D14
D16
D17
D19
D20
D22
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D35
D36
D37
D5
D6
D8
E11
E12
E13
E14
E15
E16
E17
E18
E19
E20
E21
E22
E24
E25
E26
E27
E28
E29
E3
E30
E31
E32
E33
E34
E35
E36
E5
E6
F1
F11
F12
F13
F14
F15
F16
F17
F18
F19
F20
F24
F25
F28
F29
F30
F31
F32
F33
F34
F35
F36
F37
F5
F6
F7
F9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
U3900
H9M
BGA
SYM 17 OF 18
OMIT_TABLE
CRITICAL
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
G10
G15
G17
G19
G2
G21
G24
G26
G28
G30
G31
G32
G33
G36
G6
G7
G8
H1
H10
H12
H14
H16
H18
H2
H20
H24
H26
H29
H31
H33
H36
H37
H5
H7
H9
J17
J19
J21
J23
J25
J27
J30
J31
J7
J8
K10
K12
K14
K16
K18
K20
K22
K24
K26
K28
K29
K3
K31
K33
K35
K5
K7
K9
L1
L11
L13
L15
L17
L19
L21
L23
L25
L27
L30
L31
L37
L7
L8
M10
M12
M14
M16
M18
M20
M22
M24
M26
M28
M29
M31
M7
M9
N1
N11
N13
N15
N19
N21
N23
N25
N27
N3
N30
N31
N33
N35
N37
N5
N7
N8
P10
P12
P14
P18
P20
P22
P24
P26
P28
P29
P31
P5
P7
R11
R13
R15
R17
R19
R21
R23
R25
R27
R30
R31
R7
R8
T1
T10
T12
T14
T16
T18
T20
T22
T24
T26
T28
T29
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
U3900
H9M
BGA
SYM 18 OF 18
OMIT_TABLE
CRITICAL
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
T3
T31
T33
T35
T37
T5
T7
U11
U13
U15
U17
U19
U21
U23
U25
U27
U30
U31
U7
U8
V1
V10
V12
V14
V16
V20
V22
V24
V26
V28
V29
V3
V31
V35
V37
W11
W13
W15
W17
W19
W2
W21
W23
W25
W27
W30
W31
W33
W36
W5
Y10
Y12
Y14
Y16
Y2
Y20
Y22
Y24
Y26
Y28
Y29
Y31
Y36
D
C
B
A
8
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
PAGE TITLE
A
SoC Ground
DRAWING NUMBER
051-05198
Apple Inc.
REVISION
6.0.0
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
BOM_COST_GROUP=SOC
67
35 4
IV ALL RIGHTS RESERVED
2
BRANCH
evt-3
PAGE
46 OF 150
SHEET
30 OF 109
1
SIZE
D
D
www.haojiyoubbs.com
QQ微信：181806465
23C6
23C6
23C6
Boot Config
OUT
OUT
OUT
BOOT_CONFIG0
BOOT_CONFIG1
BOOT_CONFIG2
BOOTCFG0
1
R4700
1K
5%
1/20W
MF
201
2
BOOTCFG1
1
R4701
1K
5%
1/20W
MF
201
2
PP1V8_AWAKE
BOOTCFG2
1
R4702
1K
5%
1/20W
MF
201
2
678
74B6 32A7
BOOTCFG2
31D5 31C6 26A7 23A7
0
0
1
1
BOOTCFG0
0
1
BOOTCFG1
0
1
0
1
Test Mode
Disabled
Enabled
Frequency
40 MHz
6 MHz
24 MHz
Invalid
24B6
IN
PLACE_NEAR=U3900.M5:5MM
SMC_PECI_TX
5%
3 245
PECI Level Shifting
PP1V05_S0_CPU_VCCST
U4750
5
SN74AUC1G126
SC70
4
Y
CRITICAL
1
BYPASS=U4750::5MM
R4750
0
21
SMC_PECI_TX_R
MF
C4750
0.1UF
X5R-CERM
02011/20W
10%
10V
0201
2
A
OE
1
3
2
1
75B3
D
C
Board ID
PP1V8_AWAKE
BOARDID0
1
R4710
3.0K
5%
1/20W
MF
201
2
25C1 31B4
OUT
25C1 31B1
OUT
25C3 31B1
OUT
32C6 51D8
OUT
25B3 32B6
OUT
32C6 51D8
OUT
SPI_SOCROM_CLK
SPI_SOCROM_MOSI
SPI_SOCROM_MISO
SPI_TPAD_MOSI
SPI_TPAD_MISO
SPI_TPAD_CLK
BOARDID1
1
R4711
3.0K
5%
1/20W
MF
201
2
BOARDID2
1
R4712
3.0K
5%
1/20W
MF
201
2
BOARDID3
1
R4713
3.0K
5%
1/20W
MF
201
2
BOARDID4
1
R4714
3.0K
5%
1/20W
MF
201
2
BOARDID5
1
R4715
3.0K
5%
1/20W
MF
201
2
74B6 32A7
26A7 23A7
31D6 31C6
24B6
Board Revision
PP1V8_AWAKE
74B6 32A7 31D6 31D5 26A7 23A7
PP1V8_SLPS2R
74C6
PP1V8_S5
75B1
BYPASS=U4755::5MM
C4755
0.1UF
10%
10V
X5R-CERM
0201
1
2
6
1
VCCAVCCB
U4755
BYPASS=U4755::5MM
1
C4756
0.1UF
10%
10V
2
X5R-CERM
0201
SLSV1T34AMU-COMBO
NC
2
CPU_PECI
5
NC
R4755
330
5%
1/20W
MF
201
1
2
OUT
SMC_PECI_RX
4
B A
UDFN
CRITICAL
GND
3
PCH PM Level Shifting
6D5
BI
PP3V3_S5
74B2 17C7 16A7
C
B
23C6
23C6
25C3
PP1V8_AWAKE
74B6
23B6 23B6
OUT
OUT
OUT
BOARDREV0
1
R4720
1K
5%
1/20W
MF
201
2
BOARDREV1
1
R4721
1K
5%
1/20W
MF
201
2
BOARDREV2
1
R4722
1K
5%
1/20W
MF
201
2
BOARD_REV0
BOARD_REV1
BOARD_REV2
SEP EEPROM
(Write: 0xA2, Read 0xA3)
BYPASS=U4730::3MM
1
8
VCC
U4730
M24128
EEPROM
E2
MLP
E1
E0
WC*
SCL SDA
VSS
THM_P
4
9
56
2.2K
5%
1/20W
MF
201
1
2
SEP_WP
3
2
1
7
R4730
I2C_SEP_SCL I2C_SEP_SDA
10K
5%
1/20W
MF
201
1
2
R4732
C4730
0.1UF
10%
10V
2
X5R-CERM
0201
Also available in
CSP package 335S0946
13D8 10B3 8C7 8A5 6D6
75B4 64A2 54B3 16C7
1
R4731
2.2K
5%
1/20W
MF
201
2
BIIN
77D2
THRMTRIP# Isolation
PP1V05_S0_CPU_VCCST
BYPASS=U4740::3MM
C4740
0.1UF
X5R-CERM
6D5 62D6 77C2 80A6
77C2
13A6 13D6 17A4
17B4 17D8 20C5 20D5
IN
IN
PM_THRMTRIP_L
PLT_RST_L
10%
10V
0201
BYPASS=U4760::5MMBYPASS=U4760::5MM
C4760
0.1UF
X5R-CERM
24B6
IN
24B6
IN OUT
24B6
IN
24B6
IN
PP1V8_S5
1
2
3
7
8
1
4
2
U4740
74AXP1T57
SOT833
6
5
1
2
CPU_SMC_THRMTRIP_L
SMC_SYSRST_L PM_SYSRST_R_L
SMC_PCH_SYS_PWROK
SMC_PCH_PWROK
SMC_RSMRST_L
100K
5%
1/20W
MF
201
2
1
R4762
100K
5%
1/20W
MF
201
R4770
1
2
100K
1/20W
R4763
100K
1/20W
201
1
5%
MF
201
2
5%
MF
BYPASS=U4740.8:5:3MM
C4741
0.1UF
10%
10V
X5R-CERM
0201
P2MM
SM
1
PP
PP4700
R4760
100K
75B1
5%
1/20W
MF
201
74B6
OUT
2
R4761
1
PP1V8_AWAKE
24C6
IN
1
10%
10V
2
0201
1
2
R4771
10K
5%
1/20W
MF
201
6
1A1
8
2A1
4
1DIR
1
1OE*
7
1A2
9
2A2
5
2DIR
16
2OE*
SoC ROM
1
2
3
U4760
SN74AVC4T245RSV
CRITICAL
SCLK SI/SIO0
2
VCCBVCCA
PQFP
GND
11
10
8
VCC
U4770
4MX8-1.8V
USON
15
1B1
13
2B1
14
1B2
12
2B2
CRITICAL
1
C4765
0.1UF
10%
10V
2
X5R-CERM
0201
1
R4765
100K
5%
1/20W
MF
201
2
56
BYPASS=U4770::5MM
1
C4770
0.1UF
10%
10V
2
X5R-CERM
0201
SPI_SOCROM_MOSISPI_SOCROM_CLK
1
R4767
100K
5%
1/20W
MF
201
2
1
R4766
100K
5%
1/20W
MF
201
2
1
R4768
100K
5%
1/20W
MF
201
2
R4769
2.2K
MF1/20W
2015%
21
PM_SYSRST_L
PM_PCH_SYS_PWROK
PM_PCH_PWROK_R
PM_RSMRST_R_L
OUT
OUT
OUT
13D6 15C1
77C2
13C6 77C2
16A7
17C8
B
25C1 31C8 25C1 31C8
IN
MX25U3235F
R4773
21
SPI_SOCROM_MISOSPI_SOCROM_MISO_R
MF 1/20W202015%
OUT
25C3 31C8
25C3
IN
SPI_SOCROM_CS_L
SPI_SOCROM_WP_L
1
CS*
3
WP*/SIO2
7
RESET*/SIO3
VER 2
GND
SO/SIO1
EPAD
EPAD
2
PLACE_NEAR=U4770.2:5MM
A
PP1V8_SLPS2R
74C6
SMC AVREF Supply
Footprint supports 353S01042 alternate
U4780
REF3312AIRSE
UQFN-COMBO
5
IN
OUT
8
CRITICAL
BYPASS=U4780::3MM BYPASS=U4780::3MM
20%
6.3V
X5R
1
2
GND
4
C4780
1.0UF
0201-1
NC0
NC1
NC2
NC3
NC4
1
NC
2
NC
3
NC
6
NC
7
NC
PP1V25_SLPS2R_SMC_AVREF
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
VOLTAGE=1.25V
1
C4781
1.0UF
20%
6.3V
2
X5R
0201-1
GND_SMC_AVSS
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
VOLTAGE=0V
PROCHOT# Level Shifting
PP1V8_S5
75B1
24A3
24B6 32B1 54C2
IN
24A4 38B1 38C1 38C3 38D1 38D5 39A4 40A2 41D1
R4790
10K
1/20W
201
SMC_PROCHOT_L
5%
MF
10
9
4
rdar://problem/34583713
BYPASS=U4790::3MM
1
2
6
VCC
U4790
74LVC1G07FW5
DFN1010
2
A
1
GND
3
4
Y
5
NCNC
CRITICAL
1
C4790
0.1UF
10%
10V
2
X5R-CERM
0201
CPU_PROCHOT_OUT_L
NCNC
R4791
75
21
1%
1/20W
MF
201
CPU_PROCHOT_L
OUT
6D6
PAGE TITLE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
BOM_COST_GROUP=SOC
IV ALL RIGHTS RESERVED
SoC Shared Support
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
47 OF 150
SHEET
31 OF 109
A
SIZE
D
8
67
35 4
2
1
Alternate Feedback Sense
www.haojiyoubbs.com
QQ微信：181806465
678
3 245
1
D
74D6 27D7
74D6 27B7
PLACE_NEAR=U3900.AA12:5MM
PPVDDCPU_AWAKE
PLACE_NEAR=U3900.AA20:5MM
PP0V82_SLPDDR
14D6
14D6
14D6
14D6
14D6
14D6
14C6
14D6
IN
IN
IN
IN
IN
IN
IN
PCIE_SOC_R2D_C_P<0>
PCIE_SOC_R2D_C_N<0>
PCIE_SOC_R2D_C_P<1>
PCIE_SOC_R2D_C_N<1>
PCIE_SOC_R2D_C_P<2>
PCIE_SOC_R2D_C_N<2>
PCIE_SOC_R2D_C_P<3>
PCIE_SOC_R2D_C_N<3>
XW4820
SM
21
PVDDCPUAWAKE_FB_R
XW4821
SHORT-L5-SM
21
P0V8SLPDDR_FB_R
layer 5 short - for routing
PCIe Up R2D AC Caps
(All Caps Except C4822, C4823)
GND_VOID=TRUE
C4820
0.22UF
C4821
0.22UF
C4822
0.22UF
C4823
0.22UF
C4824
0.22UF
C4825
0.22UF
C4826
0.22UF
C4827
0.22UF
21
20% 0201
21
20% 0201
21
20% 0201
21
20%
21
20% 0201
21
6.3V20% 0201
21
20% 0201
21
20% 0201
R4820
R4821
X5R6.3V
X5R6.3V
X5R6.3V
X5R6.3V 0201
X5R6.3V
X5R
X5R6.3V
X5R6.3V
NOSTUFF
21
21
PLACE_NEAR=R7806.1:5MM
PVDDCPUAWAKE_FB
0
5% 0201
1/20W MF
PLACE_NEAR=R7812.1:5MM
P0V8SLPDDR_FB
0
5% 0201
1/20W MF
PCIE_SOC_R2D_P<0>
PCIE_SOC_R2D_N<0>
PCIE_SOC_R2D_P<1>
PCIE_SOC_R2D_N<1>
PCIE_SOC_R2D_P<2>
PCIE_SOC_R2D_N<2>
PCIE_SOC_R2D_P<3>
PCIE_SOC_R2D_N<3>
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUTIN
26D6
26D6
26D6
26D6
26D6
26D6
26D6
26D6
OUT
OUT
60C4
60C4
J4800
INTERPOSER-AMR-MLB
SMT-PAD
8
7
6
5 4
1
2
3
OMIT_TABLE
77A4
49D6
J4801
INTERPOSER-AMR-MLB
SMT-PAD
8
7
6
5 4
1
2
3
OMIT_TABLE
77A4
49D6
Lid Detect Sensors
LID_OPEN_LEFT
PP1V8_SLPS2R
Clamshell Open = High
Clamshell Closed = Low
LID_OPEN_RIGHT
PP1V8_SLPS2R
74C6
74C6
32D4 32D3
32D4 32D3
R4804
10K
1/20W
5%
MF
201
21
R4805
10K
1/20W
5%
MF
201
21
74C6 32D4
SMC_LID_LEFT
SMC_LID_LEFT
MAKE_BASE=TRUE
PP1V8_SLPS2R
BYPASS=U4802::5MM
SMC_LID_RIGHT
SMC_LID_RIGHT
MAKE_BASE=TRUE
C4802
0.1UF
10%
6.3V
CERM-X5R
0201
24B3
OUT
D
1
2
2
1
NC
5 3
NC
OUT
U4802
6
74LVC1G32
SOT891
24B3
4
IPD_LID_OPEN
35D8 51D2 77A4 77A8
OUT
C
B
A
25B3
25B3
47B8 47C8
25B3
25B3
48B8 48C8
25A3
25A3
46B1 78D4
25B3
25B3
51D8
25B3
25B3
35B7 35D5 77C8
25B3
25B3
26A6
24D3
24D3
24C6
23C6
24B3
72D5 70C7 69C7 68C7 67C7 24A3
72D5 70C7 69C7 68C7 67C7 24A3
24C6
24B3
24B3
24B3
24B3
23D3
GPIO Source Termination
IN
IN
IN OUT
IN OUT
IN
IN OUT
IN
IN
IN OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN OUT
I2S_SPKRAMP_L_R2D_R
PLACE_NEAR=U3900.AG34:5MM
I2S_SPKRAMP_L_BCLK_R
PLACE_NEAR=U3900.AA32:5MM
I2S_SPKRAMP_L_LRCLK_R
PLACE_NEAR=U3900.AA32:5MM
I2S_SPKRAMP_R_R2D_R
PLACE_NEAR=U3900.C20:5MM
I2S_SPKRAMP_R_BCLK_R
PLACE_NEAR=U3900.C21:5MM
I2S_SPKRAMP_R_LRCLK_R
PLACE_NEAR=U3900.C21:5MM
I2S_CODEC_R2D_R
PLACE_NEAR=U3900.AB34:5MM
I2S_CODEC_BCLK_R
PLACE_NEAR=U3900.AF33:5MM
I2S_CODEC_LRCLK_R
PLACE_NEAR=U3900.AF33:5MM
SPI_TPAD_MOSI_R
PLACE_NEAR=U3900.N34:5MM
SPI_TPAD_CLK_R
PLACE_NEAR=U3900.P35:5MM
SPI_TPAD_MISO_R
PLACE_NEAR=U6860.4:2MM
SPI_MESA_MOSI_R
PLACE_NEAR=U3900.A20:5MM
SPI_MESA_CLK_R
PLACE_NEAR=U3900.C19:5MM
SPI_DFR_MISO_R
PLACE_NEAR=J5100.7:7MM
SPI_DFR_MOSI_R
PLACE_NEAR=U3900.C18:5MM
SPI_DFR_CLK_R
PLACE_NEAR=U3900.B18:5MM
SSD0_CLK24M_R
PLACE_NEAR=U3900.AP7:7MM
PDM_DMIC_CLK0_R
PLACE_NEAR=U3900.AP7:5MM
IN OUT
PDM_DMIC_CLK1_R
PLACE_NEAR=U3900.AV7:5MM
R4843
R4844
R4863
R4845
R4846
R4864
R4847
R4848
R4865
R4851
R4852
R4867
R4853
R4854
R4866
R4855
R4856
R4857
R4859
R4860
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
21
I2S_SPKRAMP_L_R2D
5% 201
1/20W MF
21
I2S_SPKRAMP_L_BCLK
5% 201
1/20W MF
21
I2S_SPKRAMP_L_LRCLK
5% 201
1/20W MF
21
I2S_SPKRAMP_R_R2D
5% 201
1/20W MF
21
I2S_SPKRAMP_R_BCLK
5% 201
1/20W MF
21
I2S_SPKRAMP_R_LRCLK
5% 201
1/20W MF
21
I2S_CODEC_R2D
5% 201
1/20W MF
21
I2S_CODEC_BCLK
5% 201
1/20W MF
21
I2S_CODEC_LRCLK
5% 201
1/20W MF
21
SPI_TPAD_MOSI
5% 201
1/20W MF
21
SPI_TPAD_CLK
5% 201
1/20W MF
21
SPI_TPAD_MISO
5% 201
1/20W MF
21
SPI_MESA_MOSI
5% 201
1/20W MF
21
SPI_MESA_CLK
5% 201
1/20W MF
21
SPI_DFR_MISO
5% 201
1/20W MF
21
SPI_DFR_MOSI
5% 201
1/20W MF
21
SPI_DFR_CLK
5% 201
1/20W MF
21
SSD0_CLK24M
1/20W5%
21
PDM_DMIC_CLK0
5% 201
1/20W MF
21
PDM_DMIC_CLK1
5% 201
1/20W MF
MF
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
201
OUTIN
SOC Overloaded GPIOs
DFR_TOUCH_INT_L
MESA_INT
TPAD_KBD_WAKE_L
SSD0_SWCLK
SSD0_SWDIO
TPAD_SPI_INT_L
TPAD_ACTUATOR_DISABLE_L
SMC_DPWROK1V8
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
DFR_TOUCH_INT_L
MESA_INT
TPAD_KBD_WAKE_L
SSD0_SWCLK
SSD0_SWDIO
TPAD_SPI_INT_L
TPAD_ACTUATOR_DISABLE_L
SMC_DPWROK1V8
Platform-Specific GPIOs
DP_INT_HPD_L
DP_INT_HPD_MASK
SOC_KBD_BKLT_PWM
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
DP_INT_HPD_L
DP_INT_HPD_MASK
SOC_KBD_BKLT_PWM
Project Specific Pull-Ups
PP1V8_SLPS2R
R4895
100K
PP1V8_AWAKE
R4883
R4884
R4887
R4888
R4885
R4886
R4870
47K
47K
47K
47K
100K
47K
47K
21
5% 201
1/20W MF
21
5% 201
21
21
21
21
21
21
1/20W MF
5% 201
1/20W MF
5% 201
1/20W MF
5% 201
1/20W MF
5% 201
1/20W MF
5% 201
1/20W MF
1/20W MF
5% 201
81B8 74C6 23A7
SSD_PMU_RESET_L
74B6 31D6 31D5 31C6 26A7 23A7
SSD0_CLKREQ0_L
SSD0_CLKREQ1_L
SSD0_CLKREQ2_L
SSD0_CLKREQ3_L
SSD0_PCIE_RESET_L
SSD0_CLK24M
I2S_SPKRAMP_R_D2R
23C6 71B7 77A2
26A6 67C3
26A6 68C3
26A6 69C3
26A6 70C3
26A6 67C7 68C7 69C7 70C7
32B6 67C2 69C1
25B3
47B8 47C8
47B8 47C8
25B3
48B8 48C8
48B8 48C8
25B3
46B1 78D4
46B1 78D4
25A3
31C8 51D8
31C8 51D8
25B3 31C8
33D3
33D3
25B3
35D7 77D8
35D5 77C8
32A6 67C2 69C1
49C6 77D7
49C6 77D7
35B7 35C5 77C8
33D8
51B3 51D2 77A8
51C4
51B4
16A5
32C5
12C2 32C3
65B8
HPD KSF Comp Circuit
R4830 needs to be characterized and adjusted if necessary
74B2 32C3 32B2
R4830
66C1 77D5
DP_INT_HPD
32A6
DP_INT_HPD_L
Q4830
6
D
DMN33D8LV
SOT563 SOT563
VER-1
1
G
S
2
4.7K
1/20W
DMN33D8LV
BOM GROUP BOM OPTIONS
21
5%
MF
201
Q4830
VER-1
CPU_DP_INT_HPD
3
D
G
S
4
5
DP_INT_HPD_MASK
OUTIN
IN
5A6 5D3
12C2 32A6
74B2 32C3 32B2
76C3
IN
PP3V3_S5
PP3V3_S5
UVP_DIS_L
PBUS Droop Circuit
BYPASS=U4800::5MM
1
C4803
0.1UF
10%
2
6.3V
CERM-X5R
0201
1
R4806
100K
74B2 32C3
PBUS_DIVIDER_OUT
1
5%
1/20W
MF
201
2
NC
NC
NC
PP3V3_S5
BYPASS=U4801::5MM
TABLE_BOMGROUP_HEAD
TABLE_BOMGROUP_ITEM
SLG4AP41473
2 3
ENABLE
9
COMP_INPUT
5
8
NC
11
10%
6.3V
0201
1
2
C4804
0.1UF
CERM-X5R
CRITICAL
U4801
LMV331
SC70-5
4
VDD
U4800
STQFN
DUMMY_OUTPU_COMP
CRITICAL
THROTTLE*_TEST_OUTPUT
GND
7
5
VCC+
GND
2
VREF_1V2
CPU_THROTTLE*
GPU_THROTTLE*
3
1
PBUS_DIVIDER
NC
10
PBUS_DIVIDER_REF
12
SMC_PROCHOT_L
6
4
NC
NC
NOSTUFF
1
C4805
0.1UF
10%
2
6.3V
CERM-X5R
0201
OUT
127K/(127K+665K)=0.16
PPBUS_G3H
1
R4802
665K
0.1%
1/20W
TK
0201
2
1
R4800
127K
0.1%
1/20W
MF
0201
2
54C2
24B6
31A6
C
B
75D7
BOARD_REV:000
TABLE_BOMGROUP_ITEM
BOARD_REV:001 BOARDREV0
TABLE_BOMGROUP_ITEM
BOARD_REV:010 BOARDREV1
TABLE_BOMGROUP_ITEM
BOARD_REV:011 BOARDREV1,BOARDREV0
TABLE_BOMGROUP_ITEM
BOARDREV2BOARD_REV:100
TABLE_BOMGROUP_ITEM
BOARD_REV:101 BOARDREV2,BOARDREV0
BOARDREV2,BOARDREV1BOARD_REV:110
BOARDREV2,BOARDREV1,BOARDREV0BOARD_REV:111
BOM GROUP BOM OPTIONS
BOARD_ID
BOARDID1,BOARDID2,BOARDID3,BOARDID4,BOARDID5
TABLE_BOMGROUP_ITEM
SYNC_MASTER=myEE SYNC_DATE=03/01/2019
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_HEAD
TABLE_BOMGROUP_ITEM
BOM_COST_GROUP=SOC
PAGE TITLE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
SoC Project Support
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
48 OF 150
SHEET
32 OF 109
SIZE
A
D
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
ISOLATE FROM OTHER COMPONENTS/NETS AS MUCH AS POSSIBLE
ESD Filters
R4912
0
21
25B3 33A1 32B6
OUT
SPI_MESA_MISO SPI_MESA_MOSI_CONN
5%
1/20W
MF
0201
R4953
32B6
OUT
MESA_INT
680
5%
1/20W
MF
201
R4954
MESA_BOOST_EN MESA_BOOST_EN_CONN
33A1 33B7 33D4 77D7
680
1/20W
5%
MF
201
21
SPI_MESA_MISO_CONN
1
C4952
56PF
5%
25V
2
NP0-C0G
0201
21
MESA_INT_CONN
1
C4953
100PF
5%
25V
2
C0G
0201
1
C4954
100PF
5%
25V
2
C0G
0201
33D4 77D7
33D4 77D7
T151 FLEX CONNECTOR
ISOLATE FROM OTHER COMPONENTS/NETS AS MUCH AS POSSIBLE
PLUG (516S00115) - X434/ X435 Jumper
RECEPTACLE (516S00203) - MLB
PP3V0_MESA_FILT_CONN
33B3 77D7
J4900
505066-1222
F-ST-SM1
14 13
PMU_ONOFF_R_L_CONN
33C4 77B2 77D7
SPI_MESA_MOSI_CONN
33D4 77D7
SPI_MESA_CLK_CONN SPI_MESA_MISO_CONN
33D4 77D7 33D6
2 1
4 3
6 5
8 7
10 9
12 11
16 15
PP1V8_MESA_FILT_CONN
Connects to Apache GPIO0
MESA_INT_CONN
MESA_BOOST_EN_CONN
PP16V0_MESA_FILT_CONN
33A4 77D7
77D7
33D6 77D7
33C6 77D7
33C3 77D7
ESD Filters
1
R4950
0
33D6 77D7
C4950
56PF
5%
25V
NP0-C0G
0201
2
1
2
2 1
5%
1/20W
MF
0201
R4951
56
33D6 77D7
SPI_MESA_CLK_CONN
5%
25V
0201
1
2
C4951
56PF
NP0-C0G
2 1
5%
1/20W
MF
201
R4911
0
33D6 77B2 77D7
PMU_ONOFF_R_L_CONN
5%
25V
C0G
0201
1
2
C4955
100PF
2 1
5%
1/20W
MF
0201
SPI_MESA_MOSI
SPI_MESA_CLK
PMU_ONOFF_R_L
IN
IN
32B6
75B4 33C8 33B8 33A8
PP1V8_SLPS2R
74C6
PP3V3_G3H_RTC_MESA
1
R4971
100K
5%
1/20W
MF
201
2
1
2
1
C4956
0.1UF
10%
10V
2
X5R-CERM
0201
U4901
74AUP1T97
5
SOT891
4
PMU_ONOFF_BUF_L
6
3
D
C
Output Voltage
Iout (max avg)
OCP (min)
Active Discharge
Max Output Cap
75B4 33D2 33B8 33A8
16.0V +/- 2%
6mA
13 mA
15 mA sink
0.5uF @ 16V
PLACE_NEAR=U4900:5MM
1.0UH-0.4A-0.636OHM
PP3V3_G3H_RTC_MESA
BYPASS=U4900.A2::3MM
L4901
0402
C4910
10UF
20%
6.3V
CERM-X5R
0402-9
R4915
0
Mesa Power Sequencing Requirements
Power On: 1V8 -> 3V3 -> 16V0
2 1
MF
5%
1/20W
PMU_ONOFF_L
0201
52C4 62A6 62C3 81C5
OUT
81C7
C
EMC Filter
MOJAVE 16V BOOST
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1200
Load Cap:6.6uF nom
EDP:13.75mA
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=3.3V
DIDT=TRUE
PP3V3_G3H_MESA_SW
21
MESA_BOOST_EN
1
2
33A1 33C7
B1
A2
B2
A3
C2
SW
VIN
EN_M
EN_S
LDOIN
U4900
LM3638A0
BGA
AGNDPGND
A1
B3
VOUT
PMID
1
C4924
2.2UF
20%
25V
2
X5R
C3
VOLTAGE=17V
PP17V0_MOJAVE_LDOIN
C1
0402-3
1
C4923
2
2.2UF
20%
25V
X5R
0402-3
1
C4925
2.2UF
20%
25V
2
X5R
0402-3
VOLTAGE=16V
PP16V0_MESA
1
C4926
56PF
5%
25V
2
NP0-C0G
0201
BYPASS=U4900.C3::3MM
BYPASS=U4900.C3::4MM
BYPASS=U4900.C3::5MM
FL4900
80-OHM-25%-500MA
21
0201
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1200
VOLTAGE=16V
PP16V0_MESA_FILT_CONN
1
C4927
100PF
5%
25V
2
C0G
0201
33D4 77D7
B
Output Voltage
Iout (max avg)
Dropout Voltage
Active Discharge
75B4 33D2 33C8 33A8
Output Voltage
Iout (max avg)
Dropout Voltage
OCP (min)
3.0V +/- 2%
250mA
155mV
250 mAOCP (min)
280 Ohm Typ
PP3V3_G3H_RTC_MESA
1
C4911
1UF
10%
10V
2
X5R-CERM
0402
BYPASS=U4910.4::3MM
33A2 33A6
1.825V +/- 2%
250mA
50mV Typ @ 100mA
250 mA
PP1V8_MESA
3.0V MESA
U4910
NCP160AMX300
4
IN
3
EN
XDFN-COMBO-THICKSTNCL
1.8V MESA
B
EMC Filter
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1200
VOLTAGE=3.0V
MIN_LINE_WIDTH=0.2000
Load Cap:14.3uF nom
EDP:100mA
PP3V0_MESA PP3V0_MESA_FILT_CONN
1
OUT
BYPASS=U4910.1::3MM
1
EPADGND
5
2
C4916
1UF
10%
10V
2
X5R-CERM
0402
1
C4920
2.2UF
20%
6.3V
2
X5R-CERM
0201
1
C4921
2.2UF
20%
6.3V
2
X5R-CERM
0201
1
C4922
2.2UF
20%
6.3V
2
X5R-CERM
0201
FL4910
80-OHM-25%-500MA
21
0201
1
2
C4928
0.1UF
10%
10V
X6S-CERM
0201
MIN_NECK_WIDTH=0.1200
VOLTAGE=3.0V
1
C4929
100PF
5%
25V
2
C0G
0201
33D6 77D7
PP1V8_G3S
R4922
PP1V8_MESA
R4924
R4923
100K
100K
100K
75C1
21
33A6 33B7
21
21
MF1/20W 2015%
MESA_PWR_EN
SPI_MESA_MISO
201MF1/20W5%
MESA_BOOST_EN
MF 2015% 1/20W
23C6 33A7
25B3 33D8
33B7 33C7
A
75B4 33D2 33C8 33B8
Active Discharge
PP3V3_G3H_RTC_MESA
1
C4912
1UF
10%
10V
2
X5R-CERM
0402
BYPASS=U4920.4::3MM
8
230 Ohm Typ
10uFMax Output Cap
23C6 33A1
MESA_PWR_EN
IN
U4920
LP5907SNX-1.825
X2SON-COMBO-THICKSTNCL
VIN
3
EN
2
VOUT
EPADGND
5
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1200
VOLTAGE=1.825V
Load Cap:3.4uF nom
EDP:0.5mA
PP1V8_MESA
33A2 33B7
14
BYPASS=U4920.1::3MM
1
C4914
1UF
10%
10V
2
X5R-CERM
0402
67
EMC Filter
FL4920
80-OHM-25%-500MA
21
0201
1
C4918
2.2UF
20%
6.3V
2
X5R-CERM
0201
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1200
VOLTAGE=1.825V
PP1V8_MESA_FILT_CONN
1
C4917
100PF
5%
25V
2
C0G
0201
33D4 77D7
BOM_COST_GROUP=T151
35 4
SYNC_MASTER=X1795_MIHIR SYNC_DATE=05/17/2019
PAGE TITLE
T151
SIZE
D
Apple Inc.
DRAWING NUMBER
051-05198
REVISION
6.0.0
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
2
BRANCH
evt-3
PAGE
49 OF 150
SHEET
33 OF 109
1
A
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
VENUS
D
C
75C1 34C6 34A8
75A5
75C1 34D6 34A8
PP1V8_G3S
BYPASS=U5000::3MM
PP3V3_G3S
BYPASS=U5000::3MM
ALWAYS ON GPIOS
76B3
OUT
SE_HOST_WAKE_R
PP1V8_G3S
C5003
1.0UF
20%
6.3V
X5R
0201-1
R5012
R5013
BYPASS=U5000::3MM
1
2
BYPASS=U5000::3MM
1
C5001
2.2UF
20%
6.3V
2
X5R-CERM
0201
C5012
47K
201
47K
MF
R5016
1
R5015
22K
5%
1/20W
MF
201
2
0.1UF
10%
10V
X5R-CERM
0201
23D6 34A7
IN
5%
5%
25B6 34A7
IN
25B6 34A7
25B6 34A7
IN
25B6 34A7
BYPASS=U5000::3MM
1
2
1
C5002
2.2UF
20%
6.3V
2
X5R-CERM
0201
SE_CTLR_FW_DWLD
21
21
1/20W201MF
1/20W
NFC_GPIO2_AO
NFC_GPIO3_AO
UART_SE_R2D_RTS_L
UART_SE_D2R_CTS_L
OUT
UART_SE_R2D
UART_SE_D2R
OUT
21
SE_HOST_WAKE
0201
5% 1/20W MF
0
23C6 34A7
SE_DEV_WAKE
IN
NFC_XTAL1
C5013
0.1UF
10%
10V
X5R-CERM
0201
1
2
1
2
BYPASS=U5000::3MM
C5011
1.0UF
20%
6.3V
X5R
0201-1
H8
NC
NC
NC
NC
NC
NC
NFC_CLK_REQ
J8
NFC_DWL_REQ
E4
NFC_GPIO0
F3
NFC_GPIO1
G6
NFC_GPIO2_AO
G5
NFC_GPIO3_AO
F2
NFC_HSU_CTS
F5
NFC_HSU_RTS
E3
NFC_HSU_RX
F4
NFC_HSU_TX
H7
NFC_IRQ
A5
NFC_SIM_SWIO1
B8
NFC_SIM_SWIO2
C8
NFC_SIM_SWIO3
G7
NFC_WKUP_REQ
G3
NFC_CLK_32K
H6
NFC_XTAL1
B7
B6
B5
PMUVCC2
PMUVCC1
NC
A7
A6
PMUVCC3
SIMVCC1
NC
NC
A8
SIMVCC2
SIMVCC3
E1
VBAT
NC
C1
C2
B1
H5
A3
VDDA
VBATPWR
VDDC
VDDBOOST
U5000
SN100VUK-B20147
WLCSP-1
OMIT_TABLE
C3
VDDIO
VDDCIN
DIS SEDIG NFC
B3
E5
VDDNV
VDDIO_SE
NC
H2
VDDPA
F1
H3
VDDPLL
VHV
PPVDD_SE_VDDA
PP_VDD_SE_VDDC
PP_VDD_SE_VDDNV
PP_VDD_SE_VDDPLL
PP_VDD_SE_VHV
PP_VDD_SE_VREF
NC
G1
D2
VUP
VREF
SE_GPIO0
SE_GPIO1
SE_I2C_SCL
SE_I2C_SDA
SE_ISO_CLK
SE_ISO_IO
SE_ISO_RST
SE_SPI_CLK
SE_SPI_CS
SE_SPI_MISO
SE_SPI_MOSI
BOOST_LX
F8
D4
G8
F7
D6
D7
D3
E8
E6
E7
D5
A1
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
1
C5016
0.1UF
10%
10V
2
X5R-CERM
0201
1
C5017
0.22UF
20%
6.3V
2
X5R
0201
MIN_NECK_WIDTH=0.0900MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900MIN_LINE_WIDTH=0.0900
MIN_LINE_WIDTH=0.0900MIN_NECK_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900MIN_LINE_WIDTH=0.0900
MIN_LINE_WIDTH=0.0900MIN_NECK_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900MIN_LINE_WIDTH=0.0900
1
C5018
0.22UF
20%
6.3V
2
X5R
0201
1
C5019
20%
6.3V
2
X5R
0201
1
C5020
0.22UF0.22UF
20%
6.3V
2
X5R
0201
1
C5004
0.22UF
20%
6.3V
2
X5R
0201
BYPASS=U5000::3MM
BYPASS=U5000::3MM
BYPASS=U5000::3MM
BYPASS=U5000::3MM
BYPASS=U5000::3MM
BYPASS=U5000::3MM
D
C
B
Avoid false wakeup
R5010
R5011
B4
NC
NC
NC
21
10K
10K
34A7 62B3
IN
SE_PWR_EN
5% 201
1/20WMF
21
5% 201
MF 1/20W
SE_RX_P
SE_RX_N
NC
NC
NC
NC
NC
NFC_SIM_SWCTRL1
C6
NFC_SIM_SWCTRL2
J7
NFC_XTAL2
J5
RXP
J4
RXN
J1
TX1
J3
TX2
G2
TXVCASC
H1
TXVCM
C4
VEN
J6
VTUNE
ANALOG SIGNAL
VSS_DIG
VSS_DIG
D8
C7
C5
VSS_DIG
VSS_NFC
G4
VSS_PA
H4
J2
VSS_PLL
VSS_PMU
D1
VSS_PWR
VSS_PWR
B2
A2
VSS_SUB
VSS_REF
A4
E2
B
VSS_SUB
F6
A
PP1V8_G3S
R5001
R5002
R5003
R5004
R5000
R5005
R5006
100K
100K
100K
100K
100K
100K
100K
75C1 34D6 34C6
21
5% 2011/20W MF
21
5% 201
21
5% 1/20W MF 201
21
5% 2011/20W MF
21
5% 2011/20W MF
21
21
5% 1/20W MF 201
MF1/20W
MF1/20W 2015%
UART_SE_R2D
UART_SE_D2R
UART_SE_R2D_RTS_L
UART_SE_D2R_CTS_L
SE_CTLR_FW_DWLD
SE_DEV_WAKE
SE_PWR_EN
25B6 34C6
25B6 34C6
25B6 34C6
25B6 34C6
23D6 34C6
23C6 34C5
EXTRA PULLDOWN ADDED
PER J152
998-15216 1 CRITICALU5000
IC,SN100V,VENUS,DEV KEY,B2,S/W-M,WLCSP72
IC,SN100V,VENUS,PROD KEY,B2,SW-N,WLCSP72
U5000 SE:PROD_20191 CRITICAL338S00445
CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION
SE:DEV_2019
SYNC_DATE=05/30/2019SYNC_MASTER=X1795_TAEWAN
PAGE TITLE
A
Secure Element
SIZE
D
BOM_COST_GROUP=SOC
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
50 OF 150
SHEET
34 OF 109
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
PP1V8_DFR
2
S
R5102
100K
32D2 51D2 77A4 77A8
IN
2 1
5%
1/20W
MF
201
IPD_LID_OPEN_RIPD_LID_OPEN
1
G
D
3
Q5100
DMP31D0UFB4
DFN1006H4-3
J5100
AA07-S022VA1
F-ST-SM
DFR_TOUCH_LID_OPEN_L
35B7 77D8
TP_DFR_TOUCH_GPIO2
77C8
25B3 77D8
IN
32B6 77D8
IN
37A6 77D8
IN
37A6 77D8
BI
L5100
1.2UH-20%-0.12A-1.17OHM
75B7 79D8
IN
PP5V_G3S
0402
21
C5100
4.7UF
BYPASS=J5100.22::10MM
BYPASS=J5100.22::10MM
20%
25V
X5R
0402
25D3 35B7 77C8
IN
1
2
SPI_DFR_CS_L
SPI_DFR_MOSI
I2C_DFR_SCL_R
I2C_DFR_SDA_R
DFR_TOUCH_RESET_L
PP5V_G3S_DFR_FILT
77C8
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=5.14V
1
C5101
4.7UF
20%
25V
2
X5R
0402
2 1
4 3
6 5
8 7
10 9
12 11
14 13
16 15
18 17
20 19
22 21
35B7 35C6 37B8 77C8 77D8 79D8
24
23
TP_DFR_TOUCH_PANEL_DETECT
77D8
DFR_DISP_VSYNC MIPI_DFR_CLK_FILT_CONN_P
77C8
SPI_DFR_MISO_R
SPI_DFR_CLK
DFR_TOUCH_CLK32K_RESET_L
TP_DFR_TOUCH_ROM_WC
NOSTUFF
25
26
1
C5104
0.1UF
10%
6.3V
2
X5R
0201
BYPASS=J5100.21::10MM
(Cumulus IPD)
77C8
IN
IN
OUT
IN
32B8 35B7 77C8
32B6 77C8
25C3 77C8
T139 Support
25D3 77D8
23C6 77D8
25D3 35B7 77D8 32B6 35B7 77C8 25D6
35C8 75A5
PP3V3_G3H_DFR
IN
OUT
OUT
IN
Disp Conn Touch Conn
J5110
DF40SG(1.5)-26DS-0.4V
DFR_DISP_TE
DFR_DISP_INT
DFR_DISP_RESET_LDFR_TOUCH_INT_L MIPI_DFR_DATA_N
VOLTAGE=3.3V
MIN_NECK_WIDTH=0.0900
MIN_LINE_WIDTH=0.0900
PP3V3_G3HSW_DFR
77D8
10%
6.3V
X5R
0201
1
2
C5110
0.1UF
F-ST-SM
28 27
2 1
4 3
6 5
8 7
10 9
12 11
14 13
16 15
18 17
20 19
22 21
24 23
26 25
30 29
GND
GND
GND
GND
78C5
77D8
78C5
MIPI_DFR_CLK_FILT_CONN_N
77D8
78D5
MIPI_DFR_DATA_FILT_CONN_P
77D8
78D5
77D8
MIPI_DFR_DATA_FILT_CONN_N
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=1.8V
I2C_DFR_SCL_R
I2C_DFR_SDA_R
IN
BI
37A6 77D8
37A6 77D8
BYPASS=J5110.17::3MM
1
2
PLACE_NEAR=J5110:5MM
PLACE_NEAR=J5110:5MM
L5110
3.25-OHM-0.1A-2.4GHZ
TAM0605-4SM
4
3 2
SYM_VER-2
L5111
3.25-OHM-0.1A-2.4GHZ
TAM0605-4SM
SYM_VER-2
C5111
1UF
10%
10V
X5R-CERM
0402
4
3 2
1
MIPI_DFR_CLK_P
MIPI_DFR_CLK_N
1
MIPI_DFR_DATA_P
IN
IN
IN
IN
D
25C6
25C6
25D6
C
35C5 75A5
IN
BYPASS=U5100.4::3MM
23D3
IN
DFR_PWR_EN
PP3V3_G3H_DFR
C5102
1UF
10%
10V
X5R-CERM
0402
R5101
1K
2 1
5%
1/20W
MF
201
PP1V8_DFR
35C6 35D6 37B8 77C8 77D8 79D8
U5100
NCP160AMX180
4
IN
1
2
R5107
DFR_PWR_EN_R
100K
5%
1/20W
MF
201
1
2
1
C5105
1UF
20%
16V
2
CER-X5R
0201
3
EN
XDFN-COMBO-THICKSTNCL
2
Output Voltage
Iout (max avg)
Dropout Voltage
OCP (min)
Active Discharge
EPADGND
5
1.8V +/- 2%
250mA
250mV
250 mA
280 Ohm Typ
OUT
1
Load Cap: 3.5uF nom
77D8 79D8
37B8 77C8
35D6
35B7
EDP: 57mA
PP1V8_DFR
1
C5103
1UF
10%
10V
2
X5R-CERM
0402
BYPASS=U5100.1::3MM
77A4
R5110
7.5K
1/20W
1%
MF
201
21
P1V8_DFR_R
1
Slew Rate
RDS(on)
Current
Active
Discharge
U5111
SLG5AP1449V
STDFN
ON
GND
4
2.5V/ms
40 mOhm Typ
55 mOhm Max
1A Max
150 Ohm Typ
BYPASS=J5110.22::3MM
2
D
3
S
EDP: 145mA
Load Cap: 22.2uF nom
C
B
DFR_TOUCH_RESET_L
25D3 35C7 77C8
DFR_TOUCH_INT_L
32B6 35C5 77C8
SPI_DFR_MISO_R
32B8 35D5 77C8
DFR_DISP_RESET_L
25D3 35C4 77D8
DFR_TOUCH_LID_OPEN_L
35D7 77D8
R5103
4.7K
5%
1/20W
MF
201
R5106
100K
5%
1/20W
MF
201
1
2
1
2
R5104
100K
5%
1/20W
MF
201
R5111
100K
5%
1/20W
MF
201
1
2
1
2
R5105
100K
5%
1/20W
MF
201
1
2
B
A
8
A
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
PAGE TITLE
T139 Support
DRAWING NUMBER
051-05198
Apple Inc.
REVISION
6.0.0
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
BOM_COST_GROUP=T139
67
35 4
IV ALL RIGHTS RESERVED
2
BRANCH
evt-3
PAGE
51 OF 150
SHEET
35 OF 109
1
SIZE
D
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
PCH S0 "SMBus 0" Connections
PCH
U0500
(MASTER)
SMBUS_PCH_CLK
12D2 15C6
MAKE_BASE=TRUE
SMBUS_PCH_DATA
12D2 15C6
MAKE_BASE=TRUE
PP3V3_S5
74B2
R5200
5%
1/20W
MF
201
SMC I2C "3" S0 Connections
PP1V8_S5
75B1
1
2.2K
5%
1/20W
MF
201
1
2
R5251
2.2K
5%
1/20W
MF
201
2
R5252
100K
5%
1/20W
MF
201
1
2
1
R5201
2.2K2.2K
5%
1/20W
MF
201
2
R5250
SMC
U3900
(MASTER)
24A6
24A6
I2C_DISP_SCL
MAKE_BASE=TRUE
I2C_DISP_SDA
MAKE_BASE=TRUE
I2C_DISP_SCL
I2C_DISP_SDA
I2C_DISP_LS_EN
BYPASS=U5250.1::5MM
1
C5250
1
2
0.1UF
10%
6.3V
2
CERM-X5R
0201
2
IO/VL1
3
IO/VL2
5
EN
1
8
VCCVL
U5250
NLSX4402
UDFN-COMBO
IO/VCC1
IO/VCC2
CRITICAL
GND
4
BYPASS=U5250.8::5MM
1
C5251
0.1UF
10%
6.3V
2
7
6
CERM-X5R
0201
1
R5253
2.2K
5%
1/20W
MF
201
2
PP3V3_S0SW_LCD
1
R5254
2.2K
5%
1/20W
MF
201
2
Internal DP
(0x10-0x1F)
I2C_TCON_SCL
I2C_TCON_SDA
SMC I2C "5" G3S Connections
75C1 36C6
PP1V8_G3S
66A7 66C1 66C3 77C2 77D5
79B7
J8500
66B1 77D5
66B1 77D5
74C6 52D1
SMC
U3900
(MASTER)
I2C_PWR_SCL
24A6 77C4
MAKE_BASE=TRUE
I2C_PWR_SDA
24A6 77C4
MAKE_BASE=TRUE
CALPE
U7800
(Write: 0xE8 Read: 0xE9)
I2C_PMU_SCL
62C6
I2C_PMU_SDA
62C6
SMC I2C "4" G3H Connections
PP1V8_SLPS2R
1
R5281
4.7K
5%
1/20W
MF
201
2
I2C_PWR_SCL
I2C_PWR_SDA
I2C_PWR_SCL
0201MF1/20W
I2C_PWR_SDA
I2C_PMU_SCL
MAKE_BASE=TRUE
I2C_PMU_SDA
MAKE_BASE=TRUE
CKPLUS_WAIVE=I2C_PULLUPCKPLUS_WAIVE=I2C_PULLUP
4.7K
5%
1/20W
MF
201
1
2
R5280
PLACE_NEAR=U7800.M11:5MM
2 1
2 1
R5282
5%
R5283
5%
0
MF1/20W 0201
0
PLACE_NEAR=U7800.L10:5MM
Battery Charger
ISL6259 - U7000
(Write: 0x12 Read: 0x13)
53A6
53A6
Battery
J6951
(Write: 0x16 Read:0x17)
52D1
52D1
D
C
SMC I2C "6" G3H Connections
PP1V8_SLPS2R
74C6
U3900
(MASTER)
I2C_SSD_SCL
24A6
MAKE_BASE=TRUE
I2C_SSD_SDA
24A6
MAKE_BASE=TRUE
SMC
R5230
2.2K
5%
1/20W
MF
201
1
R5291
2.2K
5%
1/20W
MF
201
2
4.7K
5%
1/20W
MF
201
1
2
R5273
NOSTUFF
NO_XNET_CONNECTION=1
1
R5274
4.7K
5%
1/20W
MF
201
2
NOSTUFF
NO_XNET_CONNECTION=1
Trackpad
SMC I2C "1" S0 Connections
J6701
(Write: 0x98 Read: 0x99)
I2C_SNS_G3S_SCL
I2C_SNS_G3S_SDA
75D5 41B8
EADC1
U5700
(Write: 0x10 Read: 0x11)
SMBUS_2_SCL_Q
SMBUS_2_SDA_Q
51C8
51B8
41A6
41A6
SMC
U3900
(MASTER)
I2C_SNS0_S0_SCL
24B6
I2C_SNS0_S0_SDA
24B6
PP1V8_S5
75B1
R5270
2.2K
1/20W
201
NO_XNET_CONNECTION=1
NO_XNET_CONNECTION=1
1
5%
MF
2
R5271
2.2K
5%
1/20W
MF
201
1
2
C
2.2K
5%
1/20W
MF
201
1
2
75C1 36C6
PP1V8_G3S
LOADISNS
R5272
100K
1/20W
201
BYPASS=U5272.1::5MM
5%
MF
SMC
R5290
U3900
(MASTER)
I2C_SNS_G3S_SCL
24A6 36C6
MAKE_BASE=TRUE
I2C_SNS_G3S_SDA
24A6 36C6
MAKE_BASE=TRUE
PP5V_S4SW_ISNS
1
C5273
LOADISNS
1
C5272
1
2
0.1UF
10%
6.3V
2
CERM-X5R
0201
1
8
VCCVL
U5272
0.1UF
10%
10V
2
X5R-CERM
0201
BYPASS=U5272.8::3MM
SMBUS_2_SCL_Q
MAKE_BASE=TRUE
LOADISNS
NLSX4402
I2C_SNS_G3S_SCL
24A6 36C6
I2C_SNS_G3S_SDA
1
2
1
R5231
2.2K
5%
1/20W
MF
201
2
(Write: 0xF2 Read: 0xF3)
I2C_SSD_SCL
I2C_SSD_SDA
SSD0
U9000
(10K IPU)
(10K IPU)
71B7
71B7
24A6 36C6
SMBUS_2_OE
2
3
5
UDFN-COMBO
IO/VL1
IO/VL2
CRITICAL
LOADISNS
EN
GND
4
IO/VCC1
IO/VCC2
7
6
SMBUS_2_SDA_Q
MAKE_BASE=TRUE
B
SMC
U3900
(MASTER)
I2C_SNS1_S0_SCL
24A6
MAKE_BASE=TRUE
I2C_SNS1_S0_SDA
24A6
MAKE_BASE=TRUE
SMC I2C "2" S0 Connections
PP1V8_S5
75B1
R5260
2.2K
5%
1/20W
MF
201
PCH I2C "0" G3H CONNECTIONS
PP1V8_SLPS2R
74B2
PCH
U0500
1
1
R5261
2.2K
5%
1/20W
MF
2
201
2
TBT & Airflow Left
TMP461: U5850
(Write: 0x90 Read: 0x91)
I2C_SNS1_S0_SCL
I2C_SNS1_S0_SDA
42D3
42D3
15B6 12D2
15B6 12D2
12C5 19D3
36B3
PCH_I2C_UPC_SCL
PCH_I2C_UPC_SDA
PCH_UPC_I2C_INT_L
(MASTER)
USB-C PORT CONTROLLER W
U2800_T
PP3V3_S5
1
R5212
10K
5%
1/20W
MF
201
2
1
R5210
1K
5%
1/20W
MF
201
2
1
R5211
1K
5%
1/20W
MF
201
2
need check address??!!
USB-C PORT CONTROLLER X
U2800_W
PCH_I2C_UPC_SCL
MAKE_BASE=TRUE
PCH_I2C_UPC_SDA
MAKE_BASE=TRUE
PCH_UPC_I2C_INT_L
MAKE_BASE=TRUE
USB-C PORT CONTROLLER T
U2800_R
19D3
19D3
36B6
12C5
19D3
SMC
U3900
(MASTER)
I2C_UPC_SCL
19C3 24B6
I2C_UPC_SDA
19D3
24B6
(UPC_I2C_INT_L)
USB-C PORT CONTROLLER W
U2800_T
74C6
SMC I2C "0" G3H CONNECTIONS
1
R5220
1K
5%
1/20W
MF
201
2
1
R5221
1K
5%
1/20W
MF
201
2
B
USB-C PORT CONTROLLER X
U2800_W
USB-C PORT CONTROLLER T
U2800_R
A
8
Thermal sensors
TMP468: U5870
(Write: 0x92 Read: 0x93)
I2C_SNS1_S0_SCL
I2C_SNS1_S0_SDA
42B3
42B3
I2C address in USBC block
CSA page 28; PDF page 19
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
A
USB-C PORT CONTROLLER R
U2800_X
I2C address in USBC block
CSA page 28; PDF page 19
USB-C PORT CONTROLLER R
U2800_X
PAGE TITLE
I2C Connections 1
DRAWING NUMBER
051-05198
Apple Inc.
REVISION
6.0.0
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
BOM_COST_GROUP=SMC
67
35 4
IV ALL RIGHTS RESERVED
2
BRANCH
evt-3
PAGE
52 OF 150
SHEET
36 OF 109
1
SIZE
D
D
www.haojiyoubbs.com
QQ微信：181806465
PP1V8_G3S
75C1
AP (SoC)
U3900
(MASTER)
I2C_SPKRAMP_L_SCL
25C6
25C6
MAKE_BASE=TRUE
I2C_SPKRAMP_L_SDA
MAKE_BASE=TRUE
AP I2C "0" G3S Connections
Left Speaker Amps
U6400
(WRITE:0XD8,READ 0XD9)
U6450
(WRITE:0XDA,READ 0XDB)
I2C_SPKRAMP_L_SCL
I2C_SPKRAMP_L_SDA
R5300
2.2K
5%
1/20W
MF
201
1
2
1
R5301
2.2K
5%
1/20W
MF
201
2
47B7
47D7
47B7
47D7
678
3 245
1
ADDR. (8b)SMC IFDevice
AP I2C "5" Awake Connections
AP (SoC)
U3900
(MASTER)
NC_I2C_SOC_5_SCL
25B6
NC_I2C_SOC_5_SDA
25B6
MAKE_BASE=TRUE
NC_I2C_SOC_5_SCL
NC_I2C_SOC_5_SDA
MAKE_BASE=TRUE
ACE XB
ACE TA
ACE TB
NC.
Temp. Sensor Left
I2C0ACE XA
I2C0
I2C0
I2C0
I2C1
I2C2
0X70/1
0X7E/F
0X40/1
0X4E/F
D
0X90/1
ISP I2C "1" G3S Connections
Temp. Sensor Right
I2C2
0X96/7
PP1V8_G3S
75C1
AP (SoC)
U3900
(MASTER) (WRITE:0XDE,READ 0XDF)
I2C_SPKRAMP_R_SCL
25C6
25C6
MAKE_BASE=TRUE
I2C_SPKRAMP_R_SDA
MAKE_BASE=TRUE
AP I2C "1" G3S Connections
Right Speaker Amps
U6500
(WRITE:0XDC,READ 0XDD)
U6550
I2C_SPKRAMP_R_SCL
I2C_SPKRAMP_R_SDA
R5305
2.2K
5%
1/20W
MF
201
1
2
1
R5306
2.2K
5%
1/20W
MF
201
2
48B7
48D7
48B7
48D7
ISP (SoC)
U3900
(MASTER)
NC_I2C_PLCAM_SCL
25D3
NC_I2C_PLCAM_SDA
25D3
AOP I2C "0" G3S Connections
AOP (SoC)
U3900
(MASTER)
NC_I2C_AOP_SCL
24D6
NC_I2C_AOP_SDA
24D6
MAKE_BASE=TRUE
NC_I2C_PLCAM_SCL
NC_I2C_PLCAM_SDA
MAKE_BASE=TRUE
NC_I2C_AOP_SCL
MAKE_BASE=TRUE
NC_I2C_AOP_SDA
MAKE_BASE=TRUE
Plateform Thermal Sensor
PCH
TCON
Charger 0X12/3
Battery
Calpe
Trackpad
EADC1
EADC2
SSD
I2C2
I2C2
I2C3
I2C4
I2C4
I2C4
I2C5
I2C5
I2C5
I2C6
0X92/3
0X88/9
0X10-1F
0X16/7
0XE8/9
0X98/9
0X10/1
0X12/3
0XF2/3
C
AP (SoC)
U3900
(MASTER)
I2C_CODEC_SCL
25B6
25B6
MAKE_BASE=TRUE
I2C_CODEC_SDA
MAKE_BASE=TRUE
AP I2C "2" Codec Connections
PP1V8_CODEC
46C2 46D1 46D7
1
R5311
2.2K
5%
1/20W
MF
201
2
Audio Codec
U6300
(WRITE:0XTBD,READ 0XTBD)
I2C_CODEC_SCL
I2C_CODEC_SDA
R5310
2.2K
5%
1/20W
MF
201
1
2
AP I2C "3" G3S Connections
46A3
46A3
75C1 66A3
ISP (SoC)
U3900
(MASTER)
I2C_FTCAM_SCL
MAKE_BASE=TRUE
I2C_FTCAM_SDA
25D3
MAKE_BASE=TRUE
ISP I2C "0" G3S Connections
PP1V8_G3S
R5335
1.1K
5%
1/20W
MF
201
1
2
1
R5336
1.1K
5%
1/20W
MF
201
2
FaceTime Camera
J8500
(Write: 0x6C Read:0x6D)
I2C_FTCAM_SCL
I2C_FTCAM_SDA
66A6
66A6
Left Spkr Amp.(U6400)
Left Spkr Amp.(U6450)
Right Spkr Amp.(U6500)
Right Spkr Amp.(U6550)
Audio Codec
ALS
DFR Display
DFR Touch
NC.
SoC IF
I2C0
I2C0
I2C1
I2C1
I2C2
I2C3
I2C4
I2C4
I2C5
C
0XD8/9
0XDA/B
0XDC/D
0XDE/F
0X90/1
0X52/3
0X98/9
0XA0/1
B
AP (SoC)
(MASTER)
I2C_ALS_SCL
25B6
25B6
MAKE_BASE=TRUE
I2C_ALS_SDA
MAKE_BASE=TRUE
75D1
U3900
PP1V8_G3S
1
R5316
1.1K
5%
1/20W
MF
201
2
ALS
J8500
(See camera flex)
(WRITE:0x52,READ 0x53)
I2C_ALS_SCL
I2C_ALS_SDA
R5315
1.1K
5%
1/20W
MF
201
1
2
AP I2C "4" DFR Connections
PP1V8_DFR
35B7 35C6 35D6 77C8 77D8 79D8
66B1
77D5
66B1
77D5
FHSi2 PMU
J8500
(Write: 0x90 Read: 0x91)
25D3
Spkr ID1
Spkr ID0
FT Camera
FHSi2
NC.
NC.
I2C6
I2C6
SIP IF
I2C0
I2C0
I2C1
AOP IF
I2C0
0X6C/D
0X90/1
B
A
AP (SoC)
U3900
(MASTER)
CKPLUS_WAIVE=I2C_PULLUP
I2C_DFR_SCL
25B6
I2C_DFR_SDA
25B6
CKPLUS_WAIVE=I2C_PULLUP
R5322
MF1/20W
2015%
R5323
MF1/20W
2015%
R5320
15
21
15
21
1
1.5K
5%
1/20W
MF
201
2
I2C_DFR_SCL_R
MAKE_BASE=TRUE
I2C_DFR_SDA_R
MAKE_BASE=TRUE
1
R5321
1.5K
5%
1/20W
MF
201
2
DFR Display
J5110
(Write:0x98 Read:0x99)
I2C_DFR_SCL_R
I2C_DFR_SDA_R
DFR Touch
J5100
(Write:0xA0 Read:0xA1)
I2C_DFR_SCL_R
I2C_DFR_SDA_R
77D8 35C2
77D8 35C2
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
PAGE TITLE
A
I2C Connections 2
DRAWING NUMBER
77D8 35C7
Apple Inc.
77D8 35C7
051-05198
REVISION
6.0.0
BOM_COST_GROUP=SMC
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
BRANCH
evt-3
PAGE
53 OF 150
SHEET
37 OF 109
SIZE
D
8
67
35 4
2
1
D
www.haojiyoubbs.com
QQ微信：181806465
C
B
A
CPU High Side Current Sense (IC0R)
75D7
75D8
79B6
Gain: 50x, EDP: 13.36 A
Rsense: 0.002 (R5400)
Vsense: 26.72 mV, Range: 12.5 A
SMC ADC: 00
PPBUS_G3H
NO_XNET_CONNECTION=1
PPBUS_HS_CPU
CRITICAL
43D4
0.002
R5400
0612
CYN
1W
1%
PLACE_NEAR=U5400.3:10MM
432
ISNS_HS_COMPUTING_P
ISNS_HS_COMPUTING_N
1
PLACE_NEAR=U5400.4:10MM
PP1V8_S4SW_SNS
74A6
3
4
7
6
VS
U5400
INA190A2RSW
UQFN-THICKSTNCL
IN+
CRITICAL
IN-
50x
ENABLE
GND
9
OTHER 5V High Side Current Sense (IO5R)
Gain: 100x, EDP: 2.36 A
Rsense: 0.005 (R5410)
Vsense: 11.8 mV, Range: 3 A
MUX: A1
75D7
75C8
PPBUS_G3H
PPVIN_G3H_P5VG3S
CRITICAL
R5410
0.005
1/3W
43D4
0306
74A6 38C7 38C3
PLACE_NEAR=U5410.3:10MM
1
ISNS_HS_OTHER5V_P
1%
MF
ISNS_HS_OTHER5V_N
432
PLACE_NEAR=U5410.4:10MM
PP1V8_S4SW_SNS
3
IN+
4
IN-
7
ENABLE
6
VS
U5410
INA190A3RSW
UQFN-THICKSTNCL
CRITICAL
100x
GND
9
OTHER 3.3V High Side Current Sense (IO3R)
Gain: 100x, EDP: 3.62 A
Rsense: 0.005 (R5440)
74A6 38D7 38C3
PP1V8_S4SW_SNS
Vsense: 18.1 mV, Range: 3 A
MUX: A0
6
VS
U5440
75D7
75C8
PPBUS_G3H
PPVIN_G3H_P3V3G3H
CRITICAL
R5440
0.005
1%
1/3W
43D4
MF
0306
PLACE_NEAR=U5440.3:10MM
1
ISNS_HS_OTHER3V3_P
ISNS_HS_OTHER3V3_N
432
PLACE_NEAR=U5440.4:10MM
3
4
7
INA190A3RSW
UQFN-THICKSTNCL
CRITICAL
IN+
IN-
100x
ENABLE
GND
9
LCD Backlight Current Sense
Gain: 200x. EDP: 0.75 A
Rsense: 0.025 (R8400) or Rsense SHORT
Vsense: 18.75 mV, Range: 0.82 A
EADC1: CH0
PP1V8_S4SW_SNS
74A6
INA190A4IRSW
PLACE_NEAR=R8400.4:5MM
43C4 65D7
IN
43C4 65D7
IN
ISNS_LCDBKLT_P
ISNS_LCDBKLT_N
PLACE_NEAR=R8400.3:5MM
3
4
7
CRITICAL
IN+
IN-
ENABLE
6
VS
U5450
UQFN
200x
LOADISNS
GND
9
(IBLR)
1
2
10
OUT
REF
NC
NC
NC
ISNS_LCDBKLT_IOUT
8
1
NC
2
NC
5
NC
LOADISNS
C5450
0.1UF
10%
6.3V
CERM-X5R
0201
BYPASS=U5450.6::5MM
LOADISNS
1
R5455
6.04K
1%
1/20W
MF
201
2
PLACE_NEAR=U5450.10:5MM
NAND Current Sense (IHNR)
Gain: 100x, EDP: 1.34 A
Rsense: 0.01 (R5460)
Vsense: 13.4 mV, Range: 1.5 A
75D7
75C8
MUX: A6
PPBUS_G3H
PPBUS_G3H_SSD0
NO_XNET_CONNECTION=1
43D4
0306
CRITICAL
43C4
1/3W
0.01
R5460
PLACE_NEAR=U5460.3:10MM
ISNS_SSDNAND_P
432
MF
1%
ISNS_SSDNAND_N
1
PLACE_NEAR=U5460.4:10MM
3
4
7
INA190A3RSW
UQFN-THICKSTNCL
IN+
IN-
ENABLE
6
VS
U5460
CRITICAL
100x
GND
9
OUT
REF
NC
NC
NC
BYPASS=U5400.6::5MM
1
C5401
0.1UF
10%
6.3V
2
CERM-X5R
0201
NC
NC
NC
OUT
REF
NC
NC
NC
10
8
1
2
5
BYPASS=U5410.6::5MM
1
C5411
0.1UF
10%
6.3V
2
CERM-X5R
0201
HS_OTHER5V_IOUT
REF
NC
NC
NC
10
8
1
2
5
NC
NC
NC
OUT
BYPASS=U5440.6::5MM
1
C5441
0.1UF
10%
6.3V
2
CERM-X5R
0201
10
OUT
REF
NC
NC
NC
PLACE_NEAR=U5700.22:5MM
LOADISNS
HS_OTHER3V3_IOUT
8
1
NC
2
NC
5
NC
R5459
45.3K
1/20W
BYPASS=U5460.6::5MM
PP1V8_S4SW_SNS
1
C5460
0.1UF
10%
6.3V
2
CERM-X5R
0201
10
ISNS_SSDNAND_IOUT
8
1
NC
2
NC
5
NC
1%
MF
201
21
1
2
GND_EADC1_COM
678
PLACE_NEAR=U3900.AG2:5MM
R5409
CPUHI_IOUT
PLACE_NEAR=U7800.A15:5MM
PLACE_NEAR=U7800.A16:5MM
EADC1_LCDBKLT_ISENSE
LOADISNS
C5459
2.2UF
20%
6.3V
X5R-CERM
0201
PLACE_NEAR=U5700.22:5MM
PLACE_NEAR=U7800.E14:5MM
R5469
4.53K
1/20W
1%
MF
201
21
4.53K
1%
1/20W
MF
201
R5419
4.53K
1/20W
1%
MF
201
21
R5449
4.53K
1/20W
38A2 38B1 39A1 40D1 41A8 41B5 41C1 43A5
PMU_SSDNAND_ISENSE
1%
MF
201
21
21
SMC_CPU_HS_ISENSE
PLACE_NEAR=U3900.AG2:5MM
1
C5409
0.022UF
10%
6.3V
2
X5R-CERM
0201
GND_SMC_AVSS
24A4 31A6 38B1 38C1 38C3 38D1 39A4 40A2 41D1
PMU_OTHER5V_HI_ISENSE
1
C5419
2.2UF
20%
6.3V
2
X5R-CERM
0201
PLACE_NEAR=U7800.A15:5MM
GND_PMU_AVSS
103S00085
PMU_OTHER3V3_HI_ISENSE
1
C5449
2.2UF
20%
6.3V
2
X5R-CERM
0201
PLACE_NEAR=U7800.A16:5MM
GND_PMU_AVSS
Left AMP Current Sense (IALR)
Gain: 200x, EDP: 2.6 A
Rsense: 0.005 (R54A0) or Rsense SHORT
Vsense: 13 mV, Range: 4.1 A
EADC1: CH1
OUT
41A8
75D6
75B8
PPBUS_G3H
PPBUS_G3H_SPKRAMP_LEFT
PCH 1.8V PRIM Current Sense (ICPR)
Gain: 100x, EDP: 2.2 A
Rsense: 0.005 (R54B0) or Rsense SHORT
Vsense: 11 mV, Range: 3 A
MUX: B3
74A6 43C7 43B7 41D7 41D3 41C7 41C3 41B3
1
C5469
2.2UF
20%
6.3V
2
X5R-CERM
0201
PLACE_NEAR=U7800.E14:5MM
GND_PMU_AVSS
41A5 40D3 40C7 40C3 39D7 39D4 39C7 39B3 38B4 38A4
75C8 59D8
75D6
PPBUS_HS_CPU
44C3
OUT
PPVIN_S0_PRIM1V8
38A2 38B5 38C5 39B5 39C5 39D1 40A2 40C1 40C5 41A3
41B1 41C5 41D5 43B5 43C5 61B6
PBUS Voltage Sense & Enable (VP0R)
Gain: 0.08896x
Vnominal: 13.05 V, Range: 14.05 V
SMC ADC: 01
44D3
OUT
75D7
PPBUS_G3H
DC In Voltage Sense & Enable (VD0R)
Gain: 0.05827x
Vnominal: 20 V, Range: 21.46 V
SMC ADC: 04
44C3
OUT
43C5 61B6
38A2 38A5 38B5 39B5 39C5 39D1 40A2
40C1 40C5 41A3 41B1 41C5 41D5 43B5
OUT
1
1103S00487
44C3
RES,MF,78.7K,0.1%,50PPM,25V,1/20W,0201
RES,TK,4.87KOHMS,0.1%,1/20W,0201
3.3V RTC High Side Current Sense (IR3R)
Gain: 200x, EDP: 2 A
Rsense: 0.005 (R5420) or Rsense SHORT
Vsense: 10 mV, Range: 4.1 A
EADC1: CH4
75D6
38A2 38A5 38C5 39B5 39C5 39D1 40A2 40C1 40C5 41A3
41B1 41C5 41D5 43B5 43C5 61B6
75C8
41A5 40D3 40C7 40C3 39D7 39D4 39C7 39B3 38A6 38A4
NO_XNET_CONNECTION=1
R54A0
0.005
1%
1/3W
MF
43C4
0306-SHORT
OMIT
41A5 40D3 40C7 40C3 39D7 39D4 39C7 39B3 38B4 38A6
NO_XNET_CONNECTION=1
43C4
R54B0
0306-SHORT
74A6 43C7 43B7 41D7 41D3 41C7 41C3 41B3
0.005
1%
1/3W
MF
43C4
OMIT
PLACE_NEAR=U3900.AB6:5MM
PLACE_NEAR=U54A0.3:10MM
1
ISNS_SPKRAMP_LEFT_P
ISNS_SPKRAMP_LEFT_N
432
PLACE_NEAR=U54A0.4:10MM
PLACE_NEAR=U54B0.3:10MM
1
ISNS_PP1V8_S5_P
ISNS_PP1V8_S5_N
432
PLACE_NEAR=U54B0.4:10MM
39B3 62B3 64A8 64B8 77A7
XW5480
PLACE_NEAR=R5400.1:10 MM
PPDCIN_G3H
75B8
OMIT_TABLE
OMIT_TABLE
PPBUS_G3H
PPVIN_G3H_P3V3G3HRTC
43C7 43B7 41D7 41D3 41C7 41C3 41B3
PLACE_SIDE=BOTTOM
74A6
PP1V8_S4SW_SNS
IN
SENSOR_PWR_EN
Enables PBUS VSense
divider when in S0.
SM
21
PBUS_S0_VSENSE_IN
1%
1/20W
MF
201
1
PLACE_NEAR=U3900.AB6:5MM
Rthevenin = 4586 Ohms
2
R5498
78.7K
SMC_DCIN_VSENSE
PLACE_NEAR=U3900.AB6:5MM
1
C5499
0.022UF
10%
6.3V
2
X5R-CERM
0201
R5499
4.87K
1%
1/20W
MF
201
1
2
GND_SMC_AVSS
R5498
R5499
PLACE_NEAR=U5420.3:10MM
1%
1/3W
MF
1
43D4
432
R5420
0.005
0306-SHORT
OMIT
PLACE_NEAR=U5420.4:10MM
PP1V8_S4SW_SNS
3
IN+
4
IN-
7
ENABLE
6
VS
U54B0
INA190A3RSW
UQFN
3
4
7
CRITICAL
IN+
IN-
ENABLE
100x
LOADISNS
GND
9
R5481
100K
2 1
1%
1/20W
MF
201
24A4 31A6 38B1 38C1 38D1 38D5 39A4 40A2 41D1
CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION
CRITICAL
CRITICAL
74A6 38D7 38C7
ISNS_HS_3V3RTC_P
ISNS_HS_3V3RTC_N
6
VS
U54A0
INA190A4IRSW
UQFN
CRITICAL
200x
LOADISNS
GND
9
10
OUT
8
REF
1
NC
2
NC
5
NC
PP1V8_S4SW_SNS
10
OUT
8
REF
1
NC
2
NC
5
NC
BYPASS=U54B0.6::5MM
1
C54B0
0.1UF
10%
6.3V
2
CERM-X5R
0201
LOADISNS
ISNS_PP1V8S5_IOUT
LOADISNS
1
R54B5
NC
NC
NC
15K
5%
1/20W
MF
201
2
PLACE_NEAR=U54B0.10:5MM
3 245
CRITICAL
Q5480
NTUD3169CZ
SOT-963
N-CHANNEL
D
2
1
5
4
43B2 44D3
OUT
3
4
7
BYPASS=U54A0.6::5MM
LOADISNS
1
C54A0
0.1UF
10%
6.3V
2
CERM-X5R
0201
ISNS_SPKRAMPL_IOUT
LOADISNS
1
NC
NC
NC
R54A5
15K
5%
1/20W
MF
201
2
PLACE_NEAR=U54A0.10:5MM
117S0008
G
S
D
G
S
P-CHANNEL
PBUSVSENS_EN_L_DIV
6
VS
U5420
INA190A4IRSW
UQFN
CRITICAL
IN+
IN-
200x
ENABLE
LOADISNS
GND
9
1 LOADRC:NO
PLACE_NEAR=U7800.F13:5MM
LOADISNS
R54B9
4.53K
1/20W
201
PLACE_NEAR=U7800.F13:5MM
BOM_COST_GROUP=SENSORS
1%
MF
6
PBUSVSENS_EN_L
100K
1%
1/20W
MF
201
1
2
1%
1/20W
MF
201
1
PLACE_NEAR=U3900.AC4:5MM
Rthevenin = 4546 Ohms
2
R5488
51.1K
SMC_PBUS_VSENSE
R5489
4.99K
1%
1/20W
MF
201
1
2
1
C5489
0.022UF
10%
6.3V
2
X5R-CERM
0201
PLACE_NEAR=U3900.AC4:5MM
PLACE_NEAR=U3900.AC4:5MM
GND_SMC_AVSS
24A4 31A6 38B1 38C1 38C3 38D5 39A4 40A2
41D1
3
PBUS_S0_VSENSE
R5483
NOSTUFF
PLACE_SIDE=BOTTOM
0
5%
1/20W
MF
0201
R5482
21
DC-IN (AMON) Current Sense (ID0R)
Charger Gain: 20x, EDP: 4.6 A
Rsense: 0.010 (R7020)
SMC ADC: 03
PLACE_NEAR=U3900.AD4:5MM
R5439
43C4 53A4
IN
CHGR_AMON
4.53K
1/20W
1%
MF
201
21
SMC_DCIN_ISENSE
1
C5439
0.022UF
10%
6.3V
2
X5R-CERM
0201
GND_SMC_AVSS
PLACE_NEAR=U3900.AD4:5MM
Charger (BMON) Current Sense (IPBR)
Charger Gain: 12x, EDP: 20.83 A
Rsense: 0.005 (R7060)
SMC ADC: 02
IN OUT
LOADISNS
BYPASS=U5420.6::5MM
1
C5420
0.1UF
10%
6.3V
2
CERM-X5R
0201
10
OUT
REF
8
HS_3V3RTC_IOUT
LOADISNS
NC
NC
NC
1
2
5
NC
NC
NC
1
R5425
15K
1%
1/20W
MF
201
2
PLACE_NEAR=U5420.10:5MM
PLACE_NEAR=U5700.23:5MM
LOADISNS
R54A9
45.3K
1/20W
RES,MTL FLIM,100K,1/16W,0201,SMD,LF
PMU_PP1V8S5_ISENSE
21
1
2
GND_PMU_AVSS
21
EADC1_SPKRAMPL_ISENSE
1%
MF
201
1
2
GND_EADC1_COM
LOADRC:YES
C54B9
2.2UF
20%
6.3V
X5R-CERM
0201
LOADISNS
C54A9
2.2UF
20%
6.3V
X5R-CERM
0201
PLACE_NEAR=U5700.23:5MM
PLACE_NEAR=U3900.AH3:5MM
R5479
4.53K
1/20W
1%
MF
201
21
SMC_BMON_ISENSECHGR_BMON
1
C5479
0.022UF
10%
6.3V
2
X5R-CERM
0201
GND_SMC_AVSS
PLACE_NEAR=U5700.1:5MM
LOADISNS
PLACE_NEAR=U3900.AH3:5MM
R5429
45.3K
1/20W
38A6 38B1 39A1 40D1 41A8 41B5 41C1 43A5
44C3
OUT
SYNC_MASTER=Jack SYNC_DATE=12/15/2019
PAGE TITLE
1%
MF
201
21
EADC1_P3V3RTC_HI_ISENSE
LOADISNS
1
C5429
2.2UF
20%
6.3V
2
X5R-CERM
0201
PLACE_NEAR=U5700.1:5MM
GND_EADC1_COM
41A8
OUT
CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION
C54B9
Power Sensors: High Side
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
1
43B2 44D3
OUT
44D3
OUT
24A4 31A6 38B1 38C3 38D1 38D5 39A4 40A2
41D1
44D3 43B4 53A4
24A4 31A6 38C1 38C3 38D1 38D5 39A4
40A2 41D1
41A8
OUT
38A2 38A6 39A1 40D1 41A8 41B5 41C1 43A5
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
54 OF 150
SHEET
38 OF 109
SIZE
D
D
C
B
A
8
67
35 4
2
1
D
www.haojiyoubbs.com
QQ微信：181806465
678
DDR 1.1V S3 (CPU & Memory) Current Sense (IM0C)
Gain: 100x, EDP: 6.9 A
Rsense: 0.002 (R8118)
Vsense: 13.8 mV, Range: 7.5 A
41D3 41C7 41C3 41B3 41A5 40D3 40C7 40C3 39D4 39C7
MUX: A4
43B4 63C3
43B4 63C3
74A6 43C7 43B7 41D7
39B3 38B4 38A6 38A4
PLACE_NEAR=R8118.4:5MM
ISNS_CPUDDR_P
IN
ISNS_CPUDDR_N
IN
PLACE_NEAR=R8118.3:5MM
PP1V8_S4SW_SNS
3
4
7
6
VS
U5570
INA190A3RSW
UQFN-THICKSTNCL
IN+
CRITICAL
IN-
ENABLE
100x
GND
9
OUT
REF
NC
NC
NC
BYPASS=U5570.6::5MM
1
C5570
0.1UF
10%
6.3V
2
CERM-X5R
0201
10
ISNS_DDR_IOUT
8
1
NC
2
NC
5
NC
PLACE_NEAR=U7800.C14:5MM
R5579
4.53K
1%
1/20W
MF
201
PMU_DDR1V2_ISENSE
21
1
C5579
2.2UF
20%
6.3V
2
X5R-CERM
0201
PLACE_NEAR=U7800.C14:5MM
GND_PMU_AVSS
CPU VCCIN_AUX 1.8V Current Sense (ICAC)
Gain: 100x, EDP: 19 A
Rsense: 0.00075 (R7430)
Vsense: 14.25 mV, Range: 20A
MUX: B2
44C3
OUT
38A2 38A5 38B5 38C5 39B5 39D1 40A2 40C1 40C5 41A3
41B1 41C5 41D5 43B5 43C5 61B6
41A5 40D3 40C7 40C3 39D7 39C7 39B3 38B4 38A6 38A4
74A6 43C7 43B7 41D7 41D3 41C7 41C3 41B3
PLACE_NEAR=R7430.4:10MM
43A4 56C3
43A4 56C2
ISNS_VCCINAUX_P
IN
ISNS_VCCINAUX_N
IN
PLACE_NEAR=R7430.3:10MM
PP1V8_S4SW_SNS
3
IN+
4
IN-
7
ENABLE
3 245
6
VS
U5540
INA190A3RSW
UQFN-THICKSTNCL
CRITICAL
100x
LOADISNS
GND
9
OUT
REF
NC
NC
NC
LOADISNS
BYPASS=U5540.6::5MM
1
C5540
0.1UF
10%
6.3V
2
CERM-X5R
0201
10
ISNS_VCCINAUX_IOUT
8
1
NC
2
NC
5
NC
PLACE_NEAR=U7800.H14:5MM
LOADISNS
R5549
4.53K
1/20W
1%
MF
201
21
PMU_CPUVA_ISENSE
LOADRC:YES
1
C5549
2.2UF
20%
6.3V
2
X5R-CERM
0201
PLACE_NEAR=U7800.H14:5MM
GND_PMU_AVSS
1
44B3
OUT
38A2 38A5 38B5 38C5 39B5 39C5 40A2 40C1 40C5 41A3
41B1 41C5 41D5 43B5 43C5 61B6
D
C
B
CPU DDR 1.1V S3 (CPU Only) Current Sense (IMCC)
Gain: 500x, EDP: 3.5 A
Rsense: 0.001 (R5510) or Rsense SHORT
Vsense: 3.5 mV, Range: 3 A
MUX: B2
75A1
PP1V1_S3
41A5 40D3 40C7 40C3 39D7 39D4 39B3 38B4 38A6 38A4
74A6 43C7 43B7 41D7 41D3 41C7 41C3 41B3
PP1V8_S4SW_SNS
6
VS
U5510
LOADISNS
BYPASS=U5510.6::5MM
1
C5510
0.1UF
10%
6.3V
2
CERM-X5R
0201
INA190A5
75A2
CRITICAL
R5510
0.005
1/3W
0306-SHORT
OMIT
PP1V1_S3_CPU
PLACE_NEAR=U5510.3:10MM
1
1%
MF
ISNS_CPUVDDQ_P
ISNS_CPUVDDQ_N
432
PLACE_NEAR=U5510.4:10MM
3
4
7
IN+
CRITICAL
IN-
ENABLE
UQFN
OUT
500x
LOADISNS
GND
9
REF
NC
NC
NC
10
ISNS_CPUDDR_IOUT
8
1
NC
2
NC
5
NC
DFR Current Sense
PLACE_NEAR=U7800.E12:5MM
LOADISNS
R5519
4.53K
1/20W
1%
MF
201
21
PMU_CPUDDR_ISENSE
LOADRC:YES
1
C5519
2.2UF
20%
6.3V
2
X5R-CERM
0201
PLACE_NEAR=U7800.E12:5MM
GND_PMU_AVSS
117S0008 1
117S0008
0
2
OUT
44C3
38A2 38A5 38B5 38C5 39C5 39D1 40A2 40C1 40C5 41A3
41B1 41C5 41D5 43B5 43C5 61B6
RES,MTL FLIM,100K,1/16W,0201,SMD,LF
RES,MTL FLIM,100K,1/16W,0201,SMD,LF
RES,MTL FLIM,100K,1/16W,0201,SMD,LF
C5519
C5539,C5549
C
PP5V_S4_WLAN_ISNS_D
LOADISNS
1
R5535
100K
5%
1/20W
MF
201
2
LOADISNS
DMN5L06VK-7
Q5531
D
SOT563
CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION
VER-3
LOADRC:NO
LOADRC:NO
LOADRC:NO117S0008
38D4 62B3 64A8 64B8 77A7
SENSOR_PWR_EN
IN
2
SG
WLANBT_OP_EN_L
6
1
LOADISNS
DMN5L06VK-7
Q5531
SOT563
VER-3
5
3
D
SG
4
LOADISNS
1
R5536
100K
5%
1/20W
MF
201
2
WLANBT_OP_EN
39A6
39A6
B
A
75B4
75A6
PP3V3_G3H
PP3V3_G3H_DFR
R5520
0.005
1/3W
0306-SHORT
OMIT
1%
MF
1
ISNS_DFR3V3_P
ISNS_DFR3V3_N
432
43A4
43A4
WLANBT 3.3V Current Sense (IW3C)
Gain: 163.3x, EDP: 1.504 A
Rsense: 0.005 (R5530) or Rsense SHORT
Vsense: 7.52 mV, Range: 1.53 A
SMC ADC: 05
79C8 75D2
PP3V3_G3S_WLANBT
0306-SHORT
MF
1/3W
1%
PLACE_NEAR=U5530.3:10MM
432
0.005
PP3V3_G3S
75A5
R5530
OMIT
NO_XNET_CONNECTION=1
PLACE_SIDE=BOTTOM
1
PLACE_NEAR=U5530.4:10MM
ISNS_WLANBTP3V3_N
43A4
ISNS_WLANBTP3V3_P
43A4
ISNS_P3V3_WLANBT_R_N
PP5V_G3S
75B7
ISNS_P3V3_WLANBT_R_P
CKPLUS_WAIVE=PDIFPR_BADTERM
LOADISNS
D5530
0201
DSF01S30SL
CKPLUS_WAIVE=NDIFPR_BADTERM
LOADISNS
R5531
120
1/20W
LOADISNS
0.1%
MF
0201
21
R5532
120
1/20W
0.1%
MF
0201
21
ISNS_WLANBT_OP
WLANBT_OP_EN
39B1
KA
CRITICAL
LOADISNS
WLANBT 1.8V Current Sense (IW2C)
Gain: 200x. EDP: 0.1 A
Rsense: 0.1 (R5580) or Rsense SHORT
41C7 41C3 41B3 41A5 40D3 40C7 40C3 39D7 39D4 39C7
Vsense: 10 mV, Range: 0.2 A
EADC1:CH4
75C1
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=5V
PP5V_S4_WLAN_ISNS_D
39B1
NO_XNET_CONNECTION=1
Q5530
DMP31D0UFB4
DFN1006H4-3
LOADISNS
U5530
6
3
+
SHDN*
4
-
V-
2
LTC2050HV
TSOT23-6
V+
5
1
1
G
1
R5533
100K
5%
1/20W
MF
201
2
LOADISNS
S
D
PLACE_NEAR=R5531.2:1MM
LOADISNS
BYPASS=U5530.6::5MM
1
2
C5530
0.1UF
10%
10V
2
X5R-CERM
0201
ISNS_PP3V3_WLANBT_IOUT
3
LOADISNS
1
R5534
19.6K
0.1%
1/20W
MF
0201
2
75C2
LOADISNS
PLACE_NEAR=U3900.AH2:5MM
R5539
4.53K
1/20W
1%
MF
201
21
SMC_PP3V3_WLANBT_ISENSE
PP1V8_G3S
43D2
PP1V8_G3S_WLANBT
PLACE_SIDE=BOTTOM
LOADRC:YES
1
C5539
0.022UF
10%
6.3V
2
X5R-CERM
0201
PLACE_NEAR=U3900.AH2:5MM
GND_SMC_AVSS
OMIT
0306-SHORT
43D2
R5580
PLACE_NEAR=U5580.3:10MM
ISNS_P1V8_WLANBT_P
432
MF
1/3W
1%
0.005
24A4 31A6 38B1 38C1 38C3 38D1 38D5 40A2 41D1
ISNS_P1V8_WLANBT_N
1
PLACE_NEAR=U5580.4:10MM
44D3
OUT
GAIN:163.3x
43B7 41D7 41D3
38B4 38A6 38A4
74A6 43C7
PP1V8_S4SW_SNS
3
IN+
4
IN-
7
ENABLE
6
VS
U5580
INA190A4IRSW
UQFN
OUT
REF
CRITICAL
200x
LOADISNS
GND
9
BOM_COST_GROUP=SENSORS
NC
NC
NC
LOADISNS
BYPASS=U5580.6::5MM
1
C5580
0.1UF
10%
6.3V
2
CERM-X5R
0201
LOADISNS
PLACE_NEAR=U7800.A14:5MM
R5589
10
ISNS_PP1V8_WLANBT_IOUT EADC1_PP1V8_WLANBT_ISENSE
8
1
NC
2
NC
5
NC
PAGE TITLE
4.53K
1%
1/20W
MF
201
21
LOADISNS
1
C5589
0.022UF
10%
6.3V
2
X5R-CERM
0201
PLACE_NEAR=U7800.A14:5MM
GND_EADC1_COM
Power Sensors: Load Side
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
OUT
38A2 38A6 38B1 40D1 41A8
41B5 41C1 43A5
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
55 OF 150
SHEET
39 OF 109
41A8
SIZE
D
A
SYNC_DATE=12/15/2019SYNC_MASTER=Jack
8
67
35 4
2
1
D
www.haojiyoubbs.com
QQ微信：181806465
Keyboard 3V Current Sense
75A5
75D2
PP3V3_G3S
NO_XNET_CONNECTION=1
OMIT
PP3V3_G3S_KBD
R5690
0.005
1%
1/3W
0306-SHORT
MF
1
ISNS_PP3V3_KBD_N
432
43B2
43B2
678
3 245
1
Battery Discrete Current Sense (IP0R)
Gain: 100x. EDP: 8 A
Rsense: 0.005 (R7060)
43B7 41D7 41D3 41C7 41C3 41B3 41A5 40C7 40C3 39D7
39D4 39C7 39B3 38B4 38A6 38A4
Vsense: 40 mV, Range: 8.19 A
EADC2: CH5
43B4 53C3
43B4 53C4
CKPLUS_WAIVE=NDIFPR_BADTERM
PLACE_NEAR=R7060.4:5MM
CHGR_CSO_R_NISNS_PP3V3_KBD_P
IN
CHGR_CSO_R_P
IN
PLACE_NEAR=R7060.3:5MM
CKPLUS_WAIVE=PDIFPR_BADTERM
74A6 43C7
PP1V8_S4SW_SNS
3
IN+
4
IN-
7
ENABLE
6
VS
U5630
INA190A3RSW
UQFN-THICKSTNCL
OUT
REF
CRITICAL
100x
LOADISNS
GND
9
NC
NC
NC
LOADISNS
BYPASS=U5630.6::5MM
1
C5630
0.1UF
10%
6.3V
2
CERM-X5R
0201
10
ISNS_DISCHGR_IOUT
8
1
NC
2
NC
5
NC
PLACE_NEAR=U5700.24:5MM
LOADISNS
R5639
45.3K
1/20W
1%
MF
201
21
EADC1_BMON_DISCRETE_ISENSE
LOADISNS
1
C5639
2.2UF
20%
6.3V
2
X5R-CERM
0201
PLACE_NEAR=U5700.24:5MM
GND_EADC1_COM
41A8
OUT
38A2 38A6 38B1 39A1 41A8 41B5 41C1 43A5
D
C
LCD Panel 3V Current Sense (ILDC)
Gain: 100x. EDP: 1 A
40D3 40C3 39D7 39D4 39C7 39B3 38B4 38A6 38A4
74A6 43C7 43B7 41D7 41D3 41C7 41C3 41B3 41A5
RSENSE: 0.01 (R8520) or Rsense SHORT
Vsense: 10 mV, Range: 1.5 A
MUX: B0
43D2 66C4
43D2 66C4
PLACE_NEAR=R8520.3:5MM
ISNS_LCDPANEL_P
ISNS_LCDPANEL_N
IN
PLACE_NEAR=R8520.4:5MM
PP1V8_S4SW_SNS
3
4
7
6
VS
U5620
INA190A3RSW
UQFN-THICKSTNCL
IN+
CRITICAL
IN-
ENABLE
100x
LOADISNS
GND
9
OUT
REF
NC
NC
NC
LOADISNS
BYPASS=U5620.6::5MM
1
C5620
0.1UF
10%
6.3V
2
CERM-X5R
0201
10
ISNS_LCDPANEL_IOUT
8
1
NC
2
NC
5
NC
PLACE_NEAR=U7800.D13:5MM
LOADISNS
R5629
4.53K
1/20W
1%
MF
201
21
PMU_LCDPANEL_ISENSE
LOADRC:YES
1
C5629
2.2UF
20%
6.3V
2
X5R-CERM
0201
PLACE_NEAR=U7800.D13:5MM
GND_PMU_AVSS
Thunderbolt TBT Current Left (IULC)
Gain: 100x. EDP: 0.74 A
Rsense: 0.02 (R5640) or Rsense SHORT
Vsense: 14.8 mV, Range: 0.75 A
MUX: B7
75B4
44C3
OUTIN
75D4
38A2 38A5 38B5 38C5 39B5 39C5 39D1 40A2 40C1 41A3
41B1 41C5 41D5 43B5 43C5 61B6
PP3V3_G3H
PP3V3_S0_TBT_XT_ISNS_R
41A5 40D3 40C7 39D7 39D4 39C7 39B3 38B4 38A6 38A4
74A6 43C7 43B7 41D7 41D3 41C7 41C3 41B3
PLACE_NEAR=U5640.3:10MM
R5640
0.005
1/3W
0306-SHORT
OMIT
1
1%
MF
ISNS_TBT_XT_P
ISNS_TBT_XT_N
43A4
432
PLACE_NEAR=U5640.4:10MM
PP1V8_S4SW_SNS
3
IN+
4
IN-
7
ENABLE
6
VS
U5640
INA190A3RSW
UQFN
OUT
CRITICAL
100x
LOADISNS
GND
9
REF
NC
NC
NC
10
8
1
2
5
LOADISNS
BYPASS=U5640.6::5MM
1
C5640
0.1UF
10%
6.3V
2
CERM-X5R
0201
ISNS_TBT_IOUT
NOSTUFF
1
R5645
NC
NC
NC
20K
5%
1/20W
MF
201
2
PLACE_NEAR=U5640.10:5MM
PLACE_NEAR=U7800.H13:5MM
LOADISNS
R5649
45.3K
1/20W
1%
MF
201
21
PMU_TBT_XT_ISENSE
LOADRC:YES
1
C5649
2.2UF
20%
6.3V
2
X5R-CERM
0201
PLACE_NEAR=U7800.H13:5MM
GND_PMU_AVSS
44B3
OUT
38A2 38A5 38B5 38C5 39B5 39C5 39D1 40A2
40C5 41A3 41B1 41C5 41D5 43B5 43C5 61B6
C
B
Trackpad 3V Current Sense
75A5
75D2
PP3V3_G3S
NO_XNET_CONNECTION=1
OMIT
PP3V3_G3S_TPAD
R5650
0.005
1%
1/3W
0306-SHORT
MF
1
ISNS_PP3V3_TPAD_P
ISNS_PP3V3_TPAD_N
432
43D2
43D2
117S0008
117S0008
Thunderbolt TBT Current Right
75C4
75D4
2
0
2117S0008 LOADRC:NO
PP3V3_G3H_RTC
R5670
OMIT
0306-SHORT
PP3V3_S0_TBT_WR_ISNS_R
RES,MTL FLIM,100K,1/16W,0201,SMD,LF
RES,MTL FLIM,100K,1/16W,0201,SMD,LF
RES,MTL FLIM,100K,1/16W,0201,SMD,LF
0.005
1%
1/3W
MF
1
ISNS_TBT_WR_P
ISNS_TBT_WR_N
432
43A2
43A2
CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION
C5649,C5629
LOADRC:NO
LOADRC:NO
R5608,R5688
B
A
ALS/Camera Current Sense (ICMC)
75B7
75A8
PP5V_G3S
OMIT
NO_XNET_CONNECTION=1
PP5V_G3S_ALSCAM
R5610
0.005
1%
1/3W
0306-SHORT
MF
1
ISNS_ALSCAM_P
ISNS_ALSCAM_N
432
43B4
43B4
CPU VCCIN Voltage Sense (VCVC)
SMC ADC: 20
80D8 79D6 77D2 75C3 8D7
CPU VCCIN_AUX Voltage Sense (VCAC)
SMC ADC: 21
80D8 79C6 77D2 75B3 16D2 8D4
PPVCCIN_S0_CPU
XW5600
PPVCCIN_AUX_PCH_PRIM
PLACE_NEAR=U0500.AV9:5 MM
XW5680
SM
21
CPUVSENSE_IN
43C2
PLACE_NEAR=U0500.B10:5 MM
SM
21
CPUVASENSE_IN
PLACE_NEAR=U7800.G14:5MM
PLACE_NEAR=U7800.G14:5MM
LOADISNS
R5689
7.5K
1%
1/20W
MF
201
PLACE_NEAR=U7800.G13:5MM
LOADISNS
R5609
7.5K
1/20W
1%
MF
201
21
PMU_CPUVA_VSENSE
1
2
21
SMC_CPUVCCIN_VSENSE
LOADRC:YES
R5608
11.5K
1%
1/20W
MF
201
LOADRC:YES
1
R5688
11.5K
1%
1/20W
MF
201
2
LOADISNS
1
C5609
2.2UF
20%
6.3V
2
X5R-CERM
0201
PLACE_NEAR=U7800.G14:5MM
GND_PMU_AVSS
BOM_COST_GROUP=SENSORS
LOADISNS
1
C5689
2.2UF
20%
6.3V
2
X5R-CERM
0201
PLACE_NEAR=U3900.AC5:5MM
GND_SMC_AVSS
44C3
OUT
41B1 41C5 41D5 43B5 43C5
38A2 38A5 38B5 38C5 39B5
39C5 39D1 40C1 40C5 41A3
61B6
44D3
OUT
24A4 31A6 38B1 38C1 38C3 38D1 38D5 39A4 41D1
PAGE TITLE
Power Sensors: Extended
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
56 OF 150
SHEET
40 OF 109
SIZE
D
A
SYNC_DATE=12/15/2019SYNC_MASTER=Jack
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
C
B
CALPE 3.3V INPUT Current Left (IP3C)
Gain: 50x. EDP: 10.124 A
Rsense: 0.002 (R5780) or Rsense SHORT
41B3 41A5 40D3 40C7 40C3 39D7 39D4 39C7 39B3 38B4
Vsense: 20.248 mV, Range: 12.5 A
EADC1: CH7
75B4
75B6
PP3V3_G3H
OMIT
0306-SHORT
MF
1/3W
1%
0.005
R5780
PP3V3_G3H_PMU_VDDMAIN
PLACE_NEAR=U5780.3:10MM
432
43D2
1
PLACE_NEAR=U5780.4:10MM
43C7 43B7 41D7 41D3
ISNS_CALPE_P
ISNS_CALPE_N
74A6
41C7 41C3
38A6 38A4
PP1V8_S4SW_SNS
3
IN+
4
IN-
7
ENABLE
INA190A2RSW
UQFN-THICKSTNCL
CRITICAL
LOADISNS
CPU REG.5V Current Sense (IC5C)
Gain: 100x, EDP: 0.42 A
Rsense: 0.05 (R5760) or Rsense SHORT
Vsense: 21 mV, Range: 0.3 A
MUX: A7
75B7
75A8
PP5V_G3S
43B2
PP5V_G3S_CPUREG
R5760
0.005
1/3W
43B2
0306-SHORT
OMIT
1
1%
MF
74A6 43C7 43B7 41D7 41D3
39D7 39D4 39C7 39B3 38B4
41C7 41C3 41B3 41A5 40D3
PLACE_NEAR=U5760.3:10MM
40C7 40C3
38A6 38A4
PP1V8_S4SW_SNS
ISNS_P5VCPUREGMISC_P
ISNS_P5VCPUREGMISC_N
432
PLACE_NEAR=U5760.4:10MM
3
4
7
INA190A3RSW
UQFN-THICKSTNCL
IN+
CRITICAL
IN-
ENABLE
KB backlite Current Sense (IKBC)
Gain: 200x, EDP: 0.17 A
Rsense: 0.05 (R5730) or Rsense SHORT
Vsense: 8.5 mV, Range: 0.41 A
EADC1: CH5
PP5V_G3S
PP5V_G3S_KBD
BYPASS=U5700.12::5MM
75D5 36C4
75B7
75A8
PP5V_S4SW_ISNS
41D7 41D3 41C3 41B3 41A5 40D3 40C7 40C3 39D7
38B4 38A6 38A4
39D4 39C7 39B3
74A6 43C7 43B7
PLACE_NEAR=U5730.3:10MM
R5730
0.005
1/3W
0306-SHORT
OMIT
1
1%
MF
ISNS_KBBLT_P
ISNS_KBBLT_N
43C2
432
PLACE_NEAR=U5730.4:10MM
EADC1
R5700
0
21
5%
1/20W
MF
0201
LOADISNS
BYPASS=U5700.12::5MM
PP5V_EADC1_AVDD
1
C5702
4.7UF
20%
10V
2
X5R
0402
LOADISNS
1
C5701
0.1UF
10%
10V
2
X5R-CERM
0201
PP1V8_S4SW_SNS
LOADISNS
BYPASS=U5700.12::3MM
12
13
21
DVDDAVDD
LOADISNS
BYPASS=U5780.6::5MM
1
6
VS
U5780
50x
GND
9
6
VS
U5760
100x
LOADISNS
GND
9
OUT
REF
NC
NC
NC
OUT
10
8
1
2
5
REF
NC
NC
NC
C5780
0.1UF
10%
6.3V
2
CERM-X5R
0201
ISNS_CALPE_IOUT
NC
NC
NC
LOADISNS
BYPASS=U5760.6::5MM
1
C5760
0.1UF
10%
6.3V
2
CERM-X5R
10
8
1
2
5
0201
ISNS_CPUREG_IOUT
NC
NC
NC
LOADISNS
LOADISNS
PLACE_NEAR=U7800.B14:5MM
R5789
4.53K
1/20W
LOADISNS
PLACE_NEAR=U7800.F14:5MM
1%
MF
201
21
PMU_CALPE_ISENSE
LOADRC:YES
1
C5789
0.022UF
10%
6.3V
2
X5R-CERM
0201
PLACE_NEAR=U7800.B14:5MM
GND_PMU_AVSS
R5769
4.53K
1/20W
1%
MF
201
21
PMU_CPUP5VREG_ISENSE
LOADRC:YES
1
C5769
2.2UF
20%
6.3V
2
X5R-CERM
0201
PLACE_NEAR=U7800.F14:5MM
GND_PMU_AVSS
OUT
38A2 38A5 38B5 38C5 39B5 39C5 39D1 40A2 40C1 40C5
41A3 41B1 41C5 43B5 43C5 61B6
44C3
OUT
38A2 38A5 38B5 38C5 39B5 39C5 39D1 40A2
40C1 40C5 41A3 41B1 41D5 43B5 43C5 61B6
BYPASS=U5730.6::5MM
1
C5730
0.1UF
10%
6.3V
2
CERM-X5R
0201
ISNS_KBBLT_IOUT
NOSTUFF
1
R5735
NC
NC
NC
20K
5%
1/20W
MF
201
2
PLACE_NEAR=U5730.10:5MM
LOADISNS
PLACE_NEAR=U5700.3:5MM
R5739
45.3K
1/20W
1%
MF
201
21
EADC1_KBBLT_ISENSE
1
C5739
2.2UF
20%
6.3V
2
X5R-CERM
0201
PLACE_NEAR=U5700.3:5MM
LOADISNS
GND_EADC1_COM
41A8
38A2 38A6 38B1 39A1 40D1 41A8 41C1 43A5
3
4
7
6
VS
U5730
INA190A4IRSW
UQFN
CRITICAL
IN+
IN-
ENABLE
200x
LOADISNS
GND
9
OUT
REF
NC
NC
NC
10
8
1
2
5
CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION
2117S0008 LOADRC:NO
0
1 LOADRC:NO117S0008
1
C5703
0.1UF
10%
10V
2
X5R-CERM
0201
LOADISNS
RES,MTL FLIM,100K,1/16W,0201,SMD,LF
RES,MTL FLIM,100K,1/16W,0201,SMD,LF
RES,MTL FLIM,100K,1/16W,0201,SMD,LF
BYPASS=U5700.21::3MM
C5789,C5769
LOADRC:NO117S0008
C5749
USBC RIGHT 5V Current Sense (IUR5)
Gain: 100x, EDP: 6.6 A
Rsense: 0.002 (R3530_VWR)
Vsense: 13.2 mV, Range: 7.5 A
MUX: B1
44C3
55D3
55C3
55A3
55A3 55B2 55D3
55A3 55C3 55D2
55A3 55B2 55C2
CPU VCCin Current Sense (ICVC)
Gain: 62.45x, EDP: 80 A
Rsense: 3x of 0.00075 (R7410, R7420, R7430), Rsum: 0.00025
Vsense: 20 mV, Range: 80.06 A
MUX: B6
IN
IN
IN
IN
IN
CPUCORE_ISNS1_P
PLACE_NEAR=R7210.4:5MM
CPUCORE_ISNS2_P
PLACE_NEAR=R7220.4:5MM
CPUCORE_ISNS3_P
PLACE_NEAR=R7230.4:5MM
CPUCORE_ISNS1_N
PLACE_NEAR=R7210.3:5MM
CPUCORE_ISNS2_N
PLACE_NEAR=R7220.3:5MM
LOADISNS
LOADISNS
LOADISNS
LOADISNS
LOADISNS
R5745
4.42K
0.1%
1/20W
MF
0201
R5746
4.42K
0.1%
1/20W
MF
0201
R5747
4.42K
0.1%
1/20W
MF
0201
R5748
4.42K
0.1%
1/20W
MF
0201
R5757
4.42K
0.1%
1/20W
MF
0201
NO_XNET_CONNECTION=1
21
NO_XNET_CONNECTION=1
21
ISNS_CPUVCCIN_R_P
21
NO_XNET_CONNECTION=1
NO_XNET_CONNECTION=1
21
NO_XNET_CONNECTION=1
21
ISNS_CPUVCCIN_R_N
40D3 40C7 40C3 39D7 39D4 39C7 39B3 38B4 38A6 38A4
74A6 43C7 43B7 41D7 41C7 41C3 41B3 41A5
LOADISNS
R5742
3.01K
1%
1/20W
MF
201
CPUVCCIN_ISNS_P
21
R5743
3.01K
1/20W
LOADISNS
1%
MF
201
21
CPUVCCIN_ISNS_N
LOADISNS
1
R5744
280K
1%
1/20W
MF
201
2
NO_XNET_CONNECTION=1
R5758
IN
CPUCORE_ISNS3_N
PLACE_NEAR=R7230.3:5MM
LOADISNS
4.42K
0.1%
1/20W
0201
21
NO_XNET_CONNECTION=1
MF
LPDDR 1.8V Current Sense (IM1C)
Gain: 500x, EDP: 0.17 A
Rsense: 0.05 (R5720) or Rsense SHORT
74A6
Vsense: 8.5 mV, Range: 0.16 A
43C7 43B7 41D7 41D3 41C7 41B3 41A5 40D3 40C7 40C3
39D7 39D4 39C7 39B3 38B4 38A6 38A4
PP1V8_S4SW_SNS
EADC1: CH7
74D4
PP1V8_S3
PLACE_NEAR=U5720.3:10MM
1
ISNS_P1V8LPDDR_P
ISNS_P1V8LPDDR_N
432
74D6
PP1V8_S3_MEM
43B2
R5720
0.005
1/3W
43B2
0306-SHORT
OMIT
1%
MF
PLACE_NEAR=U5720.4:10MM
USBC LEFT 5V Current Sense (IUL5)
Gain: 100x, EDP: 6.6 A
Rsense: 0.002 (R3530_VXT)
Vsense: 13.2 mV, Range: 7.5 A
MUX: A2
40D3 40C7 40C3 39D7 39D4 39C7 39B3 38B4 38A6 38A4
74A6 43C7 43B7 41D7 41D3 41C7 41C3 41A5
PLACE_NEAR=R3530_VXT.4:5MM
P5VUSBC_POS_XT
19B3
P5VUSBC_NEG_XT
19B3
PLACE_NEAR=R3530_VXT.3:5MM
PP1V8_S4SW_SNS
3
IN+
4
IN-
7
ENABLE
U5750
INA190A3RSW
UQFN-THICKSTNCL
CRITICAL
100x
6
VS
GND
9
PP1V8_S4SW_SNS
6
VS
U5720
INA190A5
UQFN
3
4
7
CRITICAL
IN+
IN-
ENABLE
10
OUT
8
REF
1
NC
2
NC
5
NC
500x
LOADISNS
GND
9
BYPASS=U5750.6::5MM
1
C5750
2
ISNS_P5VUSBC_XT_IOUT
NC
NC
NC
1
3
LOADISNS
OUT
REF
NC
NC
NC
0.1UF
10%
6.3V
CERM-X5R
0201
+
-
5
V+
V-
2
R5741
280K
1%
1/20W
MF
201
1
2
10
ISNS_LPDDR_IOUT
8
1
NC
2
NC
5
NC
1
U5740
2
OPA333DCKG4
SC70-5
4
CPUVCCIN_ISUM_IOUT
CRITICAL
LOADISNS
21
NO_XNET_CONNECTION=1
LOADISNS
BYPASS=U5720.6::5MM
C5720
0.1UF
10%
6.3V
CERM-X5R
0201
LOADISNS
PLACE_NEAR=U7800.E13:5MM
R5729
45.3K
1/20W
PLACE_NEAR=U7800.A14:5MM
R5759
4.53K
1/20W
1%
MF
201
21
PMU_P5VUSBC_XT_ISENSE
BYPASS=U5740.5::5MM
LOADISNS
C5740
0.1UF
10%
6.3V
CERM-X5R
0201
LOADISNS
PLACE_NEAR=U3900.AG4:5MM
R5749
1%
MF
201
4.53K
1/20W
21
EADC1_DDR1V8_ISENSE
1
C5759
2.2UF
20%
6.3V
2
X5R-CERM
0201
PLACE_NEAR=U7800.A14:5MM
GND_PMU_AVSS
1%
MF
201
21
SMC_CPUVCCIN_ISENSE
PLACE_NEAR=U3900.AG4:5MM
LOADISNS
1
C5729
2.2UF
20%
6.3V
2
X5R-CERM
0201
PLACE_NEAR=U7800.E13:5MM
GND_EADC1_COM
44D3
OUT
LOADRC:YES
1
C5749
2.2UF
20%
6.3V
2
X5R-CERM
0201
GND_SMC_AVSS
41A8
44C3
OUT
38A2 38A5 38B5 38C5 39B5 39C5 39D1 40A2 40C1
40C5 41A3 41C5 41D5 43B5 43C5 61B6
40A2
24A4 31A6 38B1 38C1
38C3 38D1 38D5 39A4
38A2 38A6 38B1 39A1 40D1
41A8 41B5 43A5
D
C
B
A
38B5
38B1
40D1
38B1
39A1
41C5
43B5
41C1
41C1 43A5
38A2 38A6 38B1
39A1 40D1 41B5
EADC1_LCDBKLT_ISENSE
EADC1_SPKRAMPL_ISENSE
EADC1_BMON_DISCRETE_ISENSE
EADC1_P3V3RTC_HI_ISENSE
EADC1_PP1V8_WLANBT_ISENSE
EADC1_KBBLT_ISENSE
EADC1_MESA_ISENSE
EADC1_DDR1V8_ISENSE
GND_EADC1_COM
22
CH0
23
CH1
24
CH2
1
CH3
2
CH4
3
CH5
4
CH6
5
CH7
6
COM
XW5700
SM
2 1
PLACE_NEAR=U5700.6:1MM
PLACE_NEAR=U5700.25:1MM
CRITICAL
LOADISNS
GND
9
11
10
U5700
LTC2309
QFN
VREF
REFCOMP
THRM
PAD
25
20
19
18
BYPASS=U5700.8::3MM
(Write: 0x10 Read: 0x11)
AD0
AD1
SDA
SCL
14
15
17
16
7
8
SMBUS_2_SDA_Q
SMBUS_2_SCL_Q
PP2V5_ADC1_VREF
ADC1_REFCOMP
1
C5705
0.1UF
10%
6.3V
2
CERM-X5R
0201
LOADISNS
36C3
36C3
1
C5700
2.2UF
20%
6.3V
2
X5R-CERM
0201
1
C5706
10UF
20%
10V
2
X5R-CERM
0402-10
LOADISNS
LOADISNS
BYPASS=U5700.7::5MM
BYPASS=U5700.8::5MM
40D3 40C7 40C3 39D7 39D4 39C7 39B3 38B4 38A6 38A4
74A6 43C7 43B7 41D7 41D3 41C7 41C3 41B3
PLACE_NEAR=R3530_VWR.4:5MM
P5VUSBC_POS_WR
19B3
P5VUSBC_NEG_WR
19B3
PLACE_NEAR=R3530_VWR.3:5MM
PP1V8_S4SW_SNS
3
IN+
4
IN-
7
ENABLE
6
VS
U5770
INA190A3RSW
UQFN-THICKSTNCL
OUT
REF
CRITICAL
100x
GND
9
NC
NC
NC
BYPASS=U5770.6::5MM
1
C5770
0.1UF
10%
6.3V
2
CERM-X5R
10
8
1
2
5
0201
ISNS_P5VUSBC_WR_IOUT
NC
NC
NC
PLACE_NEAR=U7800.E13:5MM
R5779
4.53K
1/20W
1%
MF
201
21
PMU_P5VUSBC_WR_ISENSE
1
C5779
2.2UF
20%
6.3V
2
X5R-CERM
0201
PLACE_NEAR=U7800.E13:5MM
GND_PMU_AVSS
44C3
OUT
38A2 38A5 38B5 38C5 39B5 39C5 39D1 40A2
40C1 40C5 41B1 41C5 41D5 43B5 43C5 61B6
BOM_COST_GROUP=SENSORS
PAGE TITLE
Power Sensors: Extended 2
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
57 OF 150
SHEET
41 OF 109
SIZE
D
A
SYNC_DATE=12/15/2019SYNC_MASTER=Jack
8
67
35 4
2
1
D
www.haojiyoubbs.com
QQ微信：181806465
Thermal Sensor A
TBT/USB/DP Retimer Die
I2C Write: 0x90, I2C Read: 0x91
Thermal Diode: Retimer Die (TTXD)
Placement Note:
The P leg connects to THERMDA of Retimer
The N leg connects to pin K11.
Thermal Diode: Retimer Die (TTTD)
Placement Note:
The P leg connects to THERMDA of Retimer
The N leg connects to pin K11.
Thermal Diode: Retimer Die (TTWD)
Placement Note:
The P leg connects to THERMDA of Retimer
The N leg connects to pin K11.
TBT_X_THERM_D_P
19B3 42B5
NO_TEST=1
TBT_X_THERM_D_N
19B3
NO_TEST=1
TBT_T_THERM_D_P
NO_TEST=1
TBT_T_THERM_D_N
19B3
NO_TEST=1
TBT_W_THERM_D_P
NO_TEST=1
TBT_W_THERM_D_N
19B3
NO_TEST=1
678
3 245
1
R5850
0
79C8 75B1 42B6
NO_XNET_CONNECTION=1
PLACE_NEAR=U5870.A2:5MM
C5851
100PF
PLACE_NEAR=U5870.A3:5MM
NO_XNET_CONNECTION=1
PLACE_NEAR=U5850.2:5MM
C5871
100PF
PLACE_NEAR=U5850.3:5MM
NO_XNET_CONNECTION=1
PLACE_NEAR=U5870.D1:5MM
C5877
100PF
PLACE_NEAR=U5870.A3:5MM
PP1V8_S5
1
5%
25V
2
C0G
0201
1
5%
25V
2
C0G
0201
1
5%
25V
2
C0G
0201
NO_XNET_CONNECTION=1
XW5851
SM
2 1
NO_XNET_CONNECTION=1
XW5871
SM
2 1
NO_XNET_CONNECTION=1
XW5877
SM
2 1
1/20W
PLACE_NEAR=U5870.A3:5MM
THMSNSB_DN TBT_T_THERM_D_P
19B3 42D4
PLACE_NEAR=U5850.3:5MM
THMSNSA_DN
19B3 42B5
PLACE_NEAR=U5870.A3:5MM
THMSNSB_DN
21
5%
MF
0201
42A5 42C5 19B3 42D5
42D4
42A5 42C5 42D5
PP1V8_S5_THMSNSA_R
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=1.8V
THMSNSA_DN
42C5
NO_TEST=1
BYPASS=U5850.1:6:5MM
1
C5850
0.1UF
10%
6.3V
2
CERM-X5R
0201
PLACE_SIDE=BOTTOM
1
V+
U5850
TMP461-S
10
2
D+
3
D-
5
A0
WQFN
CRITICAL
ALERT*/THERM2*
THERM*A1
GND
6
SCL
SDA
9
I2C_SNS1_S0_SCL
8
I2C_SNS1_S0_SDA
7
NC
4
NC
Thermal Sensor: Airflow Left (TaLC)
Placement Note:
Place U5850 on BOTTOM side, at lower corner
near left FAN.
D
36B6
36B6
C
Thermal Diode: Retimer Die (TTRD)
Placement Note:
The P leg connects to THERMDA of Retimer
The N leg connects to pin K11.
TBT_R_THERM_D_P
NO_TEST=1
TBT_R_THERM_D_N
19B3
NO_TEST=1
79C8 75B1 42D5
NO_XNET_CONNECTION=1
PLACE_NEAR=U5870.C1:5MM
C5878
100PF
PLACE_NEAR=U5870.A3:5MM
PP1V8_S5
5%
25V
C0G
0201
1
2
XW5878
NO_XNET_CONNECTION=1
SM
2 1
PLACE_NEAR=U5870.A3:5MM
THMSNSB_DN
Thermal Sensor B & CPU High Peak Detection:
CPU Proximity, Memory Proximity, Fin Stack Left, Fin Stack Right
19B3 42B5
R5870
0
5%
1/20W
MF
0201
42A5 42C5 42D5
21
PP1V8_S5_THMSNSB_R
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=1.8V
C
B
A
U5870 I2C Address:
TMP468 is 0x92/0x93.
Thermal Diode: Fin Stack Left (Th2H)
Placement Note:
Place Q5875, Airflow thermal indicator, above
the X100, on the TOP side.
Thermal Diode: Fin Stack Right (Th1H)
Placement Note:
Place Q5876 at corner near right Fan,
on the TOP side.
Thermal Diode: Memory Proximity (TM0P)
Placement Note:
Place Q5873 between two rows of Memory devices,
between channel A and B, on the BOTTOM side.
CPU PROXIMITY (TC0P)
Placement note:
Place Q5872 on TOP under CPU
Thermal Sensor: Airflow Right (TaRC)
Placement Note:
Place Q5874 on BOTTOM side, at lower corner
near right FAN.
Q5875
MMBT3904LP-7
PLACE_SIDE=TOP
DFN1006-3
Q5876
MMBT3904LP-7
PLACE_SIDE=TOP
DFN1006-3
Q5873
MMBT3904LP-7
PLACE_SIDE=BOTTOM
DFN1006-3
Q5872
MMBT3904LP-7
PLACE_SIDE=TOP
DFN1006-3
Q5874
MMBT3904LP-7
PLACE_SIDE=BOTTOM
DFN1006-3
CPUTHMSNS_D5_P
3
1
2
CRITICAL
CPUTHMSNS_D5_N
CPUTHMSNS_D6_P
3
1
2
CRITICAL
CPUTHMSNS_D6_N
CPUTHMSNS_D3_P
3
1
2
CRITICAL
CPUTHMSNS_D3_N
CPUTHMSNS_D2_P
3
1
2
CRITICAL
CPUTHMSNS_D2_N
CPUTHMSNS_D4_P
3
1
2
CRITICAL
CPUTHMSNS_D4_N
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_XNET_CONNECTION=1
PLACE_NEAR=U5870.A1:5MM
C5875
100PF
PLACE_NEAR=U5870.A3:5MM
NO_XNET_CONNECTION=1
PLACE_NEAR=U5870.B1:5MM
C5876
100PF
PLACE_NEAR=U5870.A3:5MM
NO_XNET_CONNECTION=1
PLACE_NEAR=U5870.B2:5MM
C5873
100PF
PLACE_NEAR=U5870.A3:5MM
NO_XNET_CONNECTION=1
PLACE_NEAR=U5870.C2:5MM
C5872
100PF
PLACE_NEAR=U5870.A3:5MM
NO_XNET_CONNECTION=1
PLACE_NEAR=U5870.D2:5MM
C5874
100PF
PLACE_NEAR=U5870.A3:5MM
5%
25V
C0G
0201
5%
25V
C0G
0201
5%
25V
C0G
0201
5%
25V
C0G
0201
5%
25V
C0G
0201
TBT_W_THERM_D_P
19B3 42C5
TBT_R_THERM_D_P
19B3 42C5
TBT_X_THERM_D_P
19B3 42D6
1
NO_XNET_CONNECTION=1
2
XW5875
SM
2 1
1
NO_XNET_CONNECTION=1
2
XW5876
SM
2 1
1
NO_XNET_CONNECTION=1
2
XW5873
SM
2 1
1
NO_XNET_CONNECTION=1
2
XW5872
SM
2 1
1
NO_XNET_CONNECTION=1
2
XW5874
SM
2 1
PLACE_NEAR=U5870.A3:5MM
THMSNSB_DN
42C5 42D5
NO_TEST=1
PLACE_NEAR=U5870.A3:5MM
PLACE_NEAR=U5870.A3:5MM
PLACE_NEAR=U5870.A3:5MM
PLACE_NEAR=U5870.A3:5MM
BYPASS=U5870.D3::5MM
1
C5870
0.1UF
10%
6.3V
2
CERM-X5R
PLACE_SIDE=BOTTOM
D3
V+
0201
U5870
TMP468
A1
B1
C1
D1
A2
B2
C2
D2
A3
B4
D1+
D2+
D3+
D4+
D5+
D6+
D7+
D8+
D-
ADD
DSBGA
CRITICAL
THERM2*
THERM*
GND
A4
SCL
SDA
D4
I2C_SNS1_S0_SCL
C4
I2C_SNS1_S0_SDA
C3
NC
B3
NC
36A6
36A6
CPUTHMSNS_ADDR_SEL
Thermal Sensor: Wireless Proximity (TW0P)
Placement Note:
Place U5870 near U3730,
on the BOTTOM side.
BOM_COST_GROUP=SENSORS
1
R5871
100K
5%
1/20W
MF
201
2
SYNC_MASTER=X1412_JACK SYNC_DATE=04/25/2019
PAGE TITLE
Thermal Sensors
SIZE
D
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
58 OF 150
SHEET
42 OF 109
B
A
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
Probe Points for Power Validation
D
C
B
A
Trackpad 5V Current Sense
75B7
75A8
PP5V_G3S
PP5V_G3S_TPAD
R5940
0.005
1/3W
0306-SHORT
OMIT
1%
MF
1
ISNS_PP5V_TPAD_P
ISNS_PP5V_TPAD_N
432
43C2
43C2
DDR VDDQ 0.6V Current Sense (IMQC)
Gain: 200x, EDP: 0.9 A
Rsense: 0.005 (R5960) or Rsense SHORT
Vsense: 4.5 mV, Range: 1.5 A
MUX: B4
40D3 40C7 40C3 39D7 39D4 39C7 39B3 38B4 38A6 38A4
74A6 43C7 43B7 41D7 41D3 41C7 41C3 41B3 41A5
PP1V8_S4SW_SNS
PLACE_NEAR=R8156.4:10MM
ISNS_DDRVDDQ_P
43A2 63B5
ISNS_DDRVDDQ_N
43A2 63B5
3
4
PLACE_NEAR=R8156.3:10MM
7
Ocarina Current Sense (IHCC)
Gain: 100x, EDP: 1.16 A
Rsense: 0.01 (R5920)
Vsense: 11.6 mV, Range: 1.5 A
40D3 40C7 40C3 39D7 39D4 39C7 39B3 38B4 38A6 38A4
74A6 43C7 43B7 41D7 41D3 41C7 41C3 41B3 41A5
PP1V8_S4SW_SNS
MUX: A5
75C4
75B6
PP3V3_G3H_RTC
NO_XNET_CONNECTION=1
CRITICAL
PP3V3_G3H_SSD0
43C2
0306
MF
1/3W
1%
0.01
R5920
PLACE_NEAR=U5920.3:10MM
432
ISNS_OCARINA_P
ISNS_OCARINA_N
1
PLACE_NEAR=U5920.4:10MM
MESA Current Sense (IIDC)
Gain: 200x, EDP: 0.176 A
Rsense: 0.1 (R5900) or Rsense SHORT
Vsense: 17.6 mV, Range: 0.2 A
EADC1: CH6
40D3 40C7 40C3 39D7 39D4 39C7 39B3 38B4 38A6 38A4
74A6 43C7 41D7 41D3 41C7 41C3 41B3 41A5
PP1V8_S4SW_SNS
PLACE_NEAR=U5900.3:10MM
75C4
75B6
PP3V3_G3H_RTC
NO_XNET_CONNECTION=1
43C2
PP3V3_G3H_RTC_MESA
R5900
0.005
1/3W
43C2
0306-SHORT
OMIT
1%
MF
ISNS_MESA_P
1
ISNS_MESA_N
432
3
4
7
IN+
IN-
ENABLE
PLACE_NEAR=U5900.4:10MM
EADC Current Sense
EDP: 6m A
Rsense: 0.1 (R5950) or Rsense SHORT
Vsense: 0.6 mV
75D5
75D6
PP5V_S4SW
NO_XNET_CONNECTION=1
R5950
OMIT
PLACE_SIDE=BOTTOM
PP5V_S4SW_ISNS
0.005
0306-SHORT
1%
1/3W
MF
1
ISNS_EADC_P
ISNS_EADC_N
432
43B2
43B2
LCD Panel 5V Current Sense
75D5
75D6
6
VS
U5960
INA190A4IRSW
UQFN
CRITICAL
IN+
IN-
ENABLE
INA190A4IRSW
200x
LOADISNS
GND
9
INA190A3RSW
UQFN-THICKSTNCL
3
IN+
4
7
CRITICAL
IN-
ENABLE
6
VS
U5900
UQFN
CRITICAL
200x
LOADISNS
GND
9
U5920
100x
OUT
REF
PP5V_S0SW_LCD_ISNS_R
PP5V_S0SW_LCD
1
RES,MTL FLIM,100K,1/16W,0201,SMD,LF
LOADISNS
BYPASS=U5960.6::5MM
1
C5960
0.1UF
10%
6.3V
2
CERM-X5R
0201
10
OUT
REF
NC
NC
NC
ISNS_DDRVDDQ_IOUT
8
1
NC
2
NC
5
NC
NOSTUFF
1
R5965
20K
5%
1/20W
MF
201
2
PLACE_NEAR=U5960.10:5MM
BYPASS=U5920.6::5MM
6
VS
GND
9
NC
NC
NC
10
8
1
2
5
OUT
REF
NC
NC
NC
LOADISNS
BYPASS=U5900.6::5MM
1
C5900
0.1UF
10%
6.3V
2
CERM-X5R
0201
ISNS_MESA_IOUT
NC
NC
NC
1
C5920
0.1UF
10%
6.3V
2
CERM-X5R
0201
10
ISNS_OCARINA_IOUT
8
1
NC
2
NC
5
NC
NOSTUFF
1
R5905
20K
5%
1/20W
MF
201
2
PLACE_NEAR=U5900.10:5MM
R5960
0.005
1/3W
0306-SHORT
OMIT
1
1%
MF
ISNS_PP5V_LCD_P
ISNS_PP5V_LCD_N
432
C5969
LOADISNS
PLACE_NEAR=U7800.G13:5MM
R5969
4.53K
1/20W
21
PMU_DDRVDDQ_ISENSE
1%
MF
201
LOADRC:YES
1
C5969
2.2UF
20%
6.3V
2
X5R-CERM
0201
PLACE_NEAR=U7800.G13:5MM
GND_PMU_AVSS
PLACE_NEAR=U7800.D15:5MM
R5929
4.53K
1/20W
PLACE_NEAR=U5700.4:5MM
LOADISNS
1%
MF
201
21
PMU_OCARINA_ISENSE
R5909
45.3K
1/20W
1%
MF
201
21
EADC1_MESA_ISENSE
LOADISNS
1
C5909
2.2UF
20%
6.3V
2
X5R-CERM
0201
PLACE_NEAR=U5700.4:5MM
GND_EADC1_COM
43C2
43C2
CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION
44C3
OUT
38A2 38A5 38B5 38C5 39B5 39C5 39D1 40A2 40C1 40C5
41A3 41B1 41C5 41D5 43B5 61B6
44C3
OUT
1
C5929
2.2UF
20%
6.3V
2
X5R-CERM
0201
PLACE_NEAR=U7800.D15:5MM
GND_PMU_AVSS
38A2 38A6 38B1 39A1 40D1 41A8 41B5 41C1
38A2 38A5 38B5 38C5 39B5 39C5 39D1 40A2 40C1 40C5
41A3 41B1 41C5 41D5 43C5 61B6
41A8
OUT
TP5983
TP-P5
TP5984
TP-P5
TP5985
1
TP-P5
TP5986
1
TP-P5
TP
TP
TP
TP
LOADRC:NO117S0008
PLACE_SIDE=TOP
PLACE_SIDE=TOP
PLACE_SIDE=TOP
PLACE_SIDE=TOP
38D8
38D8
38C7
38C7
38B7
38B7
38B4
38B4
38A8
38A8
38B8 65D7
38B8 65D7
38B4
38B4
38A4
38A4
53C6
53C5
38C2 53A4
40D4 53C4
40D4 53C3
38C2 53A4
40A7
40A7
39C8 63C3
39C8 63C3
39B7
39B7
39B7
39A7
39A7
39D4 56C3
39D4 56C2
41D4
41D4
40C4
40C4
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
ISNS_HS_COMPUTING_P
ISNS_HS_COMPUTING_N
ISNS_HS_OTHER5V_P
ISNS_HS_OTHER5V_N
ISNS_HS_OTHER3V3_P
ISNS_HS_OTHER3V3_N
ISNS_HS_3V3RTC_P
ISNS_HS_3V3RTC_N
ISNS_SSDNAND_P
ISNS_SSDNAND_N
ISNS_LCDBKLT_P
ISNS_LCDBKLT_N
ISNS_SPKRAMP_LEFT_P
ISNS_SPKRAMP_LEFT_N
ISNS_PP1V8_S5_P
ISNS_PP1V8_S5_N
CHGR_CSI_R_P
CHGR_CSI_R_N
CHGR_AMON
CHGR_CSO_R_P
CHGR_CSO_R_N
CHGR_BMON
ISNS_ALSCAM_P
ISNS_ALSCAM_N
ISNS_CPUDDR_P
ISNS_CPUDDR_N
ISNS_CPUVDDQ_P
ISNS_CPUVDDQ_N
ISNS_DFR3V3_N
ISNS_WLANBTP3V3_P
ISNS_WLANBTP3V3_N
ISNS_VCCINAUX_P
ISNS_VCCINAUX_N
ISNS_CPUVCCIN_R_P
ISNS_CPUVCCIN_R_N
ISNS_TBT_XT_P
ISNS_TBT_XT_N
TP5901
1
TP
TP-P5
TP5902
1
TP
TP-P5
TP5903
1
TP
TP-P5
TP5904
1
TP
TP-P5
TP5905
1
TP
TP-P5
TP5906
1
TP
TP-P5
TP5907
1
TP
TP-P5
TP5908
1
TP
TP-P5
TP5909
TP
TP-P5
TP5910
TP
TP-P5
TP5911
TP
TP-P5
TP5912
TP
TP-P5
TP5913
TP
TP-P5
TP5914
TP
TP-P5
TP5915
TP
TP-P5
TP5916
TP
TP-P5
TP5917
TP
TP-P5
TP5918
TP
TP-P5
TP5919
TP
TP-P5
TP5981
TP
TP-P5
TP5920
TP
TP-P5
TP5921
TP
TP-P5
TP5922
TP
TP-P5
TP5982
TP
TP-P5
TP5923
TP
TP-P5
TP5924
TP
TP-P5
TP5925
TP
TP-P5
TP5926
TP
TP-P5
TP5927
TP
TP-P5
TP5928
TP
TP-P5
TP5929
TP
TP-P5
TP5930
TP
TP-P5
TP5931
TP
TP-P5
TP5932
TP
TP-P5
TP5933
TP
TP-P5
TP5934
TP
TP-P5
TP5935
TP
TP-P5
TP5936
TP
TP-P5
TP5937
TP
TP-P5
TP5938
TP
TP-P5
PLACE_SIDE=TOP
PLACE_NEAR=R5400:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5400:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5410:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5410:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5440:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5440:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5420:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5420:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5460:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5460:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R8400:30MM
PLACE_SIDE=TOP
PLACE_NEAR=R8400:30MM
PLACE_SIDE=TOP
PLACE_NEAR=R54A0:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R54A0:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R54B0:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R54B0:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R7020:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R7020:5MM
PLACE_SIDE=TOP
PLACE_SIDE=TOP
PLACE_NEAR=TP5919:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R7060:30MM
PLACE_SIDE=TOP
PLACE_NEAR=R7060:30MM
PLACE_SIDE=TOP
PLACE_SIDE=TOP
PLACE_NEAR=TP5922:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5610:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5610:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R8118:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R8118:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5510:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5510:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5520:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5520:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5530:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5530:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R7430:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R7430:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5742:10MM
PLACE_SIDE=TOP
PLACE_NEAR=R5743:10MM
PLACE_SIDE=TOP
PLACE_NEAR=R5640:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5640:5MM
BOM_COST_GROUP=SENSORS
40C7 66C4
40C7 66C4
40B7
40B7
39A4
39A4
41D7
41D7
41C7
41B7
40B4
40A4
38C3 44D3
38D1 44D3
40D7
40D7
41C8
41C8
41C3
41C3
43C7 63B5 39B7
43C7 63B5
40B3
40B3
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
ISNS_LCDPANEL_P
ISNS_LCDPANEL_N
ISNS_PP3V3_TPAD_P
ISNS_PP3V3_TPAD_N
ISNS_P1V8_WLANBT_P
ISNS_P1V8_WLANBT_N
ISNS_CALPE_P
ISNS_CALPE_N
ISNS_KBBLT_P
ISNS_KBBLT_N
43D7
43D7
43D5
43D5
43B7
43B7
43B7
43A7
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
43A7
43A7
IN
IN
IN
IN
PAGE TITLE
ISNS_PP5V_TPAD_P
ISNS_PP5V_TPAD_N
ISNS_PP5V_LCD_P
ISNS_PP5V_LCD_N
ISNS_OCARINA_P
ISNS_OCARINA_N
ISNS_MESA_P
ISNS_MESA_N
CPUVSENSE_IN
CPUVASENSE_IN
SMC_DCIN_VSENSE
SMC_PBUS_VSENSE
ISNS_PP3V3_KBD_P
ISNS_PP3V3_KBD_N
ISNS_P5VCPUREGMISC_P
ISNS_P5VCPUREGMISC_N
ISNS_P1V8LPDDR_P
ISNS_P1V8LPDDR_N
ISNS_EADC_P
ISNS_EADC_N
ISNS_DDRVDDQ_PISNS_DFR3V3_P
ISNS_DDRVDDQ_N
ISNS_TBT_WR_P
ISNS_TBT_WR_N
Power Sensors:Extended 3
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
TP5939
TP
TP-P5
TP5940
TP
TP-P5
TP5941
TP
TP-P5
TP5942
TP
TP-P5
TP5943
TP
TP-P5
TP5944
TP
TP-P5
TP5945
1
TP
TP-P5
TP5946
1
TP
TP-P5
TP5947
1
TP
TP-P5
TP5948
1
TP
TP-P5
TP5953
TP
TP-P5
TP5954
TP
TP-P5
TP5955
TP
TP-P5
TP5956
TP
TP-P5
TP5957
TP
TP-P5
TP5958
TP
TP-P5
TP5959
TP
TP-P5
TP5960
TP
TP-P5
TP5961
TP
TP-P5
TP5962
TP
TP-P5
TP5963
TP
TP-P5
TP5964
TP
TP-P5
TP5965
1
TP
TP-P5
TP5966
1
TP
TP-P5
TP5967
1
TP
TP-P5
TP5968
1
TP
TP-P5
TP5969
1
TP
TP-P5
TP5970
1
TP
TP-P5
TP5973
1
TP
TP-P5
TP5974
1
TP
TP-P5
TP5975
1
TP
TP-P5
TP5976
1
TP
TP-P5
TP5977
1
TP
TP-P5
TP5978
1
TP
TP-P5
PLACE_SIDE=TOP
PLACE_NEAR=R8520:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R8520:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5650:10MM
PLACE_SIDE=TOP
PLACE_NEAR=R5650:10MM
PLACE_SIDE=TOP
PLACE_NEAR=R5580:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5580:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5780:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5780:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5730:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5730:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5940:10MM
PLACE_SIDE=TOP
PLACE_NEAR=R5940:10MM
PLACE_SIDE=TOP
PLACE_NEAR=R5960:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5960:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5920:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5920:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5900:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5900:5MM
PLACE_SIDE=TOP
PLACE_NEAR=XW5680:5MM
PLACE_SIDE=TOP
PLACE_NEAR=XW5600:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5498:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5488:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5690:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5690:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5760:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5760:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5720:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5720:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5950:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5950:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R8156:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R8156:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5670:5MM
PLACE_SIDE=TOP
PLACE_NEAR=R5670:5MM
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
59 OF 150
SHEET
43 OF 109
SIZE
D
D
C
B
A
SYNC_DATE=12/15/2019SYNC_MASTER=Jack
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
C
OUT
IN
NOSTUFF
R6001
100K
SMC_FAN_1_PWM
R6002
100K
1/20W
5%
MF
201
5%
MF
201
FAN CONTROL
PP1V8_G3S
47K
5%
MF
201
1
2
FAN_LT_TACH
FAN_LT_PWM
44B7 77A5
44A6 44B7 77A5
R6000
1/20W
R6005
47K
1/20W
1
1
GS
2
2
1
2
21
5%
MF
201
Q6000
DMN32D2LFB4
DFN1006H4-3 DFN1006H4-3
SYM_VER_3
D
3
SMC ADC Assignments
KBL-U NB Assignments
75D1 44D4
47K
5%
MF
201
1
2
R6050
1/20W
R6055
19B3 24A3 19B3 24A3
OUT
24A3 24A3
IN
SMC_FAN_0_TACHSMC_FAN_1_TACH
NOSTUFF
R6051
100K
1/20W1/20W
SMC_FAN_0_PWM
R6052
100K
1/20W
5%
MF
201
5%
MF
201
1
2
1
2
47K
1/20W
1
GS
2
21
5%
MF
201
Q6050
DMN32D2LFB4
SYM_VER_3
D
3
PP1V8_G3S
FAN_RT_TACH
FAN_RT_PWM
44B6 77A5
44A6 44B6 77A5
75D1 44D6
38D5
38D1 43B2
38C1
38C1
38C3 43B2
39A4
41D1
40B2
PMU ADC Assignments
38C5
IN
38C5
IN
41B1
IN
41D5
IN
39C5
IN
43B5
IN
38A5
IN
41C5
IN
40C5
IN
41A3
IN
39C5
IN
38A2
IN
43C5
IN
40A2
IN
39D1
IN
40C1
IN
SMC_CPU_HS_ISENSE
IN
MAKE_BASE=TRUE
SMC_PBUS_VSENSE
IN
MAKE_BASE=TRUE
SMC_BMON_ISENSE
IN
MAKE_BASE=TRUE
SMC_DCIN_ISENSE
IN
MAKE_BASE=TRUE
SMC_DCIN_VSENSE
IN
MAKE_BASE=TRUE
SMC_PP3V3_WLANBT_ISENSE
IN
MAKE_BASE=TRUE
SMC_CPUVCCIN_ISENSE
IN
MAKE_BASE=TRUE
SMC_CPUVCCIN_VSENSE
IN
MAKE_BASE=TRUE
PMU_OTHER3V3_HI_ISENSE
MAKE_BASE=TRUE
PMU_OTHER5V_HI_ISENSE
MAKE_BASE=TRUE
PMU_P5VUSBC_XT_ISENSE
MAKE_BASE=TRUE
PMU_CALPE_ISENSE
MAKE_BASE=TRUE
PMU_DDR1V2_ISENSE
MAKE_BASE=TRUE
PMU_OCARINA_ISENSE
MAKE_BASE=TRUE
PMU_SSDNAND_ISENSE
MAKE_BASE=TRUE
PMU_CPUP5VREG_ISENSE
MAKE_BASE=TRUE
NC_PMU_AMUX_AY
MAKE_BASE=TRUE
PMU_LCDPANEL_ISENSE
MAKE_BASE=TRUE
PMU_P5VUSBC_WR_ISENSE
MAKE_BASE=TRUE
PMU_CPUDDR_ISENSE
MAKE_BASE=TRUE
PMU_PP1V8S5_ISENSE
MAKE_BASE=TRUE
PMU_DDRVDDQ_ISENSE
MAKE_BASE=TRUE
PMU_CPUVA_VSENSE
MAKE_BASE=TRUE
PMU_CPUVA_ISENSE
MAKE_BASE=TRUE
PMU_TBT_XT_ISENSE
MAKE_BASE=TRUE
NC_PMU_AMUX_BY
MAKE_BASE=TRUE
SMC_CPU_HS_ISENSE
SMC_PBUS_VSENSE
SMC_BMON_ISENSE
SMC_DCIN_ISENSE
SMC_DCIN_VSENSE
SMC_PP3V3_WLANBT_ISENSE
SMC_CPUVCCIN_ISENSE
SMC_CPUVCCIN_VSENSE
PMU_OTHER3V3_HI_ISENSE
PMU_OTHER5V_HI_ISENSE
PMU_P5VUSBC_XT_ISENSE
PMU_CALPE_ISENSE
PMU_DDR1V2_ISENSE
PMU_OCARINA_ISENSE
PMU_SSDNAND_ISENSE
PMU_CPUP5VREG_ISENSE
NC_PMU_AMUX_AY
PMU_LCDPANEL_ISENSE
PMU_P5VUSBC_WR_ISENSE
PMU_CPUDDR_ISENSE
PMU_PP1V8S5_ISENSE
PMU_DDRVDDQ_ISENSE
PMU_CPUVA_VSENSE
PMU_CPUVA_ISENSE
PMU_TBT_XT_ISENSE
NC_PMU_AMUX_BY
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
24B3
24B3
24B3
24B3
24B3
24B3
24B3
24A3
62C6
62C6
62C6
62C6
62C6
62C6
62C6
62C6
62C6
62C6
62C6
62C6
62C6
62B6
62B6
62B6
62B6
62B6
CPUGT ISNS
IACORE ISNS
Desktop Assignments
GPU_AUX
GPU_CORE
12V VSNS
12V ISNS
Same
ADC5
ADC6
D
ADC0
ADC1
ADC2
ADC3
ADC4-7
C
B
77A5 75B7 44B6 44A7
44A6 44C6 77A5
44C6 77A5
PP5V_G3S
FAN_LT_PWM
FAN_LT_TACH
TP_FAN_LT_OTP1
TP_FAN_LT_OTP2
J6001
FF14A-6C-R11DL-B-3H
F-RT-SM
7
1
2
3
4
5
6
8
75B7 44B7 44A7
77A5
44A6 44C4 77A5
44C4 77A5
PP5V_G3S
FAN_RT_PWM
FAN_RT_TACH
TP_FAN_RT_OTP1
TP_FAN_RT_OTP2
J6000
FF14A-6C-R11DL-B-3H
518S0818518S0818
F-RT-SM
7
1
2
3
4
5
6
8
FAN_DBG
J6010
FF14A-5C-R11DL-B-3H
F-RT-SM
6
B
A
77A5 75B7 44B7 44B6
R6021
200K
1/20W
PP5V_G3S
1
5%
MF
201
2
R6022
200K
5%
1/20W
MF
201
1
2
FAN_RT_PWM
FAN_LT_PWM
44B6 44C4 77A5
44B7 44C6 77A5
1
2
NC
3
4
NC
5
NC
7
518S0769
PLACE_SIDE=BOTTOM
BOM_COST_GROUP=FAN
SYNC_MASTER=myEE SYNC_DATE=03/01/2019
PAGE TITLE
Fans/SMC/AMUX Support
SIZE
D
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
60 OF 150
SHEET
44 OF 109
A
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
D
C
C
B
B
A
8
DESIGN: X502/DEV_MLB_U
LAST CHANGE: Wed Feb 18 17:12:24 2015
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
PAGE TITLE
A
Audio Placeholder
DRAWING NUMBER
051-05198
Apple Inc.
REVISION
6.0.0
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
BOM_COST_GROUP=AUDIO
67
35 4
IV ALL RIGHTS RESERVED
2
BRANCH
evt-3
PAGE
62 OF 150
SHEET
45 OF 109
1
SIZE
D
AUDIO JACK CODEC I2C ADDRESS
www.haojiyoubbs.com
QQ微信：181806465
678
3 245
1
D
AD1 ADDRESS
GND
GND
1.8V GND
1.8V
AD0
GND
1.8V
1.8V
0x48 <-0x49
0x4A
0x4B
75D1 46C7 46C2
37C8 46C2 46D1
PP1V8_G3S
PP1V8_CODEC
1
R6391
0
5%
1/20W
MF
0201
2
R6393
0
21
5%
1/20W
MF
0201
R6392
0
21
5%
1/20W
MF
0201
FERR-22-OHM-1A-0.055OHM
PP1V8_CODEC_VCP_SEL
MIN_LINE_WIDTH=0.5000
MIN_NECK_WIDTH=0.2000
VOLTAGE=1.8V
46A5 46B7 46D1
GND_AUDIO_CODEC
L6300
0201
21
BYPASS=U6300.B1:C2:3 MM
1
C6301
2.2UF
20%
10V
2
X5R-CERM
402
PP1V8_CODEC_VCP
MIN_LINE_WIDTH=0.5000
MIN_NECK_WIDTH=0.2000
VOLTAGE=1.8V
62B3
79B8 75C4 46C6
AUD_PWR_EN
PP3V3_G3H_RTC
NOSTUFF
L6361
FERR-470-OHM
21
CODEC_LDO_EN
0201
L6360
FERR-22-OHM-1A-0.055OHM
21
0201
NOSTUFF
PP3V3_CODEC_LDO_IN
VOLTAGE=3.3V
NOSTUFF
1
C6360
2
1UF
20%
10V
X5R
0201
NOSTUFF
R6360
47K
2 1
5%
1/20W
MF
201
4
IN
3
EN
XW6300
SHORT-8L-0.25MM-SM
21
XDFN-COMBO-THICKSTNCL
U6360
NCP160AMX180
NOSTUFF
EPADGND
5
2
DESENSE
NOSTUFF
1
C6390
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
OUT
DESENSE
NOSTUFF
1
C6391
12PF
5%
25V
2
NP0-C0G
0201
1
NOSTUFF
1
C6361
1UF
20%
10V
2
X5R
0201
GND_AUDIO_CODEC
PP1V8_CODEC
VOLTAGE=1.8V
BYPASS=U6360.1:2:3MMBYPASS=U6360.4:2:3MM
46A5 46B7 46C6
37C8 46C2 46D7
D
C
B
A
49A7
49A7
IN
IN
AUD_HS_MIC_P
NOSTUFF
CRITICAL
C6352
27PF
25V
C0G
0201
AUD_HS_MIC_N
5%
L6301
R6390
0
5%
MF
0201
21
PP1V8_CODEC_VL_SEL
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
VOLTAGE=1.8V
79B8 75C4 46D4
AUD_HP_PORT_R
PP3V3_G3H_RTC
1
R6300
1K
5%
1/20W
MF
201
2
1
R6301
1K
5%
1/20W
MF
201
2
75D1 46D7 46C2
PP1V8_G3S
49B7
49B7
1/20W
AUD_HP_PORT_L
OUT
GND_AUDIO_CODEC
46A5 46C6 46D1
OUT
R6351
0
2 1
5%
1/20W
MF
0201
NOSTUFF
CRITICAL
10%
10V
0201
1
2
1
C6351
3300PF
2
X7R-CERM
NOSTUFF
1
R6350
100K
5%
1/20W
MF
201
2
HS_MIC_P
HS_MIC_N
R6352
0
2 1
5%
1/20W
MF
0201
R/C6550 FILTER TO ADDRESS OUT-OF-BAND
NOISE ISSUE SEEN ON EARLY HEADSETS
(SEE RADAR # 6210118)
PP3V3_CODEC_VP
46C5
49A7
49A7
IN
IN
AUD_RING_SENSE
AUD_TIP_SENSE
NOSTUFF
R6309
470K
5%
1/20W
MF
201
NOSTUFF
1
2
1
R6310
470K
5%
1/20W
MF
201
2
FERR-22-OHM-1A-0.055OHM
21
0201
BYPASS=U6300.A3:B3:3 MM
C6303
0.1UF
X7R-CERM
L6302
FERR-22-OHM-1A-0.055OHM
21
0201
BYPASS=U6300.D7:C7:3 MM
49A7
49A7
49B7
49B7
AUD_HP_SENSE_L
IN
AUD_HP_SENSE_R
IN
BI
BI
AUD_HP_PORT_CH_GND
AUD_HP_PORT_US_GND
L83_HSBIAS_FILT
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
1
C6309
4.7UF
20%
10V
2
X5R-CERM
0402
L83_HSBIAS_FILT_REF
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
CRITICAL
BYPASS=U6300.F3:E3:3 MM
10%
16V
0402
PP1V8_CODEC_VL
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.0900
VOLTAGE=1.8V
1
2
PP3V3_CODEC_VP
46A7
MIN_LINE_WIDTH=0.1000
MIN_NECK_WIDTH=0.0800
1
C6304
10UF
20%
10V
2
X5R-CERM
0402-7
VOLTAGE=3.3V
D5
HPSENSA
E5
HPOUTA
F5
HPSENSB
G5
HPOUTB
F1
HS4
E2
HS_CLAMP2
E1
HSIN+
G2
HS3
F2
HS_CLAMP1
D1
HSIN-
F4
HS4_REF
G4
HS3_REF
G3
RING_SENSE
E4
TIP_SENSE
F3
HSBIAS_FILT
E3
HSBIAS_FILT_REF
D7C4A3
VP
VL VA VCP
A7
VD_FILT
CRITICAL
U6300
CS42L83A
WLCSP-SKT
GNDL
B3
46B7 46C6 46D1
GND_AUDIO_CODEC
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=0V
B6
NC
C7
B1
SWIRE_SD/ASP_SDIN
SWIRE_CLK/ASP_SCLK
GNDHS GNDAGNDD
G1
D6
DIGLDO_PDN*
ASP_LRCK/FSYNC
D2
C2
AD0
AD1
SDA
SCL
E6
G6
F6
D4
B7
C6
C5
A6
NC
D3
B5
A5
A4
B4
C3
B2
A1
A2
E7
F7
G7
C1
L83_FILT
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
+VCP_FILT
-VCP_FILT
GNDCP
VL_SEL
INT*
WAKE*
RESET*
SPDIF_TX
SWIRE_SEL
ASP_SDOUT
FLYP
FLYC
FLYN
FILT_P
BYPASS=U6300.C1:C2:3 MM
CRITICAL
BYPASS=U6300.D6:F6:3 MM
BYPASS=U6300.E6:F6:3MM
L83_VCP_FILTP
MIN_LINE_WIDTH=0.5000
MIN_NECK_WIDTH=0.2000
BYPASS=U6300.G6:F6:3MM
L83_VCP_FILTN
MIN_LINE_WIDTH=0.5000
MIN_NECK_WIDTH=0.2000
PLACE_NEAR=U6300.A4:5mm
L83_SDOUT
L83_FLYP
L83_FLYC
L83_FLYN
20%
10V
X5R
0603
1
2
C6310
10UF
CRITICAL
C6302
2.2UF
21
20%
10V
X5R-CERM
402
CRITICAL
C6305
4.7UF
21
20%
10V
X5R-CERM
0402
CRITICAL
C6306
4.7UF
21
20%
10V
X5R-CERM
0402
R6307
33
I2C_CODEC_SDA
I2C_CODEC_SCL
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
BYPASS=U6300.E7:F7:3 MM
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
BYPASS=U6300.G7:F7:3 MM
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
L83_VCP_FILT_GND
MIN_LINE_WIDTH=0.5000
MIN_NECK_WIDTH=0.1130
21
MF1/20W
2015%
37C6
BI
37C6
IN
CRITICAL
CRITICAL
C6307
2.2UF
20%
10V
X5R-CERM
402
C6308
2.2UF
20%
10V
X5R-CERM
402
1
2
1
2
XW6301
SM
1
R6302
47K
5%
1/20W
MF
201
2
21
PP1V8_G3S
I2S_CODEC_LRCLK_R
I2S_CODEC_R2D
I2S_CODEC_D2R
I2S_CODEC_BCLK
PP1V8_CODEC
1
R6303
47K
5%
1/20W
MF
201
2
CODEC_INT_L
CODEC_WAKE_L
1
R6304
47K
5%
1/20W
MF
201
2
CODEC_RESET_L
1
2
37C8 46D1 46D7
C6320
1000PF
10%
25V
X7R
0201
OUT
OUT
IN
IN
OUT
IN
75D1 46D7 46C7
IN
32C8 78D4
32C6 78D4
25B3
32C6 78D4
23D6
24B3
24C6
DESIGN: X502/DEV_MLB_U
LAST CHANGE: Wed Feb 18 17:31:01 2015
SYNC_MASTER=J214_MIHIR SYNC_DATE=03/05/2019
PAGE TITLE
Audio Jack Codec
DRAWING NUMBER
051-05198
Apple Inc.
REVISION
C
B
A
SIZE
D
6.0.0
BOM_COST_GROUP=AUDIO
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
BRANCH
evt-3
PAGE
63 OF 150
SHEET
46 OF 109
8
67
35 4
2
1
2X MONO SPEAKER LEFT AMPLIFIERS
www.haojiyoubbs.com
QQ微信：181806465
APN: 353S01252
GAIN: 0DBFS = xxVRMS
678
3 245
1
D
C
75C1 48D7 48D2 48C7 48A5 47D2 47C7 47A5
23C6 47B7 48B7 48D7
23C6 47B7 48B7 48C8
32C6 47B8
25B3 47B8 48B8 48C8
32C8 47B8
32C6 47B8
SPKRAMP_RESET_L
IN
1
R6402
47K
5%
1/20W
MF
201
2
SPKRAMP_INT_L
OUT
I2S_SPKRAMP_L_R2D
IN
I2S_SPKRAMP_L_D2R
OUT
I2S_SPKRAMP_L_LRCLK_R
IN
IN
I2S_SPKRAMP_L_BCLK
PP1V8_G3S
1
2
NOSTUFF
1
R6400
47K
5%
1/20W
MF
201
2
R6401
1/20W 201
PLACE_NEAR=U6400.C1:5 MM
1
2
37D6 47B7
37D6 47B7
C6401
0.1UF
10%
25V
X5R
0201
BI
I2C_SPKRAMP_L_SDA
I2C_SPKRAMP_L_SCL
IN
47A6
C6400
1UF
20%
16V
CER-X5R
0201
33
21
MF5%
I2S_SPKRAMP_L_D2R_R1
PLACE_NEAR=U6400.D2:5 MM
1
C6402
1UF
20%
16V
2
CER-X5R
0201
SPKRAMP_LT_MODE
132S0534
1
C6403
0.1UF
10%
25V
2
X5R
0201
C3
F3
F4
D4
F2
E1
E2
F1
E4
E3
E5
F5
SDZ*
SDA
SCL
IRQZ
MODE
SDIN
SDOUT
FSYNC
SBCLK
PDMD0
PDMCK0
PDMD1
PDMCK1
C1
D2
IOVDDAVDD
U6400
PTAS5770LB2
CSP
OMIT_TABLE
CRITICAL
GND
C2
PGND
B4
A4
C4
VBAT
C5
BST_P
OUT_P
OUT_P
VSNS_P
BST_N
OUT_N
OUT_N
VSNS_N
AREG
DREG
PLACE_NEAR=U6400.C4:3 MMPLACE_NEAR=U6400.D2:3 MM
1
C6404
0.1UF
10%
25V
2
X5R
0201
B2
SPKRAMP_LT_BSTP
A3
B3
DIDT=TRUE
A1
SPKRAMP_LT_SNSP
A2
SPKRAMP_LT_BSTN
A5D3
B5
B1
SPKRAMP_LT_SNSN
DIDT=TRUE
D5
D1
SPKRAMP_LT_AREG
SPKRAMP_LT_DREG
PLACE_NEAR=U6400.D1:3 MM
132S0534
1
C6407
0.1UF
10%
25V
2
X5R
0201
PLACE_NEAR=U6400.C4:10 MM
PLACE_NEAR=U6400.C4:10 MM
C6405
1
10UF
20%
25V
2
X5R-CERM
0603
C6406
1
10UF
20%
25V
2
X5R-CERM
0603
C6405,C6406,C6455,C6456 are to be mirrored Top/Bottom
C6411
0.1UF
10%
25V
CER-X5R
0201
BYPASS=U6400.B2:B3:5 MM
NO_XNET_CONNECTION=1
21
C6412
0.1UF
10%
25V
CER-X5R
0201
PLACE_NEAR=U6400.D1:5 MM
1
C6408
1UF
20%
16V
2
CER-X5R
0201 0201
PLACE_NEAR=U6400.D5:3 MM
132S0534
1
C6409
0.1UF
10%
25V
2
X5R
0201
BYPASS=U6400.A2:A5:5 MM
NO_XNET_CONNECTION=1
21
1
2
PPBUS_G3H_SPKRAMP_LEFT
DIDT=TRUE
SHORT-8L-0.25MM-SM
XW6400
PLACE_NEAR=J6400.1:5 MM
DIDT=TRUE
SHORT-8L-0.25MM-SM
PLACE_NEAR=J6400.10:5 MM
PLACE_NEAR=U6400.D5:5 MM
XW6401
C6410
1UF
20%
16V
CER-X5R
75B6 47C3 47A6
PP1V8_G3S
NOSTUFF
47K
5%
1/20W
MF
201
1
APN: 998-5655
2
FF14A-10C-R11DL-B-3H
IC,TAS5770L,C0,CLASS D AMP,CSP30
IC,TAS5770L,C0,CLASS D AMP,CSP30
J6400
F-RT-SM1
11
1
2
3
4
5
6
7
8
9
10
12
LEFT TWEETER
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#
U6400
U6450
R6490
MIN_LINE_WIDTH=0.4000
MIN_NECK_WIDTH=0.0560
SPKRCONN_LT_OUTP
77C7
21
25B6 77C7
MIN_LINE_WIDTH=0.4000
MIN_NECK_WIDTH=0.0560
SPKRCONN_LT_OUTN
77C7
21
NOSTUFF
C6413
1
220PF
X7R-CERM
2
201
NOSTUFF
1
C6414
220PF
10%10%
25V25V
2
X7R-CERM
201
SPKR_ID0
OUT
353S01871 CRITICAL1
353S01871 CRITICAL1
75C1 48D7 48D2 48C7 48A5 47D7 47C7 47A5
TABLE_5_HEAD
BOM OPTIONCRITICAL
TABLE_5_ITEM
TABLE_5_ITEM
D
C
B
75C1 48D7 48D2 48C7 48A5 47D7 47D2 47A5
32C6 47C8
25B3 47C8 48B8 48C8
32C8 47C8
32C6 47C8
I2S_SPKRAMP_L_R2D
IN
I2S_SPKRAMP_L_D2R
OUT
I2S_SPKRAMP_L_LRCLK_R
IN
IN
I2S_SPKRAMP_L_BCLK
PP1V8_G3S
PLACE_NEAR=U6450.C1:5 MM
1
C6450
1UF
20%
16V
2
PLACE_NEAR=U6450.C1:3 MM
132S0534
1
C6451
0.1UF
10%
25V
2
X5R
0201
23C6 47D8 48B7 48D7
47D7 37D6
47D7 37D6
23C6 47C8 48B7 48C8
47A6
R6451
33
I2S_SPKRAMP_L_D2R_R2
21
MF1/20W
2015%
PLACE_NEAR=U6450.D2:5 MM
1
C6452
1UF
20%
16V
2
CER-X5RCER-X5R
02010201
SPKRAMP_RESET_L
I2C_SPKRAMP_L_SDA
I2C_SPKRAMP_L_SCL
SPKRAMP_INT_L
SPKRAMP_LW_MODE
PLACE_NEAR=U6450.D2:3 MM
132S0534
1
C6453
0.1UF
10%
25V
2
X5R
0201
C1
U6450
PTAS5770LB2
C3
F3
F4
D4
F2
E1
E2
F1
E4
E3
E5
F5
SDZ*
SDA
SCL
IRQZ
MODE
SDIN
SDOUT
FSYNC
SBCLK
PDMD0
PDMCK0
PDMD1
PDMCK1
OMIT_TABLE
CRITICAL
GND
C2
IOVDDAVDD
CSP
D2
PGND
B4
A4
C4
VBAT
C5
BST_P
OUT_P
OUT_P
VSNS_P
BST_N
OUT_N
OUT_N
VSNS_N
AREG
DREG
PLACE_NEAR=U6450.C4:3 MM
PLACE_NEAR=U6450.C4:3 MM
132S0534
1
C6454
0.1UF
10%
25V
2
X5R
0201
PLACE_NEAR=U6450.C4:3 MM
C6455
1
10UF
20%
25V 25V
2
X5R-CERM
0603
C6456
1
10UF
20%
2
X5R-CERM
0603
PPBUS_G3H_SPKRAMP_LEFT
C6405,C6406,C6455,C6456 are to be mirrored Top/Bottom
75B6 47D3 47A6
C6461
0.1UF
10%
25V
CER-X5R
B2
SPKRAMP_LW_BSTP
A3
B3
DIDT=TRUE
A1
SPKRAMP_LW_SNSP
A2
SPKRAMP_LW_BSTN
A5D3
B5
B1
SPKRAMP_LW_SNSN
DIDT=TRUE MIN_LINE_WIDTH=0.4000
D5
D1
0201
C6462
0.1UF
10%
25V
CER-X5R
0201
SPKRAMP_LW_AREG
SPKRAMP_LW_DREG
PLACE_NEAR=U6450.D1:3 MM
132S0534
1
C6457
0.1UF
10%
25V
2
X5R
0201
PLACE_NEAR=U6450.D1:5 MM
1
C6458
1UF
20%
16V
2
CER-X5R
PLACE_NEAR=U6450.D5:3 MM
132S0534
1
C6459
0.1UF
10%
25V
2
X5R
0201
BYPASS=U6450.B2:B3:5 MM
NO_XNET_CONNECTION=1
21
BYPASS=U6450.A2:A5:5 MM
NO_XNET_CONNECTION=1
21
PLACE_NEAR=U6450.D5:5 MM
1
C6460
1UF
20%
16V
2
CER-X5R
02010201
DIDT=TRUE
21
SHORT-8L-0.25MM-SM
XW6450
PLACE_NEAR=J6450.1:5 MM
DIDT=TRUE
21
SHORT-8L-0.25MM-SM
PLACE_NEAR=J6450.10:5 MM
XW6451
NOSTUFF
C6463
220PF
X7R-CERM
MIN_LINE_WIDTH=0.4000
MIN_NECK_WIDTH=0.0560
SPKRCONN_LW_OUTP
77C7
MIN_NECK_WIDTH=0.0560
SPKRCONN_LW_OUTN
77C7
NOSTUFF
1
10% 10%
25V 25V
2
201
1
C6464
220PF
2
X7R-CERM
201
APN: 998-5655
J6450
FF14A-10C-R11DL-B-3H
F-RT-SM1
11
1
2
3
4
5
6
7
8
9
10
12
LEFT WOOFER
B
A
OMIT_TABLE
CRITICAL
1
C6480
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
8
LEFT BULK CAPACITANCE
OMIT_TABLE
CRITICAL
1
C6481
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
OMIT_TABLE
CRITICAL
1
C6482
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
PPBUS_G3H_SPKRAMP_LEFT
OMIT_TABLE
CRITICAL
1
C6483
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
OMIT_TABLE
CRITICAL
1
C6484
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
OMIT_TABLE
CRITICAL
1
C6485
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
75C1 48D7 48D2 48C7 48A5 47D7 47D2 47C7
75B6 47D3 47C3
SPKRAMP_LT_MODE
47C6
SPKRAMP_LW_MODE
47B7
67
PP1V8_G3S
NOSTUFF
1
R6480
10K
5%
1/20W
MF
201
2
1
R6481
0
5%
1/20W
MF
0201
2
NOSTUFF
1
R6482
2.2K
5%
1/20W
MF
201
2
1
R6483
470
5%
1/20W
MF
201
2
470 to GND
470 to IOVDD
2k2 to GND
10k to GND
10k to IOVDD
47k to IOVDD
I2C ADDRMODE PIN
0x31GND
0x32
0x33
0x34
0x352k2 to IOVDD
0x36
0x37
0x38
CHANNEL
L TW
L WF
R TW
R WF
A
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
PAGE TITLE
Audio Left Amplifiers
DRAWING NUMBER
051-05198
Apple Inc.
REVISION
6.0.0
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
BOM_COST_GROUP=AUDIO
35 4
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
2
BRANCH
evt-3
PAGE
64 OF 150
SHEET
47 OF 109
1
SIZE
D
2X MONO SPEAKER RIGHT AMPLIFIERS
www.haojiyoubbs.com
QQ微信：181806465
APN: 353S01252
GAIN: 0DBFS = xxVRMS
678
3 245
1
D
C
75C1 48D2 48C7 48A5 47D7 47D2 47C7 47A5
23C6 47B7 47C8 48B7
32C6 48B8
25B3 47B8 47C8 48B8
32C8 48B8
32C6 48B8
SPKRAMP_INT_L
OUT
I2S_SPKRAMP_R_R2D
IN
I2S_SPKRAMP_L_D2R
OUT
I2S_SPKRAMP_R_LRCLK_R
IN
IN
I2S_SPKRAMP_R_BCLK
PP1V8_G3S
PLACE_NEAR=U6500.C1:5 MM
1
C6500
1UF
20%
16V
2
CER-X5R
0201
1
2
23C6 47B7 47D8 48B7
37C6 48B7
37C6 48B7
R6501
33
21
I2S_SPKRAMP_R_D2R_R1
5% 201
1/20W MF
PLACE_NEAR=U6500.C1:3 MM
132S0534
C6501
0.1UF
10%
25V
X5R
0201
SPKRAMP_RESET_L
IN
BI
I2C_SPKRAMP_R_SDA
I2C_SPKRAMP_R_SCL
IN
SPKRAMP_RT_MODE
48A6
PLACE_NEAR=U6500.D2:5 MM
1
C6502
1UF
20%
16V
2
CER-X5R
0201
132S0534
1
C6503
0.1UF
10%
25V
2
X5R
0201
C3
F3
F4
D4
F2
E1
E2
F1
E4
E3
E5
F5
SDZ*
SDA
SCL
IRQZ
MODE
SDIN
SDOUT
FSYNC
SBCLK
PDMD0
PDMCK0
PDMD1
PDMCK1
C1
D2
IOVDDAVDD
U6500
PTAS5770LB2
CSP
OMIT_TABLE
CRITICAL
GND
C2
PGND
B4
A4
C4
VBAT
C5
BST_P
OUT_P
OUT_P
VSNS_P
BST_N
OUT_N
OUT_N
VSNS_N
AREG
DREG
PLACE_NEAR=U6500.C4:3 MMPLACE_NEAR=U6500.D2:3 MM
132S0534
1
C6504
0.1UF
10%
25V
2
X5R
0201
B2
SPKRAMP_RT_BSTP
DIDT=TRUE
A3
B3
A1
SPKRAMP_RT_SNSP
A2
SPKRAMP_RT_BSTN
A5D3
B5
B1
SPKRAMP_RT_SNSN
DIDT=TRUE
D5
D1
SPKRAMP_RT_AREG
SPKRAMP_RT_DREG
PLACE_NEAR=U6500.D1:3 MM
132S0534
1
C6507
0.1UF
10%
25V
2
X5R
0201
PLACE_NEAR=U6500.C4:10 MM
C6505
1
10UF
20%
25V 25V
2
X5R-CERM
0603
PLACE_NEAR=U6500.C4:10 MM
C6506
1
10UF
20%
2
X5R-CERM
0603
C6505,C6506,C6555,C6556 are to be mirrored Top/Bottom
C6511
0.1UF
10%
25V
CER-X5R
0201
BYPASS=U6500.B2:B3:5 MM
NO_XNET_CONNECTION=1
21
C6512
0.1UF
10%
25V
CER-X5R
0201
PLACE_NEAR=U6500.D1:5 MM
1
C6508
1UF
20%
16V
2
CER-X5R
0201 0201
PLACE_NEAR=U6500.D5:3 MM
132S0534
1
C6509
0.1UF
10%
25V
2
X5R
0201
BYPASS=U6500.A2:A5:5 MM
NO_XNET_CONNECTION=1
21
1
2
PPBUS_G3H
DIDT=TRUE
SHORT-8L-0.25MM-SM
XW6500
PLACE_NEAR=J6500.1:5 MM
DIDT=TRUE
SHORT-8L-0.25MM-SM
XW6501
PLACE_NEAR=U6500.D5:5 MM
PLACE_NEAR=J6500.10:5 MM
C6510
1UF
20%
16V
CER-X5R
75D7 48C3 48A6
PP1V8_G3S
NOSTUFF
47K
5%
1/20W
MF
201
1
APN: 998-5655
2
FF14A-10C-R11DL-B-3H
J6500
F-RT-SM1
11
1
2
3
4
5
6
7
8
9
10
12
RIGHT TWEETER
R6590
MIN_LINE_WIDTH=0.4000
MIN_NECK_WIDTH=0.2000
SPKRCONN_RT_OUTP
77B7
21
25B6 77B7
MIN_LINE_WIDTH=0.4000
MIN_NECK_WIDTH=0.2000
SPKRCONN_RT_OUTN
77B7
21
NOSTUFF
C6513
1
220PF
X7R-CERM
2
201
16
NOSTUFF
1
C6514
220PF
10%10%
25V25V
2
X7R-CERM
201
SPKR_ID1
OUT
75C1 48D7 48C7 48A5 47D7 47D2 47C7 47A5
D
C
TABLE_5_HEAD
353S01871 1
353S01871 1
IC,TAS5770L,C0,CLASS D AMP,CSP30
IC,TAS5770L,C0,CLASS D AMP,CSP30
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#
U6500
U6550
CRITICAL
CRITICAL
BOM OPTIONCRITICAL
TABLE_5_ITEM
TABLE_5_ITEM
B
75C1 48D7 48D2 48A5 47D7 47D2 47C7 47A5
32C6 48C8
25B3 47B8 47C8 48C8
32C8 48C8
32C6 48C8
I2S_SPKRAMP_R_R2D
IN
I2S_SPKRAMP_L_D2R
OUT
I2S_SPKRAMP_R_LRCLK_R
IN
IN
I2S_SPKRAMP_R_BCLK
PP1V8_G3S
PLACE_NEAR=U6550.C1:5 MM
3
1
C6550
1UF
20%
16V
2
CER-X5R
1
2
23C6 47B7 47D8 48D7
48D7 37C6
48D7 37C6
23C6 47B7 47C8 48C8
48A6
9
R6551
33
5% 201
1/20W MF
I2S_SPKRAMP_R_D2R_R2
21
PLACE_NEAR=U6550.C1:3 MM
132S0534
4 11
C6551
0.1UF
10%
25V
X5R
0201
PLACE_NEAR=U6550.D2:5 MM
PLACE_NEAR=U6550.D2:3 MM
132S0534
7
1
C6552
1UF
20%
16V
2
CER-X5R
02010201
1
C6553
0.1UF
10%
25V
2
X5R
0201
SPKRAMP_RESET_L
I2C_SPKRAMP_R_SDA
I2C_SPKRAMP_R_SCL
SPKRAMP_INT_L
SPKRAMP_RW_MODE
C3
F3
F4
D4
F2
E1
E2
F1
E4
E3
E5
F5
SDZ*
SDA
SCL
IRQZ
MODE
SDIN
SDOUT
FSYNC
SBCLK
PDMD0
PDMCK0
PDMD1
PDMCK1
C1
D2
IOVDDAVDD
U6550
PTAS5770LB2
CSP
OMIT_TABLE
CRITICAL
GND
C2
5
PGND
A4
B4
C4
VBAT
C5
BST_P
OUT_P
OUT_P
VSNS_P
BST_N
OUT_N
OUT_N
VSNS_N
AREG
DREG
PLACE_NEAR=U6550.C4:3 MM
132S0534
2
1
C6554
0.1UF
10%
25V
2
X5R
0201
B2
SPKRAMP_RW_BSTP
A3
B3
DIDT=TRUE
A1
SPKRAMP_RW_SNSP
A2
SPKRAMP_RW_BSTN
A5D3
B5
B1
SPKRAMP_RW_SNSN
DIDT=TRUE
D5
D1
SPKRAMP_RW_AREG
SPKRAMP_RW_DREG
PLACE_NEAR=U6550.D1:3 MM
132S0534
12
1
C6557
0.1UF
10%
25V
2
X5R
0201
PLACE_NEAR=U6550.C4:10 MM
C6555
1
10UF
20%
2
X5R-CERM
0603
PLACE_NEAR=U6550.C4:10 MM
C6556
1
10UF
20%
25V25V
2
X5R-CERM
0603
C6561
0.1UF
10%
25V
CER-X5R
0201
C6562
0.1UF
10%
25V
CER-X5R
0201
PLACE_NEAR=U6550.D1:5 MM
1
C6558
1UF
20%
16V
2
PLACE_NEAR=U6550.D5:3 MM
132S0534
15
1
C6559
0.1UF
10%
25V
2
X5R
0201
PPBUS_G3H
C6505,C6506,C6555,C6556 are to be mirrored Top/Bottom
BYPASS=U6550.B2:B3:5 MM
NO_XNET_CONNECTION=1
21
BYPASS=U6550.A2:A5:5 MM
NO_XNET_CONNECTION=1
21
PLACE_NEAR=U6550.D5:5 MM
1
C6560
1UF
20%
16V
2
CER-X5RCER-X5R
02010201
DIDT=TRUE
21
SHORT-8L-0.25MM-SM
XW6550
PLACE_NEAR=J6550.1:5 MM
DIDT=TRUE
21
SHORT-8L-0.25MM-SM
PLACE_NEAR=J6550.10:5 MM
XW6551
75D7 48D3 48A6
NOSTUFF
C6563
220PF
10% 10%
25V 25V
X7R-CERM
201
APN: 998-5655
J6550
FF14A-10C-R11DL-B-3H
MIN_LINE_WIDTH=0.4000
MIN_NECK_WIDTH=0.2000
SPKRCONN_RW_OUTP
77B7
MIN_LINE_WIDTH=0.4000
MIN_NECK_WIDTH=0.2000
SPKRCONN_RW_OUTN
77B7
NOSTUFF
1
1
C6564
220PF
2
2
X7R-CERM
201
F-RT-SM1
11
1
2
3
4
5
6
7
8
9
10
12
B
RIGHT WOOFER
A
OMIT_TABLE
CRITICAL
1
C6580
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
8
RIGHT BULK CAPACITANCE
OMIT_TABLE
CRITICAL
1
C6581
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
OMIT_TABLE
CRITICAL
1
C6582
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
PPBUS_G3H
OMIT_TABLE
CRITICAL
1
C6583
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
OMIT_TABLE
CRITICAL
1
C6584
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
OMIT_TABLE
CRITICAL
1
C6585
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
75C1 48D7 48D2 48C7 47D7 47D2 47C7 47A5
75D7 48D3 48C3
SPKRAMP_RT_MODE
48C6
SPKRAMP_RW_MODE
48B7
67
PP1V8_G3S
1
R6580
470
5%
1/20W
MF
201
2
NOSTUFF
1
R6581
0
5%
1/20W
MF
0201
2
NOSTUFF
1
R6582
2.2K
5%
1/20W
MF
201
2
1
R6583
2.2K
5%
1/20W
MF
201
2
MODE PIN
GND
470 to GND
2k2 to IOVDD
10k to GND
10k to IOVDD
47k to IOVDD
I2C ADDR
0x31
0x32
0x33470 to IOVDD
0x342k2 to GND
0x35
0x36
0x37
0x38
CHANNEL
L TW
L WF
R TW
R WF
SYNC_MASTER=myEE SYNC_DATE=03/01/2019
PAGE TITLE
A
Audio Right Amplifiers
DRAWING NUMBER
051-05198
Apple Inc.
REVISION
6.0.0
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
BOM_COST_GROUP=AUDIO
35 4
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
2
BRANCH
evt-3
PAGE
65 OF 150
SHEET
48 OF 109
1
SIZE
D
D
www.haojiyoubbs.com
QQ微信：181806465
PP1V8_SLPS2R
74C6
BYPASS=U6650.1:8:8MM
PLACE_NEAR=U6650.1:5MM
23B6
23B6
23B6
IN
IN
IN
SEP_CAM_DISABLE_L
SEP_DMIC_DISABLE_L
SEP_DISABLE_STROBE
PMU_COLD_RESET_L
24C6 62A6 62D6 77B2 80A7
LID_OPEN_RIGHT
32D4 77A4
LID_OPEN_LEFT
32D4 77A4
LID_CTRL_DMIC
C6650
0.1UF
10%
10V
X5R-CERM
0201
678
3 245
1
DMIC Secure Disable
1
2
1
R6651
1K
5%
1/20W
MF
201
2
2
CAM_DIS*
3
DMIC_DIS*
4
DIS_STROBE
9
PMU_COLD_RST*
13
LID_RIGHT
14
LID_LEFT
6
SEL
1
VDD
U6650
SLG4AP41496V
(IPD)
(IPD)
STQFN
(IPD)
CRITICAL
(IPD)
GND
8
CAM_DIS_OUT*
DMIC_DIS_OUT*
CAM_DIS_OUT
DMIC_DIS_OUT
(IPD)
RFU
12
10
11
5
SEP_CAM_DISABLE_DFF_L
7
NC
NC
NC
SEP_DMIC_DISABLE_OUT_L
OUT
66A6
75C1 49C3
49C6 77D7
AUD_DMIC0_DATA_CONN
PP1V8_G3S
2
B
1
A
NC
U6640
74LVC1G08FW5
DFN1010
6
NC
5
3
PLACE_NEAR=U6640.5:5MM
BYPASS=U6640.6:3:8MM
1
C6641
0.1UF
10%
10V
2
X5R-CERM
0201
4
PDM_DMIC_DATA0_RR
Y
PLACE_NEAR=U6640.4:5MM
R6647
1/20W
MF
33
201
PDM_DMIC_DATA0
21
5%
OUT
D
24D3
C
APN: 518S0818
J6640
FF14A-6C-R11DL-B-3H
F-RT-SM
7
1
2
3
4
5
6
8
Digital Mic Flex Connector
PDM_DMIC_CLK0
AUD_DMIC0_DATA_CONN
PP1V8_DMIC
PDM_DMIC_CLK1
AUD_DMIC1_DATA_CONN
IN
OUT
IN
OUT
32B6 77D7
49D3 77D7
32B6 77D7
49C3 77D7
L6640
FERR-470-OHM
0201
1
C6640
1UF
20%
16V
2
CER-X5R
0201
75C1 49D3
21
PP1V8_G3S
75D1
49C6 77D7
AUD_DMIC1_DATA_CONN
PP1V8_G3S
2
B
1
A
U6641
74LVC1G08FW5
DFN1010
6
NC
5
3
NC
BYPASS=U6641.6:3:8MM
1
C6642
0.1UF
10%
10V
2
X5R-CERM
0201
4
PDM_DMIC_DATA1_RR
Y
PLACE_NEAR=U6641.5:5MM
PLACE_NEAR=U6641.4:5MM
R6649
33
1/20W
MF
5%
201
PDM_DMIC_DATA1
21
OUT
24D3
C
B
A
46C7
46B7
46B6
46B6
46B6
46B6
46A7
46A7
46B8
46B8
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
Audio Jack Flex Connector
CRITICAL
FL6601
120-OHM-25%-1.3A
AUD_HP_PORT_L
0402
21
CRITICAL
FL6602
120-OHM-25%-1.3A
AUD_HP_PORT_R
CRITICAL
0402
21
FL6603
120-OHM-25%-1.3A
AUD_HP_PORT_US_GND
0402
21
CRITICAL
FL6604
120-OHM-25%-1.3A
AUD_HP_PORT_CH_GND
CRITICAL
0402
21
FL6605
120-OHM-25%-1.3A
AUD_HP_SENSE_L AUD_CONN_HP_SENSE_L
0402
21
CRITICAL
FL6606
120-OHM-25%-1.3A
AUD_HP_SENSE_R
0402
21
L6607
FERR-470-OHM
AUD_TIP_SENSE
0201
21
L6608
FERR-470-OHM
AUD_RING_SENSE
CRITICAL
0201
21
FL6609
120-OHM-25%-1.3A
AUD_HS_MIC_P
0402
21
CRITICAL
FL6610
120-OHM-25%-1.3A
AUD_HS_MIC_N
0402
21
AUD_CONN_HP_LEFT
49B2 77B7
MIN_LINE_WIDTH=0.4000
MIN_NECK_WIDTH=0.0920
AUD_CONN_HP_RIGHT
49B2 77B7
MIN_LINE_WIDTH=0.4000
MIN_NECK_WIDTH=0.0920
AUD_CONN_RING2
49B2 77B7
MIN_LINE_WIDTH=0.0920
MIN_NECK_WIDTH=0.0920
AUD_CONN_SLEEVE
49B2 77B7
MIN_LINE_WIDTH=0.5000
MIN_NECK_WIDTH=0.1000
77A7
AUD_CONN_HP_SENSE_R
77A7
AUD_CONN_TIP_SENSE
77A7
AUD_CONN_RING_SENSE
77A7
AUD_CONN_SLEEVE_XW
77A7
MIN_LINE_WIDTH=0.0920
MIN_NECK_WIDTH=0.0920
AUD_CONN_RING2_XW
77A7
MIN_LINE_WIDTH=0.0920
MIN_NECK_WIDTH=0.0920
APN: 516S1181
(Mating plug APN: 516S1180)
J6600
AA25D-S016VA1
F-ST-SM
18
17
21
43
65
87
109
1211
1413
1615
19
20
BOM_COST_GROUP=AUDIO
AUD_CONN_HP_LEFT
AUD_CONN_HP_RIGHT
AUD_CONN_RING2
AUD_CONN_SLEEVE
49B5 77B7
49B5 77B7
49B5 77B7
49B5 77B7
DESIGN: X502/DEV_MLB_U
LAST CHANGE: Wed Feb 18 17:12:24 2015
PAGE TITLE
Audio Flex Connectors
DRAWING NUMBER
051-05198
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
REVISION
BRANCH
PAGE
SHEET
6.0.0
evt-3
66 OF 150
49 OF 109
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
SIZE
D
B
A
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
C
75C1
50D4
50C6
50B2
50B5
50D2
50D8
B
50D2
50B5 50B2
50C8 50C6
75C1 50D4
77B8 77B7
50B8 50A5
75D1 50D4
R6720
10K
5%
1/20W
MF
201
PP1V8_G3S
OUT123_EN
50C2 50C3 77C8
50C2 50C3 77C8
50C2 50C3 77C8
KBD_RIGHT_SHIFT_KEY
KBD_LEFT_OPTION_KEY
KBD_CONTROL_KEY
PP3V3_G3S_KBD
1
PP1V8_G3S
2
R6721
1/20W
WRITE ADDRESS = 0X42
READ ADDRESS = 0X43
50D6 51D3 77A8
77B8
KBD_INT_L
3.3V RSLOC ISOLATION KEYS/ASIC RESET
75C4 50D6
PP3V3_G3H_RTC
PLACE_NEAR=U6703.10:5MM
1
R6750
0
5%
1/20W
MF
2
0201
4
OE
1
IN_1
2
IN_2
3
IN_3
C6750
1
1.0UF
20%
2
10V
X5R-CERM
0201-1
10
VDD
U6703
SLG4AP4815V
TQFN
GND EPAD
5
11
PLACE_NEAR=U6703.10:2MM
1
C6751
0.1UF
10%
2
10V
X5R-CERM
0201
OUT_1
OUT_2
OUT_3
OUT_ALL#
IN_1/IN_2/IN_3 = 100K INTERNAL PULLDOWN343S00073
OUT_1/OUT_2/OUT_3 = 12.5K INTERNAL PULL-UP
9
KBD_RIGHT_SHIFT_L
8
KBD_LEFT_OPTION_L
7
KBD_CONTROL_L
6
RSLOC_RST_L
KEYBOARD INTERFACE - IO EXPANDER
1
C6721
0.1UF
10%
10V
2
X5R-CERM
0201
122
KBD_SENSE_X0
2
KBD_SENSE_X1
3
KBD_SENSE_X2
4
KBD_SENSE_X3
5
KBD_SENSE_X4
6
KBD_SENSE_X5
7
KBD_SENSE_X6
8
KBD_SENSE_X7
10
KBD_SENSE_X8
11
KBD_SENSE_X9
12
KBD_SENSE_X10
13
KBD_SENSE_X11
14
KBD_SENSE_X12
15
KBD_CONTROL_L
16
KBD_LEFT_OPTION_L
17
KBD_RIGHT_SHIFT_L
1K
1%
MF
201
1
2
50A7 50D4
50A7 50D2
MF
1/20W
1
C6720
1.0UF
20%
10V
2
X5R-CERM
0201-1
IOXP2_INT_L
50B7
IOXP2_ADDR
IOXP_I2C_SCL
IOXP_I2C_SDA
IOXP2_RESET_L
R6723
33
1%
C6723
0.1UF
10%
10V
X5R-CERM
0201
21
201
1
R6722
100K
5%
1/20W
MF
201
2
1
2
IOXP2_INT_L
18
19
20
24
INT*
ADDR
SCL
U6702
PCAL6416A
SDA
RESET*
311S0665
50C8
21
23
VDD/P
VDD/I2C-BUS
HWQFN
PAD
VSS
THRM
9
25
P0_0
P0_1
P0_2
P0_3
P0_4
P0_5
P0_6
P0_7
P1_0
P1_1
P1_2
P1_3
P1_4
P1_5
P1_6
P1_7
1
C6722
0.1UF
10%
10V
2
X5R-CERM
0201
R6752
MF
1/20W 1%
1
R6730
10K
5%
1/20W
MF
201
2
50D6 77B8
50D6 77B8
50D6 77B8
33
77C7
50A2
50D2
75C4 50D8
50B6 77B8
50B6 77B8
50B6 77B8
21
PMU_RSLOC_RST_L
201
PP1V8_G3S
1
R6731
10K
5%
1/20W
MF
201
2
77C7
50A1
50D2
1
R6732
5%
1/20W
MF
201
2
77C7
50A1
50D2
R6733
PP3V3_G3H_RTC
KBD_INT_L
I2C_KBD_SDA
I2C_KBD_SCL
52C4 62A6 62C3 77B8 81D5 81D7
OUT
1
R6734
5%
1/20W
MF
201
2
77C7
50A3
50D2
1
R6735
10K10K
5%
1/20W
MF
201
2
77C7
50B1
50D2
1
10K10K
5%
1/20W
MF
201
2
77C7
50B2
50D2
50B8 51D3 77A8 77B8
50A8 51D3 77B8
50A8 51D3 77B8
1
R6736
10K
5%
1/20W
MF
201
2
77B8
50B3
50C2
R6703
5%0201 1/20W MF
1
R6737
10K
5%
1/20W
MF
201
2
77C8
50B3
50C2
0
21
21
DZ6710
X3DFN2-1 X3DFN2-1X3DFN2-1
1
R6738
10K
5%
1/20W
MF
201
2
77C8
50B4
50C2
PP3V3_G3H_RSLOC
MIN_NECK_WIDTH=0.1200
MIN_LINE_WIDTH=0.2000
VOLTAGE=3.3V
77C7
50A4
50C2
1
R6741
10K
5%
1/20W
MF
201
2
1
R6739
10K
5%
1/20W
MF MF
201
2
77C7
50A4
50D2
1
R6740
10K
5%
1/20W
201
2
75C1 50D8 50D2 50C8 50C6 50B5 50B2
50C2 50C4 77C8
21
DZ6711
ESD8472MUT5GESD8472MUT5G
1
R6742
10K
5%
1/20W
MF
201
2
50A3 50D2 77C7
PP1V8_G3S
50A6 77B8
21
DZ6712
ESD8472MUT5G
PP3V3_G3H_RSLOC
50C2 50D5 77C8
KBD_CAP_CATHODE
50A7 50C2 77C8
50A6 50C2 77C8
50B5 50C2 77C8
KBD_DRIVE_Y5
KBD_SENSE_X8
77B8 77B7 75D1 50C8 50B8 50A5
1
R6771
100K
5%
1/20W
MF
201
2
EEPROM_WC_L
NC
1
1
1
MEMBRANE ZIF CONNECTOR
PP3V3_G3S_KBD
10K
5%
1/20W
MF
201
1
8
2
VCC
U6700
R6770
376S1128
1
GS
Q6770
DMN32D2LFB4
DFN1006H4-3
SYM_VER_3
4KB-1.8V-5.5V
D
2
3
50A7 50C8
WC_L
77B8
IOXP_I2C_SCL
7
6
2
3
M24C04-R
MLP8
SCL NC
E1
E2
VSS EPAD
4
DZ6701
PESD3V3L5UF
SOT886
PLACE_NEAR=J6701.1:5MM
6
KBD_CONTROL_KEY
5
KBD_LEFT_OPTION_KEY
43
KBD_RIGHT_SHIFT_KEY
PLACE_NEAR=U6700.8:5mm
5
SDAWC*
1
9
335S00254
50C2 50D8 77C8
1
C6770
1.0UF
20%
2
10V
X5R-CERM
0201-1
IOXP_I2C_SDA
NC
50C2 50D8 77C8
50C2 50D8 77C8
PLACE_NEAR=U6700.8:5mm
1
C6771
0.1UF
10%
2
10V
X5R-CERM
0201
75C1 50D8 50D4 50C8 50C6 50B5 50B2
50A7 50C8
518S0752
PP1V8_G3S
50A7 50B3 77B8
KBD_ID1
50A6 50B1 77C7
KBD_DRIVE_Y2
KBD_DRIVE_Y1
50A6 50B1 77C7
50A6 50B1 77C7
KBD_DRIVE_Y3
50A6 50B2 77C7
KBD_DRIVE_Y4
50A2 50C6 77C7
KBD_SENSE_X0
50A1 50C6 77C7
KBD_SENSE_X1
50A1 50C6 77C7
KBD_SENSE_X2
50B1 50C6 77C7
KBD_SENSE_X5
50B2 50C6 77C7
KBD_SENSE_X3
50A4 50B5 77C7
KBD_SENSE_X9
50A3 50B5 77C7
KBD_SENSE_X12
50A3 50C6 77C7
KBD_SENSE_X4
KBD_SENSE_X11
50A3 50B7 77C7
50A4 50B5 77C7
KBD_SENSE_X10
50B3 50B6 77B8
KBD_SENSE_X6
KBD_SENSE_X7
50B3 50B5 77C8
50B4 50B5 77C8
KBD_SENSE_X8
50A6 50B4 77C8
KBD_DRIVE_Y5
50A6 50B3 77C8
KBD_DRIVE_Y7
50A6 50C3 77C8
KBD_DRIVE_Y6
50A6 50C3 77C8
KBD_DRIVE_Y0
KBD_CAP_CATHODE
50A7 50C4 77C8
50C4 50D5 77C8
PP3V3_G3H_RSLOC
KBD_RIGHT_SHIFT_KEY
50C3 50D8 77C8
KBD_LEFT_OPTION_KEY
50C3 50D8 77C8
KBD_CONTROL_KEY
50C3 50D8 77C8
FF14A-30C-R11DL-B-3H
J6700
CRITICAL
F-RT-SM
31
1
2
3
NC
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
D
C
32
2
DZ6702
PESD3V3L5UF
SOT886
2
DZ6703
PESD3V3L5UF
SOT886
PLACE_NEAR=J6701.6:5MM
6
5
43
PLACE_NEAR=J6701.11:5MM
6
KBD_DRIVE_Y0
KBD_DRIVE_Y6
KBD_DRIVE_Y7
75C1 50D8 50D4 50D2 50C8 50C6 50B5
KBD_SENSE_X7
50A6 50C2 77C8
50A6 50C2 77C8
50A6 50C2 77C8
50B5 50C2 77C8
50A6 50D2 77C7
KBD_DRIVE_Y4
1
PLACE_NEAR=J6701.25:5MM
PP1V8_G3S
DZ6706
PESD3V3L5UF
SOT886
6
5
43
KBD_DRIVE_Y3
KBD_DRIVE_Y1
KBD_DRIVE_Y2
50A6 50D2
77C7
50A6 50D2
77C7
50A6 50D2
77C7
B
A
75D1 50D4 50C8 50A5
77B8 77B7
50D6 51D3 77B8
50D6 51D3 77B8
KBD_ID PIN
ANSI
ISO
JIS
KBD_ID_DETECT1
50A6 77B8
HW_ID1
50A6 77B8
KBD_CAPSLOCK_LED
50A4 77B8
PP3V3_G3S_KBD
R6710
1.3K
I2C_KBD_SCL
I2C_KBD_SDA
FLOAT
HIGH
GND
R6717
201 MF 1/20W
R6719
201 MF 1/20W
R6718
1
1%
1/20W
MF
201
2
CONNECTION ON MEMBRANE KBD
NC
PP1V8_G3S
GND
1K
1K
1.00
1/20W 1%
1
R6711
1.3K
1%
1/20W
MF
201
2
R6712
2 1
MF
2 1
1/20W 1%
MF
R6713
21
KBD_ID1
5%
21
5%
21
KBD_CAP_CATHODE
MF-LF0201
33
201
1/20W
201
33
R6714
10K
1/20W
201
1%
50B3 50D2 77B8
50C2 50C4 77C8
5%
MF
2
5
1
2
1
R6715
100K
5%
1/20W
MF
201
2
138S0706
1
C6710
1.0UF
20%
10V
2
X5R-CERM
0201-1
23
21
VDD/P
132S0320 138S0847
1
C6712
0.1UF
10%
10V
2
X5R-CERM
PP1V8_G3S
1
C6713
0.1UF
10%
10V
2
X5R-CERM
02010201
1
C6714
10UF
20%
10V
2
X5R-CERM
0402-7
75C1 50D8 50D4 50D2 50C8 50C6 50B2
NC
43
2
VDD/I2C-BUS
IOXP1_INT_L
IOXP_I2C_SCL
50C8 50D4
IOXP_I2C_SDA
50C8 50D2
IOXP1_RESET_L
C6711
0.1UF
10%
10V
X5R-CERM
0201
1
2
18
19
20
24
INT*
ADDR
SCL
SDA
RESET*
WRITE ADDRESS = 0X40
READ ADDRESS = 0X41
U6701
PCAL6416A
HWQFN
PAD
VSS
THRM
9
25
P0_0
P0_1
P0_2
P0_3
P0_4
P0_5
P0_6
P0_7
P1_0
P1_1
P1_2
P1_3
P1_4
P1_5
P1_6
P1_7
122
KBD_DRIVE_Y0
2
KBD_DRIVE_Y1
3
KBD_DRIVE_Y2
4
KBD_DRIVE_Y3
5
KBD_DRIVE_Y4
6
KBD_DRIVE_Y5
7
KBD_DRIVE_Y6
8
KBD_DRIVE_Y7
10
11
12
HW_ID1
13
EEPROM_WC_L
14
15
16
KBD_ID_DETECT1
17
CAPSLOCK_LED_EN
311S0665
50C2 50C3 77C8
OUT
50B1 50D2 77C7
OUT
50B1 50D2 77C7
OUT
50B1 50D2 77C7
OUT
50B2 50D2 77C7
OUT
50B4 50C2 77C8
OUT
50C2 50C3 77C8
OUT
50B3 50C2 77C8
OUT
NC
50A8 77B8
50D4 77B8
NC
NC
50A8
77B8
MF
77B8
R6761
1K
201
5%
1/20W
R6762
200K
1/20W
201
21
LED_CTRL
1
5%
MF
2
LED_ISET
1
R6760
19.1K
1%
1/20W
MF
201
2
1
5
CTRL
ISET
PP3V3_G3S_KBD
3
VIN
U6705
FAN5622
SSOT23
GND
2
LED1
LED2
PLACE_NEAR=U6705.3:5mm
1
C6705
1.0UF
20%
10V
2
X5R-CERM
0201-1
6
KBD_CAPSLOCK_LED
4
50B5 50C2 77C7
KBD_SENSE_X10
77B8 77B7 75D1 50D4 50C8 50B8
PLACE_NEAR=J6701.19:5MM
50B5 50D2 77C7
KBD_SENSE_X9
50A8 77B8
DZ6704
PESD3V3L5UF
SOT886
1
2
6
5
43
KBD_SENSE_X6
KBD_ID1
KBD_SENSE_X11
KBD_SENSE_X4
KBD_SENSE_X12
50B6 50C2 77B8
PLACE_NEAR=J6701.20:5MM
50A7 50D2 77B8
50C6 50D2 77C7
50C6 50D2 77C7 50C6 50D2
50B7 50D2 77C7
50C6 50D2 77C7
50B5 50D2 77C7
KBD_SENSE_X3
KBD_SENSE_X0 KBD_SENSE_X1
BOM_COST_GROUP=KEYBOARD
DZ6705
PESD3V3L5UF
SOT886
1
2
PAGE TITLE
Keyboard & Trackpad 1
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
6
5
KBD_SENSE_X5
KBD_SENSE_X2
50C6 50D2
77C7
50C6 50D2
77C7
43
77C7
A
D
DRAWING NUMBER
051-05198
REVISION
SYNC_DATE=05/17/2019SYNC_MASTER=X1412_SHAN
SIZE
6.0.0
BRANCH
evt-3
PAGE
67 OF 150
SHEET
50 OF 109
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
Trackpad Level Shifting
3 245
TPAD CONNECTOR
J6701
DF40C-50DS-0.4V-51
F-ST-SM
1
D
74B6
PP1V8_AWAKE
R6803
25B3
31C8 32C6
31C8 32C6
32B8
100K
5%
1/20W
MF
201
IN
IN
IN
OUT
1
2
BYPASS=U6860::5MM
SPI_TPAD_CS_L
SPI_TPAD_CLK
SPI_TPAD_MOSI
SPI_TPAD_MISO_R
C6860
0.1UF
10%
10V
X5R-CERM
0201
CKPLUS_WAIVE=I2C_PULLUP
CKPLUS_WAIVE=I2C_PULLUP
PP3V3_G3S
NOSTUFF
1
2
R6872
1
100K
5%
1/20W
MF
201
2
PLACE_NEAR=U6860.8:2MM
R6876
20
5%
1/20W
MF
201
R6873
100K
1
5%
1/20W
MF
201
2
PLACE_NEAR=U6860.9:2MM
OUT
R6875
20
21
5%
1/20W
MF
201
21
SPI_TPAD_3V3_MOSI
SPI_TPAD_3V3_CLK
100K
5%
1/20W
MF
201
1
5%
MF
201
2
1
2
R6871
IN
1
14
2
1
15
2
16
3
5
4
6
7
U6860
SN74AVC4T774-COMBO
A1
DIR1
A2
DIR2
A3
DIR3
A4
DIR4
OE*
QFN
GND
13
VCCBVCCA
12
B1
11
B2
10
B3
9
B4
8
BYPASS=U6860::5MM
1
C6861
0.1UF
10%
10V
2
X5R-CERM
0201
SPI_TPAD_3V3_CS_L
SPI_TPAD_3V3_CLK_R
SPI_TPAD_3V3_MOSI_R
SPI_TPAD_3V3_MISO
R6874
R6870
100K
1/20W
NOSTUFF
1
100K
5%
1/20W
MF
201
2
51D2 77A8
R6880
100K
5%
1/20W
MF
201
75A5 51C4 51C2 51B5 51B2
51D2 77A8
OUT
51D2 77A8
CKPLUS_WAIVE=I2C_PULLUP
CKPLUS_WAIVE=I2C_PULLUP
51D2 77A8
OUT
77A8 75D7 51C2
I2C_TPAD_3V3_SCL
51C4 77A8
I2C_TPAD_3V3_SDA
51B4 77A8
KBD_INT_L
50B8 50D6 77A8 77B8
I2C_KBD_SDA
50A8 50D6
77B8
I2C_KBD_SCL
50A8 50D6
77B8
ACT_GND
51C2 77A8
PPBUS_G3H
2 1
4 3
6 5
8 7
10 9
12 11
14 13
16 15
18 17
20 19
22 21
24 23
26 25
28 27
30 29
32 31
34 33
36 35
38 37
40 39
42 41
44 43
46 45
48 47
50 49
IPD_LID_OPEN
TPAD_KBD_WAKE_L
TPAD_3V3_ACTUATOR_DISABLE_L
TPAD_3V3_SPI_INT_L
SPI_TPAD_3V3_MOSI
SPI_TPAD_3V3_CS_L
SPI_TPAD_3V3_MISO
TPAD_3V3_SPI_EN
SPI_TPAD_3V3_CLK
PP5V_G3S_TPAD_CONN
77A8
PP3V3_G3S_TPAD
NC
ACT_GND
51C3 77A8
VOLTAGE=5V
XW6701
SM
21
75D1
77A8
PPBUS_G3H
1
2
C6700
0.1UF
10%
25V
X5R
402
77A8 75D7 51C3
32D2 35D8 77A4 77A8
32B6 51B3 77A8
51B1 77A8
51C2 77A8
OUT
51C4 77A8
51D4 77A8
51D5 77A8
51A4 77A8
51D4 77A8
NOSTUFF
C6702
12PF
5%
25V
NP0-C0G
0201
L6700
FERR-120-OHM-1.5A
1
2
0402A
D
21
PP5V_G3S_TPAD
75A7
C
75C1 51C3 51B7 51B3
36C4 51D1 77A8 32B6
IN
36C4
BI
PP1V8_G3S
I2C_SNS_G3S_SCL
I2C_SNS_G3S_SDA
PLACE_NEAR=Q6861.4:2MM
R6879
30
5%
1/20W
MF
201
CKPLUS_WAIVE=I2C_PULLUP
21
I2C_TPAD_SDA_R
516S00187, MATE WITH 516S00188
C
PP3V3_G3S
Q6861
2
DMN33D9LV
G
1
4
S
VER-1
5
G
S
SOT563
CRITICAL
D
6
Q6861
DMN33D9LV
SOT563
CRITICAL
D
3
I2C_TPAD_3V3_SCL_R
R6812
2.2K
5%
1/20W
MF
201
1
2
1
R6813
2.2K
5%
1/20W
MF
201
2
PLACE_NEAR=Q6861.6:2MM
R6877
30
21
I2C_TPAD_3V3_SCL
5%
1/20W
MF
201
PLACE_NEAR=Q6861.3:2MM
R6878
30
21
I2C_TPAD_3V3_SDAI2C_TPAD_3V3_SDA_R
5%
1/20W
MF
201
75A5 51D5 51C2 51B5 51B2
OUT
BI
51D3 77A8
51D3 77A8
75C1 51C7 51B7 51B3
OUT
75C1 51C7 51C3 51B7 51B3
PP1V8_G3S
TPAD_SPI_INT_L
PP1V8_G3S
TPAD_KBD_WAKE_L
R6863
10K
5%
1/20W
MF
201
R6865
10K
5%
1/20W
MF
201
75A5 51D5 51C4 51B5 51B2
1
2
4
1
2
32B6 51D2 77A8
Q6862
5
DMN33D9LV
G
S
VER-1
PP3V3_G3S
SOT563
CRITICAL
D
3
TPAD_3V3_SPI_INT_L
1
R6864
100K
5%
1/20W
MF
201
2
IN
B
75C1 51C7 51C3 51B3
23C6
TPAD_SPI_EN
IN
PP1V8_G3S
R6852
100K
5%
1/20W
MF
201
VER-1
75C1 51C7 51C3 51B7 51B3
32A6 51D2 77A8
BYPASS=U6855::5MM
10%
10V
0201
1
1
2
VCCA VCCB
6
U6855
C6855
0.1UF
X5R-CERM
SLSV1T34AMU-COMBO
2
5
1
2
NC
NC
UDFN
GND
3
4
BA
BYPASS=U6855::5MM
1
C6856
0.1UF
10%
10V
2
X5R-CERM
0201
1
R6853
100K
5%
1/20W
MF
201
2
NOSTUFF
1
R6854
100K
5%
1/20W
MF
201
2
PP3V3_G3S
TPAD_3V3_SPI_EN
OUT
75A5 51D5 51C4 51C2 51B2
51D2 77A8
TPAD_ACTUATOR_DISABLE_L TPAD_3V3_ACTUATOR_DISABLE_L
BI
PP1V8_G3S
R6867
10K
5%
1/20W
MF
201
1
2
1
75A5 51D5 51C4 51C2 51B5
Q6862
2
DMN33D9LV
G
S
VER-1
SOT563
CRITICAL
D
6
PP3V3_G3S
Pull-Up on IPD module
NOSTUFF
1
R6868
100K
5%
1/20W
MF
201
2
BI
B
A
8
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
PAGE TITLE
A
Keyboard & Trackpad 2
DRAWING NUMBER
051-05198
Apple Inc.
REVISION
6.0.0
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
BOM_COST_GROUP=TRACKPAD
67
35 4
IV ALL RIGHTS RESERVED
2
BRANCH
evt-3
PAGE
68 OF 150
SHEET
51 OF 109
1
SIZE
D
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
J79 Battery Hotbar Flex Pads
J6950
PWR-MLB-X362
HB-SM
11 10
12
13
14
1
2
3
9
8
7
6
C6950
54
0.1UF
402
PPVBAT_G3H_CONN
1
2
C6960
1UF
10%10%
25V25V
X5RX5R
603-1
PP3V3_G3H_RTC
APN: 518S0818
75C4
Q6950
PP1V8_SLPS2R
2
74C6 36D3
DMN33D9LV
1
R6952
4.7K
5%
1/20W
MF
201
2
76A3
3
D
S G
2
CRITICAL
SYSDET:FET
Q6955
DMN32D2LFB4
DFN1006H4-3
SYM_VER_2
1
SYS_DETECT
77B4
SOT563
6
Q6950
DMN33D9LV
SOT563
CRITICAL
3
G
D
S
VER-1
1
5
G
D
S
VER-1
PP3V3_G3H_RTC
SYSDET:FET
1
R6955
10K
5%
1/20W
MF
201
2
I2C_PWR_SCL
I2C_PWR_SDA
4
75C4
IN
36D1
BI
D
36D1
4.7K
5%
1/20W
MF
201
2
3
1
2
J6951
FF14A-6C-R11DL-B-3H
53C1 77A7 77C4 77D2
1
2
F-RT-SM
7
1
2
3
4
5
6
8
NC
SYS_DETECT_L
77A7 77D2
SMBUS_3V3_BATT_SCL
77A7
SMBUS_3V3_BATT_SDA
77A7
TP_BMON_IOUT
SYSDET:AON
1
R6950
10K
5%
1/20W
MF
201
2
RCLAMP3552T
SLP1006N3T
D6950
CRITICAL
R6951
1
SYSDET:FET
C
BMU POWER FLEX HOTBAR'd TO THE MLB:
PCBA,FLEX,BMU PWR,X362 CRITICALJ69501632-00566
SMC Reset Circuit
Right Shift & Left Option Control
followed by ON OFF button press.
SW6950
SOX-152HNT
SM
2 1
Press switch to de-energize
G3H rail on battery only.
PLACE_SIDE=BOTTOM
PP3V3_G3H_RTC
75C4
CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION
IN
50C6 62A6 62C3 77B8 81D5 81D7
IN
132S0534
BYPASS=U6940::3MM
C6940
0.1UF
0201
PMU_RSLOC_RST_L
10%
25V
X5R
1
1
2
3
4
SLG4AP41183
BTN1
BTN2
VDD
U6940
STQFN
CRITICAL
GND
7
RESET
NC
NC
NC
NC
NC
NC
NC
10
2
5
6
8
9
11
12
CHGR_RST_IN_R
NC
NC
NC
NC
NC
NC
NC
R6940
1K
21
5%
1/20W
MF
201
R6941
1K
21
5%
1/20W
MF
201
CHGR_RST_INPMU_ONOFF_L
UPC_PMU_RESET
53A6 33C1 62A6 62C3 81C5 81C7
OUT
19C3 62D6 77B2 80A7
OUT
C
B
A
PPVIN_G3H_P3V3G3HRTC
75C6
CRITICAL
1
C6900
2.2UF
20%
25V 25V
2
X5R-CERM
0402-1
R6900
0
0%
1/4W
MF
0603
CRITICAL
1
C6902
2.2UF
20%
2
X5R-CERM
0402-1
1
2
OMIT_TABLE
CRITICAL
1
C6907
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
PPVIN_G3H_P3V3G3HRTC_R
OMIT_TABLE
CRITICAL
1
C6908
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
53A4 53B8 77B2
CRITICAL
1
C6905
2.2UF
20%
2
25V 25V
X5R-CERM
0402-1
IN
MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=0.1500
VOLTAGE=12
CRITICAL
1
C6906
2.2UF
20%
2
X5R-CERM
0402-1
CHGR_EN_MVR
1
C6901
0.1UF 0.1UF
10% 10%
25V 25V
2
X6S-CERM X6S-CERM
0201 0201
R6907
0
2 1
5%
1/20W
MF
0201
C6903
0.033UF
10%
50V
X7R
0402
1
C6909
2
CHGR_EN_MVR_R
P3V3G3HRTC_SS
1
2
GND_P3V3G3HRTC_AGND
VOLTAGE=0V
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
3.3V G3H VR
U6903
TPS62180
VIN1
A1
VIN1
B1
VIN1
C1
VIN2
D1
VIN2
E1
VIN2
F1
EN VO
E4
SS/TR
D4
AGND
C4
BGA
CRITICAL
PGND
PGND
PGND
D3
C3
B3
A3
XW6900
SM
PGND
PGND
E3
21
PGND
F3
SW1
SW1
SW1
SW2
SW2
SW2
PG
FB
A2
B2
C2
D2
E2
F2
A4
F4
B4
P3V3G3HRTC_PHASE1
DIDT=TRUE
P3V3G3HRTC_PHASE2
DIDT=TRUE
P3V3G3HRTC_PGOOD
P3V3G3HRTC_FB
PP3V3_G3H_RTC_REG_R
1
R6908
100K
5%
1/20W
MF
201
2
CRITICAL
L6900
1UH-20%-4.8A-0.032OHM
1210
CRITICAL
L6901
1UH-20%-4.8A-0.032OHM
1210
P3V3G3HRTC_FB_R
C6910
220PF
10%
16V
CER-X7R
0201
P3V3G3HRTC_RA_R
1
2
DESENSE DESENSE
1
C6920
12PF
5%
25V 25V
2
NP0-C0G
0201 0201
52B3
Vout = 3.384V
R6934
6A Max Output
f = 1.25 MHZ
MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=0.2000
21
21
R6912
R6913
<Ra>
R6910
365K
<Rb>
R6911
113K
10
5%
1/20W
MF
201
0
5%
1/20W
MF
0201
0.1%
1/20W
TF
0201
0.1%
1/20W
MF
0201
1
2
1
2
For tuning
1
2
1
2
PP3V3_G3H_RTC_REG_R
52B4
CRITICAL
1
C6912
150UF
20%
6.3V
2
TANT
CASE-B-SM
CRITICAL
1
C6914
10UF
20%
2
10V
X5R-CERM
0402-1
Vout = 0.8 * (1 + <Ra>/<Rb>) = 3.384V
BOM_COST_GROUP=PLATFORM POWER
VOLTAGE=3.3
CRITICAL CRITICAL
1
C6915
10UF
20%
2
10V
X5R-CERM
0402-1
CRITICAL
1
C6916
150UF
20%
6.3V
2
TANT
CASE-B-SM
PAGE TITLE
1
C6917
150UF
20%
6.3V
2
TANT
CASE-B-SM
DC-In & Battery Connectors
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
1
0
0%
1/4W
MF
0603
2
Apple Inc.
1
2
PP3V3_G3H_RTC
R6935
0
0%
1/4W
MF
0603
CRITICAL
1
C6918
10UF
20%
2
10V
X5R-CERM
0402-1
CRITICAL
1
C6919
10UF
20%
2
10V
X5R-CERM
0402-1
1
C6921
3.0PF
+/-0.1PF
2
NP0-C0G
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
69 OF 150
SHEET
52 OF 109
77B2 75D6
SIZE
B
A
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
D
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
C
B
A
CRITICAL
1
C702A
6.8UF
20%
35V-0.09OHM
2
POLY-TANT
CASE-B1-2-SM
PP7011
PP7012
PP7013
PP7014
PP7015
PP7016
P2MM
P2MM
SM
PP
P2MM
P2MM
P2MM
P2MM
52A7 53A4 77B2
53A4 62C3
SM
PP
SM
PP
SM
PP
SM
PP
SM
PP
1
2
1
1
1
1
1
1
DESENSE
C7000
12PF
5%
NP0-C0G
CRITICAL
1
C7024
6.8UF
20%
35V-0.09OHM
2
POLY-TANT
CASE-B1-2-SM
FROM USB-C SOURCE
19C3 53B1 75B7 77C4 77D2 77D4
CHGR_GATE_Q1
CHGR_GATE_Q2
CHGR_GATE_Q3
CHGR_GATE_Q4
53D5
53C5
CHGR_LX1
53D4
53C4
CHGR_LX2
CHGR_EN_MVR
CHGR_INT_L
DESENSE
1
C7001
3.0PF
+/-0.1PF
2
NP0-C0G
PPDCIN_G3H
P2MM
SM
1
PP
P2MM
SM
1
PP
P2MM
SM
1
PP
P2MM
SM
1
PP
P2MM
SM
1
PP
P2MM
SM
1
PP
P2MM
SM
1
PP
P2MM
SM
1
PP
PP1V8_SLPS2R
74C6
DESENSE
1
C7002
12PF
5%
2
NP0-C0G
CRITICAL
1
C7025
6.8UF
20%
35V-0.09OHM
2
POLY-TANT
CASE-B1-2-SM
PP7001
PP7002
PP7003
PP7004
PP7005
PP7006
PP7007
PP7008
DESENSE
1
C7003
3.0PF
+/-0.1PF
2
NP0-C0G
CRITICAL
1
C7026
6.8UF
20%
35V-0.09OHM
2
POLY-TANT
CASE-B1-2-SM
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
PPVBAT_G3H_CHGR_REG
53D3 77C4
1UF
20%
10V
X5R
0201
1
2
C7080
DESENSE
1
C7006
12PF
5%
2
NP0-C0G
CRITICAL
1
C7027
6.8UF
20%
35V-0.09OHM
2
POLY-TANT
CASE-B1-2-SM
CHGR_CSI_R_P
C7021
0.047UF
CER-X7R
1
R7015
750K
1%
1/20W
MF
201
2
CHGR_AUX_DET
NO STUFF
10%
25V
0201
1
2
C7016
0.01UF
X5R-CERM
PLACE_NEAR=U7000.A5:2MM
1
R7016
255K
1%
1/20W
MF
201
2
C7081
2.2UF
X5R-CERM
36D1
36D1
52C2
DESENSE
1
C7008
12PF
5%
2
NP0-C0G
DESENSE
1
C7009
3.0PF
+/-0.1PF
2
NP0-C0G
CRITICAL
1
C7028
6.8UF
20%
35V-0.09OHM
2
POLY-TANT
CASE-B1-2-SM
NO_XNET_CONNECTION=1
1
2
CRITICAL
(AMON)
R7020
0.01
0.5%
0.5W
MF
0306
21
43
CHGR_CSI_R_N
R7021
1
1.00
1%
1/20W
MF-LF MF-LF
0201 0201
2
CHGR_CSI_P
1
10% 10%
50V
2
0402
1
R7022
1.00
1%
1/20W
2
CHGR_CSI_N
C7023
0.47UF
2 1
PLACE_NEAR=U7000.C5:1MM
CHGR_COMP
C7071
0.12UF
10V
X5R
0402
20%
35V
0402
BI
IN
IN
C7070
0.12UF
20%
4V
CERM-X5R-1
201
1
2
I2C_PWR_SDA
I2C_PWR_SCL
CHGR_RST_IN
1
10% 10%
10V
2
X5R
0402
1
2
CRITICAL
C7029
6.8UF
20%
35V-0.09OHM
POLY-TANT
CASE-B1-2-SM
1
C7022
0.047UF
50V
2
CER-X7R
0402
NO STUFF
PPDCIN_G3H_CHGR
77C4
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0540
1
C7032
2.2UF
20%
35V
2
X5R-CERM
0402
10
4
3
2
D1
Q7030
SIZ342DT
PWRPAIR-3X3-COMBO
1
CRITICAL
CHGR_GATE_Q1
CHGR_VDDA
1
C7075
2.2UF
20%
25V 25V
2
X6S-CERM
0402
U7000
B5
P_IN
C5
CSIN
D5
CSIP
A5
PBUS_PWR
D3
AUX_DET
F5
VDDIO1P8
G5
SDA
H5
SCL
G2
SMC_RST_IN
G3
HPWR_EN*
E5
COMP
G4
CELL
B2
NC0
C2
NC1
E4
ISL9240
CRITICAL
OMIT_TABLE
1
C7033
2.2UF
20%
35V
2
X5R-CERM
0402
PLACE_NEAR=Q7030.2:1MM
53C5 53C7
S1/D2G1G2
9
CHGR_LX1
1
C7030
0.1UF 0.1UF
10% 10%
25V 25V
2
X7R-CERM-1
0402
DIDT=TRUE
SWITCH_NODE=TRUE
CHGR_BOOT1_RC
1
R7030
0
5%
1/16W
MF-LF
402
2
CHGR_BOOT1
R7075
4.7
5%
1/20W
MF
201
CHGR_VDDP
C7077
X5R-CERM
D2
A2
VDDA
VDDP
WCSP
AGND
PGND
E2
E3
VOLTAGE=20V
2.7UH-20%-12.5A-0.0196OHM
CHGR_LX1
7
6
5
S2
8
CHGR_GATE_Q2
21
1
10UF
20%
2
0603
GATE_Q1
BOOT1
LX1
GATE_Q2
GATE_Q3
LX2
BOOT2
GATE_Q4
PBUS
CSOP
CSON
BGATE
VBAT
EN_VR1
SMC_RST*
IRQ*
CBC_ON
EN_MVR
AUX_OK
AMON
BMONNC2
DESENSE
1
C7090
12PF
5%
2
NP0-C0G
1
C7034
2.2UF
20%
35V
2
X5R-CERM
0402
PLACE_NEAR=Q7030.1:3mm
1
C7035
2
L7030
IHLP4040BD-PIMA102D-COMBO
CRITICAL
DIDT=TRUE SWITCH_NODE=TRUE
DIDT=TRUE SWITCH_NODE=TRUE
DIDT=TRUE SWITCH_NODE=TRUE
H1
F1
G1
E1
D1
B1
C1
A1
A3
A4
B4
B3
C3
F2
H4
H3
H2
F4
F3
D4
C4
DIDT=TRUE SWITCH_NODE=TRUE
DIDT=TRUE SWITCH_NODE=TRUE
DIDT=TRUE SWITCH_NODE=TRUE
CHGR_PBUS
CHGR_VBAT
NC_CHGR_EN_VR1
NC_CHGR_SMC_RST_L
CHGR_INT_L
CHGR_CBC_ON
CHGR_EN_MVR
NC_CHGR_AUX_OK
CHGR_AMON
CHGR_BMON
DIDT=TRUE GATE_NODE=TRUE
DESENSE
1
C7091
3.0PF
+/-0.1PF
2
NP0-C0G
2.2UF
20%
35V
X5R-CERM
0402
21
CHGR_LX2
7
S2
CHGR_GATE_Q3
53B7
53D4
C7040
X7R-CERM-1
DIDT=TRUE
SWITCH_NODE=TRUE
CHGR_BOOT2_RC
CHGR_BOOT2
DIDT=TRUE GATE_NODE=TRUE
53B7 53C4
6
5
G2
8
CHGR_LX2
0402
R7040
0
5%
1/16W
MF-LF
402
1
2
1
2
DESENSE
1
C7092
12PF
5%
2
NP0-C0G
S1/D2
9
53B8 62C3
OUT
62C3
OUT
52A7 53B8 77B2
OUT
76C6
OUT
38C2 43C4
OUT
38C2 43B4
OUT
DESENSE
1
C7093
3.0PF
+/-0.1PF
2
NP0-C0G
3
4
10
2
D1
SIZ342DT
G1
1
PWRPAIR-3X3-COMBO
CRITICAL
CHGR_GATE_Q4
NO_XNET_CONNECTION=1
(PBUS)
40D4
43B4
CHGR_CSO_R_P
C7061
0.047UF
CER-X7R
PLACE_NEAR=Q7040.2:2mm
2
XW7000
SM
1
Q7040
(BMON)
R7061
CHGR_CSO_P
50V
0402
1
1.00
1%
1/20W
MF-LF
0201 0201
2
1
2
DESENSE
1
C7094
12PF
5%
2
NP0-C0G
CRITICAL
1
C7050
68UF
20%
16V
2
POLY-TANT
CASE-D2E-SM
77C4
PPVBAT_G3H_CHGR_REG
53B7
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0540
VOLTAGE=13.1V
DESENSE
1
C7095
3.0PF
+/-0.1PF
25V 25V25V25V 25V25V 25V 25V 25V25V25V 25V25V 25V25V 25V 25V
2
NP0-C0G
0201 020102010201 02010201 0201 0201 020102010201 02010201 02010201 0201 0201
C7066
2.2UF
0402-1
CRITICAL
R7060
0.005
1%
1W
MF
0612-5
C7020
0.47UF
2 1
CERM-X5R-1
20%
4V
201
21
43
PPVBAT_G3H_CHGR_R
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0540
VOLTAGE=13.1V
CHGR_CSO_R_N
1
R7062
1.00
1%
1/20W
MF-LF
2
CHGR_CSO_N
1
C7062
0.047UF
10%10%
50V
2
CER-X7R
0402
PLACE_NEAR=U7000.A4:1MM
BOM_COST_GROUP=PLATFORM POWER
CRITICAL
1
C7051
68UF
20%
16V
2
POLY-TANT
CASE-D2E-SM
20%
X5R
1
2
DESENSE
1
C7096
12PF
5%
2
NP0-C0G
C7069
2.2UF
40D4 43B4
20%
25V
X5R
0402-1
1
2
1
2
CRITICAL
Q7065
SI7655DN-COMBO
PWRPK-1212-8
321
C7064
1000PF
21
10%
25V
X7R
0201
DESENSE
C7097
3.0PF
+/-0.1PF
NP0-C0G
C7067
0.1UF
10%
25V
X5R
0201
S
G
4
CHGR_BGATE
1
C7053
2.2UF
20%
25V
2
X5R
0402-1
DESENSE
1
C7098
12PF
5%
2
NP0-C0G
1
C7055
2.2UF
20%
25V
2
X5R
0402-1
DESENSE
1
C7099
3.0PF
+/-0.1PF
2
NP0-C0G
1
C7054
1000PF
10%
25V
2
X7R
0201
CRITICAL
F7000
12AMP-32V
21
1206
132S0534
1
C7068
0.01UF
2
X5R-CERM
10%
25V25V
0201
1
2
TO/FROM BATTERY
D
1
C7063
4700PF
10%
25V
2
CER-X5R
0201
5
PLACE_NEAR=Q7065.5:2MM
132S0534
1
C7060
0.1UF
10%
25V
2
X5R
0201
1
R7063
1K
5%
1/20W
MF
201
2
R7070
1/20W
24K
5%
MF
201
3
2
1
2
PPVBAT_G3H_CONN
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0540
VOLTAGE=13.1V
CRITICAL
D
Q7070
DMN32D2LFB4
DFN1006H4-3
SYM_VER_2
S G
1
SAVE_BAT_GSAVE_BAT_S
K
A
CRITICAL
D7070
GDZ5V6LP3-55
DFN0201-THICKSTNCL
DESIGN: X502/MLB
LAST CHANGE: Thu Mar 5 18:14:03 2015
SYNC_MASTER=myEE SYNC_DATE=03/01/2019
PAGE TITLE
TO SYSTEM
PPBUS_G3H
PPDCIN_G3H
1
R7071
200K
1%
1/20W
MF
201
2
PBUS Supply & Battery Charger
DRAWING NUMBER
051-05198
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
REVISION
6.0.0
BRANCH
evt-3
PAGE
70 OF 150
SHEET
53 OF 109
77D2
75D8
77C4
77D2
75B7
19C3
53D7
77C4
77D4
SIZE
D
D
C
77C4
52D5
77A7
77D2
B
A
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
8A6
8A6
CPU_VCCSENSE_P
IN
IN
NO_TEST=1
CPU_VCCSENSE_N
NO_TEST=1
NO_XNET_CONNECTION=1
R7142
0
21
5%
1/20W
MF
0201
NO_XNET_CONNECTION=1
XW7140
1
C7142
330PF
10%
16V
2
X7R
0201
10%
16V
X7R
0201
1
2
C7141
330PF
CRITICAL CRITICAL
R7160
102K
2 1
NOSTUFF
1%
1/20W
MF
201
IMON_A_CPUCORE
C7160
150PF
2 1
10%
25V
X7R-CERM
0201
CRITICAL
FB_CORE
SM
21
RTN_A_CPUCORE
54C4
117S0201
R7147
0
21
5%
1/20W
MF
0201
54C4
PPBUS_HS_CPU
75C6
PP5V_COREVR_VCC
54D5
NOSTUFF
1
R7148
33
1%
1/20W
MF
201
2
FB_CORE_RC
1
C7145
0.022UF
10%
6.3V
2
X6S
0201
CRITICAL
NOSTUFF
R7101
1
R7116
1K
5%
1/20W
MF
201
2
ISUM_COREVR_VCC
10
5%
1/20W
MF
201
R7143
FB_CORE_R
CRITICAL
C7144
560PF
2 1
10%
50V
X7R-CERM
0201
FB_A_CORE_R
3.32K
2 1
1%
1/20W
MF
201
R7144
1.5K
2 1
1%
1/20W
MF
201
R7145
1/20W
1
R7146
330K
1%
1/20W
MF
201
2
NOSTUFF
1K
1%
MF
201
FB_A_CPUCORE
21
FB_A_CORE_RC
C7143
270PF
10%
16V
X7R-CERM
0201-1
1
2
54C4
NTC_A_CPUCORE
54C4
R7120
14K
1/20W
1%
MF
201
21
NTC_A_CPUCORE_RP
1
CRITICAL
R7123
220KOHM-3%
0201
2
NTC_A_CPUCORE_RN
XW7123
SM
21
D
R7100
1
5%
MF
201
21
PP5V_G3S_CPUREG
55A8 55B8 55D8
OUT
55D8
OUT
55B8
OUT
55A8
OUT
54B8 55A4 55B3 55C3
IN
54B5
CPU VCC Core
75A7 55D8 55C8 55B8
PP1V8_S5
75C1
1
R7163
100K
5%
1/20W
MF
201
CPUVR_PGOOD
54C4
CPUVR_PGOOD
MAKE_BASE=TRUE
2
62B3 77C2
OUT
21
PPVIN_S0_CPUVR_VIN PP5V_COREVR_VCC
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0750
VOLTAGE=13.1V
1
C7101
0.22UF
10%
25V
2
X7R
0402
CRITICAL
41
VIN
U7100
42
VCC
54C6
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0750
VOLTAGE=5V
1/20W
1
C7100
1.0UF
10%
25V
2
X6S
0402
CRITICAL
ISL95828B3
11 24
NC
NC
NC
FCCM_B
12 25
PWM1_B
13 26
PWM2_B
7 19
ISUMP_B
8 20
ISUMN_B
TQFN
CRITICAL
FCCM_A
PWM1_A
PWM2_A
PWM3_A
ISUMP_A
ISUMN_A
27
CPUCORE_FCCM
CPUCORE_PWM1
CPUCORE_PWM2
CPUCORE_PWM3
CPUCORE_ISUMP
CPUCORE_ISUMN_R
C
B
R7162
51.1K
2 1
1%
1/20W
MF
201
C7161
6800PF
2 1
COMP_A_CPUCORE_L
10%
10V
X7R-CERM
0201
CRITICAL
54C4 55A4 55B3 55C3
IN
55A3 55B3 55D3
IN
54C4 55C3
IN
54C4 55B3
IN
54C4 55A4
IN
CPUCORE_ISUMP
CPUCORE_ISUMN
CPUCORE_ISEN1
CPUCORE_ISEN2
CPUCORE_ISEN3
CRITICAL
C7155
0.022UF
0201-1
10%
6.3V
X6S
1
2
C7162
150PF
2 1
X7R-CERM
CRITICAL
CRITICAL
C7154
0.022UF
6.3V
0201-1
10%
25V
0201
10%
X6S
1
2
R7161
1.5K
2 1
1/20W
201
CRITICAL
C7151
220PF
CRITICAL
C7153
0.022UF
10%
6.3V
X6S
0201-1
COMP_A_CPUCORE
1%
MF
1
2%
50V
2
C0G
0201
R7151
1
2
1K
1%
1/20W
MF
201
54C4
R7150
422
2 1
1%
1/20W
MF
201
21
CORE_ISUMN_R
PROG1_CPUCOREVR
54A5
PROG2_CPUCOREVR
54A5
PROG3_CPUCOREVR
54A4
PROG4_CPUCOREVR
54A4
PROG5_CPUCOREVR
54A4
CRITICAL
C7150
3300PF
21
10%
10V
X7R-CERM
0201
CPUCORE_ISUMN_R
54C4
9 21
NC
NC
NC
NC
NC
NC
NC
NC
NC
ISEN1_B
10 22
ISEN2_B
4 16
COMP_B
5 17
FB_B
6 18
RTN_B
2 14
IMON_B
3 15
NTC_B
34
FCCM_C
35
PWM_C
32
ISUMP_C
33
ISUMN_C
29
COMP_C
30
FB_C
RTN_C
28
IMON_C
40
PROG1
39
PROG2
38
PROG3
37
PROG4
36
PROG5
THRM_PAD
49
ISEN1_A
ISEN2_A
ISEN3_A
COMP_A
IMON_A
VR_HOT*
VR_READY
VR_ENABLE
ALERT*
FB_A
RTN_A
NTC_A
SDA
SCLK
PSYS
23
46
47
48
43
44
4531
1
CPUCORE_ISEN1
CPUCORE_ISEN2
CPUCORE_ISEN3
COMP_A_CPUCORE
FB_A_CPUCORE
RTN_A_CPUCORE
IMON_A_CPUCORE
NTC_A_CPUCORE
CPU_VR_PROCHOT_L
CPUVR_PGOOD
CPU_VR_EN_R
CPUVR_VIDSOUT_R
CPUVR_VIDALERT_L_R
CPUVR_VIDSCLK_R
IN
IN
IN
54C6
54D4
54D6
54C7
54D3
54C3
117S0201
R7106
0
5%
1/20W
MF
0201
54B8 55C3
54B8 55B3
54A8 55A4
R7103
1
R7110
45.3
2
21
R7102
100
1/20W
0
21
5%
1/20W
MF
0201
PLACE_NEAR=U7100.45:10MM
1%
1/20W
MF
201
21
5%
MF
201
PP1V05_S0_CPU_VCCST
R7105
0
21
5%
1/20W
MF
0201
117S0201
R7104
0
21
5%
1/20W
MF
0201
SMC_PROCHOT_L
CPU_VR_EN
PLACE_NEAR=U7100.43:10MM
1
R7109
100
1%
1/20W
MF
201
2
CPU_VIDSOUT
CPU_VIDALERT_L
CPU_VIDSCLK
OUT
16C5
24B6 31A6 32B1
8A5
BI
8A5
IN
8A5
IN
C
77D2 75B4 64A2 31B6 16C7 13D8 10B3 8C7 8A5 6D6
B
A
8
C7152
0.022UF
6.3V
0201-1
CRITICAL
10%
X6S
1
PROG1_CPUCOREVR
2
1
R7111
34K
1%
1/20W
MF
201
2
1
R7112
88.7K
1%
1/20W
MF
201
2
PROG2_CPUCOREVR
NOSTUFF
1
R7113
100K
1%
1/20W
MF
201
2
54B6
54B6
PROG3_CPUCOREVR
PROG4_CPUCOREVR
1
R7114
182K
1%
1/20W
MF
201
2
1
R7115
100K
1%
1/20W
MF
201
2
54B6
NOSTUFF
54B6
PROG5_CPUCOREVR
54B6
PAGE TITLE
IMVP9 IC
Apple Inc.
DRAWING NUMBER
051-05198
REVISION
SYNC_DATE=03/26/2019SYNC_MASTER=J214_JACK
SIZE
A
D
6.0.0
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
BOM_COST_GROUP=CPU & CHIPSET
67
35 4
IV ALL RIGHTS RESERVED
2
BRANCH
evt-3
PAGE
71 OF 150
SHEET
54 OF 109
1
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
Vout = 0 - 1.8V
IccMax = 80A
D
C
B
A
55C8 55B8
75C6
55B8 54D3
75A7 55C8
55D8 55B8
75C6
55B8 54D3
75A7 55D8
55D8 55C8
75C6
55C8 54D3
75A7 55D8
PPBUS_HS_CPU
PP5V_G3S_CPUREG
R7215
1
21
5%
1/16W
MF-LF
402
PVCCCORE_PH1_AGND
55C7
P2MM
SM
1
PP
54C4 55A8 55B8
54C4
IN
IN
PP7213
CPUCORE_FCCM
CPUCORE_PWM1
CPU VCC Phase 1
PPBUS_HS_CPU
PP5V_G3S_CPUREG
R7225
1
21
5%
1/16W
MF-LF
402
PVCCCORE_PH2_AGND
55B7
54C4 55A8 55D8
54C4
IN
IN
CPUCORE_FCCM
CPUCORE_PWM2
CPU VCC Phase 2
PPBUS_HS_CPU
PP5V_G3S_CPUREG
R7235
1
21
5%
1/16W
MF-LF
402
PVCCCORE_PH3_AGND
55A7
54C4 55B8 55D8
54C4
IN
IN
CPUCORE_FCCM
CPUCORE_PWM3
CPU VCC Phase 3
C7217
2.2UF
20%
25V
X6S-CERM
0402
55D8
C7227
2.2UF
20%
25V
X6S-CERM
0402
55C8
C7237
2.2UF
20%
25V
X6S-CERM
0402
55A8
VOLTAGE=5V
PP5V_MAIN_VCORE1
1
2
8
VIN
9
VIN
2
1
PQFN-COMBO-THICKSTNCL
FCCM
PWM
OMIT_TABLE
353S00519
NC
NC
30 33
31
XW7210
SM
PVCCCORE_PH1_AGND
PLACE_NEAR=U7210.32:2MM
VOLTAGE=5V
PP5V_MAIN_VCORE2
1
2
353S00831
NC
NC
4
21
8
VIN
9
VIN
2
1
PQFN-COMBO-THICKSTNCL
FCCM
PWM
OMIT_TABLE
353S00519
NC
NC
30 33
31
XW7220
SM
PVCCCORE_PH2_AGND
PLACE_NEAR=U7220.32:2MM
VOLTAGE=5V
PP5V_MAIN_VCORE3
1
2
353S00831
NC
NC
4
21
8
VIN
9
VIN
2
1
PQFN-COMBO-THICKSTNCL
FCCM
PWM
OMIT_TABLE
353S00519
NC
NC
30 33
31
XW7230
SM
PVCCCORE_PH3_AGND
PLACE_NEAR=U7230.32:2MM
353S00831
NC
NC
4
21
3
29
VCC
PVCC
U7210
FDMF5808A
AGND
AGND
32
3
VCC
PGND
12
29
PVCC
PGND
28
U7220
FDMF5808A
AGND
AGND
32
3
VCC
PGND
12
29
PVCC
PGND
28
U7230
FDMF5808A
AGND
AGND
32
PGND
12
PGND
28
BOOT
PHASE
SW
SW
GL0
GL1
GH
BOOT
PHASE
SW
SW
GL0
GL1
GH
BOOT
PHASE
SW
SW
GL0
GL1
GH
5
7
16
24
27
6
5
7
16
24
27
6
5
7
16
24
27
6
1
C7216
2.2UF
20%
25V
2
X6S-CERM
0402
NC
1
C7226
2.2UF
20%
25V
2
X6S-CERM
0402
NC
1
C7236
2.2UF
20%
25V
2
X6S-CERM
0402
NC
CPUCORE_SW1
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0540
DIDT=TRUE
SWITCH_NODE=TRUE
CPUCORE_BOOT1
MIN_LINE_WIDTH=0.2500
MIN_NECK_WIDTH=0.2000
DIDT=TRUE
SWITCH_NODE=TRUE
PP7211
CPUCORE1_GL0
DIDT=TRUE
GATE_NODE=TRUE
CPUCORE1_GH
DIDT=TRUE
SWITCH_NODE=TRUE
CPUCORE_BP1
MIN_LINE_WIDTH=0.2500
MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=0.2500
MIN_NECK_WIDTH=0.2000
DIDT=TRUE
SWITCH_NODE=TRUE
SWITCH_NODE=TRUE
CPUCORE_PHASE1
CPUCORE_SW2
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0540
DIDT=TRUE
SWITCH_NODE=TRUE
CPUCORE_BOOT2
MIN_LINE_WIDTH=0.2500
MIN_NECK_WIDTH=0.2000
DIDT=TRUE
SWITCH_NODE=TRUE
PP7221
CPUCORE2_GL0
DIDT=TRUE
GATE_NODE=TRUE
CPUCORE2_GH
DIDT=TRUE
SWITCH_NODE=TRUE
CPUCORE_BP2
MIN_LINE_WIDTH=0.2500
MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=0.2500
MIN_NECK_WIDTH=0.2000
DIDT=TRUE
SWITCH_NODE=TRUE
SWITCH_NODE=TRUE
CPUCORE_PHASE2
CPUCORE_SW3
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
DIDT=TRUE
SWITCH_NODE=TRUE
CPUCORE_BOOT3
MIN_LINE_WIDTH=0.2500
MIN_NECK_WIDTH=0.2000
DIDT=TRUE
SWITCH_NODE=TRUE
PP7231
CPUCORE3_GL0
DIDT=TRUE
GATE_NODE=TRUE
CPUCORE3_GH
DIDT=TRUE
SWITCH_NODE=TRUE
CPUCORE_BP3
MIN_LINE_WIDTH=0.2500
MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=0.2500
MIN_NECK_WIDTH=0.2000
DIDT=TRUE
SWITCH_NODE=TRUE
SWITCH_NODE=TRUE
CPUCORE_PHASE3
R7219
P2MM
SM
1
PP
P2MM
SM
1
PP
PP7212
DIDT=TRUE
C7219
0.22UF
2 1
10%
25V
X7R
0402
R7229
P2MM
SM
1
PP
P2MM
SM
1
PP
PP7222
DIDT=TRUE
C7229
0.22UF
2 1
10%
25V
X7R
0402
R7239
P2MM
SM
1
PP
P2MM
SM
1
PP
PP7232
DIDT=TRUE
C7239
0.22UF
2 1
10%
25V
X7R
0402
0
5%
1/16W
MF-LF
402
0
5%
1/16W
MF-LF
402
0
5%
1/16W
MF-LF
402
CRITICAL
L7210
0.22UH-20%-44A-0.0019OHM
21
PPVCC_CPU_PH1
PILA082D-SM
1
R7218
2.2
5%
1/10W
MF-LF
1
603
2
NOSTUFF
MIN_LINE_WIDTH=9.0000
MIN_NECK_WIDTH=0.0900
VOLTAGE=1.5V
CPUCORE_SW1_SNUB
DIDT=TRUE
SWITCH_NODE=TRUE
2
1
C7218
0.001UF
10%
50V
2
X7R-CERM
0402
NOSTUFF
CRITICAL
L7220
0.22UH-20%-44A-0.0019OHM
21
PPVCC_CPU_PH2
PILA082D-SM
1
R7228
2.2
1
2
5%
1/10W
MF-LF
603
2
NOSTUFF
CPUCORE_SW2_SNUB
DIDT=TRUE
SWITCH_NODE=TRUE
1
C7228
0.001UF
10%
50V
2
X7R-CERM
0402
MIN_LINE_WIDTH=9.0000
MIN_NECK_WIDTH=0.0900
VOLTAGE=1.5V
NOSTUFF
CRITICAL
L7230
0.22UH-20%-44A-0.0019OHM
21
PPVCC_CPU_PH3
PILA082D-SM
1
R7238
2.2
1
2
5%
1/10W
MF-LF
603
2
NOSTUFF
CPUCORE_SW3_SNUB
DIDT=TRUE
SWITCH_NODE=TRUE
1
C7238
0.001UF
10%
50V
2
X7R-CERM
0402
NOSTUFF
MIN_LINE_WIDTH=9.0000
MIN_NECK_WIDTH=0.0750
VOLTAGE=1.5V
CRITICAL
R7210
0.00075
1%
NO_XNET_CONNECTION=1
R7212
1K
1%
1/20W
MF
201
2 1
4 3
1
2
1W
MF
0612-1
1
2
NO_XNET_CONNECTION=1
1
R7211
2.2
1%
1/20W
MF
201
2
NO_XNET_CONNECTION=1
NO_XNET_CONNECTION=1
R7213
100K
1%
1/20W
MF
201
CRITICAL
R7220
0.00075
1%
1W
NO_XNET_CONNECTION=1
1K
1%
1/20W
MF
201
1
2
R7222
MF
0612-1
1
2
R7223
100K
1%
1/20W
MF
201
NO_XNET_CONNECTION=1
21
43
1
R7221
2.2
1%
1/20W
MF
201
2
NO_XNET_CONNECTION=1
NO_XNET_CONNECTION=1
CRITICAL
R7230
0.00075
1%
1W
MF
0612-1
NO_XNET_CONNECTION=1 NO_XNET_CONNECTION=1
R7232
1K
1%
1/20W
MF
201
1
2
1
R7233
100K
1%
1/20W
MF
201
2
CPUCORE_ISEN3
CPUCORE_ISUMP
353S00519 3 CRITICAL
NO_XNET_CONNECTION=1
21
43
1
R7231
2.2
1%
1/20W
MF
201
2
NO_XNET_CONNECTION=1
IC,SIC621,DRMOS,IMVP-8,60A,PQFN31,5X5
OMIT_TABLE
1
C7210
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
CPUCORE_ISNS1_P
CPUCORE_ISNS1_N
OMIT_TABLE
1
C7220
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
CPUCORE_ISNS2_P
CPUCORE_ISNS2_N
OMIT_TABLE
1
C7230
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
CPUCORE_ISNS3_P
CPUCORE_ISNS3_N
OUT
OUT
OMIT_TABLE
1
C7211
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
CPUCORE_ISUMN
CPUCORE_ISEN1
CPUCORE_ISUMP
OMIT_TABLE
1
C7221
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
CPUCORE_ISUMN
CPUCORE_ISEN2
CPUCORE_ISUMP
OMIT_TABLE
1
C7231
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
CPUCORE_ISUMN
NO_XNET_CONNECTION=1
R7234
100K
2 1
1%
1/20W
MF
201
NO_XNET_CONNECTION=1
54A8 54C4
54B8 54C4
55B3 55C3
R7236
100K
2 1
1%
1/20W
MF
201
OMIT_TABLE
1
C7212
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
41D4
OUT
41D4 55A3 55B2
OUT
54B8 55A3 55B3
OUT
NO_XNET_CONNECTION=1
R7214
100K
2 1
1%
1/20W
MF
201
NO_XNET_CONNECTION=1
54B8 54C4
OUT
54B8 54C4
OUT
55A4 55B3
OMIT_TABLE OMIT_TABLE
1
C7222
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
41D4
OUT
41D4 55A3 55D2
OUT
54B8 55A3 55D3
OUT
R7216
100K
2 1
1%
1/20W
MF
201
NO_XNET_CONNECTION=1
R7224
100K
2 1
1%
1/20W
MF
201
NO_XNET_CONNECTION=1
54B8 54C4
OUT
54B8 54C4
OUT
55A4 55C3
OMIT_TABLE OMIT_TABLE
1
C7232
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
41D4
OUT
41C4 55B2 55C2
OUT
CPUCORE_ISNS1_N
CPUCORE_ISNS2_N
U7210, U7220, U7230
R7226
2 1
54B8 55B3 55D3
OUT
100K
1%
1/20W
MF
201
OMIT_TABLE
1
C7213
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
1
C7223
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
1
C7233
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
41D4 55B2 55D3
41D4 55C3 55D2
CPUCORE_ISNS2_N
CPUCORE_ISNS3_N
CPUCORE_ISNS1_N
CPUCORE_ISNS3_N
OMIT_TABLE
1
C7240
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
OMIT_TABLE
1
C7241
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
OMIT_TABLE
1
C7242
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
41D4 55A3 55C3
41C4 55A3 55B2
41D4 55A3 55D3
41C4 55A3 55C2
CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION
BOM_COST_GROUP=CPU & CHIPSET
1
C7214
2.2UF
20%
25V
2
X6S-CERM
0402
1
C7224
2.2UF
20%
25V
2
X6S-CERM
0402
1
C7234
2.2UF
20%
25V
2
X6S-CERM
0402
F = 750kHz
1
C7215
2.2UF
20%
25V
2
X6S-CERM
0402
PPVCCIN_S0_CPU
1
C7225
2.2UF
20%
25V
2
X6S-CERM
0402
1
C7235
2.2UF
20%
25V
2
X6S-CERM
0402
SYNC_MASTER=myEE SYNC_DATE=03/01/2019
PAGE TITLE
IMVP9 POWER BLOCK
DRAWING NUMBER
051-05198
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
REVISION
6.0.0
BRANCH
evt-3
PAGE
72 OF 150
SHEET
55 OF 109
75C4
SIZE
D
D
C
B
A
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
8D4
IN
8D4
IN
D
CRITICAL
C7430
56D7
VCCINAUX1_AGND
56B6
56D4
VCCINAUX1_RTN_DIV_XW
C
VCCINAUX1_RTN_DIV_R
CRITICAL
NOSTUFF
5%
50V
C0G
0201
1
2
C7426
10PF
NO_TEST=1
PCH_VCCINSENSE_P
PCH_VCCINSENSE_N
NO_TEST=1
XW7402
NO_XNET_CONNECTION=1
1
100PF
5%
25V
2
C0G
0201
5%
1/20W
MF
0201
1%
1/20W
MF
201
1
0
2
1
2
R7403
NO_XNET_CONNECTION=1
CRITICAL
NOSTUFF
R7404
4.99K
2
SM
1
2
XW7401
SM
1
NO_XNET_CONNECTION=1
VCCINAUX1_SENSE_DIV
CRITICAL
5%
25V
C0G
0201
1
2
VCCINAUX1_AGND
CRITICAL
1
R7491
51.1
1%
1/20W
MF
201
2
C7431
100PF
VCCINAUX1_SENSE_DIV_XW
CRITICAL
1
R7431
2.8K
0.1%
1/20W
MF
0201
2
NO_XNET_CONNECTION=1
CRITICAL
C7408
47PF
5%
25V
C0G
0201
CRITICAL
1
R7416
2
4.99K
0.1%
1/20W
MF
0201
1
2
CRITICAL
C7423
6800PF
10%
10V
X7R-CERM
0201
VCCINAUX1_SENSE_DIV_R
NOSTUFF
CRITICAL
1
R7402
4.99K
0.1%
1/20W
MF
0201
2
CRITICAL
NOSTUFF
1
C7415
10PF
5%
50V
2
C0G
0201
56D5
NOSTUFF
CRITICAL
5%
25V
C0G
0201
1
2
59D3 75C1
1
2
1
2
1
2
1
2
C7432
100PF
1
2
75C6 56D4
PPVCCINAUX1_VCC
VCCINAUX_PROG1
56B6 56D4 56D8
PP1V8_S5
1
5%
1/20W
MF
201
2
CRITICAL
NOSTUFF
C7417
22PF
5%
50V
C0G
0201
CRITICAL
R7417
200K
0.1%
1/20W
TF
0201
R7441
100K
1
2
CRITICAL
R7418
33.2K
1%
1/20W
MF
201
CRITICAL
R7400
357K
0.1%
1/20W
MF
0201
VCCINAUX1_SET1_R
CRITICAL
R7419
9.53K
1%
1/20W
MF
201
PPBUS_HS_CPU
1
R7412
9.76K
1%
1/20W
MF
201
2
1
R7414
324K
0.1%
1/20W
MF
0201
2
56A3
1
R7413
158K
0.1%
1/20W
MF
0201
2
VCCINAUX_PROG2
1
R7415
8.87K
1%
1/20W
MF
201
2
R7407
2.2
1/20W
VOLTAGE=12V
MIN_NECK_WIDTH=0.0750
MIN_LINE_WIDTH=0.0900
CRITICAL
CRITICAL
16D4
56A6
62B3
CRITICAL
56A3
CRITICAL
56D4 56D7 56D8
CRITICAL
C7421
2.2UF
X6S-CERM
0402
VCCINAUX1_EN_R
VCCINAUX1_SREF
VCCINAUX1_VO
VCCINAUX1_OCSET
VCCIN_AUX_PGOOD
VCCINAUX1_FSEL
VCCINAUX1_SET0
VCCINAUX1_SET1
VCCINAUX1_VID0
VCCINAUX1_VID1
VCCINAUX1_AGND
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0540
VOLTAGE=0V
5%
MF
201
20%
25V
NOSTUFF
1
2
1
R7406
2.2
5%
1/20W
MF
201
2
PPVCCINAUX1_PVCC
CRITICAL
1
C7427
2.2UF
2
X6S-CERM
20%
25V
0402
1
2
15 18
10
7
12
11
14
4
13
8
9
6
5
PLACE_NEAR=U7400.2:1mm
EN
FB
SREF
VO
OCSET
PGOOD
RTN
PROG
SET0
SET1
VID0
VID1
XW7400
PP5V_G3S_CPUREG
1
R7401
2.2
5%
1/20W
MF
201
2
19
20
VINVCC
U7400
ISL95878A3
UTQFN
CRITICAL
PGNDGND
3
SM
2
21
BOOT
UGATE
PHASE
LGATE
75A7
VOLTAGE=5V
MIN_NECK_WIDTH=0.0750
MIN_LINE_WIDTH=0.0900
PPVCCINAUX1_VCC
56D7
20%
10V
1
2
C7424
10UF
X5R-CERM
0402-7
CRITICAL
VCCINAUX1_VBST
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0540
DIDT=TRUE
SWITCH_NODE=TRUE
DIDT=TRUE
SWITCH_NODE=TRUE
MIN_NECK_WIDTH=0.0540
MIN_LINE_WIDTH=0.0900
17
VCCINAUX1_DRVH
16
VCCINAUX1_LL
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0540
1
SWITCH_NODE=TRUE
DIDT=TRUE
VCCINAUX1_DRVL
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0540
GATE_NODE=TRUE
DIDT=TRUE
C7422
10UF
X5R-CERM
0402-7
CRITICAL
R7409
1
5%
1/10W
MF-LF
603
1
20%
10V
2
VCCINAUX1_AGND
VCCINAUX1_BOOT_RC
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0540
DIDT=TRUE
SWITCH_NODE=TRUE
CRITICAL
1
C7416
1
0.22UF
10%
25V
2
X7R
0402
VCCINAUX1_DRVH_R
DIDT=TRUE
2
SWITCH_NODE=TRUE
MIN_NECK_WIDTH=0.0540
MIN_LINE_WIDTH=0.0900
1
R7439
2
5%
1/10W
MF-LF
603
2
R7438
2
21
VCCINAUX1_DRVL_R
5%
1/10W
MF-LF
603
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0540
GATE_NODE=TRUE
DIDT=TRUE
R7442
2
21
5%
1/10W
MF-LF
603
75C6 56D7
PPBUS_HS_CPU
56B6 56D7 56D8
G
4
OMIT_TABLE
CRITICAL
POWERPAK1212-COMBO
SIS476DN-T1-GE3-A
Q7402
OMIT_TABLE
POLY-TANT
1
C7409
0.1UF
10%
25V
2
X6S-CERM
0201
5
D
CRITICAL
1
C7400
2.2UF
20% 20%
25V
2
X6S-CERM
0402
1
C7401
2.2UF
25V
2
X6S-CERM
0402
1
C7402
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
OMIT_TABLE
POLY-TANT
1
C7403
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
OMIT_TABLE
POLY-TANT
1
C7404
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
OMIT_TABLE
POLY-TANT
1
C7405
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
OMIT_TABLE
POLY-TANT
1
C7406
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
OMIT_TABLE
POLY-TANT
1
C7407
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
D
Q7401
SISA14DN-T1-GE3-A
PWRPAK-SM-COMBO
S
321
CRITICAL
NO_XNET_CONNECTION=1
L7400
0.22UH-35A-0.00255OHM
21
VCCINAUX1_R
PILS062D-IHLP2525BD-SM-COMBO
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0540
5
D
G
4
S
321
1
R7498
0
0%
1/4W
MF
0603
2
VCCINAUX1_LL_SNUB
1
C7498
12PF
5%
50V
2
C0G
0402-1
VOLTAGE=1.8V
39D4 43A4
NO_XNET_CONNECTION=1
DIDT=TRUE
SWITCH_NODE=TRUE
ISNS_VCCINAUX_P
1%
1/20W
MF
201
1
NO_XNET_CONNECTION=1
2
X5R-X7R-CERM
R7421
3.01K
CRITICAL
R7430
0.00075
1%
1W
MF
0612-1
CRITICAL
C7470
470PF
2 1
10%
16V
0201
CRITICAL
C7471
22PF
2 1
C0G50V
5%
0201
21
43
ISNS_VCCINAUX_N
39D4
43A4
NO_XNET_CONNECTION=1
1
R7472
3.01K
1%
1/20W
MF
201
2
CRITICAL
MIRROR_WITH=C7451
1
C7450
10UF
20%
6.3V
2
CER-X6S
0402
138S00073
CRITICAL
MIRROR_WITH=C7455
1
C7454
10UF
20%
6.3V
2
CER-X6S
0402
138S00073
CRITICAL
MIRROR_WITH=C7459
1
C7458
10UF
20%
6.3V
2
CER-X6S
0402
CRITICAL
1
C7462
120UF
20%
2.5V
2
TANT-POLY
CASE-B2-SM
CRITICAL
1
C7451
10UF
20%
6.3V
2
CER-X6S
0402
CRITICAL
1
C7455
10UF
20%
6.3V
2
CER-X6S
0402
CRITICAL
1
C7459
10UF
20%
6.3V
2
CER-X6S
0402
PPVCCIN_AUX_PCH_PRIM
CRITICAL
1
3 2
138S00073
1
2
138S00073
1
2
C7452
180UF
20%
2.5V
POLY-AL
SM
138S00073
CRITICAL
MIRROR_WITH=C7457
C7456
10UF
20%
6.3V
CER-X6S
0402
138S00073
CRITICAL
MIRROR_WITH=C7461
C7460
10UF
20%
6.3V
CER-X6S
0402
1
3 2
1
2
1
2
C7453
180UF
20%
2.5V
POLY-AL
SM
CRITICAL
C7457
10UF
20%
6.3V
CER-X6S
0402
CRITICAL
C7461
10UF
20%
6.3V
CER-X6S
0402
CRITICAL
75B4
138S00073
C
138S00073
VOUT = 1.8V, 1.65V, 1.1V, 0.75V
Freq = 750KHz
B
A
59C3
R7440
0
5%
MF
0201
21
NOSTUFF
1
C7440
0.1UF
10%
25V
2
X6S
0402
P1V8PRIM_PGOOD VCCINAUX1_EN_R
IN
1/20W
1
R7444
510K
5%
1/20W
MF
201
2
16D4 56C6
376S00397
1 CRITICALQ7402
NFET,30V,39.3A,2.19MOHM,3.3x3.3 DFN8
PP3V3_S5
74B2
R7482
17D2 64A5
IN
17D2 64A5
IN
PCH_CORE_VID1
0
5%
1/20W
MF
0201
21
R7486
1/20W
0201
0
5%
MF
Max OCP = 39.74A
CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION
Nom OCP = 32.89A
B
Min OCP = 26.51A
IccMax = 22A
PCH
VID1
1
R7481
100K
5%
1/20W
MF
201
2
1
R7485
100K
5%
1/20W
MF
201
2
1 1
1
VCCINAUX1_VID0PCH_CORE_VID0
56C6
0
0
21
NOSTUFF
1
R7480
100K
5%
1/20W
MF
201
2
1
2
VCCINAUX1_VID1
NOSTUFF
R7484
100K
5%
1/20W
MF
201
56C6
PAGE TITLE
VID0
0
1
0
VOUT
1.8
1.65
1.1
0.0
A
SYNC_DATE=03/26/2019SYNC_MASTER=J214_JACK
VR: VCCIN_AUX ISL
SIZE
D
BOM_COST_GROUP=PLATFORM POWER
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
74 OF 150
SHEET
56 OF 109
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
D
C
C
INTENTIONAL BLANK
B
B
A
8
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
PAGE TITLE
A
EMPTY
DRAWING NUMBER
051-05198
Apple Inc.
REVISION
6.0.0
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
67
35 4
2
BRANCH
evt-3
PAGE
75 OF 150
SHEET
57 OF 109
1
SIZE
D
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
C
B
A
75C6
77B2 75B8 58D5
C7606
2.2UF
X6S-CERM
1
C7608
2.2UF
20%
25V
2
X6S-CERM
0402
P5VG3S_VFB1_R
1
R7677
200
1%
1/20W
MF
201
2
P5VG3S_VFB1_RR
1
R7678
41.2K
0.1%
1/16W
MF
0402
2
1
R7679
10K
0.1%
1/16W
MF
0402
2
PPVIN_G3H_P5VG3S
OMIT_TABLE
CRITICAL
C7600
33UF
20%
16V
TANT-POLY
CASE-B3-1
PP5V_G3S
VOUT = 5.14V
2.4A MAX OUTPUT
F = 500 KHZ
CRITICAL
20%
25V
0402
1
2
C7607
150UF
6.3V
TANT-POLY
CASE-B1S-1
CRITICAL
1
C7605
150UF
20%
6.3V
2
TANT-POLY
CASE-B1S-1
XW7675
DESENSE
1
C7610
12PF
5%
25V
2
NP0-C0G
0201
1
2
1
20%
2
2
SM
1
2
XW7671
DESENSE
1
C7611
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
SM
1
5V G3S
5.14V Norm
1
C7601
2.2UF
20%
25V
2
X6S-CERM
0402
OMIT_TABLE
L7600
1
IHLP1616BZ-PIMA042T-COMBO
2
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
P5VG3S_VSW
DIDT=TRUE
SWITCH_NODE=TRUE
NO STUFF
1
R7674
1
PLACE_NEAR=C7607.1:3MM
PLACE_NEAR=L7600.1:3MM
2
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
DIDT=TRUE
SWITCH_NODE=TRUE
PLACE_NEAR=L7600.2:3MM
2
XW7670
SM
1
P5VG3S_CSP1_R
1
C7602
2.2UF
20%
25V
2
X6S-CERM
0402
2.2UH-20%-4.5A-0.043OHM
5%
1/10W
MF-LF
603
P5VG3S_SNUBR
DESENSE
1
C7612
12PF
5%
25V
2
NP0-C0G
0201
1
6
7
8
NO STUFF
C7674
0.0033UF
10%
50V
X7R-CERM
0402
DIDT=TRUE
SWITCH_NODE=TRUE
DESENSE
1
C7613
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
62B3 77B2
PPVIN_G3H_P3V3G3H
75C6
1
C7603
12PF
5%
25V
2
NP0-C0G
0201 25V
C7650
1.0UF
10%
X6S
0402
77B2 75B8 58C8
1
2
PP5V_G3S
P5VG3S_TG
MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.2000
U7600
DMN3013LDG
POWERDI3333
D1
S1/D2
S2
9
1
2
3
G1
G2
4
5
S1/D2
R7672
4.87K
1/20W
201
1%
MF
SWITCH_NODE=TRUE
DIDT=TRUE
P5VG3S_VBST_R
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
DIDT=TRUE
SWITCH_NODE=TRUE
0
5%
1/20W
MF
0201
1
2
1
C7609
0.1UF
10%
25V
2
X6S-CERM
0201
MIN_NECK_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
MIN_LINE_WIDTH=0.0900 GATE_NODE=TRUE DIDT=TRUE
MIN_NECK_WIDTH=0.0900
132S0395
R7609
SKIP_5V3V3:AUDIBLE
R7651
1
R7665
1
5% 0201
1/20W
MF
201
2
SWITCH_NODE=TRUEMIN_LINE_WIDTH=0.0900 DIDT=TRUE
SWITCH_NODE=TRUEMIN_LINE_WIDTH=0.0900 DIDT=TRUE
1/20W
C7673
0.1UF
21
10%
6.3V
X6S
0201
R7673
698
21
1%
1
2
1/20W
MF
201
C7678
270PF
10%
16V
X7R-CERM
0201-1
1
2
58B6 62B3 58B5
NO STUFF
1
R7676
10K
1%
1/20W
MF
201
2
P5VG3S_COMP1_R P3V3G3H_COMP2_R
1
2
(P5VP3V3_VREF2)
SKIP_5V3V3:INAUDIBLE
R7650
1
0
5% 0201
MF
2
P5VP3V3_SKIPSEL
P5VG3S_VBST
DIDT=TRUESWITCH_NODE=TRUE
P5VG3S_DRVH
P5VG3S_SW
P5VG3S_DRVL
P5VG3S_CSP1
P5VG3S_CSN1
P5VG3S_VFB1
P5VG3S_COMP1 P3V3G3H_COMP2
P5VG3S_EN_R P3V3G3H_EN_R
58A5 58A3
P5VG3S_PGOOD P3V3MAIN_PGOOD
C7679
4700PF
10%
10V
X7R
201
1
0
5%
1/20W
MF
2
R7675
3.92K
1/20W
201
1%
MF
2
V5SW
6
SKIPSEL1
19
SKIPSEL2
14
OCSEL
31
VBST1 VBST2
1
DRVH1 DRVH2
32
SW1 SW2
30
DRVL1
7
CSP1
8
CSN1 CSN2
11
MODE
9
10
COMP1 COMP2
4
EN1 EN2
5
PGOOD1 PGOOD2
1
2
XW7650
PLACE_NEAR=U7650.28:1MM
23
VIN
CRITICAL
U7650
GND
28
2
SM
1
29
VREG5
QFN
GND_5V3V3_AGND
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=0V
77B2 75B6 58D1
PP1V8_G3S
75C1
1
R7670
100K
5%
1/20W
MF
201
DESENSE
1
C7614
12PF
5%
25V
2
NP0-C0G
0201
P5VG3S_EN
IN IN
DESENSE
1
C7615
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
C7616
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
R7691
21
MF1/20W05% 0201
58C6 62B3
1
C7641
2.2UF
20%
6.3
2
X5R
0201
NO STUFF
OUT
P5VG3S_PGOOD
P5VG3S_EN_R
1
R7681
47K
5%
1/20W
MF
201
2
1 CRITICAL152S00182
IND,PWR,2.2UH,20%,4.5A,43MOHM,4X4MM
2
58C5 58C4
58C4 62C3
62C3 77B2
P5VP3V3_VREG3
P5VP3V3_VREF2
22
VREG3
TPS51980B
THRM_PAD
13
VREF2
EN
DRVL2
CSP2
RF
VFB2VFB1
33
PP3V3_G3H
P3V3MAIN_PGOOD
OUT
PMU_PVDDMAIN_EN
12
26
24
25
27
18
17
3
16
15
21
20
L7600
PP5V_S5_LDO
VOUT = 5V
CRITICAL
1
C7651
10UF
20%
10V
2
X5R-CERM
0402-7
C7652
0.22UF
1
10% 20%
10V
2
CERM
402
P5V_P3V3G3H_LDO_EN
P3V3G3H_VBST
DIDT=TRUE
SWITCH_NODE=TRUE
P3V3G3H_DRVH
1
C7653
2.2UF
10V
2
X5R-CERM
402
58A3
MIN_NECK_WIDTH=0.0900
MIN_LINE_WIDTH=0.0900SWITCH_NODE=TRUEDIDT=TRUE
P3V3G3H_SW
DIDT=TRUE SWITCH_NODE=TRUE MIN_NECK_WIDTH=0.0900
100MA MAX OUTPUT
R7685
1
21
5%
1/20W
MF
201
P3V3G3H_VBST_R
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
DIDT=TRUE
SWITCH_NODE=TRUE
1
R7669
0
5%
1/20W
MF
0201
2
MIN_LINE_WIDTH=0.0900
P3V3G3H_TG
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
DIDT=TRUE
SWITCH_NODE=TRUE
P3V3G3H_DRVL
GATE_NODE=TRUEDIDT=TRUE
P3V3G3H_CSP2
P3V3G3H_CSN2
P3V3G3H_RF
P3V3G3H_VFB2
200K
1%
1/20W
MF
201
1
2
1
R7695
3.92K
1%
1/20W
MF
201
2
(P5VP3V3_VREF2)
1
R7690
100K
5%
1/20W
MF
201
2
NO STUFF
R7696
C7699
2700PF
10%
16V
X7R
0201
OUTOUT
10K
1%
1/20W
MF
201
1
2
1
2
62C3
R7655
1
C7698
330PF
10%
16V
2
X7R
0201
R7652
1
R7653
47K
5%
1/20W
MF
201
2
3.3K
R7671
NO STUFF
CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION
P5V_P3V3G3H_LDO_EN
21
MF1/20W
2015%
1
C7642
1000PF
10%
25V
2
X7R
0201
P3V3G3H_EN_R
21
MF1/20W05% 0201
1
C7640
2.2UF
20%
6.3
2
X5R
0201
NO STUFF
75D6
C7671
0.1UF
10%
25V
X6S-CERM
0201
R7686
0
5%
1/20W
MF
0201
132S0395
C7693
0.1UF
10%
6.3V
X6S
0201
R7693
1.37K
1%
1/20W
MF
201
3.3V Main
3.36V Norm
C7682
12PF
NP0-C0G
1
3
TG
2
4
TGR
5
21
P3V3G3H_DRVL_R
DIDT=TRUE
21
21
GATE_NODE=TRUE
1
R7692
3.83K
1%
1/20W
MF
201
2
P3V3G3H_CSP2_R
DESENSE
1
C7683
12PF
5%
25V
2
NP0-C0G
0201
58C4
BOM_COST_GROUP=PLATFORM POWER
BG
1
5%
25V
2
0201
1.0UH-20%-14A-0.0107OHM
U7660
CSD58873Q3D
Q3D
VIN
VSW
PGND
9
DESENSE
1
C7684
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
1
6
7
8
P3V3G3H_SNUBR
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
DIDT=TRUE
SWITCH_NODE=TRUE
NO STUFF
1
C7694
0.001UF
10%
50V
2
X7R-CERM
0402
DIDT=TRUE
SWITCH_NODE=TRUE
OMIT_TABLE
CRITICAL
1
C7660
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
OMIT_TABLE
CRITICAL
1
C7661
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
1
L7660
PIMB062D-SM
2
DIDT=TRUE
SWITCH_NODE=TRUE
MIN_NECK_WIDTH=0.0900
MIN_LINE_WIDTH=0.0900
P3V3G3H_VSW
NO STUFF
R7694
DESENSE
1
C7685
12PF
5%
25V
2
NP0-C0G
0201
1
10
5%
1/10W
MF-LF
603
2
PLACE_NEAR=L7660.2:3MM
2
XW7690
PAGE TITLE
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
SM
1
DESENSE
1
C7686
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
20%
25V
0402
1
2
OMIT_TABLE
CRITICAL
1
C7675
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
C7664
2.2UF
20%
25V
X6S-CERM
0402
1
C7663
2.2UF
2
X6S-CERM
OMIT_TABLE
CRITICAL
1
C7662
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
PP3V3_G3H
VOUT = 3.36V
11.4A MAX OUTPUT
F = 500 KHZ
CRITICAL
1
C7665
150UF
20%
6.3V
2
TANT-POLY
CASE-B1S-1
CRITICAL
20%
6.3V
1%
MF
1
2
1
2
C7669
2.2UF
X6S-CERM
C7666
150UF
TANT-POLY
CASE-B1S-1
PLACE_NEAR=C7665.1:3MM
2
XW7695
SM
1
PLACE_NEAR=L7660.1:3MM
2
XW7691
1
P3V3G3H_VFB2_R
SM
R7697
931
1/20W
201
20%
25V
0402
CRITICAL
1
C7667
150UF
20%
6.3V
2
TANT-POLY
CASE-B1S-1
CRITICAL
C7668
150UF
TANT-POLY
CASE-B1S-1
1
2
1
20%
6.3V
2
C7670
2.2UF
X6S-CERM
20%
25V
0402
1
2
P3V3G3H_VFB2_RR
110K
0.1%
1/16W
MF
402
47K
0.1%
1/16W
TK
0402
DESENSE
1
C7687
12PF
5%
25V
2
NP0-C0G
0201
1
2
1
2
DESENSE
1
C7688
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
R7698
R7699
Power - 5V 3.3V Supply
DRAWING NUMBER
051-05198
Apple Inc.
REVISION
BRANCH
PAGE
76 OF 150
SHEET
58 OF 109
77B2 75B6 58B5
CRITICAL
C7672
150UF
20%
6.3V
TANT-POLY
CASE-B1S-1
CRITICAL
C7676
150UF
20%
6.3V
TANT-POLY
CASE-B1S-1
1
2
6.0.0
evt-3
D
1
2
C
B
A
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
SIZE
D
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
C
75C8 38A5
PPVIN_S0_PRIM1V8
CRITICAL
1
C7700
12PF
5%
2
25V
NP0-C0G
0201
CRITICAL
1
C7701
3.0PF
+/-0.1PF
2
25V
NP0-C0G
0201
CAPDERATE
OMIT_TABLE
CRITICAL
1
C7702
33UF
20%
2
16V
TANT-POLY
CASE-B3-1
13A6 13D3 16B7 17C8
CRITICAL
1
C7703
2.2UF
20%
2
25V
X6S-CERM
0402
PM_SLP_SUS_L P1V8PRIM_EN
IN
CRITICAL
1
C7704
2.2UF
20%
2
25V
X6S-CERM
0402
2 1
5%
1/20W
MF
0201
2 1
117S0201
R7715
0
5%
1/20W
MF
201
1
2
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1200
R7700
10
NOSTUFF
C7715
0.1UF
10%
25V
X6S
0402
VOLTAGE=1.8V
PPVIN_S0PRIM_1V8_RC
1
C7705
0.1UF
10%
2
25V
X6S
0402
10
AVIN
8
DEF
13
EN
7
FSW
XW7700
12
11
PVIN
PVIN
U7700
TPS62130B-S
SM
VQFN
CRITICAL
PGND
15
AGND
PGND
6
16
21
AGND_P1V8PRIM
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1200
PAD
THRM
17
SW
SW
SW
VOS
FB
PG
SS/TR
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1200
DIDT=TRUE
SWITCH_NODE=TRUE
REG_PHASE_1V8PRIM
1
2
3
REG_VOS_P1V8PRIM
14
REG_FB_P1V8PRIM
5
4
REG_SSTR_P1V8PRIM
9
PP3V3_S5
NOSTUFF
1
R7716
100K
5%
1/20W
MF
201
2
1.5UH-20%-3.9A-0.048OHM
1
C7706
4700PF
10%
2
10V
X7R
201
74B2 56D7 75C1
PP1V8_S5
1
R7717
330
5%
1/20W
MF
201
2
P1V8PRIM_PGOOD
CRITICAL
L7700
REG_PHASE_1V8PRIM_MID
21
DIDT=TRUE
1210
SWITCH_NODE=TRUE
1
C7710
100PF
5%
25V
2
C0G
0201
56A8
OUT
CRITICAL
L7701
0.68UH-20%-6.1A-0.020OHM
21
1210
P1V8PRIM_FB_TOP
P1V8PRIM_FB_R
1
R7701
10
5%
1/20W
MF
201
2
1
R7704
1.78K
1%
1/20W
MF
201
2
1
R7702
27.4K
0.1%
1/20W
MF
0201
2
1
R7703
23.2K
1%
1/20W
MF
201
2
Output voltage:
Max peak current:
Switching freq:
XW7701
SM
21
3 2
<Ra>
<Rb>
CRITICAL
1
C7707
180UF
20%
2.5V
POLY-AL
SM
1.818 V
2.2 A
1250 kHz
1
C7708
10UF
20%
6.3V
2
CER-X6S
0402
PP1V8_S5
1
C7709
10UF
20%
6.3V
2
CER-X6S
0402
D
77C2 75C2
C
B
Vout = 0.8V * ( Ra + Rb ) / Rb
B
A
8
SYNC_MASTER=myEE SYNC_DATE=03/01/2019
PAGE TITLE
A
VR: VCCPRIM_1P8
DRAWING NUMBER
051-05198
Apple Inc.
REVISION
6.0.0
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
BOM_COST_GROUP=CPU & CHIPSET
67
35 4
IV ALL RIGHTS RESERVED
2
BRANCH
evt-3
PAGE
77 OF 150
SHEET
59 OF 109
1
SIZE
D
D
www.haojiyoubbs.com
QQ微信：181806465
C
B
77C2
60A6
74B6
A
Note : Design based on Calpe ERS - D2449-A0-110-00_0v3.pdf (Radar# 24696002)
System Block Diagram - T290 Power System Architecture . v9
Optimize componentS for individual projects based on EDP(A)
DESENSE
1
C78B2
12PF
5%
25V
2
NP0-C0G
0201
PPVNN_PCH_EXT
74B6
77C2
Vout = 0.7V - 1V
Iout_Max = 4A
F = 3MHz
PP1P05_PCH_EXT
Vout = 1V
Iout_Max = 6A
F = 3MHz
1
C7899
20UF
20%
2.5V
2
X6S-CERM
0402
PP3V3_G3H_PMU_VDDMAIN
75B4
1
C7805
2
1
C7806
10UF
20%
6.3V
2
CER-X6S
0402
NOSTUFFNOSTUFFNOSTUFFNOSTUFFNOSTUFF
1
C7864
20UF
20%20%
2.5V
2
X6S-CERM
0402
10UF
20%
6.3V
CER-X6S
0402
1
C7894
1UF
20%
6.3V
2
X6S-CERM
0201
1
C78A5
1UF
20%
6.3V
2
X6S-CERM
0201
1
C78B1
1UF
20%
6.3V
2
X6S-CERM
0201
DESENSE
1
C78B8
12PF
5%
25V
2
NP0-C0G
0201
0.47UH-20%-4.8A-0.034OHM
1
C7895
10UF
20%
6.3V
2
CER-X6S
0402
1
2
1
2
1
2
C78A0
1UF
20%
6.3V
X6S-CERM
0201
C78A6
1UF
20%
6.3V
X6S-CERM
0201
DESENSE
C78B3
12PF
5%
25V
NP0-C0G
0201
1
C7860
20UF
2.5V
2
X6S-CERM
0402
1
C7801
10UF
20%
6.3V
2
CER-X6S
0402
1
C7810
10UF
20%
6.3V
2
CER-X6S
0402
1
C78A1
2
1
C78A7
2
1
2
1UF
20%
6.3V
X6S-CERM
0201
1UF
20%
6.3V
X6S-CERM
0201
DESENSE
C78B4
12PF
5%
25V
NP0-C0G
0201
1
C7861
20UF
20%
2.5V
2
X6S-CERM
0402
1
C7802
10UF
20%
6.3V
2
CER-X6S
0402
1
C7809
10UF
20%
6.3V
2
CER-X6S
0402
1
C7891
2
1
C78A2
2
1
C78A8
2
1
2
1UF
20%
6.3V
X6S-CERM
0201
1UF
20%
6.3V
X6S-CERM
0201
1UF
20%
6.3V
X6S-CERM
0201
DESENSE
C78B5
12PF
5%
25V
NP0-C0G
0201
1
C7862
20UF
20%
2.5V
2
X6S-CERM
0402
1
C7803
10UF
20%
6.3V
2
CER-X6S
0402
1
C7808
10UF
20%
6.3V
2
CER-X6S
0402
1
C7892
2
1
C78A3
2
1
C78A9
2
1
2
1UF
20%
6.3V
X6S-CERM
0201
1UF
20%
6.3V
X6S-CERM
0201
1UF
20%
6.3V
X6S-CERM
0201
DESENSE
C78B6
12PF
5%
25V
NP0-C0G
0201
1
2
1
C7804
10UF
20%
6.3V
2
CER-X6S
0402
1
C7807
10UF
20%
6.3V
2
CER-X6S
0402
1
C7893
1UF
20%
6.3V
2
X6S-CERM
0201
1
C78A4
1UF
20%
6.3V
2
X6S-CERM
0201
1
C78B0
1UF
20%
6.3V
2
X6S-CERM
0201
DESENSE
1
C78B7
12PF
2
C7863
20UF
20%
2.5V
X6S-CERM
0402
5%
25V
NP0-C0G
0201
CRITICAL
1
C7898
20UF
20%
2.5V
2
X6S-CERM
0402
1
C7882
20UF
20%
2.5V
2
X6S-CERM
0402
NOSTUFF
1
C7865
20UF
20%
2.5V
2
X6S-CERM X6S-CERM
0402
DESENSE
1
CC895
12PF
5%
25V
2
NP0-C0G
0201
1
C7872
20UF
20%
2.5V
2
X6S-CERM
0402
1
C7877
20UF
20%
2.5V
2
X6S-CERM
0402
1
C7883
20UF
20%
2.5V
2
X6S-CERM
0402
1
2
NOSTUFF
1
C7889
20UF
20%
2.5V
2
X6S-CERM
0402
C7866
20UF
20%
2.5V
0402
1
C7873
20UF
20%
2.5V
2
X6S-CERM
0402
1
C7878
20UF
20%
2.5V
2
X6S-CERM
0402
1
C7884
20UF
20%
2.5V
2
X6S-CERM
0402
1
C7867
20UF
20%
2.5V
2
X6S-CERM
0402
1
C7890
20UF
20%
2.5V
2
X6S-CERM
0402
1
C7874
2
NOSTUFFNOSTUFFNOSTUFFNOSTUFF
1
C7879
2
1
C7885
2
20UF
20%
2.5V
X6S-CERM
0402
20UF
20%
2.5V
X6S-CERM
0402
20UF
20%
2.5V
X6S-CERM
0402
1
C7868
20UF
20%
2.5V
2
X6S-CERM
0402
NOSTUFF
1
C7870
20UF
20%
2.5V
2
X6S-CERM
0402
1
2
NOSTUFF
1
C7880
2
1
C7886
2
DESENSE
1
CC821
2
1
2
PLACE_NEAR=U7800.N15:5MM
C7875
20UF
20%
2.5V
X6S-CERM
0402
20UF
20%
2.5V
X6S-CERM
0402
20UF
20%
2.5V
X6S-CERM
0402
12PF
5%
25V
NP0-C0G
0201
NOSTUFF
1
C7869
20UF
20%
2.5V
2
X6S-CERM
0402
NOSTUFF
C7871
20UF
20%
2.5V
X6S-CERM
0402
NOSTUFFNOSTUFFNOSTUFF
1
C7876
20UF
20%
2.5V
2
X6S-CERM
0402
1
C7881
20UF
20%
2.5V
2
X6S-CERM
0402
NOSTUFFNOSTUFFNOSTUFFNOSTUFFNOSTUFFNOSTUFF
1
C7887
20UF
20%
2.5V
2
X6S-CERM
0402
DESENSE
1
CC822
12PF
5%
25V
2
NP0-C0G
0201
R7821
5%0201
0.47UH-20%-4.8A-0.034OHM
0
21
1/20WMF
PLACE_NEAR=L7822.1:5MM
Note : All Bucks are default Local Sense
Buck 0,2,7,9 and 10 need to have option for Remote Sense for Future Use.
678
Resistor Divider from PBUS
VDD_HI < 3.1V
62A4
IN
60A2
CRITICAL
5%02010MF
0.47UH-20%-4.8A-0.034OHM
PP1V8_SLPS2R_PMUVDDGPIO
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
VOLTAGE=1.8V
L7819
21
0806-COMBO
NOSTUFF
PVCCPCOREPRIM_SW0
78C3
L7820
21
PVCCPCOREPRIM_SW1
0806-COMBO
R7819
PLACE_NEAR=L7819.1:5MM
21
1/20W
PVCCPCOREPRIM_FB_P
8A1
PVCCPCOREPRIM_FB_N
CRITICAL
L7821
0806-COMBO
NOSTUFF
L7822
0.47UH-20%-4.8A-0.034OHM
CRITICAL
0806-COMBO
R7820
0
0201 5%
77C2 74B6 60B8
MF 1/20W
PP1P05_PCH_EXT
21
MIN_LINE_WIDTH=0.1750
MIN_NECK_WIDTH=0.2000
PMU_VDD_HI
1
C7800
0.1UF
10%
2
X6S
0201
SWITCH_NODE=TRUE
MIN_LINE_WIDTH=0.1750
MIN_NECK_WIDTH=0.2000
SWITCH_NODE=TRUE
21
21
P1VPRIM_SW0
78C3
MIN_LINE_WIDTH=0.1750
MIN_NECK_WIDTH=0.2000
SWITCH_NODE=TRUE
P1VPRIM_SW1
MIN_LINE_WIDTH=0.1750
MIN_NECK_WIDTH=0.2000
SWITCH_NODE=TRUE
P1VPRIM_FB
8A1
DIDT=TRUE
DIDT=TRUE
DIDT=TRUE
DIDT=TRUE
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
P5
D10
P9
K14
K13
J11
C1
C2
C3
G1
G2
G3
R1
R2
L1
L2
L3
B16
B17
B18
A7
B7
A11
B11
F17
F18
K16
K17
K18
P16
P17
P18
T1
T2
R7
T4
E17
E18
G17
G18
F15
G15
L16
L17
L18
J16
J17
J18
L14
P12
R12
T12
U12
V12
N16
N17
N18
P14
N14
R16
R17
R18
R14
VDD_MAIN_E
VDD_MAIN_N
VDD_MAIN_S
VDD_MAIN_W
VDD_HI
VDD_GPIO
VDD_BUCK0_01
VDD_BUCK0_23
VDD_BUCK16
VDD_BUCK2
VDD_BUCK3
VDD_BUCK4
VDD_BUCK5
VDD_BUCK7
VDD_BUCK8
VDD_BUCK910
BUCK6_LX0
BUCK6_IN
BUCK6_FB
BUCK7_LX0
BUCK7_LX1
BUCK7_RTP
BUCK7_RTN
BUCK8_LX0
BUCK8_LX1
BUCK8_FB
BUCK8_IN
BUCK9_LX0
BUCK9_RTP
BUCK9_RTN
BUCK10_LX0
BUCK10_FB
CRITICAL
OMIT_TABLE
U7800
CALPE-PMU
BGA
SYM 2 OF 4
BUCK0_LX0
BUCK0_LX1
BUCK0_LX2
BUCK0_LX3
BUCK0_FB
78D3
BUCK1_LX0
BUCK1_FB
BUCK2_LX0
BUCK2_LX1
BUCK2_FB
78D3
BUCK3_LX0
BUCK3_FB
BUCK3_IN
BUCK4_LX0
BUCK4_LX1
BUCK4_FB
BUCK4_IN
78C3
BUCK5_LX0
78C3
BUCK5_LX1
BUCK5_FB
BUCK3_SW1
BUCK3_SW2
BUCK3_SW3
BUCK3_SW4
BUCK3_SW5
BUCK4_SW1
BUCK6_SW1
BUCK8_SW1
BUCK8_SW2
B1
B2
B3
D1
D2
D3
PVDDCPUAWAKE_SW0
78D3
SWITCH_NODE=TRUE
MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=0.1750
DIDT=TRUE
PVDDCPUAWAKE_SW1
78D3
SWITCH_NODE=TRUE
MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=0.1750
DIDT=TRUE
0.22UH-20%-6.7A-0.023OHM
F1
F2
F3
H1
H2
H3
G5
P1
P2
R4
K1
K2
K3
M1
M2
M3
L5
C16
C17
C18
D14
R9
T10
T9
U10
U9
V10
V9
A8
B8
A6
B6
D7
P7
A10
B10
A12
B12
D12
T8
T11
V11
V8
R8
P6
R6
P13
R13
PVDDCPUAWAKE_SW2
78D3
SWITCH_NODE=TRUE
MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=0.1750
DIDT=TRUE
PVDDCPUAWAKE_SW3
78D3
SWITCH_NODE=TRUE
MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=0.1750
DIDT=TRUE
PVDDCPUAWAKE_FB
32D5
PVDDCPUSRAMAWAKE_SW0
SWITCH_NODE=TRUE
MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=0.1750
DIDT=TRUE
PVDDCPUSRAMAWAKE_FB
P0V8SLPDDR_SW0
78D3
SWITCH_NODE=TRUE
MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=0.1750
DIDT=TRUE
P0V8SLPDDR_SW1
78D3
SWITCH_NODE=TRUE
MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=0.1750
DIDT=TRUE
P0V8SLPDDR_FB
32D5
P1V8SLPS2R_SW0
SWITCH_NODE=TRUE
MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=0.1750
DIDT=TRUE
P1V8SLPS2R_FB
PP1V8_SLPS2R
P1V1SLPS2R_SW0
78D3
SWITCH_NODE=TRUE
MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=0.1750
DIDT=TRUE
P1V1SLPS2R_SW1
78C3
SWITCH_NODE=TRUE
MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=0.1750
DIDT=TRUE
P0V9SLPDDR_SW0
MIN_LINE_WIDTH=0.1750
MIN_NECK_WIDTH=0.2000
SWITCH_NODE=TRUE
DIDT=TRUE
P0V9SLPDDR_SW1
MIN_LINE_WIDTH=0.1750
MIN_NECK_WIDTH=0.2000
SWITCH_NODE=TRUE
DIDT=TRUE
P0V9SLPDDR_FB
NC
NC
CRITICAL
L7806
1UH-20%-3.8A-0.055OHM
21
2016-COMBO
CRITICAL
L7807
0.22UH-20%-6.7A-0.023OHM
21
PINA20121T-SM
CRITICAL
L7808
21
PINA20121T-SM
CRITICAL
L7809
0.22UH-20%-6.7A-0.023OHM
21
PINA20121T-SM
R7806
0
21
0201
5%
L7810
1.0UH-20%-2.6A-0.095OHM
21
0805-COMBO
R7811
0
MF
5%
0201
1/20W
21
PLACE_NEAR=L7810.2:5MM
L7811
1UH-20%-4.7A-0.04OHM
CRITICAL
21
2520
CRITICAL
L7812
0.47UH-20%-4.8A-0.034OHM
21
0806-COMBO
NOSTUFF
R7812
0
21
MF
1/20W
L7813
5%
1UH-20%-3.8A-0.055OHM
CRITICAL
21
2016-COMBO
R7813
0
21
MF
5%
PLACE_NEAR=L7813.2:5MM
1/20W
0201
74C6
CRITICAL
L7814
1UH-20%-3.8A-0.055OHM
21
2016-COMBO
CRITICAL
L7815
0.47UH-20%-4.8A-0.034OHM
21
0806-COMBO
P1V1SLPS2R_FB
R7814
0
1/20W
0201
MF
5%
L7816
CRITICAL
21
2016-COMBO
1UH-20%-3.8A-0.055OHM
L7817
0.47UH-20%-4.8A-0.034OHM
CRITICAL
21
0806-COMBO
R7816
0
21
1/20W
0201
MF
PLACE_NEAR=L7816.2:5MM
5%
3 245
1
C7821
20UF
20%
2.5V
2
X6S-CERM
0402-1
1
C7812
20UF
20%
2.5V 2.5V
2
X6S-CERM
0402-1
DESENSE
1
CC807
12PF
5%
25V
2
NP0-C0G
0201
PLACE_NEAR=L7806.2:5MM
MF1/20W
CRITICAL
1
C7833
20UF
20%
2.5V
2
X6S-CERM
0402
0201
21
PLACE_NEAR=L7812.2:5MM
1
C7839
20UF
2.5V
2
X6S-CERM
0402
PLACE_NEAR=L7815.2:5MM
1
C7840
20UF
20%
2.5V
2
X6S-CERM
0402
1
C7846
20UF
20%
2.5V
2
X6S-CERM
0402
1
C7852
20UF
20%
2.5V
2
X6S-CERM
0402
DESENSE
1
CC817
12PF
5%
25V
2
NP0-C0G
0201
PP1V8_AWAKE
PP1V8_SLPS2R_PMUVDDGPIO
NC_PPBUCK3_SW3
PP1V8_S3
NC_PPBUCK3_SW5
NC_PPBUCK8_SW1
NC_PPBUCK8_SW2
BOM_COST_GROUP=PLATFORM POWER
1
2
1
2
1
2
1
2
C7822
20UF
20%
2.5V
X6S-CERM
0402-1
C7811
20UF
20%
X6S-CERM6.3V
0402-1
DESENSE
CC808
12PF
5%
25V
NP0-C0G
0201
1
C7829
10UF
20%
4V
2
X6S
0402-1
C7834
20UF
20%
2.5V
X6S-CERM
0402-1
1
C7841
20UF
20%
2.5V
2
X6S-CERM
0402
1
C7847
20UF
20%
2.5V
2
X6S-CERM
0402
1
C7853
20UF
20%
2.5V
2
X6S-CERM
0402
DESENSE
1
CC818
2
1
2
1
2
12PF
5%
25V
NP0-C0G
0201
1
C7823
20UF
20%
2.5V
2
X6S-CERM
0402-1
1
C7826
20UF
20%
2.5V
2
X6S-CERM
0402-1
DESENSE
1
CC809
12PF
5%
25V
2
NP0-C0G
0201
1
C7830
10UF
20%
4V
2
X6S
0402-1
C7835
20UF
20%
2.5V
X6S-CERM
0402-1
DESENSE
CC812
12PF
5%
25V
NP0-C0G
0201
1
C7842
20UF
20%
2.5V
2
X6S-CERM
0402
1
C7848
20UF
20%
2.5V
2
X6S-CERM
0402
DESENSE
1
CC815
12PF
5%
25V
2
NP0-C0G
0201
1
C7854
20UF
20%
2.5V
2
X6S-CERM
0402
1
C7824
20UF
2
1
C7827
20UF
2
DESENSE
1
CC810
12PF
2
DESENSE
1
CC811
12PF
2
1
C7836
20UF
20%
2.5V
2
X6S-CERM
0402-1
DESENSE
1
CC813
12PF
5%
25V
2
NP0-C0G
0201
1
2
1
2
20%
2.5V
X6S-CERM
0402-1
20%
2.5V
X6S-CERM
0402-1
5%
25V
NP0-C0G
0201
5%
25V
NP0-C0G
0201
1
2
1
2
Supplied Current
81A4
60D6
76C6
74D6
76C6
0.3A
1.0A
1.0A
0.5A
0.3A
77C2 74B8
0.5A
0.3A
76C6
76C6
0.3A
0.3A
1
PPVDDCPU_AWAKE
1
C7825
20UF
20%
2.5V
2
X6S-CERM
0402-1
1
C7828
20UF
20%
2.5V
2
X6S-CERM
0402-1
1
C7813
20UF
20%
2.5V
2
X6S-CERM
0402-1
Vout = 0.625V - 1.06V
Iout_Max = 13.4A
F = 2MHz & 4MHz
PPVDDCPUSRAM_AWAKE
Vout = 0.8V - 1.06V
Iout_Max = 1A
F = 3MHz
PP0V82_SLPDDR
1
C7837
20UF
20%
2.5V
2
X6S-CERM
0402-1
1
C7838
20UF
20%
2.5V
2
X6S-CERM
0402
1
C7814
20UF
20%
2.5V
2
X6S-CERM
0402
1
C7815
20UF
20%
2.5V
2
X6S-CERM
0402
1
C7832
20UF
20%
2.5V
2
X6S-CERM
0402
Vout = 0.82V
Iout_Max = 6A
F = 3MHz
PP1V8_SLPS2R
DESENSE
C7843
20UF
20%
2.5V
X6S-CERM
0402
1
C7844
20UF
20%20%
2.5V
2
X6S-CERM
0402
1
C7845
20UF
20%
2.5V
2
X6S-CERM
0402
1
CC814
12PF
5%
25V
2
NP0-C0G
0201
Vout = 1.8V
Iout_Max = 2.5A
F = 3MHz
PP1V1_SLPS2R
C7849
20UF
20%
2.5V
X6S-CERM
0402
DESENSE
CC816
12PF
5%
25V
NP0-C0G
0201
1
C7850
20UF
20%
2.5V
2
X6S-CERM
0402
1
C7851
20UF
20%
2.5V
2
X6S-CERM
0402
1
C7816
20UF
20%
2.5V
2
X6S-CERM
0402
Vout = 1.1V
Iout_Max = 4A
1
C7817
20UF
20%
2.5V
2
X6S-CERM
0402
F = 3MHz
PP0V9_SLPDDR
Vout = 0.9V
C7855
20UF
20%
2.5V
X6S-CERM
0402
SYNC_MASTER=myEE SYNC_DATE=03/01/2019
PAGE TITLE
1
C7856
20UF
20%
2.5V
2
X6S-CERM
0402
1
C7818
20UF
20%
2.5V
2
X6S-CERM
0402
1
C7819
20UF
20%
2.5V
2
X6S-CERM
0402
Iout_Max = 4A
F = 3MHz
PMIC BUCKS AND SWs
DRAWING NUMBER
051-05198
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
REVISION
6.0.0
BRANCH
evt-3
PAGE
78 OF 150
SHEET
60 OF 109
74D8
77B2
74D8
77C2
81B4
74C8
77C2
SIZE
77B2 74D8
77C2 74C6
74C6
77B2
D
D
C
B
A
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
PP3V3_G3H_PMU_VDDMAIN
75B4
PP1V1_SLPS2R
74C4
PP3V3_G3H_RTC
75C4
PP1V8_SLPS2R
74C6
1
C7903
0.1UF
10%
6.3V
2
X6S
0201
1
C7904
0.1UF
10%
6.3V
2
X6S
0201
1
C7909
0.1UF
10%
6.3V
2
X6S
0201
N11
N12
V3P3
LDO1_IN
LDO2_IN
CRITICAL
OMIT_TABLE
U7800
CALPE-PMU
BGA
SYM 1 OF 4
LDO_CORE
LDO0
LDO1LDO0_IN
LDO2
LDO3
HIO_SW_EN
HIO_SW
L8
V15
U15V14
U17U14
P8U16
N6
T13
U13
V13
C7910
0.1UF
LDO_CORE
PMU_LDO3_OUT
NC
NC
NC
D
21
10%0201
X6S6.3V
PP0V8_SLPS2R
PP3V_G3H_RTC
PP1V2_AWAKE
NC_CPU_C10_GATE_L
77C2 74D4
74D4
77B2 74C4
Max Current = 150mA
Max Current = 10mA
Max Current = 260mA
Max Current = 3A
C
B
A
SHORT-14L-0.1MM-SM
SHORT-14L-0.1MM-SM
PLACE_NEAR=U7800.J15:2mm
XW7901
SHORT-14L-0.1MM-SM
2 1
For SI
PLACE_NEAR=U7800.V5:2mm
XW7903
21
GND_CALPE_XW3
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
VOLTAGE=0V
PLACE_NEAR=U7800.E4:2mm
XW7902
21
GND_CALPE_XW2
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
For SI
VOLTAGE=0V
GND_CALPE_XW1
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.0900
VOLTAGE=0V
PP7901
P3MM
SM
1
PP
A1
E1
E2
VSS_BUCK0
E3
A2
A3
J1
J2
VSS_BUCK02
J3
B5
A5
VSS_BUCK4
A13
B13
T16
T17
T18
D16
D17
D18
H16
H17
H18
M16
M17
M18
R11
E11
U11
V16
C13
C10
H15
J15
M15
T14
VSS_BUCK5
U1
U2
VSS_BUCK6
VSS_BUCK10
N1
N2
VSS_BUCK21
N3
VSS_BUCK37
B9
A9
VSS_BUCK45
VSS_BUCK78
VSS_BUCK89
V5
VSS_RTC
M9
AVSS_C
AVSS_S
PVSS_N
PVSS_S
T5
PVSS_SE
PVSS_SW
E4
VSSA_BUCK0
R5
VSSA_BUCK1_6/AVSS_SE
M4
VSSA_BUCK2
VSSA_BUCK3
VSSA_BUCK4_5
VSSA_BUCK7
VSSA_BUCK8/AVSS_W
VSSA_BUCK9
VSSA_BUCK10/AVSS_SW
75C4
CRITICAL
OMIT_TABLE
U7800
CALPE-PMU
BGA
SYM 4 OF 4
PP3V3_G3H_RTC
VIN RTC implementation
may change between
Desktops and Portables
A4
A17
A18
B4
B15
C4
C5
C6
C7
C8
C9
C12
C15
D4
E15
E16
F4
F12
F16
G4
G12
G16
VSS
43B5 43C5
38A2 38A5 38B5 38C5 39B5 39C5 39D1
40A2 40C1 40C5 41A3 41B1 41C5 41D5
H4
H12
J4
J12
K4
K15
L15
N4
N15
P3
P4
P11
P15
R3
R15
T3
T15
U18
U3
U4
U5
U8
V1
V2
V17
V18
GND_PMU_AVSS
MIN_LINE_WIDTH=0.1270
MIN_NECK_WIDTH=0.2000
VOLTAGE=0V
PLACE_NEAR=U7800.J12:1mm
81A8
62B3
81A4
1
2
R7900
IN
C7920
1500PF
10%
10V
X7R
0201
0
5%
1/20W
MF
0201
75C4
21
PP3V3_G3H_RTC
PP3V3_G3H_PMU_VINRTC_R
1
C7907
10UF
20%
6.3V
2
CER-X6S
0402
XW7900
SM
21
1
C7921
0.1UF
10%
6.3V
2
X6S
0201
P1V1SLPDDR_RAMP
P1V1_SLPDDR_SOCFET_EN
1
C7908
10UF
20%
6.3V
2
CER-X6S
0402
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=3.3V
1
C7912
1UF
20%
6.3V
2
X6S-CERM
0201
1
2
1.1V SLPDDR SWITCH
1
VDD
U7901
SLG5AP1668V
CAP
ON S
TDFN8
GND
8
C7913
1UF
20%
6.3V
X6S-CERM
0201
37
D
PP1V1_SLPS2R
52
LDO_RTC
T6
U6
VIN_RTC
H5
VIN_RTC_E
D11
VIN_RTC_N
P10
VIN_RTC_S
M14
VIN_RTC_W
PP1V1_SLPDDR
VOUT_RTC
VPUMP
V3P3_SW1
V3P3_SW2
74C4
77B2 74C6
Part : SLG5AP1668V
R(ON) : 7.8 mohm (Typical) , 9.6 mohm (max)
Current: 5.3A Max
V7
T7
U7
R10
N13
N10
1
2
1
C7906
2.2UF
10%
10V
2
X6S-CERM
0402
PMU_VPUMP
C7905
2.2UF
10%
10V
X6S-CERM
0402
1
C7911
0.1UF
10%
6.3V
2
X6S
0201
BOM_COST_GROUP=PLATFORM POWER
1
C7914
2.2UF
10%
10V
2
X6S-CERM
0402
LDO_RTC
1
C7902
0.01UF
10%
10V
2
X5R-CERM
0201
1
C7901
0.1UF
10%
6.3V
2
X6S
0201
PP3V3_AWAKE
PP3V3_S5
PAGE TITLE
77B2 74C4
77C2 74B4
PMIC LDOs
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PP3V3_G3H
75B6
Max Current = 300mA
Max Current = 500mA
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
79 OF 150
SHEET
61 OF 109
C
B
A
SIZE
D
8
67
35 4
2
1
D
www.haojiyoubbs.com
QQ微信：181806465
C
24C3 77B2 80A7
23A7 23C3 77B2 80A8
19D3 23D3 77D4 81B7
24C6 77A4
14A2
OUT
OUT
OUT
PMU_CLK32K_SOC
PMU_CLK32K_PCH
1
1
R8011
33
5%
1/20W
MF
2
201
2
2.2K
SOC_FORCE_DFU
R8012
33
5%
1/20W
MF
201
R8010
Use SOC's Internal Pull Up
19C3 52C2 77B2 80A7
76C6
81C3
64A6 64B5
13A6 13D3
16A7 16B7 19B5
64C3 77C2
81A8
19C3 23D3
62A6 77B2
21A5
76C6
23A3 24B6 62A6 71B7 77B2
80A8
24C6
36D3
36D3
24C8
24C8
16C7 62A6 77C2
13A6 13D3 15C8 77C2
6D5 31B6 77C2 80A6
Caution : AMUX programmed with Gain 1 should not have inputs greater than 1.5V
OUT
OUT
OUT
OUT
OUT
OUT
IN
BI
IN
BI
OUT
OUT
IN
IN
IN
IN
IN
IN
76C6
21
678
SOC_WDOG
SOC_SOCHOT_L
UPC_PMU_RESET
PM_THRMTRIP_L
NC_GPU_THRMTRIP
PMU_COLD_RESET_L
PM_SLP_S3_L_1
PMU_ACTIVE_READY
PMU_CLK32K_SOC_R
PMU_CLK32K_PCH_R
PMU_CLK32K_WLANBT
NC_PMU_CLK32K_GNSS_R
NC_PMU_CLK32K
PMU_SYS_ALIVE
PMU_FORCE_DFU
PMU_INT_L
I2C_PMU_SCL
I2C_PMU_SDA
SPMI_CLK
SPMI_DATA
ALL_SYS_PWRGD
PCH_PWRBTN_L
5%201
MF1/20W
PMU_OTHER3V3_HI_ISENSE
44C2
PMU_OTHER5V_HI_ISENSE
44C2
PMU_P5VUSBC_XT_ISENSE
44C2
PMU_CALPE_ISENSE
44C2
PMU_DDR1V2_ISENSE
44C2
PMU_OCARINA_ISENSE
44C2
PMU_SSDNAND_ISENSE
44C2
PMU_CPUP5VREG_ISENSE
44C2
NC_PMU_AMUX_AY
44C2
F5
RESET_IN1
E5
RESET_IN2
K5
RESET_IN3
K6
RESET_IN4
N5
RESET_IN5
L13
RESET*
M12
SYS_SLEEP*
J5
ACTIVE_RDY
H6
CLKOUT0_32K
H7
CLKOUT1_32K
J7
CLKOUT2_32K
K7
CLKOUT3_32K
K8
CLKOUT4_32K
L11
SYS_ALIVE
D6
FORCE_DFU
L9
IRQ*
M11
SCL
L10
SDA
M8
SCLK
M7
SDATA
K11
SYS_ACTIVE
C11
SYS_BTN
A16
AMUX_A0
A15
AMUX_A1
A14
AMUX_A2
B14
AMUX_A3
C14
AMUX_A4
D15
AMUX_A5
E14
AMUX_A6
F14
AMUX_A7
J14
AMUX_AY
(IPD)
(IPD)
(IPD)
CRITICAL
OMIT_TABLE
U7800
CALPE-PMU
BGA
SYM 3 OF 4
(IPU)
(IPU)
IREF
VREF
VDROOP
VDROOP_DET
CHG_CBC_ON
NCHG_INT
CHG_POK
VPWR_EN
LDO1_POK
PFN
VIN_BBAT
BUTTON1
BUTTON2
L12
K12
L7
M5
D9
J6
L4
D5
M13
D8
V6
N7
M6
PMU_IREF
PMU_VREF
PMU_DROOP_L
PMU_PVDDMAIN_EN
NC
PMU_ONOFF_L
PMU_RSLOC_RST_L
1
1
C8001
0.1UF
10%
6.3V
2
X6S
0201
R8001
200K
1%
1/20W
MF
201
2
SOC_VDDCPU_SENSE
CHGR_CBC_ON
CHGR_INT_L
GND
PCH_RTC_RESET_L
GND
OUT
IN
IN
IN
IN
OUT
OUT
76C6
IN
IN
3 245
23C3 62A6
27C3 78D4
53A4
53A4 53B8
76C6
58A5 77B2
14A3 17D2 77C2
To be Grounded on Portables Only, RC on Coin Cell on Desktops
33C1 52C4 62A6 81C5 81C7
50C6 52C4 62A6 77B8 81D5 81D7
1
D
C
B
PP3V3_G3H_RTC
PP1V8_AWAKE
PP1V8_S5
75C4
74B6
PMU_LCDPANEL_ISENSE
44C2
PMU_P5VUSBC_WR_ISENSE
44C2
PMU_CPUDDR_ISENSE
44C2
PMU_PP1V8S5_ISENSE
44C2
PMU_DDRVDDQ_ISENSE
44C2
PMU_CPUVA_VSENSE
44C2
PMU_CPUVA_ISENSE
44B2
PMU_TBT_XT_ISENSE
44B2
NC_PMU_AMUX_BY
44B2
NC
NC
R8013
0
PMU_XTAL1_R
CRITICAL
1/20W MF
Y8001
32.768KHZ-20PPM-12.5PF
1
C8002
22PF
5%
25V
2
C0G
0201
75B1 21C2
1.60X1.00-SM
21
21
5% 0201
NOSTUFF
1
C8003
22PF
5%
25V
2
C0G
0201
1
R8018
1M
5%
1/20W
MF
201
2
PMU_XTAL1
PMU_XTAL2
6D5 77C2
IN
PMU_VDD_MAX
1
C8004
0.1UF
10%
6.3V
2
X6S
0201
CPU_CATERR_L
D13
E13
E12
F13
G13
G14
H14
H13
J13
N9
M10
V3
V4
L6
N8
E6
AMUX_B0
AMUX_B1
AMUX_B2
AMUX_B3
AMUX_B4
AMUX_B5
AMUX_B6
AMUX_B7
AMUX_BY
LS_BID1
LS_BID2
XTAL1
XTAL2
SYS_ERR*
VDD_MAX
VDD_OTP
(IPU)
(IPU)
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
GPIO22
GPIO23
GPIO24
GPIO25
E9
E8
E7
F6
F7
F8
F9
F10
G10
G9
G8
G7
G6
H8
H9
J9
J8
K9
K10
J10
H10
H11
G11
F11
E10
P3V3MAIN_PGOOD
NC_P3V3G3W_EN
OUT
NC_P3V3G3W_PGOOD
P5VG3S_EN
OUT
P5VG3S_PGOOD
P3V3G3S_EN
P1V8G3S_EN
OUT
OUT
CPUVR_PGOOD
VCCIN_AUX_PGOOD
PVCCST_EN
PVDDQ_EN
PVDDQ_PGOOD
AUD_PWR_EN
WLAN_PWR_EN
BT_PWR_EN
SE_PWR_EN
SENSOR_PWR_EN
PVCCPLLOC_EN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
NC_PVCCEOPIO_EDRAM_PGOOD
NC_PEARL_PWREN_P2V7NAND_EN
UVP_DIS_L
NC_NAND_RESET_L_SD_PWR_EN
NC_NAND_WP_L_ENET_PWR_EN
TBT_PWR_EN
P1V1_SLPDDR_SOCFET_EN
OUT
OUT
OUT
58B5 58C4
IN
76C6
76C6
IN
58A7 77B2
58B6 58C6
IN
64D8 77B2
64C8 64D6 77B2 81A8
54C2 77C2
IN
56C6
IN
64A6 78C3
63A3 63B8 63D8 77B4 81A8
63B5 77B4
46D4
21A3 21B5
21B3 21B5
34A7 34B6
38D4 39B3 64A8 64B8 77A7
78C3
76C6
OUT
OUT
OUT
76C6
19C3
61A6 81A4 81A8
76C6
76C6
IN
B
76C6
A
PP1V8_SLPS2R
R8002
R8003
R8006
10K
10K
10K
R8005
R8015
R8014
10K
10K
R8007
10K
47K
21
21
NOSTUFF
74C6
1/20W MF
1/20W MF
21
1/20W MF
21
1/20W MF
21
1/20W MF
21
1/20W MF
21
5%201
5%201
5%201
5%201
5%201
1/20W MF
5%201
PMU_COLD_RESET_L
PMU_SYS_ALIVE
24C6 49D6 62D6 77B2 80A7
23A3 24B6 62C6 71B7 77B2 80A8
VDD_HI Threshold Select
PMU_DROOP_L
5%201
ALL_SYS_PWRGD
PMU_ONOFF_L
PMU_RSLOC_RST_L
PMU_ACTIVE_READY
23C3 62D3
16C7 62C6 77C2
33C1 52C4 62C3 81C5 81C7
50C6 52C4 62C3 77B8 81D5 81D7
19C3 23D3 62D6 77B2 81A8
PPBUS_G3H
75D7
NOSTUFF
C8051
220PF
10%
16V
CER-X7R
0201
887K
0.1%
1/20W
TK
0201
357K
1%
1/20W
MF
201
1
2
PMU_VDD_HI
1
2
OUT
60D6
BOM_COST_GROUP=PLATFORM POWER
PAGE TITLE
PMIC GPIOs & Control
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
80 OF 150
SHEET
62 OF 109
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
SIZE
A
D
R8050
1
2
R8051
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
C
VDD2 1.1V S3 VR
PP5V_G3S_CPUREG
75A7
62B3 63A3 63B8 77B4 81A8
BYPASS=U8100.6::1mm
10%
6.3V
X6S
0201
1
2
C8115
0.1UF
IN
1
R8111
2
1
R8117
2
1
R8112
2
PVDDQ_EN
3.57K
1%
1/20W
MF
201
PLACE_NEAR=U8100.19:3mm
P1V1REG_VREF_R
27.4K
0.1%
1/20W
MF
0201
PLACE_NEAR=U8100.8:5mm
48.7K
0.1%
1/20W
MF
0201
P1V1REG_AGND
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0540
VOLTAGE=0V
0201 5%
MIN_LINE_WIDTH=0.1160
MIN_NECK_WIDTH=0.0600
77B4 75B2 63D1
0201 5%1/20W
MF
MIN_LINE_WIDTH=0.1160
VOLTAGE=5V
MIN_NECK_WIDTH=0.0600
R8140
0
21
MF 1/20W
BYPASS=U8100.8::1mm
1
C8116
0.01UF
10%
10V
2
X7R-CERM
0201
PP1V1_S3
77D2
R8123
0
21
1
R8122
1K 47K
5%
1/20W
MF
201
2
BYPASS=U8100.12::1mm
PP5V_VDD2_V5IN
C8103
10UF
20%
10V
X5R-CERM
0402-1
PD_P1V1_S3_EN
PVDD2_EN_R
MIN_LINE_WIDTH=0.1160
MIN_NECK_WIDTH=0.0600
PLACE_NEAR=U8100.19:3mm
P1V1REG_VREF
PVDD2_REFIN
P1V1REG_MODE
P1V1REG_TRIP
1
R8113
1%
1/20W
MF
201
2
1
2
PLACE_NEAR=U8100.18:3mm
1
2
R8114
51.1K
1%
1/20W
MF
201
BYPASS=U8100.2::1mm
C8102
10UF
20%
10V
X5R-CERM
0402-1
V5IN
17
S3
16
S5
6
VREF
8
REFIN
19
MODE
18
TRIP
1
2
VLDOIN
U8100
TPS51916
CRITICAL
PGND GND
7
10
BYPASS=U8100.2::1mm
20%
10V
VBST
DRVH
SW
DRVL
PGOOD
VTT
1
2
1512
14
13
11
20
9
3
1
5
2
QFN
VTT THRM
GND PAD
4
C8114
10UF
X5R-CERM
0402-1
VDDQSNS
VTTSNS
VTTREF
21
PPVTT_VTTREF
VOLTAGE=0.6V
2
XW8100
SM
1
PLACE_NEAR=U8100.21:1mm
NO_TEST=1
P1V1_VBST
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0540
DIDT=TRUE
SWITCH_NODE=TRUE
PPVTT_S0_DDR_LDO
VOLTAGE=0.6V
C8140
0.22UF
10%
16V
CERM
402
P1V1_BOOT_RC
MIN_LINE_WIDTH=0.1160
MIN_NECK_WIDTH=0.0600
DIDT=TRUE
1
R8130
2.2
5%
1/20W
MF
201
SWITCH_NODE=TRUE
2
P1V1_DRVH
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0540
SWITCH_NODE=TRUE DIDT=TRUE
P1V1_SW
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0540
SWITCH_NODE=TRUE
DIDT=TRUE
P1V1_DRVL
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0540
GATE_NODE=TRUE
DIDT=TRUE
P1V1S3_PGOOD
1
2
R8133
1
5%
1/20W
MF
201
63B8
1
2
21
R8132
1
5%
1/20W
MF
201
C8130
0.1UF
10%
25V
X6S-CERM
0201
P1V1_DRVH_R
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0540
SWITCH_NODE=TRUE
DIDT=TRUE
21
P1V1_DRVL_R
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0540
GATE_NODE=TRUE
DIDT=TRUE
PPBUS_HS_CPU
75C6
3
4
5
CRITICAL
Q8100
CSD58873Q3D
Q3D
TG
TGR
BG
VSW
PGND
9
OMIT_TABLE
CRITICAL
1
C8172
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
DESENSE
1
CC824
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201 0201 0201 0201
1
VIN
6
7
8
NOSTUFF
R8110
2.2
1/10W
MF-LF
P1V1_LL_SNUB
DIDT=TRUE
SWITCH_NODE=TRUE
NOSTUFF
C8110
0.001UF
X7R-CERM
0402
C8172~C8176 5x 33uF added per SPF
C8184~C8188 added per desense after SPF 5x addition
OMIT_TABLE
CRITICAL
1
C8173
33UF
20%
16V
2
TANT-POLY
DESENSE
1
C8184
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
MIN_NECK_WIDTH=0.0540
MIN_LINE_WIDTH=0.0900
SWITCH_NODE=TRUE
DIDT=TRUE
P1V1_PHASE
1
5%
603
2
CRITICAL
1
C8105
330UF
20%
2.5V
2
TANT
CASE-B2-SM-1
10%
50V
1
2
OMIT_TABLE
CRITICAL
1
C8109
33UF
20%
16V
2
TANT-POLY
CASE-B3-1CASE-B3-1
DESENSE
1
C8185
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
OMIT_TABLE
CRITICAL
1
C8100
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
DESENSE
1
CC823
12PF
5%
25V
2
NP0-C0G
0201
1
2
L8100
0.68UH-20%-15A-0.0092OHM
21
PP1V1_S3_REG_R
PIMA062T-SM
CRITICAL
CRITICAL
1
C8106
330UF
20%
2.5V
2
TANT
CASE-B2-SM-1
39C8 43B4
39C8 43B4
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0540
VOLTAGE=1.2V
ISNS_CPUDDR_P
OUT
ISNS_CPUDDR_N
OUT
CRITICAL
1
C8107
330UF
20%
2.5V
2
TANT
CASE-B2-SM-1
R8141
10
21
5%
1/20W
MF
201
1
C8101
2.2UF
20%
25V
2
X6S-CERM
0402
DESENSE
C8186
12PF
5%
25V
NP0-C0G NP0-C0G
1
2
1
C8104
2.2UF
20%
25V
2
X6S-CERM
0402
DESENSE
C8187
5%
25V
NP0-C0G
DESENSE
1
C8188
12PF12PF
5%
25V
2
R8118
0.002
1%
1/2W
MF
0306
2 1
4 3
CRITICAL
1
C8112
10UF
20%
4V
2
X6S
0402-1
P1V1_SNS_RP1V1_SNS
MIN_LINE_WIDTH=0.1000
MIN_NECK_WIDTH=0.1000
CRITICAL
1
C8113
10UF
20%
4V
2
X6S
0402-1
OMIT_TABLE
CRITICAL
1
C8111
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
1
2
CRITICAL
1
3 2
PP1V1_S3
DESENSE
CC827
12PF
5%
25V
NP0-C0G
0201
1
2
C8108
220UF
20%
2V
ELEC
SM-COMBO
rdr57808314
OMIT_TABLE
CRITICAL
1
C8174
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
1
2
DESENSE
DESENSE
CC828
3.0PF
+/-0.1PF
25V
NP0-C0G
0201
OMIT_TABLE
CRITICAL
1
C8175
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
Vout = 1.1V
7.0A MAX OUTPUT
F = 400 KHZ
PP1V1_S3
1
2
C8181
3.0PF
+/-0.1PF
25V
NP0-C0G
0201
PLACE_NEAR=C8108.1:1mm
PLACE_NEAR=C8107.1:1mm
DESENSE
C8180
3.0PF
+/-0.1PF
25V
NP0-C0G
0201
XW8110
OMIT_TABLE
CRITICAL
1
C8176
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
77D2
2
SM
1
80C8 80B8 79B6 75A1 63A8 63A5 18D6 18C6 18B6
D
77B4 75B2 63D7
C
B
VDDQ 0.6V S3 VR
62B3 63A3 63D8 77B4 81A8
IN
P1V1S3_PGOOD
63C5
PVDDQ_EN
CRITICAL
C8154
0.015UF
10%
16V
X7R-CERM
0402
1
R8190
10K
5%
1/20W
MF
201
2
R8154
5%01/20W MF 0201
CRITICAL
C8153
47PF
5%
25V
C0G
1
2
0201
21
1
CRITICAL
2
R8155
0
21
5% 0201
R8153
6.81K
1%
1/20W
MF
201
C8152
2700PF
10%
16V
X7R
0201
P0V6_S3_SKIP
MF1/20W
P0V6_S3_EN
P0V6_S3_SS
P0V6_S3_FB
63A4
P0V6_S3_COMP
1
2
P0V6_S3_COMP_RC
1
2
75B4
77B4 74D4 63A6 18D6 18C6 18B6
B2
SKIP
B3
EN
C2
SS/REFIN
C1
FB
B1
COMP
PP3V3_G3H
PP1V8_S3_MEM
R8191
U8150
MAX15053B
BGA
CRITICAL
PGOOD
GND
A1
100K
IN
LX
5%
1/20W
MF
201
A3
A2
C3
1
2
P0V6_S3_SW
PVDDQ_PGOOD
1
2
SWITCH_NODE=TRUE
DIDT=TRUE
OUT
P0V6_S3_SNUB
DIDT=TRUE
SWITCH_NODE=TRUE
CRITICAL
C8150
10UF
20%
6.3V
CER-X6S
0402
62B3 77B4
1
R8159
0
2
1
2
CRITICAL
1
C8151
10UF
20%
6.3V
2
CER-X6S
0402
CRITICAL
1
C8160
10UF
20%
6.3V
2
CER-X6S
0402
152S00344
CRITICAL
L8150
1UH-20%-4.7A-0.04OHM
21
2520
ISNS_DDRVDDQ_P
0%
1/16W
MF-LF
0402
43A2 43C7
ISNS_DDRVDDQ_N
43A2
43C7
C8159
3.0PF
+/-0.1PF
50V
C0G-CERM
0402
CRITICAL
1
C8161
10UF
20%
6.3V
2
CER-X6S
0402
VOLTAGE=0.6V
PP0V6_S3_REG_R
R8156
0.005
1%
1/3W
MF
0306
2 1
4 3
P0V6_S3_FB_TOP
P0V6_S3_FB_R
P0V6_S3_FB
63B7
CRITICAL
1
C8163
10UF
20%
6.3V
2
CER-X6S
0402
2
XW8150
R8150
R8151
R8152
SM
10
5%
1/20W
MF
201
<Ra>
90.9
1%
1/20W
MF
201
<Rb>
10K
1%
1/20W
MF
201
1
1
2
1
2
1
2
CRITICAL
1
C8164
10UF
20%
6.3V
2
CER-X6S
0402
1
C8155
180UF
20%
2.5V
3 2
POLY-AL
SM
1
2
NOSTUFF
CRITICAL
1
C8162
100UF
20%
6.3V
2
POLY-TANT
CASE-A3
CRITICAL
3 2
DESENSE
C8182
3.0PF
+/-0.1PF
25V
NP0-C0G
0201 0201
PLACE_NEAR=C8155.1:3mm
PLACE_NEAR=C8155.1:3mm
CRITICAL
1
C8158
180UF
20%
2.5V
POLY-AL
SM
1
2
DESENSE
C8183
3.0PF
+/-0.1PF
25V
NP0-C0G
CRITICAL
1
C8156
10UF
20%
4V
2
X6S
0402-1
62B3 63B8 63D8 77B4 81A8
R8176
Q8171
Vout = 0.6V
0.9A MAX OUTPUT
F = 1 MHZ
CRITICAL
1
C8157
10UF
20%
4V
2
X6S
0402-1
DMN5L06TK
Bleeder/Discharge Circuit
SOT523
SYM_VER_1
Q8170
DMN5L06VK-7
SOT563
VER-4
R8171
0
PVDDQ_EN MEM_BLDR_EN_L
5%
21
MF1/20W 0201
10
5%
1/16W
MF-LF
402
1
2
P1V1_BLDR_L
3
D
G
1
S
2
R8175
P0V6_BLDR_L
3
D
5
G
S
4
2
G
MEM_BLDR_EN
1
5.1
5%
1/16W
MF
402
2
MEM_BLDR_EN
6
D
Q8170
DMN5L06VK-7
S
SOT563
VER-4
1
63B2
PP0V6_S3
PP3V3_G3H
1
R8170
100K
5%
1/20W
MF
201
2
NOSTUFF
1
C8170
47PF
5%
25V
2
C0G
0201
75A2
B
75B4
A
63C2 63A5 18D6 18C6 18B6
80C8 80B8 79B6 75A1
PP1V1_S3
8
CRITICAL
K
D8100
SOD523 SOD523
K
PMEG3010EB/S500
A
A
PP1V8_S3_MEM
CRITICAL CRITICAL
D8101
PMEG3010EB/S500
79C6 77B4 75A1 18D6 18C6 18B6
PP0V6_S3
77B4 74D4 63B6 18D6 18C6 18B6
K
D8102
SOD523
PMEG3010EB/S500
A
67
Vout = 0.6*(1+Ra/Rb) = 0.606V
PP1V1_S3
CRITICAL
K
D8103
SOD523
PMEG3010EB/S500
A
SYNC_MASTER=myEE
PAGE TITLE
SYNC_DATE=03/01/2019
A
TBT 5V REGULATOR
DRAWING NUMBER
051-05198
80C8 80B8 79B6 75A1 63C2 63A8 18D6 18C6 18B6
Apple Inc.
REVISION
6.0.0
BOM_COST_GROUP=PLATFORM POWER
35 4
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
2
BRANCH
evt-3
PAGE
81 OF 150
SHEET
63 OF 109
1
SIZE
D
D
www.haojiyoubbs.com
QQ微信：181806465
Note: Load switches may be larger than necessary
3.3V G3 Standby Switch
PP3V3_G3H_RTC
75C4
1
VDD
U8200
SLG5AP1445V
TDFN8
GND
8
D
Part
R(on)
@ 3.6V
Current
C8200
1
4700PF
10%
10V
2
X7R
201
P3V3G3S_SS
62B3 77B2
P3V3G3S_EN
IN
1
R8200
47K
5%
1/20W
MF
201
2
CAP
ON S
678
3 245
1
VCC1P8A Switch
PP1V8_G3S DISCHARGE
PP1V8_G3S
75D1
PP3V3_G3H
1
R8255
100K
5%
1/20W
MF
201
2
1
R8251
10
5%
1/16W
MF-LF
402
2
1
C8201
0.1UF
10%
10V
2
X5R-CERM
0201
75B4 16C2
BYPASS=U8200::5mm
P1V8G3S_DSCHG_EN P1V8_G3S_DSCHG
37
52
PP3V3_G3H_RTC
PP3V3_G3S
75C4
DMN5L06VK-7
77B2 75A6
P1V8G3S_DSCHG_EN_L
SOT563
2
G
EDC: 1.7A
R8250
SLG5AP1445V
62B3 64C8 77B2 81A8
P1V8G3S_EN
IN
1/20W MF5% 0201
0
21
6
D
S
1
Q8251
VER-4
NOSTUFF
C8255
47PF
5%
25V
C0G
0201
1
2
5
G
3
D
Q8251
DMN5L06VK-7
S
SOT563
VER-4
4
7.8 mOhm Typ
8.5 mOhm Max
4A Max
75B1 64D1 64B5
OMIT
C8214
0.0018UF
X7R-CERM
PP1V8_S5
1
10%
50V
2
0402
PP5V_G3S
75B7
1
2
C8210
2.2UF
10%
10V
X6S-CERM
0402
BYPASS=U8210::1MM
1
C8212
0.1UF
20%
16V
2
X6S-CERM
0201
CAP_PCPU_S0SW
PCPU_S0SW_R_EN
14
16
1
VDD
U8210
SLG5AP1775V
STQFN
CRITICAL
VIN
CAP
ON
GND
15
VOUT
NC
SIG_GND
13
83
2
NC
PP1V8_S5
NOSTUFF
1
R8212
0.0025
1%
1/3W
MF
0402
2
PP1V8_S0SW
EDP: 700mA
VCC1P8A has turn-on
spec of 65uS max
from EN to rail on
SLG5NT1757VPart
75B1 64D3 64B5
D
77D2 75A4 10C3 8C4
C
B
1.8V G3 Standby Switch
PP3V3_G3H_RTC
75C4
P1V8G3S_SS
62B3 64D6
IN
77B2 81A8
C8220
1
4700PF
10%
10V
2
X7R
201
P5V_S4SW_SNS_FET_RAMP
38D4 39B3 62B3 64A8
IN
77A7
P1V8G3S_EN
75B7
SENSOR_PWR_EN
5V Sensor Switch
PP5V_G3S
LOADISNS
C8223
2200PF
1
R8220
47K
5%
1/20W
MF
201
2
10%
10V
X7R-CERM
0201
1
VDD
U8220
1
C8221
0.1UF
10%
10V
2
X5R-CERM
0201
BYPASS=U8220::5mm
75B3 64A4
1.05 VCCSTG "SWITCH"
PP1V05_PCH_OUT_FET
NOSTUFF
R8256
0
5%
1/10W
MF-LF
603
Type
R8210
0
5%
21
1/20W
APN 353S02313
PCPU_S0SW_EN
64B3
21
PP1V05_S0SW_VCCSTG
75B4
EDP: 40MA
MF 0201
NOSTUFF
R(on)
@ 5V
Current
Turn on
R8211
0
81C3 77C2 64B5 64A6 62D6 19B5 16B7 16A7 13D3 13A6
PM_SLP_S3_L_1
MF
21
1/20W
5%
CAP,COG,1.8NF,2%,50V,0402
0201
CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION
C82141 CRITICAL131S00451
Load Switch
5 mOhm Typ
up to 4A
4A Max
48uS @Cslew=4.7nF
C
SLG5AP1445V
CAP
ON S
TDFN8
GND
8
Part
R(on)
@ 3.6V 8.5 mOhm Max
1
VDD
U8213
SLG5AP1443V
CAP
ON S
1
2
TDFN
CRITICAL
LOADISNS
GND
8
Part
Type
37
D
52
LOADISNS
C8213
1.0UF
0201-1
37
D
52
PP1V8_SLPS2R
PP1V8_G3S
SLG5AP1445V
7.8 mOhm Typ
4A MaxCurrent
1
20%
6.3V
2
X5R
PP5V_S4SW
EDC: 8.5mA
SLG5AP1443V
Load Switch
75D6
EDC: 250mA
74C6
77B2 75D2
PP1V8_S5
75B1
BYPASS=U8208::2MM
13A6 13D3 16A7 16B7 19B5 62D6 64A6 64C3 77C2 81C3
75B1 64D3 64D1
IN
PP1V8_S5
PM_SLP_S3_L_1
13A6 13D3 16C4
CPU_C10_GATE_L
IN
1.2V S0SW VCCPLL_OC Switch
PP3V3_S5
74B2
BYPASS=U8207::2MM
NOSTUFF
C8208
0.1UF
6.3V
CERM-X5R
0201
10%
NC
1
2
2
1
5
U8208
6
VCC
A Y
AND
B
NC
GND
3
R8209
NOSTUFF
74AUP1G08GF
SOT891
4
NOSTUFF
1
R8208
100K
5%
1/20W
MF
201
2
0
21
5%
1/20W
MF
0201
P1V1S0SW_RAMP
PCPU_S0SW_EN
64C3
C8207
CERM-X5R
C8206
0.1UF
10%
6.3V
0201
100PF
5%
25V
C0G
0201
PP1V1_S3
1
1
2
VDD
U8207
BYPASS=U8207::2MM
1
C8209
1.0UF
20%
6.3V
2
X5R
0201-1
75A1
SLG5AP1635V
CAP
ON
1
2
STDFN
CRITICAL
GND
8
Part
Type
R(on)
@ 3.3V
Current
37
D
52
S
EDP: 160mA
PP1V1_S0SW
77D2 75A4
VCCPLL_OC has turn-on
APN 353S00586
spec of 65uS max
from EN to rail on
SLG5NT1477
Load Switch
11.5 mOhm Typ
21.1 mOhm Max
B
6A Max
12uS MaxTurn on
A
PP1V8_SLPS2R
74C6
R(on)
Current 2.5A
17 mOhm Typ
19 mOhm Max
74B2 64A5
NOSTUFF
R8203
0
5%
MF
0201
21
15B1
IN
24C6
62B3 78C3
IN
PVCCST_EN
1/20W
R8204
0
5%
MF
0201
21
13D7
IN
74B2 64B5
17D2 56A5
IN
17D2 56A5
IN
13A6 13D3 16A7 16B7 19B5 62D6 64B5 64C3 77C2 81C3
IN
PM_SLP_S3_L_1
1/20W
1.8V Sensor Switch
U8270
TPS22916
DSBGA
A2
VIN
38D4 39B3 62B3 64B8 77A7
IN
SENSOR_PWR_EN
C8270
1.0UF
20%
6.3V
X5R
0201-1
BYPASS=U8270::2MM
B2
ON
1
2
GND
B1
VOUT
A1
PP1V8_S4SW_SNS
Part
R(on)
@ 1.8V
Current 2A Max
74B8
TPS22916
100 mOhm Typ
150 mOhm Max
PP3V3_S5
C8230
0.1UF
6.3V
CERM-X5R
0201
XDP_PRESENT_L
PM_SLP_S3_R_L
VCCST_OVERRIDE
PP3V3_S5
C8231
0.1UF
6.3V
CERM-X5R
0201
PCH_CORE_VID0
PCH_CORE_VID1
10%
10%
1
U8230
2
1
2
561
3
2
5
3
6
1
2
74AUP1T97
SOT891
4
VCCST_EN_B
47K
5%
1/20W
MF
201
1
2
R8235
U8231
74AUP1T97
SOT891
4
VCCST_EN_C
1
C8235
0.1UF
10%
6.3V
2
CERM-X5R
0201
U8235
5
3
B
1
A
6
C
74LVC1G332
SOT891
4
Y
2
VCCST_EN_R
75B3 64C6
R8232
0201 MF
NOSTUFF
C8232
Part
Type
R(on)
@ 1.0V
Current
Turn on
TPS22924B
Load Switch
20.3 mOhm Typ
28.6 mOhm Max
2A Max
160uS Max
PP1V05_PCH_OUT_FET
0
21
P1V05_VCCST_EN
5%
1/20W
1
0.1UF
10%
25V
2
X6S
0402
through (R1953 No Stuff) to PVCCSTG_DSCHG_EN_L
BYPASS=U8250::2MM
1.05 VCCST SWITCH
U8250
TPS22924B
A2
B2
CSP
VIN
CRITICAL
C2
ON
GND
20%
6.3V
X5R
1
2
OUT
C1
16C4
C8250
1.0UF
0201-1
P1V05_VCCST_EN as an option
BOM_COST_GROUP=PLATFORM POWER
VOUT
A1
B1
VCCST must ramp in 1msec
EDP: 750mA
PP1V05_S0_CPU_VCCST
SYNC_MASTER=myEE SYNC_DATE=03/01/2019
PAGE TITLE
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
Power FETs
77D2 75B4 54B3 31B6 16C7 13D8 10B3 8C7 8A5 6D6
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
82 OF 150
SHEET
64 OF 109
A
SIZE
D
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
C
B
75D7
Page Notes
Power aliases required by this page:
- =PPVIN_S0SW_LCDBKLTFET (9-12.6V LCD BACKLIGHT INPUT)
- =PP5V_S0_BKLT (5V BACKLIGHT DRIVER INPUT)
740S0159
CRITICAL
F8400
3AMP-32V
PPBUS_G3H
PLATFORM_RESET NO LONGER GATES THE BKLT_EN AS BOTH COME FROM PCH NOW
65A5
0603-COMBO
SOC_KBD_BKLT_PWM
32A6
21
PPVIN_S0SW_LCDBKLT_F
38B8 43C4
38B8 43C4
ISNS_LCDBKLT_P
OUT
ISNS_LCDBKLT_N
OUT
75B7 65C6
65B4 65B6 65C6
R8400
0.025
1%
1W
MF
0612-1
107S00034 371S00180 (Combo)
5A6 5D3
IN
75A5
R8482
0
21
SOC_KBD_BKLT_PWM_R
5%
1/16W
MF-LF
402
GND_BKLT_SGND
PP5V_G3S
66B1 77D5
IN
66C1 77D5
BI
I2C ID DEDICATED.ONLY CONNECTS TO JERRY
I2C_BKLT_SCL
I2C_BKLT_SDA
21
43
PPVIN_S0SW_LCDBKLT_R
65A5
1
C8400
1000PF
2
EDP_BKLT_EN
65B4 65B7 65C6
PP3V3_G3S
PLACE_NEAR=U8472.6:5MM
1
R8481
100K
1%
1/20W
MF
201
2
1
R8452
2
10%
16V
X7R-1
0201
GND_BKLT_SGND
1
2
1.8K
5%
1/20W
MF
201
C8483
0.1UF
16V 10%
X5R-CERM
0201
1
CRITICAL
Q8400
FDC638APZ_SBMS001
SSOT6-HF
4
1
R8401
80.6K
1%
1/16W
MF-LF
402
2
1
R8402
63.4K
1%
1/16W
MF-LF
402
2
PLACE_NEAR=U8400.5:5MM
GND_BKLT_SGND
65B4 65B6 65B7
1
R8440
1M
5%
1/20W
MF
201
2
BKLT_SENSE_OUT
R8442
0
5%
1/20W
MF
0201
21
BKLT_EN_R
1
C8442
33PF
5%
25V
2
NP0-C0G
0201
NO STUFF
U8472
74AUP1T97GM
5
SOT886
4
6
3
2
1
R8453
1.8K
5%
1/20W
MF
201
2
R8451
0
5%
1/20W
MF
PLACE_NEAR=U8400.16:10MM
0201
BKLT_PWM_KEYB_3V3
PLACE_NEAR=U8400.15:10MM
R8450
21
3
LCDBKLT_EN_L
PP5V_G3S
65B7
75B7
BKLT_SD
65A6
1
R8480
100K
1%
1/20W
MF
201
2
0
21
5%
1/20W
MF
0201
6
5
2
1
10
5%
1/16W
MF-LF
402
20%
25V
X5R
0402
1
2
1
2
R8444
C8440
4.7UF
BKLT_SCL
BKLT_SDA
NOSTUFF
1
C8401
0.001UF
10%
50V
2
X7R-CERM
0402
65A6
65A6
116S0004
PPVIN_S0SW_LCDBKLT
65A5
MIN_LINE_WIDTH=0.1500
MIN_NECK_WIDTH=0.2000
VOLTAGE=12.9V
MAKE_BASE=TRUE
1
R8445
10
5%
1/16W
MF-LF
402
2
PP5V_S0_BKLT_A
PP5V_S0_BKLT_D
1
C8441
PLACE_NEAR=U8400.18:5MM
4.7UF
20%
25V
2
X5R
0402
5
18
VDDD
U8400
LLP
LP8548B1SQ_-04
11
SD
9
VSENSE_N
10
VSENSE_P
19
SENSE_OUT
GND_SW
GND_SW2
3
7
SM
ISET_KEYB
GNDD
17
12
15
16
EN
PWM_KEYB
SCL
(IPU)
SDA
(IPU)
CRITICAL
GND_SW
24
23
XW8400
VDDA
KEYB1
KEYB2
THRM
GNDA
22
21
RES,MTL FILM,0 ohm, 1A MAX,0402,SMD
DIDT=TRUE
SWITCH_NODE=TRUE
VOLTAGE=55V
MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=2.0000
2
SW
SW
FB
GD
SW2
FB2
PAD
25
LCDBKLT_SW
1
21
LCDBKLT_FB
4
LCDBKLT_FET_DRV
20
BKLT_ISET_KEYB
13
BKLT_KEYB1 KBDLED_CATHODE1
14
BKLT_KEYB2
6
KBDBKLT_SW2
8
PPVOUT_BKLT_FB2
GND_BKLT_SGND
MIN_LINE_WIDTH=0.4000
MIN_NECK_WIDTH=0.1000
VOLTAGE=0V
PP5V_G3S_KBD
75A7
PLACE_NEAR=L8410.1:5MM
PLACE_NEAR=L8410.1:5MM
PLACE_NEAR=L8410.1:5MM
1
C8410
4.7UF
10%
25V
2
X6S-CERM
0603
PLACEMENT_NOTE:
SANDWICH C8210 AND C8211
SANDWICH C8210 AND C8211
R8454
31.6K
1
C8452
2.2UF
10%
2
25V
X5R-CERM
603
1
C8411
4.7UF
10%
25V
2
X6S-CERM
0603
LCDBKLT_FET_DRV_R
65A4
MF-LF 1%402 1/16W
1
1%
1/20W
MF
201
2
1
2
15UH-20%-1.9A-0.24OHM
DIDT=TRUE
GATE_NODE=TRUE
1
R8433
10
1%
1/16W
MF-LF
402
2
MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.2000
VOLTAGE=5V
GATE_NODE=TRUE
MIN_LINE_WIDTH=0.5000
MIN_NECK_WIDTH=0.2500
SWITCH_NODE=TRUE
DIDT=TRUE
65B6 65B7 65C6
10UH-20%-1.4A-0.17OHM
C8450
0.1UF
10%
16V
X5R-CERM
0201
L8420 CRITICAL1
PLACE_NEAR=Q8401.5:3MM
CRITICAL
L8410
PIME062D-SM
152S00253
1
C8412
0.1UF
10%
25V
2
X5R
402
4
DIDT=TRUE
10
R8435
21
MF-LF 1%
MIN_LINE_WIDTH=0.5000
MIN_NECK_WIDTH=0.2000
VOLTAGE=40V
L8450
PST041H-SM
1
C8451
2.2UF
10%
2
25V
X5R-CERM
603
1/16W402
21
65A3
21
CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION
PLACE_NEAR=L8410.2:3MM
CRITICAL
D8410
POWERDI123-COMBO
DFLS2100
DESENSE
1
C8476
12PF
5%
100V
2
C0G
0201
DIDT=TRUE
SWITCH_NODE=TRUE
PPVIN_SW_LCDBKLT_SW
5
CRITICAL
Q8401
SI7812DN
PWRPK-1212-8
PLACE_NEAR=U8400.1:3MM
321
10
R8436
21
KBDLED_CATHODE2
D8450
SOD123W
PMEG6010ER/S500
DESENSE
NO STUFF
1
C8495
12PF
5%
100V
2
C0G
0201
KA
PLACE_NEAR=D8410.K:2MM
2
XW8450
KA
SM
1
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1200
VOLTAGE=40V
1
C8453
2
1
2
PPVOUT_S0_LCDBKLT_F
65A3
PLACE_NEAR=D8410.K:5MM
PLACE_NEAR=D8410.K:5MM
PLACE_NEAR=D8410.K:5MM
PLACE_NEAR=D8410.K:5MM
PLACE_NEAR=D8410.K:5MM
1
2
PLACE_NEAR=D8410.K:5MM
PLACE_NEAR=D8410.K:5MM
PLACE_NEAR=D8410.K:5MM
PLACE_NEAR=D8410.K:5MM
PLACE_NEAR=D8410.K:5MM
1
2
PLACE_NEAR=D8410.K:5MM
PLACE_NEAR=D8410.K:5MM
PLACE_NEAR=D8410.K:5MM
PLACE_NEAR=D8410.K:5MM
PLACE_NEAR=D8410.K:5MM
2
XW8410
PLACE_NEAR=C8458.1:10MM
SM
1
1
R8431
LCDBKLT_TB_XWR
18.2K
1%
1/16W
MF-LF
402
2
65B2
77A5
65B2
77A5
PLACE_NEAR=D8410.K:5MM
1
2
1
R8432
150K
1%
1/16W
MF-LF
402
2
PPVOUT_S0_KBDLED_R
1
C8458
2.2UF
10%
2
50V
X5R
0603
2.2UF
10%
50V
X5R
0603
C8456
2.2UF
10%
50V
X5R
0603
1
C8459
2
1
C8454
2.2UF
10%
2
50V
X5R
0603
1
C8457
2.2UF
10%
2
50V
X5R
0603
2.2UF 0.001UF
10%
50V
X5R
0603
C8460
2.2UF
10%
100V
X5R
1206
C8465
2.2UF
10%
100V
X5R
1206
C8470
2.2UF
10%
100V
X5R
1206
77A5
C8455
1
10%
2
50V
X7R-CERM
0402
C8490
1
12PF
5%
2
100V
CERM
0402
1
C8493
2.2UF
10%
2
50V
X5R
0603
47-OHM-25%-300MA
1
C8461
2.2UF
10%
100V
2
X5R
1206
1
C8466
2.2UF
10%
100V
2
X5R
1206
1
C8471
2.2UF
10%
100V
2
X5R
1206
1
C8462
2.2UF
10%
100V
2
X5R
1206
1
C8467
2.2UF
10%
100V
2
X5R
1206
1
C8472
2.2UF
10%
100V
2
X5R
1206
J214 DISPLAY
Vout = 46V Typ, 55V Max
Iout = 0.12A Typ, 0.15A Max
Fs = 625kHz Typ (+/- 7%)
NOSTUFF
1
C8430
100PF
5%
100V
2
C0G-CERM
0603
PPVOUT_S0_KBDLED
MIN_LINE_WIDTH=0.4000
MIN_NECK_WIDTH=0.2000
VOLTAGE=40V
R8446
0
21
5%
1/16W
MF-LF
402
C8491
1
12PF
5%
2
100V
CERM
0402
1
C8494
2.2UF
10%
2
50V
X5R
0603
OMIT_TABLE
DESENSE
L8420
21
0402
CRITICAL
1
C8463
2
1
C8468
2
1
C8473
2
KBDLED_CATHODE1_R
77A5
Middle Flex(viewed from TOP)
65C3 77A5
65C3 77A5
KBDLED_CATHODE2_R
77A5
PPVOUT_S0_LCDBKLT
1
C8464
2.2UF
10%
100V
X5R
1206
2.2UF
10%
100V
X5R
1206
2.2UF
10%
100V
X5R
1206
2.2UF
10%
100V
2
X5R
1206
1
C8469
2.2UF
10%
100V
2
X5R
1206
DESENSE
1
C8474
12PF
5%
100V
2
C0G
0201
DESENSE
1
C8475
12PF
5%
100V
2
C0G
0201
Right Flex(viewed from TOP)
FF14A-6C-R11DL-B-3H
NC
NC
J8400
F-RT-SM
7
1
2
3
4
5
6
8
J8402
FF14A-10C-R11DL-B-3H
NC
KBDLED_CATHODE1
KBDLED_CATHODE2
NC
Left Flex(viewed from TOP)
FF14A-6C-R11DL-B-3H
NC
NC
F-RT-SM1
11
1
2
3
4
5
6
7
8
9
10
12
J8401
F-RT-SM
7
1
2
3
4
5
6
77D5
65A3 66A7
66C3 77B4
D
C
B
A
8
LINE WIDTHS
PP5V_S0_BKLT_A
MIN_LINE_WIDTH=2.0000
MIN_NECK_WIDTH=0.2000
VOLTAGE=5V
PP5V_S0_BKLT_D
MIN_LINE_WIDTH=2.0000
MIN_NECK_WIDTH=0.2000
VOLTAGE=5V
BKLT_SD
MIN_LINE_WIDTH=0.2500
MIN_NECK_WIDTH=0.2000
65C6
65C5
65C5
PBUS LINE WIDTHS
PPVIN_S0SW_LCDBKLT_F
MIN_LINE_WIDTH=2.0000
MIN_NECK_WIDTH=0.2000
VOLTAGE=12.9V
PPVIN_S0SW_LCDBKLT_R
MIN_LINE_WIDTH=2.0000
MIN_NECK_WIDTH=0.2000
VOLTAGE=12.9V
PPVIN_S0SW_LCDBKLT
MIN_LINE_WIDTH=0.1500
MIN_NECK_WIDTH=0.2000
VOLTAGE=12.9V
65D7
65D6
65D5
LCDBKLT_FET_DRV_R
MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.2000
VOLTAGE=5V
GATE_NODE=TRUE
DIDT=TRUE
67
LCD BKLT LINE WIDTHS
65C4
PPVIN_SW_LCDBKLT_SW
MIN_LINE_WIDTH=2.0000
MIN_NECK_WIDTH=0.2000
VOLTAGE=55V
SWITCH_NODE=TRUE
PPVOUT_S0_LCDBKLT
MIN_LINE_WIDTH=0.5000
MIN_NECK_WIDTH=0.1500
VOLTAGE=55V
I311
PPVOUT_S0_LCDBKLT_F
MIN_LINE_WIDTH=0.5000
MIN_NECK_WIDTH=0.1500
VOLTAGE=55V
DIDT=TRUE
65C4
65D1 66A7 66C3 77B4 77D5
65D3
35 4
BOM_COST_GROUP=DISPLAY
PAGE TITLE
LCD Backlight Driver
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
2
8
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
84 OF 150
SHEET
65 OF 109
1
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
SIZE
D
A
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
C
B
R8515
5D6
5D6
5D6
5D6
5D6
5D6
5D6
5D6
5D3
5D3
BI
BI
IN
IN
IN
IN
IN
IN
IN
IN
R8517
330
1/20W
MF
75C4 66D5
EDP_INT_ML_P<0>
EDP_INT_ML_N<0>
EDP_INT_ML_P<1>
EDP_INT_ML_N<1>
EDP_INT_ML_P<2>
EDP_INT_ML_N<2>
EDP_INT_ML_P<3>
EDP_INT_ML_N<3>
EDP_INT_AUX_P
EDP_INT_AUX_N
PP3V3_G3H_RTC
5D3
IN
EDP_PANEL_PWR_EN
21
PANEL_P5V_EN_D
2015%
EDP_PANEL_PWR_DLY_EN
NOSTUFF
R8572
100K
1/20W
201
150K
1/20W
5%
MF
5%
MF
201
1
2
21
PANEL_P5V_EN
D8517
LGA
RB522ES-30
1
R8570
100K
5%
1/20W
MF
201
2
PM_SLP_TIEOFF
SMCRST_TIEOFF
LCD Panel HPD & AUX strapping
PP3V3_S0SW_LCD
36D4 66C1 66C3 77C2 77D5 79B7
PPVOUT_S0_LCDBKLT
65A3 65D1 66C3 77B4 77D5
75B7
LCD_PWR_SLEW
1
C8515
0.1UF
KA
10%
10V
2
X5R-CERM
0201
R8518
330
5%
1/20W
MF
1
R8571
100K
5%
1/20W
MF
201
2
2
EDP_PANEL_PWR_EN
4 8
PM_SLP_S3_L
SMC_RESET_INPUT_L
MAKE_BASE=TRUE
EDP_INT_ML_P<0>
MAKE_BASE=TRUE
EDP_INT_ML_N<0>
MAKE_BASE=TRUE
EDP_INT_ML_P<1>
MAKE_BASE=TRUE
EDP_INT_ML_N<1>
MAKE_BASE=TRUE
EDP_INT_ML_P<2>
MAKE_BASE=TRUE
EDP_INT_ML_N<2>
MAKE_BASE=TRUE
EDP_INT_ML_P<3>
MAKE_BASE=TRUE
EDP_INT_ML_N<3>
MAKE_BASE=TRUE
EDP_INT_AUX_P
MAKE_BASE=TRUE
EDP_INT_AUX_N
201
NOSTUFF
21
PANEL_P3V3_EN_D
PP5V_G3S
CRITICAL
U8500
SLG5AP1443V
CAP
ON S
1
C8509
2200PF
10%
10V
2
X7R-CERM
0201
R8516
200K
1/20W
1
2
21
1%
MF
201
1
U8510
VDD
SLG4AP4998
PANEL_FET_EN_DLY
PANEL_PWR_EN_CONN
STQFN
SMC_RESET_OUTPUT_L
X604_DISP_PWR_EN
X604_DISP_SMC_RST_L
GND
7
66C3 77C5
66C3 77C5
66C3 77C5
66C3 77C5
66B3 77C5
66B3 77C5
66B3 77D5
66B3 77D5
66A7 66C3 77C5
66A7 66C3 77C5
NO_XNET_CONNECTION=1
R8503
1M
5%
1/20W
MF
201
TDFN
PANEL_P3V3_EN
LCD PANEL INTERFACE (eDP) + Camera (MIPI)
1
VDD
37
D
52
GND
8
D8518
LGA
K A
RB522ES-30
BYPASS=U8510::2mm
1
C8570
0.1UF
10%
10V
2
X5R-CERM
0201
3
EDP_PANEL_PWR_BUF_EN
912
6
10
5
NC0
11
NC1
HOST SIDE
1
C8511
0.1UF
10%
10V
2
X5R-CERM
0201
NC
NC
NC
NC
75A5
NC
25D6 78D6
25D6 78D6
25D6 78D6
25D6 78D6
37B4
1
C8512
10UF
20%
10V
2
X5R-CERM
0402-7
LCD_PWR_SLEW_3V3
1
C8516
0.47UF
10%
6.3V
2
CERM-X5R
0201
66C1 77D5
Camera Secure Disable
PP3V3_G3S
MIPI_FTCAM_CLK_P
MIPI_FTCAM_CLK_N
MIPI_FTCAM_DATA_P<0>
MIPI_FTCAM_DATA_N<0>
I2C_FTCAM_SDA
PP5V_S0SW_LCD_ISNS_R
75C4 66C8
PP3V3_G3H_RTC
CRITICAL
SLG5AP1443V
CAP
ON S
1
C8513
2200PF
10%
10V
2
X7R-CERM
0201
BYPASS=U8502::2mm
1
C8502
0.1UF
10%
10V
2
X5R-CERM
0201
CLK+
1
GND_VOID=TRUE
CLK-
2
GND_VOID=TRUE
1D+
3
GND_VOID=TRUE
1D-
4
GND_VOID=TRUE
2D+
5
1
VDD
U8501
TDFN
GND
8
10
VCC
CRITICAL
U8502
NX3DV642GU
QFN-COMBO
CLK1+
CLK2+
CLK1-
CLK2-
1D1+
1D2+
1D1-
1D22D1+
2D2+
75D6
37
D
52
1
2
17
22
GND_VOID=TRUE
16
23
GND_VOID=TRUE
15
20
GND_VOID=TRUE
14
21
GND_VOID=TRUE
13
19
C8510
1.0UF
20%
X5R
0201-1
NC
VOLTAGE=3.3V
PP3V3_S0SW_LCD_R
6.3V
ISNS_LCDPANEL_P
40C7 43D2
ISNS_LCDPANEL_N
40C7 43D2
MIPI_FTCAM_CLK_ISOL_P
MIPI_FTCAM_CLK_ISOL_N
MIPI_FTCAM_DATA_ISOL_P<0>
MIPI_FTCAM_DATA_ISOL_N<0>
I2C_FTCAM_ISOL_SDA
EDP_INT_AUX_N
66A7 66B6 77C5
EDP_INT_AUX_P
66A7 66B6 77C5
EDP_INT_ML_N<0>
66B6 77C5
EDP_INT_ML_P<0>
66B6 77C5
EDP_INT_ML_N<1>
66B6 77C5
EDP_INT_ML_P<1>
66B6 77C5
EDP_INT_ML_N<2>
66B6 77C5
EDP_INT_ML_P<2>
66B6 77C5
EDP_INT_ML_N<3>
66B6 77D5
EDP_INT_ML_P<3>
66B6 77D5
MIPI_FTCAM_DATA_ISOL_FILT_CONN_N<0>
66D1 77D5 78C5
MIPI_FTCAM_DATA_ISOL_FILT_CONN_P<0>
66D1 77D5 78C5
MIPI_FTCAM_CLK_ISOL_FILT_CONN_N
66D1 77D5 78C5
MIPI_FTCAM_CLK_ISOL_FILT_CONN_P
66D1 77D5 78C5
66D3
66D3
66D3
66D3
CRITICAL
SENSOR:DEV
R8520
0.01
1%
1/3W
MF
0306
NO_XNET_CONNECTION=1
21
43
PP1V8_G3S
1
R8507
100K
5%
1/20W
MF
201
2
66B1 77D5
MIPIC FILTERING
L8502
3.25-OHM-0.1A-2.4GHZ
GND_VOID=TRUE
MIPI_FTCAM_DATA_ISOL_P<0> MIPI_FTCAM_DATA_ISOL_FILT_CONN_P<0>
66A3 66B3 77D5 78C5
GND_VOID=TRUE
MIPI_FTCAM_DATA_ISOL_N<0>
66A3
MIPI_FTCAM_CLK_ISOL_P
66B4
GND_VOID=TRUE
MIPI_FTCAM_CLK_ISOL_N
66B4
TAM0605-4SM
SYM_VER-1
1
L8503
3.25-OHM-0.1A-2.4GHZ
TAM0605-4SM
SYM_VER-1
1
4
PLACE_NEAR=J8500:5mm
GND_VOID=TRUE
32
GND_VOID=TRUEGND_VOID=TRUE
4
PLACE_NEAR=J8500:5mm
GND_VOID=TRUE
32
GND_VOID=TRUE
MIPI_FTCAM_DATA_ISOL_FILT_CONN_N<0>
MIPI_FTCAM_CLK_ISOL_FILT_CONN_P
MIPI_FTCAM_CLK_ISOL_FILT_CONN_N
66B3 77D5 78C5
66B3 77D5 78C5
66B3 77D5 78C5
L8504
FERR-120-OHM-1.5A
75A6
PP5V_G3S_ALSCAM
PP3V3_S0SW_LCD
MIN_NECK_WIDTH=0.0900
MIN_LINE_WIDTH=0.0900
VOLTAGE=3.3V
0402A
36D4 66A7 66C1 77C2 77D5 79B7
21
PP5V_G3S_ALSCAM_F
VOLTAGE=5V
1
2
C8504
0.1UF
10%
10V
X5R-CERM
0201
66B1 77D5 79B8
J8500
20759-042E-02
F-ST-SM
1
R8508
100K
5%
1/20W
MF
201
2
GND_VOID=TRUE
GND_VOID=TRUE
GND_VOID=TRUE
GND_VOID=TRUE
GND_VOID=TRUE
GND_VOID=TRUE
GND_VOID=TRUE
GND_VOID=TRUE
GND_VOID=TRUE
GND_VOID=TRUE
GND_VOID=TRUE
GND_VOID=TRUE
GND_VOID=TRUE
GND_VOID=TRUE
75C1 37C6
PWR
SIGNAL
PWR
GND
4443
21
43
65
87
109
1211
1413
1615
1817
2019
2221
2423
2625
2827
3029
3231
3433
3635
3837
4039
4241
4645
4847
5049
5251
5453
5655
5857
6059
6261
6463
6665
6867
PP3V3_S0SW_LCDPPVOUT_S0_LCDBKLT
EDP_PANEL_PWR_BUF_EN
DP_INT_HPD
TP_LCD_IRQ_L
NC
BKLT_PWM_MLB2TCON
I2C_BKLT_SDA
I2C_BKLT_SCL
I2C_TCON_SDA
I2C_TCON_SCL
CKPLUS_WAIVE=I2C_PULLUP
CKPLUS_WAIVE=I2C_PULLUP
I2C_ALS_SDA
I2C_ALS_SCL
I2C_FTCAM_ISOL_SCL
I2C_FTCAM_ISOL_SDA
PP5V_G3S_ALSCAM_FPP5V_S0SW_LCD
OUT
BI
36D4 66A7 66C3 77C2 77D5 79B7 65A3 65D1 66A7 77B4 77D5
66C5 77D5
32C5 77D5
77D5
17D2 77D5
77D5 37B6
77D5 37B6
66A3 77D5
66A3 77D5
66D1 77D5 79B8 75D5 77C2 77D5 79B7
36D3
77D5
36D3
77D5
NOSTUFF
DESENSE
1
CC831
12PF
5%
25V
2
NP0-C0G
0201
NOSTUFF
DESENSE
1
CC832
12PF
5%
25V
2
NP0-C0G
0201
65A7 77D5
65A7 77D5
D
C
B
C8500
1000PF
10%
A
100V
X7R-CERM
0603
1
2D-
11
6
8
OE*
CONTROL
S
LOGIC
GND
EDP_INT_AUX_N
66B6 66C3 77C5
2
EDP_INT_AUX_P
66B6 66C3 77C5
NOSTUFF
NO_XNET_CONNECTION=1
1
R8502
1M
5%
1/20W
MF
201
2
49D4
37C4
IN
S OUTPUT
L Camera Disable
I2C_FTCAM_SCL
SEP_CAM_DISABLE_DFF_L
H Camera Enable
8
67
2D1-
2D2-
9
Alternate: OnSemi FSA642 (353S01346)
NC
NC
12
18
7
24
NC
I2C_FTCAM_ISOL_SCL
I2C pulls value need to be determine after charz
NC
NC
35 4
66B1 77D5
BOM_COST_GROUP=DISPLAY
PAGE TITLE
eDP Display Connector
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
2
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
85 OF 150
SHEET
66 OF 109
1
SIZE
D
A
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
D
www.haojiyoubbs.com
QQ微信：181806465
C
71C5 72D4
70D6 70D8
69D7 70A4
69A4 69A5
68B5 68C8
67A4 67A5
67D6 68A4
68D5 68D7
69C8 69D5
70A5 70C8
71A3 71A6
77A2
70D8 71B2 71B3 77A2
69B8 69D4 69D8 70B8 70D4
C8683
PP1V8_IO_SSD0
1
4.7UF
20%
4V
0201
2
May need 10K pull down on
JTAG_SEL (pending meeting)
CER-X5R
1
R8602
47K
1%
1/20W
MF MF
201
2
R8683
0
21
PP0V9_SSD0_S4E0_VDD_PLLPP0V9_SSD0
5%
1/20W
MF
0201
OMIT_TABLE
PLACE_NEAR=R8683.1:10MM
NOSTUFF
1
R8603
47K
1%
1/20W
201
2
VOLTAGE=0.9V
68C7 69C7 70C7 71B7 72D2
23C6 68C7 69C7 70C7 72D3
SSD0_S4E_BOOT2
68C7 69C7 70C7 72D3
SSD0_S4E0_SWD_UID0
68C7 69C7 70C7 72D5
72D1
71B7 77A2
68C7 69C7 70C8
70C7
SSD0_PCIE_RESET_L
26A6 32A6
68C7 69C7
72D5 70C7
32B8 24A3
69C7 68C7
72D5 70C7
32B8 24A3
69C7 68C7
SSD0_SWDIO
SSD0_SWCLK
68C7
72D5
68C7 69C7
70C7 72D5
SSD0_S4E0_DROOP_L
71A5
68C7 69C7
70C7 71A3
67D6 67B8 67D4 68B8 68D4 68D8
NOSTUFF
1
R8630
0
5%
1/20W
MF
0201
2
SSD0_OCARINA_LPB_L
SSD_BFH
SSD0_S4E_UART_RX
SSD0_S4E0_SWD_UID1
SSD0_S4E0_UART_TX
SSD0_OCARINA_PFN_L
SSD0_S4E0_JTAG_TDO
SSD0_S4E0_JTAG_TDI
SSD0_S4E_JTAG_SEL
SSD0_WP_L
678
67A8 68A8 68D6 69A8 69D6 70A8 70D6 71B4 71D4 77A2
67D7
B3
EXT_D0/BOOT0
C4
EXT_D1/BOOT1
B5
EXT_D2/BOOT2/SPINAND_SCLK
C6
EXT_D3/SWD_UID0/SPINAND_MISO
B7
EXT_D4/UART_RX
C8
EXT_D5/SWD_UID1/SPINAND_MOSI
B9
EXT_D6/UART_TX
B11
EXT_D7/SPF
E8
EXT_NCE/PERST*
D7
EXT_NRE/JTAG_TMS
E6
EXT_NWE/JTAG_TCK
E4
EXT_RNB/JTAG_TDO
D5
EXT_CLE/JTAG_TDI
D9
EXT_ALE/JTAG_SEL
T3
DROOP_N
G2
WP_N
PP0V9_SSD0_S4E0_VDD_PLL
71C5 72D4 77A2
67A4 67A5 67D8 68A4 68B5 68C8 68D5 68D7 69A4 69A5
69C8 69D5 69D7 70A4 70A5 70C8 70D6 70D8 71A3 71A6
67B5 67D1 68B5 68D1 68D6 69B6 69D1 69D5 70B5 70D1
70D6 71A4 71A7 71B2 71B3
PP2V5_NAND_SSD0
SSD0_S4E0_VPP
F3
PP1V8_IO_SSD0
PPVCCQ_ANI_SSD0
R2
L12G4E12
VPP
VDD_PLL
VCC
NAND-S4E-S5E-MCP-STUDY-COMBO
S4E0
P9N2E10E2T5K9J2R4R8R6L8L6G8
D3
VDDIO_2/NAND
U8600
OMIT_TABLE
VDDIO_1/GPIO
LGA
VDD
G6
J4
L2
G12
ANI0_VREF
ANI1_VREF
AVDD18_PLL
PP0V9_SSD0
SSD0_S4E0_ANI1_VREF
SSD0_S4E0_ANI0_VREF
SSD0_S4E0_AVDD18_PLL
SSD0_S4E0_PCI_AVDD_H
J8
N8H7J6
PCI_VDD_1
PCI_VDD_2
M9
N6
PCI_AVDD_H
PCI_AVDD_CLK_1
PCI_AVDD_CLK_2
67B8 67D4 67D8 68B8 68D4 68D8 69B8 69D4 69D8 70B8
70D4 70D8 71B2 71B3 77A2
67D3
67D1
67A2
67A2
PP0V9_SSD0
CLK_IN
68C3
PCIE_REFCLK_P
PCIE_REFCLK_M
PCIE_CLKREQ_N
PCI_RESREF
PCIE_RX0_P
PCIE_RX0_M
PCIE_TX0_P
PCIE_TX0_M
RESET*
TRST*
M3
K11
J12
P5
M11
N12
R12
T11
L4
G10
67B8 67D4 67D8 68B8 68D4 68D8 69B8 69D4 69D8 70B8
70D4 70D8 71B2 71B3 77A2
SSD0_CLK24M_01
PCIE_CLK100M_SSD0_01_P
PCIE_CLK100M_SSD0_01_N
SSD0_CLKREQ0_L
SSD0_S4E0_PCIE_RESREF
SSD0_OCARINA_RESET_L
70C2 72D3
69C2
SSD0_S4E_JTAG_TRST_L
68C2
3 245
26B6 68C3 78C8 78D8
26A6 68C3 78C8 78D8
26A6 32A6
PCIE_SSD0_R2D_P<0>
PCIE_SSD0_R2D_N<0>
PCIE_SSD0_D2R_C_P<0>
PCIE_SSD0_D2R_C_N<0>
GND_VOID=TRUE
GND_VOID=TRUE
71B7
68C3
69C3 70C3
77A2
67D4
SSD0_S4E0_ANI1_VREF
R8640
49.9
1/20W
0.1%
MF
0201
21
C8603
GND_VOID=TRUE GND_VOID=TRUE
C8604
0.22UF
2 1
10%
6.3V
X5R-CERM
0201
GND_VOID=TRUE
C8602
0.22UF
2 1
10%
6.3V
X5R-CERM
0201
0.22UF
2 1
X5R-CERM
GND_VOID=TRUE
C8601
0.22UF
2 1
X5R-CERM
GND_VOID=TRUE
10%
6.3V
0201
10%
6.3V
0201
EXTERNAL VREF
PPVCCQ_ANI_SSD0
1
R8681
2K
1%
1/20W
MF
201
2
NOSTUFF
R8680
0
21
5%
1/20W
MF
0201
NOSTUFF
R8640 May change pending CLK Rise Time/SI Calc
SSD0_CLK24M
PCIE_SSD0_R2D_C_P<0>
PCIE_SSD0_R2D_C_N<0>
PCIE_SSD0_D2R_P<0>
GND_VOID=TRUE
PCIE_SSD0_D2R_N<0>
1
R8682
2K
1%
1/20W
MF
2
201
NOSTUFF
32A6 32B6 69C1
IN
26B6
26B6
26B6 78D8
26B6 78D8
1
R8604
3.01K
1%
1/20W
MF
201
2
OMIT_TABLE
1
C8681
0.01UF
10%
10V
2
X7R
0201-1
NOSTUFF
1
C8682
0.01UF
10%
10V
2
X7R
0201-1
NOSTUFF
1
70D6 71A4 71A7 71B2 71B3
67B5 67D6 68B5 68D1 68D6
69B6 69D1 69D5 70B5 70D1
SSD0_S4E0_ANI0_VREF
1
C8651
10PF
5%
25V
2
C0G
0201
OMIT_TABLE
67D4
D
C
B
1
R8620
100K
1%
1/20W
MF
201
2
1
R8608
100K
1%
1/20W
MF
201
2
1
R8609
100K
1%
1/20W
MF
201
2
U12
U8U6U4
U10
U2
T9T7T1
T13
R10
P13
P7P3P1
P11
N10N4M13
M7M5M1
L10
K7K5K1
K13
VSS
J10
H13
H9H5H3
H11
H1
F13
F9F7F5
F11
F1
D13
D11D1C12C2B13B1A12
A8A6A4
A10
ZQ_C
ZQ_N
K3
C10
A2
S4E VDDIO
S4E VDD
71B3 77A2
69D4 69D8 70B8
67D4 67D8 68B8
68D4 68D8 69B8
70D4 70D8 71B2
PP0V9_SSD0
1
C8610
10UF
20%
6.3V
2
CERM-X6S
0402
1
C8611
2.2UF
20%
6.3V
2
X5R-CERM
0201
1
C8612
2.2UF
20%
6.3V
2
X5R-CERM
0201
1
C8613
0.1UF
10%
16V
2
X5R-CERM
0201
1
C8614
0.1UF
10%
16V
2
X5R-CERM
0201
1
C8615
0.1UF
10%
16V
2
X5R-CERM
0201
DESENSE
1
CC879
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC882
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC883
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC880
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
PPVCCQ_ANI_SSD0
67D1 67D6 68B5 68D1 68D6 69B6 69D1 69D5 70B5 70D1
70D6 71A4 71A7 71B2 71B3
1
C8632
10UF
20%
6.3V
2
CERM-X6S
0402
71C5 72D4 77A2
PP1V8_IO_SSD0
67A4 67D6 67D8 68A4 68B5 68C8 68D5 68D7 69A4 69A5
69C8 69D5 69D7 70A4 70A5 70C8 70D6 70D8 71A3 71A6
4.3UF
20%
4V
CERM
0402
432
1
C8636
1
C8637
2.2UF
20%
6.3V
2
X5R-CERM
0201
DESENSE
1
CC845
12PF
5%
25V
2
NP0-C0G
0201
SSD0_S4E0_ZQ_C
SSD0_S4E0_ZQ_L
DESENSE
1
CC838
3.0PF
+/-0.1PF
25V 25V
2
NP0-C0G
0201
DESENSE
1
CC839
12PF
5%
2
NP0-C0G
0201
1
R8605
300
1%
1/20W
MF
201
2
PLACE_NEAR=U8600.C10:15MM
DESENSE
1
CC844
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
1
R8606
100
1%
1/20W
MF
201
2
OMIT_TABLE
PLACE_NEAR=U8600.K3:15MM
118S0279
998-16042
118S0273 1 CRITICAL
117S0201 3
155S00161 2 CRITICAL
118S0794 1
998-16042
118S0273
155S00161 2
131S00003
RES,3.01KOHM,1%,1/20W,0201
RES,200OHM,0.1%,1/20W,0201
1 CRITICAL
RES,100OHM,1%,1/20W,0201
1118S0011
RES,300OHM,1%,1/20W,0201
RES,0OHM,1/20W,0201
FERR BD,10OHM,0.05 DCR,0201
RES,MF,2 OHM,1%,1/20W,0201
RES,200OHM,0.1%,1/20W,0201
1 CRITICAL
RES,300OHM,1%,1/20W,0201
1
FERR BD,10OHM,0.05 DCR,0201
RES,MF,2 OHM,1%,1/20W,0201
1118S0794
CAP,CER,10PF,5%,25V,C0G,0201
1131S00003
CAP,CER,10PF,5%,25V,C0G,0201
1 CRITICAL
1
R8600
100K
1%
1/20W
MF
201
2
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#
R8604
R8604
R8606
R8606
R8610,R8611,R8683
R8610,R8683
R8611
R8604
R8606
R8610,R8683
C8651
CRITICAL1
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
BOM OPTIONCRITICAL
SSD:S4E
SSD:S5E
SSD:S4E
SSD:S5E
SSD:S4E
SSD:S5E
SSD:S5E
SSD:S5E_1V2
SSD:S5E_1V2
SSD:S5E_1V2
SSD:S5E_1V2R8611
SSD:S5E_1V2C8651
SSD:S5E
TABLE_5_HEAD
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
B
A
VCC CAP
70D6 71B4 71D4
PP2V5_NAND_SSD0
67D6 68A8 68D6
69A8 69D6 70A8
77A2
1
C8648
10UF
20%
6.3V
2
CERM-X6S
0402
1
C8649
2.2UF
20%
6.3V
2
X5R-CERM
0201
1
C8650
2.2UF
20%
6.3V
2
X5R-CERM
0201
DESENSE
1
CC861
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC862
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC863
12PF
5%
2
NP0-C0G
0201
DESENSE
1
CC864
3.0PF
+/-0.1PF
25V25V
2
NP0-C0G
0201
DESENSE
1
CC865
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC866
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
C8684
2.2UF
20%
6.3V
X5R-CERM
0201
1
2
1
C8687
2.2UF
20%
6.3V
2
X5R-CERM
0201
71C5 72D4 77A2
PP1V8_IO_SSD0
67A5 67D6 67D8 68A4 68B5 68C8 68D5 68D7 69A4 69A5
69C8 69D5 69D7 70A4 70A5 70C8 70D6 70D8 71A3 71A6
R8610
0
2 1
5%
1/20W
MF
0201
OMIT_TABLE
1
C8644
0.1UF
10%
16V
2
X5R-CERM
0201
SSD0_S4E0_PCI_AVDD_H
1
C8645
4.7UF
20%
2
4V
CER-X5R
0201
67D4
PAGE TITLE
SYNC_DATE=05/15/2019SYNC_MASTER=X1795_MIHIR
A
S4E<0>
R8611
0
2 1
5%
1/20W
MF
0201
OMIT_TABLE
1
C8646
0.1UF
10%
16V
2
X5R-CERM
0201
SSD0_S4E0_AVDD18_PLL
1
C8647
2.2UF
20%
2
6.3V
CER-X5R
0201
BOM_COST_GROUP=SSD
67D4
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
86 OF 150
SHEET
67 OF 109
SIZE
D
8
67
35 4
2
1
D
www.haojiyoubbs.com
QQ微信：181806465
C
678
3 245
1
EXTERNAL VREF
PPVCCQ_ANI_SSD0
1
R8781
2
NOSTUFF
21
1
R8782
2
NOSTUFF
2K
1%
1/20W
MF
201
2K
1/20W
MF
201
26B6
26B6
26B6
26B6
S4E1
71B3 77A2
69D4 69D8 70B8
67B8 67D4 67D8
68B8 68D4 69B8
70D4 70D8 71B2
PP0V9_SSD0
C8783
4.7UF
CER-X5R
20%
4V
0201
1
2
R8783
0
21
5%
1/20W
MF
0201
OMIT_TABLE
PP0V9_SSD0_S4E1_VDD_PLL
VOLTAGE=0.9V
68D6
67A8 67D6 68A8 69A8 69D6 70A8 70D6 71B4 71D4 77A2
PP2V5_NAND_SSD0
PLACE_NEAR=R8783.1:10MM
PP0V9_SSD0_S4E1_VDD_PLL
68D7
SSD0_S4E1_VPP
NOSTUFF
1
R8730
0
2
5%
1/20W
MF
0201
B3
C4
B5
C6
B7
C8
B9
B11
E8
D7
E6
E4
D5
D9
T3
G2
EXT_D0/BOOT0
EXT_D1/BOOT1
EXT_D2/BOOT2/SPINAND_SCLK
EXT_D3/SWD_UID0/SPINAND_MISO
EXT_D4/UART_RX
EXT_D5/SWD_UID1/SPINAND_MOSI
EXT_D6/UART_TX
EXT_D7/SPF
EXT_NCE/PERST*
EXT_NRE/JTAG_TMS
EXT_NWE/JTAG_TCK
EXT_RNB/JTAG_TDO
EXT_CLE/JTAG_TDI
EXT_ALE/JTAG_SEL
DROOP_N
WP_N
71A3 71A6 71C5 72D4 77A2
67A4 67A5 67D6 67D8 68A4 68B5 68C8 68D5 69A4
69A5 69C8 69D5 69D7 70A4 70A5 70C8 70D6 70D8
71C5 72D4 77A2
69C8 69D5 69D7 70A4 70A5
67A4 67A5 67D6 67D8 68A4
68B5 68D5 68D7 69A4 69A5
70C8 70D6 70D8 71A3 71A6
PP1V8_IO_SSD0
1
R8702
47K
1%
1/20W
MF
201
2
PP1V8_IO_SSD0
67C7 69C7 70C8
71B7 77A2
1
R8708
100K
1%
1/20W
MF
201
2
72D5 70C7
32B8 24A3
69C7 67C7
72D5 70C7
32B8 24A3
69C7 67C7
67C7 69C7 70C7
71B7 72D2
23C6 67C7 69C7
70C7 72D3
67C7 69C7 70C7
72D3
67C7 69C7 70C7 72D5
72D1
70C7
26A6 32A6
67C7 69C7
69C7
67C7
67C7 69C7
70C7 72D5
SSD0_OCARINA_LPB_L
SSD_BFH
SSD0_S4E_BOOT2
SSD0_S4E1_SWD_UID0
SSD0_S4E_UART_RX
SSD0_S4E1_SWD_UID1
SSD0_S4E1_UART_TX
SSD0_OCARINA_PFN_L
SSD0_PCIE_RESET_L
SSD0_SWDIO
SSD0_SWCLK
SSD0_S4E1_JTAG_TDO
SSD0_S4E0_JTAG_TDO
SSD0_S4E_JTAG_SEL
SSD0_S4E1_DROOP_L
71A5
67C7 69C7
70C7 71A3
SSD0_WP_L
71A3 71A6 71C5 72D4 77A2
67A4 67A5 67D6 67D8 68A4 68B5 68C8 68D7 69A4
69A5 69C8 69D5 69D7 70A4 70A5 70C8 70D6 70D8
67B5 67D1 67D6 68B5 68D1 69B6 69D1 69D5 70B5 70D1
70D6 71A4 71A7 71B2 71B3
PP1V8_IO_SSD0
PPVCCQ_ANI_SSD0
PP0V9_SSD0
SSD0_S4E1_ANI1_VREF
SSD0_S4E1_ANI0_VREF
67B8 67D4 67D8 68B8 68D4 68D8 69B8 69D4 69D8 70B8
70D4 70D8 71B2 71B3 77A2
68D3
68D1
68D4
SSD0_S4E1_ANI1_VREF
R8780
0
5%
1/20W
MF
0201
NOSTUFF
F3
VPP
R2
L12G4E12
VDD_PLL
P9N2E10E2T5K9J2R4R8R6L8L6G8
D3
VCC
VDDIO_2/NAND
VDDIO_1/GPIO
U8700
NAND-S4E-S5E-MCP-STUDY-COMBO
LGA
OMIT_TABLE
VDD
G6
J4
L2
G12
ANI0_VREF
ANI1_VREF
AVDD18_PLL
SSD0_S4E1_AVDD18_PLL
SSD0_S4E1_PCI_AVDD_H
J8
N8H7J6
PCI_VDD_1
PCI_VDD_2
M9
N6
PCI_AVDD_H
PCI_AVDD_CLK_1
PCI_AVDD_CLK_2
PP0V9_SSD0
CLK_IN
PCIE_REFCLK_P
PCIE_REFCLK_M
PCIE_CLKREQ_N
PCI_RESREF
PCIE_RX0_P
PCIE_RX0_M
PCIE_TX0_P
PCIE_TX0_M
RESET*
TRST*
68A2
68A2
67B8 67D4 67D8 68B8 68D4 68D8 69B8 69D4 69D8 70B8
70D4 70D8 71B2 71B3 77A2
M3
K11
J12
P5
SSD0_CLK24M_01
PCIE_CLK100M_SSD0_01_P
PCIE_CLK100M_SSD0_01_N
SSD0_CLKREQ1_L
SSD0_S4E1_PCIE_RESREF
M11
N12
PCIE_SSD0_R2D_P<1>
PCIE_SSD0_R2D_N<1>
GND_VOID=TRUE
R12
T11
PCIE_SSD0_D2R_C_P<1>
PCIE_SSD0_D2R_C_N<1>
GND_VOID=TRUE
L4
G10
SSD0_OCARINA_RESET_L
SSD0_S4E_JTAG_TRST_L
67C4
IN
26B6 67C3 78C8 78D8
26A6 67C3 78C8 78D8
26A6 32A6
C8704
0.22UF
2 1
10%
6.3V
X5R-CERM
0201
GND_VOID=TRUE
C8702
0.22UF
2 1
70C3
67C3
69C3
71B7
77A2
10%
6.3V
X5R-CERM
0201
C8703
0.22UF
X5R-CERM
GND_VOID=TRUE
C8701
0.22UF
X5R-CERM
GND_VOID=TRUE
2 1
10%
6.3V
0201
2 1
10%
6.3V
0201
GND_VOID=TRUEGND_VOID=TRUE
GND_VOID=TRUE
67C4 69C2 70C2 72D3
PCIE_SSD0_R2D_C_P<1>
PCIE_SSD0_R2D_C_N<1>
PCIE_SSD0_D2R_P<1>
PCIE_SSD0_D2R_N<1>
1
C8781
0.01UF
10%
10V
2
X7R
0201-1
NOSTUFF
SSD0_S4E1_ANI0_VREF
1
C8782
0.01UF
10%
10V1%
2
X7R
0201-1
NOSTUFF
1
R8704
3.01K
1%
1/20W
MF
201
2
OMIT_TABLE
70D6 71A4 71A7 71B2 71B3
67B5 67D1 67D6 68B5 68D6
69B6 69D1 69D5 70B5 70D1
1
C8785
10PF
5%
25V
2
C0G
0201
OMIT_TABLE
68D4
D
C
B
K3
C10
A2
1
R8709
100K
1%
1/20W
MF
201
2
U12
U8U6U4
U10
U2
T9T7T1
T13
R10
P13
P7P3P1
P11
N10N4M13
M7M5M1
L10
K7K5K1
K13
VSS
J10
H13
H9H5H3
H11
H1
F13
F9F7F5
F11
F1
D13
D11D1C12C2B13B1A12
A8A6A4
A10
ZQ_C
ZQ_N
S4E VDDIO
PPVCCQ_ANI_SSD0
67B5 67D1 67D6 68D1 68D6 69B6 69D1 69D5 70B5 70D1
70D6 71A4 71A7 71B2 71B3
1
C8732
10UF
20%
S4E VDD
71B3 77A2
70B8 70D4
68D8 69B8
67B8 67D4
67D8 68D4
69D4 69D8
70D8 71B2
PP0V9_SSD0
1
C8710
10UF
20%
6.3V
2
CERM-X6S
0402
1
C8711
2.2UF
20%
6.3V
2
X5R-CERM
0201
1
C8712
2.2UF
20%
6.3V
2
X5R-CERM
0201
1
C8713
0.1UF
10%
16V
2
X5R-CERM
0201
1
C8714
0.1UF
10%
16V
2
X5R-CERM
0201
1
C8715
0.1UF
10%
16V
2
X5R-CERM
0201
DESENSE
1
CC875
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC886
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC877
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC888
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
72D4 77A2
70D6 70D8
69D5 69D7
68D5 68D7
PP1V8_IO_SSD0
67A4 67A5 67D6
67D8 68A4 68C8
69A4 69A5 69C8
70A4 70A5 70C8
71A3 71A6 71C5
6.3V
2
CERM-X6S
0402
4.3UF
20%
4V
CERM
0402
1
432
C8784
2.2UF
20%
6.3V
X5R-CERM
0201
C8736
1
2
1
C8787
2.2UF
20%
6.3V
2
X5R-CERM
0201
1
C8737
2.2UF
20%
6.3V
2
X5R-CERM
0201
DESENSE
1
CC847
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC836
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
SSD0_S4E1_ZQ_C
SSD0_S4E1_ZQ_L
PLACE_NEAR=U8700.C10:15MM
DESENSE
1
CC837
12PF
5%
25V
2
NP0-C0G
0201
1
2
DESENSE
1
CC846
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
R8705
300
1%
1/20W
MF
201
1
R8706
100
1%
1/20W
MF
201
2
OMIT_TABLE
PLACE_NEAR=U8700.K3:15MM
RES,3.01KOHM,1%,1/20W,0201
RES,200OHM,0.1%,1/20W,0201
RES,100OHM,1%,1/20W,0201
RES,300OHM,1%,1/20W,0201
RES,0OHM,1/20W,0201
3117S0201
155S00161
118S0794
131S00003
FERR BD,10OHM,0.05 DCR,0201
RES,MF,2 OHM,1%,1/20W,0201
RES,200OHM,0.1%,1/20W,0201
1998-16042 CRITICAL
1118S0273 CRITICAL
RES,300OHM,1%,1/20W,0201
FERR BD,10OHM,0.05 DCR,0201
2155S00161 CRITICAL
RES,MF,2 OHM,1%,1/20W,0201
CAP,CER,10PF,5%,25V,C0G,0201
1131S00003
CAP,CER,10PF,5%,25V,C0G,0201
1 CRITICAL
TABLE_5_HEAD
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#
R8704 SSD:S4E
R8706
R8710,R8711,R8783 SSD:S4E
R8710,R8783
R8711
R8711
C8785
C8785
CRITICAL118S0279 1
CRITICAL998-16042 1
CRITICAL1118S0011
CRITICAL
CRITICAL2
CRITICAL1
CRITICAL1118S0794
CRITICAL
BOM OPTIONCRITICAL
SSD:S5ER8704
SSD:S4E
SSD:S5E1 R8706118S0273 CRITICAL
SSD:S5E
SSD:S5E
SSD:S5E_1V2R8704
SSD:S5E_1V2R8706
SSD:S5E_1V2R8710,R8783
SSD:S5E_1V2
SSD:S5E
SSD:S5E_1V2
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
B
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
A
VCC CAP
71D4 77A2
PP2V5_NAND_SSD0
67A8 67D6 68D6 69A8
69D6 70A8 70D6 71B4
1
C8748
10UF
20%
6.3V
2
CERM-X6S
0402
1
C8749
2.2UF
20%
6.3V
2
X5R-CERM
0201
1
C8750
2.2UF
20%
6.3V
2
X5R-CERM
0201
DESENSE
1
CC867
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC868
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC869
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC870
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
71C5 72D4 77A2
PP1V8_IO_SSD0
67A4 67A5 67D6 67D8 68B5 68C8 68D5 68D7 69A4 69A5
69C8 69D5 69D7 70A4 70A5 70C8 70D6 70D8 71A3 71A6
R8710
0
2 1
5%
1/20W
MF
0201
OMIT_TABLE
R8711
0
2 1
5%
1/20W
MF
0201
OMIT_TABLE
1
C8744
0.1UF
10%
16V
2
X5R-CERM
0201
1
C8746
0.1UF
10%
16V
2
X5R-CERM
0201
SSD0_S4E1_PCI_AVDD_H
1
C8745
4.7UF
20%
2
4V
CER-X5R
0201
SSD0_S4E1_AVDD18_PLL
1
C8747
2.2UF
20%
2
6.3V
CER-X5R
0201
BOM_COST_GROUP=SSD
68D4
68D4
PAGE TITLE
S4E<1>
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
87 OF 150
SHEET
68 OF 109
SYNC_DATE=05/15/2019SYNC_MASTER=X1795_MIHIR
SIZE
A
D
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
C
Need BLM02AX100SN1 FB for S5E BOM options
R8883
70D8 71B2 71B3 77A2
67B8 67D4 67D8 68B8 68D4
68D8 69B8 69D4 70B8 70D4
PP0V9_SSD0
69D7 70A4 70A5 70C8 70D6 70D8
67A4 67A5 67D6 67D8 68A4 68B5
68C8 68D5 68D7 69A4 69A5 69D5
71A3 71A6 71C5 72D4 77A2
20%
4V
0201
1
2
C8883
4.7UF
CER-X5R
PP1V8_IO_SSD0
0
21
PP0V9_SSD0_S4E2_VDD_PLL
5%
1/20W
MF
0201
OMIT_TABLE
VOLTAGE=0.9V
PLACE_NEAR=R8883.1:10MM
71A3 71A6 71C5 72D4 77A2
67A4 67A5 67D6 67D8 68A4 68B5 68C8 68D5 68D7
69A4 69A5 69C8 69D5 70A4 70A5 70C8 70D6 70D8
1
R8802
47K
1%
1/20W
MF
201
2
67C7 68C7 70C8
71B7 77A2
to be added later
PP1V8_IO_SSD0
72D5 70C7 68C7 67C7 32B8 24A3
72D5 70C7 68C7 67C7 32B8 24A3
1
R8809
100K
1%
1/20W
MF
201
2
72D2
67C7 68C7
70C7 71B7
67C7 68C7
70C7 72D3
67C7 68C7
70C7 72D5
72D1
26A6 32A6 67C7 68C7 70C7
70C7
68C7
67C7 68C7 70C7 72D5
67C7 68C7 70C7 71A3 71A5
69D6
SSD0_OCARINA_LPB_L
SSD_BFH
SSD0_S4E_BOOT2
SSD0_S4E2_SWD_UID0
SSD0_S4E_UART_RX
SSD0_S4E2_SWD_UID1
SSD0_S4E2_UART_TX
SSD0_OCARINA_PFN_L
SSD0_PCIE_RESET_L
SSD0_SWDIO
SSD0_SWCLK
SSD0_S4E2_JTAG_TDO
SSD0_S4E1_JTAG_TDO
SSD0_S4E_JTAG_SEL
SSD0_S4E2_DROOP_L
SSD0_WP_L
NOSTUFF
1
R8830
0
5%
1/20W
MF
0201
2
B3
C4
B5
C6
B7
C8
B9
B11
E8
D7
E6
E4
D5
D9
T3
G2
71A3 71A6 71C5 72D4 77A2
67A4 67A5 67D6 67D8 68A4 68B5 68C8 68D5 68D7
69A4 69A5 69C8 69D7 70A4 70A5 70C8 70D6 70D8
67B5 67D1 67D6 68B5 68D1 68D6 69B6 69D1 70B5
70D1 70D6 71A4 71A7 71B2 71B3
67A8 67D6 68A8 68D6 69A8 70A8 70D6 71B4 71D4 77A2
PP0V9_SSD0_S4E2_VDD_PLL
69D7
EXT_D0/BOOT0
EXT_D1/BOOT1
EXT_D2/BOOT2/SPINAND_SCLK
EXT_D3/SWD_UID0/SPINAND_MISO
EXT_D4/UART_RX
EXT_D5/SWD_UID1/SPINAND_MOSI
EXT_D6/UART_TX
EXT_D7/SPF
EXT_NCE/PERST*
EXT_NRE/JTAG_TMS
EXT_NWE/JTAG_TCK
EXT_RNB/JTAG_TDO
EXT_CLE/JTAG_TDI
EXT_ALE/JTAG_SEL
DROOP_N
WP_N
PP2V5_NAND_SSD0
SSD0_S4E2_VPP
PP1V8_IO_SSD0
PPVCCQ_ANI_SSD0
F3
VPP
R2
L12G4E12
VDD_PLL
VCC
S4E2
P9N2E10E2T5K9J2R4R8R6L8
D3
VDDIO_2/NAND
VDDIO_1/GPIO
U8800
NAND-S4E-S5E-MCP-STUDY-COMBO
LGA
OMIT_TABLE
L6G8G6
VDD
PP0V9_SSD0
J4
ANI1_VREF
L2
G12
ANI0_VREF
AVDD18_PLL
67B8 67D4 67D8 68B8 68D4 68D8 69B8 69D4 69D8 70B8
70D4 70D8 71B2 71B3 77A2
SSD0_S4E2_ANI1_VREF
SSD0_S4E2_ANI0_VREF
SSD0_S4E2_AVDD18_PLL
SSD0_S4E2_PCI_AVDD_H
PP0V9_SSD0
J8
N8H7J6
PCI_VDD_1
PCI_VDD_2
M9
N6
PCI_AVDD_H
PCI_AVDD_CLK_1
PCI_AVDD_CLK_2
69A2
67B8 67D4 67D8 68B8 68D4 68D8 69B8 69D4 69D8 70B8
70D4 70D8 71B2 71B3 77A2
CLK_IN
70C3
PCIE_REFCLK_P
PCIE_REFCLK_M
PCIE_CLKREQ_N
PCI_RESREF
PCIE_RX0_P
PCIE_RX0_M
PCIE_TX0_P
PCIE_TX0_M
RESET*
TRST*
69D2
69D1
69A2
M3
K11
J12
P5
M11
N12
R12
T11
L4
G10
SSD0_CLK24M_23
PCIE_CLK100M_SSD0_23_P
PCIE_CLK100M_SSD0_23_N
SSD0_CLKREQ2_L
SSD0_S4E2_PCIE_RESREF
PCIE_SSD0_R2D_P<2>
PCIE_SSD0_R2D_N<2>
PCIE_SSD0_D2R_C_P<2>
PCIE_SSD0_D2R_C_N<2>
SSD0_OCARINA_RESET_L
SSD0_S4E_JTAG_TRST_L
26A6 70C3 78C8 78D8
26A6 70C3 78C8 78D8
26A6 32A6
C8804
0.22UF
GND_VOID=TRUE
X5R-CERM
C8802
0.22UF
GND_VOID=TRUE
71B7 77A2
67C3 68C3
70C3
X5R-CERM
2 1
10%
6.3V
0201
GND_VOID=TRUE
2 1
10%
6.3V
0201
EXTERNAL VREF
R8880
69D3
SSD0_S4E2_ANI1_VREF
R8840 May change pending CLK Rise Time/SI Calc
R8840
49.9
1/20W
0.1%
MF
0201
21
SSD0_CLK24M
C8803
0.22UF
X5R-CERM
GND_VOID=TRUE
2 1
10%
6.3V
0201
GND_VOID=TRUEGND_VOID=TRUE
PCIE_SSD0_R2D_C_P<2>
PCIE_SSD0_R2D_C_N<2>
C8801
0.22UF
X5R-CERM
GND_VOID=TRUE
2 1
GND_VOID=TRUE
10%
6.3V
0201
67C4 68C2 70C2 72D3
PCIE_SSD0_D2R_P<2>
PCIE_SSD0_D2R_N<2>
0
5%
1/20W
MF
0201
NOSTUFF
21
26B6
26B6
26B6
26B6
PPVCCQ_ANI_SSD0
1
R8881
2K
1%
1/20W
MF
201
2
NOSTUFF
1
R8882
2K
1%
1/20W
MF
2
201
NOSTUFF
32A6 32B6 67C2
IN
1
2
1
C8882
0.01UF
10%
10V
2
X7R
0201-1
NOSTUFF
1
R8804
3.01K
1%
1/20W
MF
201
2
OMIT_TABLE
70D6 71A4 71A7 71B2 71B3
67B5 67D1 67D6 68B5 68D1
68D6 69B6 69D5 70B5 70D1
C8881
0.01UF
10%
10V
X7R
0201-1
NOSTUFF
SSD0_S4E2_ANI0_VREF
1
C8885
10PF
5%
25V
2
C0G
0201
OMIT_TABLE
69D3
D
C
B
1
R8808
100K
1%
1/20W
MF
201
2
U12
U8U6U4
U10
U2
T9T7T1
T13
R10
P13
P7P3P1
P11
N10N4M13
M7M5M1
L10
K7K5K1
K13
VSS
J10
H13
H9H5H3
H11
H1
F13
F9F7F5
F11
F1
D13
D11D1C12C2B13B1A12
A8A6A4
A10
ZQ_C
ZQ_N
K3
C10
A2
S4E VDDIO
PPVCCQ_ANI_SSD0
67B5 67D1 67D6 68B5 68D1 68D6 69D1 69D5 70B5 70D1
70D6 71A4 71A7 71B2 71B3
1
C8832
10UF
S4E VDD
71B3 77A2
70B8 70D4
68D4 68D8
67B8 67D4
67D8 68B8
69D4 69D8
70D8 71B2
PP0V9_SSD0
1
C8810
10UF
20%
6.3V
2
CERM-X6S
0402
1
C8811
2.2UF
20%
6.3V
2
X5R-CERM
0201
1
C8812
2.2UF
20%
6.3V
2
X5R-CERM
0201
1
C8813
0.1UF
10%
16V
2
X5R-CERM
0201
1
C8814
0.1UF
10%
16V
2
X5R-CERM
0201
1
C8815
0.1UF
10%
16V
2
X5R-CERM
0201
DESENSE
1
CC885
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC872
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC881
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC884
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
69D7 70A4 70A5 70C8 70D6 70D8
PP1V8_IO_SSD0
67A4 67A5 67D6 67D8 68A4 68B5
68C8 68D5 68D7 69A4 69C8 69D5
71A3 71A6 71C5 72D4 77A2
20%
6.3V
2
CERM-X6S
0402
4.3UF
20%
4V
CERM
0402
432
1
C8836
1
C8837
2.2UF
20%
6.3V
2
X5R-CERM
0201
DESENSE
1
CC843
12PF
5%
25V
2
NP0-C0G
0201
DESENSE DESENSE
1
CC840
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
SSD0_S4E2_ZQ_C
SSD0_S4E2_ZQ_L
PLACE_NEAR=U8800.C10:15MM
1
CC841
12PF
5%
25V
2
NP0-C0G
0201
1
R8805
300
1%
1/20W
MF
201
2
DESENSE
1
CC842
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
1
R8806
100
1%
1/20W
MF
201
2
OMIT_TABLE
PLACE_NEAR=U8800.K3:15MM
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#
118S0279 1 CRITICAL
998-16042 CRITICAL
118S0011
118S0273
117S0201
155S00161
998-16042 1 CRITICAL
118S0794 1 CRITICAL
RES,3.01KOHM,1%,1/20W,0201
RES,200OHM,0.1%,1/20W,0201
1
RES,100OHM,1%,1/20W,0201
1 CRITICAL
1
RES,300OHM,1%,1/20W,0201
3
RES,0OHM,1/20W,0201
FERR BD,10OHM,0.05 DCR,0201
2
RES,MF,2 OHM,1%,1/20W,0201
RES,200OHM,0.1%,1/20W,0201
RES,300OHM,1%,1/20W,0201
FERR BD,10OHM,0.05 DCR,0201
2155S00161 CRITICAL
RES,MF,2 OHM,1%,1/20W,0201
CAP,CER,10PF,5%,25V,C0G,0201
1131S00003
CAP,CER,10PF,5%,25V,C0G,0201
1 CRITICAL131S00003
R8804
R8804
R8806
R8806
R8810,R8811,R8883
R8810,R8883
R8811
R8804
R8811 SSD:S5E_1V2
C8885
C8885
CRITICAL
CRITICAL
CRITICAL
CRITICAL1118S0794
CRITICAL1118S0273
CRITICAL
BOM OPTIONCRITICAL
SSD:S4E
SSD:S5E
SSD:S4E
SSD:S5E
SSD:S4E
SSD:S5E
SSD:S5E
SSD:S5E_1V2
SSD:S5E_1V2R8806
SSD:S5E_1V2R8810,R8883
SSD:S5E_1V2
SSD:S5E
TABLE_5_HEAD
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
B
A
VCC CAP
71D4 77A2
PP2V5_NAND_SSD0
67A8 67D6 68A8 68D6
69D6 70A8 70D6 71B4
1
C8848
10UF
20%
6.3V
2
CERM-X6S
0402
1
C8849
2.2UF
20%
6.3V
2
X5R-CERM
0201
1
C8850
2.2UF
20%
6.3V
2
X5R-CERM
0201
DESENSE
1
CC857
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC858
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC859
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC860
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
C8884
2.2UF
20%
6.3V
X5R-CERM
0201
1
2
1
C8887
2.2UF
20%
6.3V
2
X5R-CERM
0201
71C5 72D4 77A2
PP1V8_IO_SSD0
67A4 67A5 67D6 67D8 68A4 68B5 68C8 68D5 68D7 69A5
69C8 69D5 69D7 70A4 70A5 70C8 70D6 70D8 71A3 71A6
R8811
0
2 1
5%
1/20W
MF
0201
OMIT_TABLE
R8810
0
2 1
5%
1/20W
MF
0201
OMIT_TABLE
1
C8846
0.1UF
10%
16V
2
X5R-CERM
0201
1
C8844
0.1UF
10%
16V
2
X5R-CERM
0201
SSD0_S4E2_AVDD18_PLL
1
2
SSD0_S4E2_PCI_AVDD_H
C8847
2.2UF
20%
6.3V
CER-X5R
0201
BOM_COST_GROUP=SSD
1
C8845
4.7UF
20%
2
4V
CER-X5R
0201
69D4
69D4
PAGE TITLE
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
S4E<2>
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
88 OF 150
SHEET
69 OF 109
SYNC_DATE=05/15/2019SYNC_MASTER=X1795_MIHIR
SIZE
A
D
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
C
to be added laterNeed BLM02AX100SN1 FB for S5E BOM options
R8983
70D4 71B2 71B3 77A2
67B8 67D4 67D8 68B8 68D4
68D8 69B8 69D4 69D8 70B8
PP0V9_SSD0
C8983
4.7UF
CER-X5R
20%
4V
0201
1
2
0
5%
1/20W
MF
0201
OMIT_TABLE
21
PP0V9_SSD0_S4E3_VDD_PLL
VOLTAGE=0.9V
70D6
71C5 72D4 77A2
67A4 67A5 67D6 67D8 68A4 68B5 68C8 68D5 68D7 69A4
69A5 69C8 69D5 69D7 70A4 70A5 70C8 70D8 71A3 71A6
67B5 67D1 67D6 68B5 68D1 68D6 69B6 69D1 69D5 70B5
70D1 71A4 71A7 71B2 71B3
PP1V8_IO_SSD0
PPVCCQ_ANI_SSD0
PLACE_NEAR=R8983.1:10MM
67A8 67D6 68A8 68D6 69A8 69D6 70A8 71B4 71D4 77A2
PP0V9_SSD0_S4E3_VDD_PLL
70D7
71A3 71A6 71C5 72D4 77A2
67A4 67A5 67D6 67D8 68A4 68B5 68C8 68D5 68D7
69A4 69A5 69C8 69D5 69D7 70A4 70A5 70C8 70D6
71A3 71A6 71C5
69D5 69D7 70A4
68C8 68D5 68D7
67A4 67A5 67D6
67D8 68A4 68B5
69A4 69A5 69C8
70A5 70D6 70D8
72D4 77A2
PP1V8_IO_SSD0
1
R8902
47K
1%
1/20W
MF
201
2
PP1V8_IO_SSD0
67C7 68C7 69C7
71B7 77A2
1
R8908
100K
1%
1/20W
MF
201
2
72D5 69C7 68C7 67C7 32B8 24A3
72D5 69C7 68C7 67C7 32B8 24A3
1
R8909
100K
1%
1/20W
MF
201
2
67C7 68C7 69C7
71B7 72D2
23C6 67C7 68C7
69C7 72D3
67C7 68C7 69C7
72D3
67C7 68C7 69C7 72D5
72C1
26A6 32A6 67C7 68C7 69C7
72D3
69C7
67C7 68C7 69C7 72D5
67C7 68C7 69C7 71A3 71A5
SSD0_OCARINA_LPB_L
SSD_BFH
SSD0_S4E_BOOT2
SSD0_S4E3_SWD_UID0
SSD0_S4E_UART_RX
SSD0_S4E3_SWD_UID1
SSD0_S4E3_UART_TX
SSD0_OCARINA_PFN_L
SSD0_PCIE_RESET_L
SSD0_SWDIO
SSD0_SWCLK
SSD0_S4E3_JTAG_TDO
SSD0_S4E2_JTAG_TDO
SSD0_S4E_JTAG_SEL
SSD0_S4E3_DROOP_L
SSD0_WP_L
NOSTUFF
1
R8930
0
5%
1/20W
MF
0201
2
B3
C4
B5
C6
B7
C8
B9
B11
E8
D7
E6
E4
D5
D9
T3
G2
SSD0_S4E3_VPP
EXT_D0/BOOT0
EXT_D1/BOOT1
EXT_D2/BOOT2/SPINAND_SCLK
EXT_D3/SWD_UID0/SPINAND_MISO
EXT_D4/UART_RX
EXT_D5/SWD_UID1/SPINAND_MOSI
EXT_D6/UART_TX
EXT_D7/SPF
EXT_NCE/PERST*
EXT_NRE/JTAG_TMS
EXT_NWE/JTAG_TCK
EXT_RNB/JTAG_TDO
EXT_CLE/JTAG_TDI
EXT_ALE/JTAG_SEL
DROOP_N
WP_N
PP2V5_NAND_SSD0
F3
VPP
R2
L12G4E12
VDD_PLL
VCC
S4E3
P9N2E10E2T5K9J2R4R8R6L8L6G8
D3
VDD
VDDIO_2/NAND
U8900
NAND-S4E-S5E-MCP-STUDY-COMBO
OMIT_TABLE
VDDIO_1/GPIO
LGA
G6
J4
PP0V9_SSD0
L2
G12
ANI0_VREF
ANI1_VREF
AVDD18_PLL
67B8 67D4 67D8 68B8 68D4 68D8 69B8 69D4 69D8 70B8
70D4 70D8 71B2 71B3 77A2
SSD0_S4E3_ANI1_VREF
SSD0_S4E3_ANI0_VREF
SSD0_S4E3_AVDD18_PLL
SSD0_S4E3_PCI_AVDD_H
PP0V9_SSD0
J8
N8H7J6
PCI_VDD_1
PCI_VDD_2
M9
N6
PCI_AVDD_H
PCI_AVDD_CLK_1
PCI_AVDD_CLK_2
CLK_IN
PCIE_REFCLK_P
PCIE_REFCLK_M
PCIE_CLKREQ_N
PCI_RESREF
PCIE_RX0_P
PCIE_RX0_M
PCIE_TX0_P
PCIE_TX0_M
RESET*
TRST*
ZQ_C
ZQ_N
70D3
70D1
70A2
70A2
67B8 67D4 67D8 68B8 68D4 68D8 69B8 69D4 69D8 70B8
70D4 70D8 71B2 71B3 77A2
M3
K11
J12
P5
SSD0_CLK24M_23
PCIE_CLK100M_SSD0_23_P
PCIE_CLK100M_SSD0_23_N
SSD0_CLKREQ3_L
SSD0_S4E3_PCIE_RESREF
M11
N12
PCIE_SSD0_R2D_P<3>
PCIE_SSD0_R2D_N<3>
R12
T11
GND_VOID=TRUE
PCIE_SSD0_D2R_C_P<3>
PCIE_SSD0_D2R_C_N<3>
L4
G10
K3
C10
SSD0_OCARINA_RESET_L
SSD0_S4E_JTAG_TRST_L
SSD0_S4E3_ZQ_C
SSD0_S4E3_ZQ_L
GND_VOID=TRUE
69C3
IN
26A6 69C3 78C8 78D8
26A6 69C3 78C8 78D8
26A6 32A6
C8904
0.22UF
2 1
10%
6.3V
X5R-CERM
0201
GND_VOID=TRUE
C8902
0.22UF
2 1
67C3 68C3
69C3 71B7
77A2
10%
6.3V
X5R-CERM
0201
70D4
C8903
0.22UF
GND_VOID=TRUE
C8901
0.22UF
GND_VOID=TRUE
2 1
10%
6.3V
X5R-CERM
0201
2 1
10%
6.3V
X5R-CERM
0201
GND_VOID=TRUEGND_VOID=TRUE
GND_VOID=TRUE
67C4 68C2 69C2 72D3
SSD0_S4E3_ANI1_VREF
PCIE_SSD0_R2D_C_P<3>
PCIE_SSD0_R2D_C_N<3>
PCIE_SSD0_D2R_P<3>
PCIE_SSD0_D2R_N<3>
EXTERNAL VREF
PPVCCQ_ANI_SSD0
1
R8981
2K
1%
1/20W
MF
201
2
NOSTUFF
R8980
0
21
5%
1/20W
MF
0201
NOSTUFF
26B6
26B6
26B6
26B6
1
R8982
2K
1%
1/20W
MF
2
201
NOSTUFF
1
R8904
3.01K
1%
1/20W
MF
201
2
OMIT_TABLE
1
C8981
0.01UF
10%
10V
2
X7R
0201-1
NOSTUFF
1
C8982
0.01UF
10%
10V
2
X7R
0201-1
NOSTUFF
70D6 71A4 71A7 71B2 71B3
67B5 67D1 67D6 68B5 68D1
68D6 69B6 69D1 69D5 70B5
SSD0_S4E3_ANI0_VREF
1
C8985
10PF
5%
25V
2
C0G
0201
OMIT_TABLE
70D4
D
C
B
A
1
R8905
300
1%
1/20W
MF
201
2
PLACE_NEAR=U8900.K3:15MM
U12
U8U6U4
U10
U2
T9T7T1
T13
R10
P13
P7P3P1
P11
N10N4M13
M7M5M1
L10
K7K5K1
K13
VSS
J10
H13
H9H5H3
H11
H1
F13
F9F7F5
F11
F1
D13
D11D1C12C2B13B1A12
A8A6A4
A10
A2
PLACE_NEAR=U8900.C10:15MM
S4E VDDIO
PPVCCQ_ANI_SSD0
67B5 67D1 67D6 68B5 68D1 68D6 69B6 69D1 69D5 70D1
70D6 71A4 71A7 71B2 71B3
S4E VDD
71B3 77A2
69D8 70D4
68D4 68D8
67B8 67D4
67D8 68B8
69B8 69D4
70D8 71B2
PP0V9_SSD0
1
C8910
10UF
20%
6.3V
2
CERM-X6S
0402
1
C8911
2.2UF
20%
6.3V
2
X5R-CERM
0201
1
C8912
2.2UF
20%
6.3V
2
X5R-CERM
0201
1
C8913
0.1UF
10%
16V
2
X5R-CERM
0201
1
C8914
0.1UF
10%
16V
2
X5R-CERM
0201
1
C8915
0.1UF
10%
16V
2
X5R-CERM
0201
DESENSE
1
CC889
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC874
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE DESENSE
1
CC887
12PF
5%
25V
2
NP0-C0G
0201
1
CC876
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
70A4 70C8 70D6 70D8 71A3 71A6 71C5
PP1V8_IO_SSD0
67A4 67A5 67D6 67D8 68A4 68B5 68C8
68D5 68D7 69A4 69A5 69C8 69D5 69D7
72D4 77A2
1
C8932
10UF
20%
6.3V
2
CERM-X6S
0402
4.3UF
20%
4V
CERM
0402
432
1
C8936
1
C8937
2.2UF
20%
6.3V
2
X5R-CERM
0201
DESENSE
1
CC833
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC850
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC835
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC848
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
1
R8906
100
1%
1/20W
MF
201
2
OMIT_TABLE
118S0279
118S0011
118S0273
117S0201
998-16042
118S0794
131S00003
131S00003
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#
1 CRITICAL
RES,3.01KOHM,1%,1/20W,0201
RES,200OHM,0.1%,1/20W,0201
RES,100OHM,1%,1/20W,0201
1
RES,300OHM,1%,1/20W,0201
1 CRITICAL
RES,0OHM,1/20W,0201
3
FERR BD,10OHM,0.05 DCR,0201
2155S00161
1118S0794 CRITICAL
RES,MF,2 OHM,1%,1/20W,0201
RES,200OHM,0.1%,1/20W,0201
RES,300OHM,1%,1/20W,0201
FERR BD,10OHM,0.05 DCR,0201
RES,MF,2 OHM,1%,1/20W,0201
CAP,CER,10PF,5%,25V,C0G,0201
1 CRITICAL
CAP,CER,10PF,5%,25V,C0G,0201
R8904
CRITICAL1998-16042
R8906
R8906
R8910,R8911,R8983
R8910,R8983
R8911
R8904
R8906
R8910,R8983
R8911 SSD:S5E_1V2
C8985
C8985
CRITICAL
CRITICAL
CRITICAL
CRITICAL1
CRITICAL118S0273 1
CRITICAL155S00161 2
CRITICAL1
CRITICAL1
BOM OPTIONCRITICAL
SSD:S4E
SSD:S5ER8904
SSD:S4E
SSD:S5E
SSD:S4E
SSD:S5E
SSD:S5E
SSD:S5E_1V2
SSD:S5E_1V2
SSD:S5E_1V2
SSD:S5E_1V2
SSD:S5E
TABLE_5_HEAD
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
B
R8910
0
2 1
5%
1/20W
MF
0201
OMIT_TABLE
1
C8946
0.1UF
10%
16V
2
X5R-CERM
0201
1
C8944
0.1UF
10%
16V
2
X5R-CERM
0201
SSD0_S4E3_PCI_AVDD_H
1
C8945
4.7UF
20%
2
4V
CER-X5R
0201
SSD0_S4E3_AVDD18_PLL
1
C8947
2.2UF
20%
2
6.3V
CER-X5R
0201
BOM_COST_GROUP=SSD
70D4
70D4
SYNC_MASTER=X1795_MIHIR SYNC_DATE=05/15/2019
PAGE TITLE
S4E<3>
SIZE
D
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
89 OF 150
SHEET
70 OF 109
A
VCC CAP
71D4 77A2
PP2V5_NAND_SSD0
67A8 67D6 68A8 68D6
69A8 69D6 70D6 71B4
1
C8948
10UF
20%
6.3V
2
CERM-X6S
0402
1
C8949
2.2UF
20%
6.3V
2
X5R-CERM
0201
1
C8950
2.2UF
20%
6.3V
2
X5R-CERM
0201
1
C8951
2.2UF
20%
6.3V
2
X5R-CERM
0201
1
C8952
2.2UF
20%
6.3V
2
X5R-CERM
0201
DESENSE
1
CC853
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC854
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
1
CC855
12PF
5%
25V
2
NP0-C0G
0201
DESENSEDESENSE
1
CC856
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
C8984
2.2UF
20%
6.3V
X5R-CERM
0201
1
2
1
C8987
2.2UF
20%
6.3V
2
X5R-CERM
0201
71C5 72D4 77A2
PP1V8_IO_SSD0
67A4 67A5 67D6 67D8 68A4 68B5 68C8 68D5 68D7 69A4
69A5 69C8 69D5 69D7 70A5 70C8 70D6 70D8 71A3 71A6
R8911
0
2 1
5%
1/20W
MF
0201
OMIT_TABLE
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
OMIT_TABLE
CRITICAL
1
C9079
33UF
20%
16V
2
TANT-POLY
CASE-B3-1
1
C9073
10UF
20%
25V
2
X5R-CERM
0603
1
C9074
10UF
20%
25V
2
X5R-CERM
0603
71B7
1
C9080
10UF
20%
25V
2
X5R-CERM
0603
SSD0_VR_2V5_EN
1
C9081
10UF
20%
25V
2
X5R-CERM
0603
R9082
1/20W
0201
0
5%
MF
U9080
TPS62180
PPBUS_G3H_SSD0
75C6
1
C9083
0.1UF
10%
25V
2
X6S-CERM
0201
1
C9084
0.1UF
10%
25V
2
X6S-CERM
0201
SSD0_VR_P2V5_EN_R
SSD0_TPS62180_SS
A1
VIN1
B1
VIN1
C1
VIN1
D1
VIN2
E1
VIN2
F1
VIN2
E4
EN VO
D4
SS/TR
BGA
353S00526
CRITICAL
SW1
SW1
SW1
SW2
SW2
SW2
PG
FB
A2
B2
C2
D2
E2
F2
A4
F4
B4
P2V5_SW1_TPS62180_SSD0
DIDT=TRUE
SWITCH_NODE=TRUE
P2V5_SW2_TPS62180_SSD0
DIDT=TRUE
SWITCH_NODE=TRUE
SSD0_CR_P2V5_PGOOD
71B7
SSD0_TPS62180_FB
AGND
PGND
PGND
PGND
PGND
PGND
PGND
21
1
C9082
2200PF
10%
25V
2
CER-X7R
0201
A3
C4
XW9080
B3
SM
C3
D3
F3
E3
21
1UH-20%-4.8A-0.032OHM
1UH-20%-4.8A-0.032OHM
R9088
100K
1%
1/20W
MF
201
L9080
21
1210
L9081
21
1210
PP2V5_NAND_SSD0
21
PP2V5_NAND_SSD0
1
R9083
10.2
1%
1/20W
MF
201
SSD0_TPS62180_FB_R
1
C9085
47PF
5%
25V
2
C0G
0201
71D4 77A2
69A8 69D6
67A8 67D6
68A8 68D6
70A8 70D6 71B4
2
1
R9080
475K
0.1%
1/20W
TK
0201
2
1
R9081
221K
0.1%
1/20W
TF
0201
2
1
C9086
20UF
20%
10V
2
X5R
0402
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=2.7V
1
C9088
150UF
20%
6.3V
2
TANT
CASE-B-SM
CRITICAL
1
C9087
20UF
20%
10V
2
X5R
0402
1
C9089
150UF
20%
6.3V
2
TANT
CASE-B-SM
CRITICAL
1
C9090
150UF
20%
6.3V
2
TANT
CASE-B-SM
CRITICAL
1
C9091
10UF
20%
10V
2
X5R-CERM
0402-1
1
C9092
10UF
20%
10V
2
X5R-CERM
0402-1
1
C9093
10UF
20%
10V
2
X5R-CERM
0402-1
1
C9094
10UF
20%
10V
2
X5R-CERM
0402-1
DESENSE
1
CC851
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC852
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
D
C
B
75B4 71C6 71A8
DESENSE
1
CC890
12PF
5%
25V
2
NP0-C0G
0201
1
2
PP3V3_G3H_SSD0
DESENSE
CC891
3.0PF
+/-0.1PF
25V
NP0-C0G
0201
1
R9010
100K
1%
1/20W
MF
201
2
PLACE C9000-C9002 NEAR OCARINA PINS E7/E8
PLACE C9003-C9005 NEAR OCARINA PINS A7/A8
PLACE C9006 NEAR OCARINA PIN B4
1
C9000
10UF
20%
6.3V
2
CERM-X6S
0402
1
2
1
R9011
100K
1%
1/20W
MF
201
2
C9001
10UF
20%
6.3V
CERM-X6S
0402
1
C9002
0.1UF
20%
16V
2
X6S-CERM
0201
1
R9006
10K
5%
1/20W
MF
201
2
1
C9003
4.7UF
20%
6.3V 6.3V
2
X6S
0402
36B7
36B7
67C7 68C7 69C7 70C7 72D2
67C7 68C7 69C7 70C8 77A2
SSD0_OCARINA_PGOOD
23C6 32A6 77A2
SSD0_CR_P2V5_PGOOD
71D6
71A4 71A5
SSD0_OCARINA_RESET_L
67C3 68C3 69C3 70C3 77A2
23A3 24B6 62A6 62C6 77B2 80A8
71D8
71A8
71A4 77A2
GND_P2V5SSD0_AGND
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
VOLTAGE=0V
75B4 71C8 71A8
PP3V3_G3H_SSD0
1
C9004
4.7UF
20%
2
X6S
0402
1
2
C9005
0.1UF
20%
16V
X6S-CERM
0201
SSD0_STG01_ADDR
SSD0_FORCE_EN
I2C_SSD_SCL
I2C_SSD_SDA
SSD0_OCARINA_LPB_L
SSD0_OCARINA_PFN_L
SSD_PMU_RESET_L
SSD0_OCARINA_POK2
PMU_SYS_ALIVE
SSD0_VR_2V5_EN
1V8_SWCH_EN
SSD0_OCARINA_WP_L
1
C9006
150UF
2
F3
ATM
D2
ADDR
E1
FORCE_EN
G2
I2C_SCL
G3
I2C_SDA
F4
LPBN
G5
PFN*
G6
PGOOD
D1
PMIC_RESET*
D3
POK1
F1
POK2
E5
RESET*
F2
SYS_ALIVE
F5
VEN1
E4
VEN2
G4
WP*
OCARINA I2C BASE ADDRESS
CRITICAL
20%
6.3V
TANT-POLY
CASE-B1S-1
E8
Need 1.2V AI Rev BOMOPTION
STG0: F2
STG1: F0
A8
E7
VDD_BUCK0
VDD_BUCK1
VDD_BUCK0
D2499A0P0VLAVAG2
Once Available
For S5E_1.2V
B4
A7
VDD_BUCK1
B5
VDD_LDO
VDD_MAIN
U9000
WLCSP
338S00410
CRITICAL
OMIT_TABLE
SSD0_OCARINA_VDD_LDO
TP_SSD0_OCARINA_NAND_VCC_DET
PP1V8_IO_SSD0
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.0900
G1
VCC_DET
MIN_NECK_WIDTH=0.0900
C1
V_BUF_1.8V
TCAL
VREF
IREF
TDEV1
TDEV2
VR1_DISCHG
VR2_DISCHG
BUCK0_FB_DIS
BUCK1_FB_DIS
BUCK0_LX0
BUCK0_LX0
BUCK0_LX1
BUCK0_LX1
BUCK1_LX0
BUCK1_LX0
A4
B3
B2
B1
C2
A3
A1
D5
C5
F8
F7
D8
D7
B8
B7
1
C9009
0.1UF
10%
16V
2
X5R-CERM
0201
SSD0_OCARINA_TCAL
SSD0_OCARINA_VREF
SSD0_OCARINA_IREF
SSD0_OCARINA_TDEV1
SSD0_OCARINA_TDEV2
PP2V5_NAND_SSD0
SSD0_OCARINA_VR2_DIS
PP0V9_SSD0_FB_DIS
PPVCCQ_SSD0_FB_DIS
P0V9_LX0_SSD0
DIDT=TRUE
SWITCH_NODE=TRUE
P0V9_LX1_SSD0
DIDT=TRUE
SWITCH_NODE=TRUE
PVCCQ_LX0
DIDT=TRUE
SWITCH_NODE=TRUE
1
C9007
0.22UF
20%
6.3V
2
X6S-CERM
0201
71C4
71C2
1
2
71A5
R9005
200K
0.1%
1/20W
TF
0201
R9081:200K->2.7V, 221K->2.519V NAND VCC
SSD0_OCARINA_TDEV1 SSD0_OCARINA_TDEV2
71B4 71B4
1
1
2
21
21
R9001
18.2K
0.1%
1/20W
TK
0201
R9020
R9030
0
5%
1/20W
MF
0201
0
5%
1/20W
MF
0201
21
21
1
C9020
20UF
20%
10V
2
X5R
0402
R9002
100K-1%-0.001A
1
1
C9008
0.1UF
20%
16V
2
X6S-CERM
0201
R9000
8.06K
0.1%
1/20W
TK
0201
2
0201
2
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=0.9V
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900 MIN_NECK_WIDTH=0.0900
VOLTAGE=1.8V
L9021
1UH-20%-4.8A-0.032OHM
1210
L9020
0.47UH-20%-6.7A-0.023OHM
1210
L9030
0.47UH-20%-6.7A-0.023OHM
21
1210
1
C9030
20UF
20%
10V
2
X5R
0402
1
2
R9004
100K-1%-0.001A
0201
PP0V9_SSD0
MIN_LINE_WIDTH=0.0900
VOLTAGE=1.8V
PPVCCQ_ANI_SSD0
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=0.9V
1
C9021
20UF
20%
10V
2
X5R
0402
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=1.8V
1
C9031
20UF
20%
10V
X5R
0402
C9032
20UF
10V
2
X5R
0402
1
1
R9003
18.2K
0.1%
1/20W
TK
0201
2
67B8 67D4 67D8 68B8 68D4 68D8 69B8 69D4 69D8 70B8
70D4 70D8 71B2 77A2
71B2
67B5 67D1 67D6 68B5 68D1 68D6 69B6
69D1 69D5 70B5 70D1 70D6 71A4 71A7
2
PP0V9_SSD0
1
C9022
20UF
20%
10V
2
X5R
0402
1
C9023
20UF
20%
10V
2
X5R
0402
1
C9024
20UF
20%
10V
2
X5R
0402
PPVCCQ_ANI_SSD0
1
C9033
20UF
20%
10V
2
X5R
0402
1
C9034
20UF
20%20%
2
X5R
0402
1
C9035
20UF
20%
10V10V
2
X5R
0402
1
C9025
20UF
20%
10V
2
X5R
0402
DESENSE
1
CC834
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
1
C9026
20UF
20%
10V
2
X5R
0402
DESENSE
1
CC849
12PF
5%
25V
2
NP0-C0G
0201
DESENSE DESENSE
1
C9027
20UF
20%
10V
2
X5R
0402
PPVCCQ_ANI_SSD0 = 1.8V
(1.2V for AI Rev Ocarina)
1
CC873
12PF
5%
25V
2
NP0-C0G
0201
1
CC878
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
C
B
A
VSS
VSS
VSS
A2
B6
A5
A6
-------------------------------------------------------
71C8 71C6
PP3V3_G3H_SSD0
75B4
1
C9010
0.1UF
20%
2
16V
X6S
0201
SSD:S5E_1V2
1
VDD
U9001
71A6 71A7
TON DELAY = ~1MS
SLG5AP1445V
1V8_SWCH_SLEW
CAP
TDFN8
37
D
PP1V8_SLPS2R
19B3 74C6
SSD:S5E_1V2
1V8_SWCH_EN
71B7
C9011
1
4700PF
10%
25V
2
CER-X5R
0201
SSD:S5E_1V2
-------------------------------
------------------------------------------------------------------------------------------------------------------------
ON S
GND
8
52
PP1V8_IO_SSD0_R2
VOLTAGE=1.8V
-----------------------------------------------------------------
R9049
PP1V8_IO_SSD0_R2
0.005
1/3
MF
SSD:S5E_1V2
21
0402
1%
SSD:S5E_1V2
R9050
0.005
SSD:S5E_1V2
71A6 71A7
PP1V8_IO_SSD0_R2
71A7
R9016
100
70D1 70D6 71A4 71B2 71B3
0.1%
VSS
VSS
VSS
D6
C4
C3
PP1V8_IO_SSD0
SSD:S5E_1V2
R9048
0402 1/31%
21
1%1/3MF 0402
21
04021/16W
VSS
VSS
VSS
E2
E6
D4
0.005
21
SSD0_OCARINA_POK2
TF
VSS
MF
VSS
VSS
E3
F6
70D8 71A3 71C5 72D4 77A2
67A4 67A5 67D6 67D8 68A4 68B5 68C8 68D5 68D7
69A4 69A5 69C8 69D5 69D7 70A4 70A5 70C8 70D6
SSD0_OCARINA_VR2_DIS
SSD0_WP_LPPVCCQ_ANI_SSD0
VSS(VSS_BUCK0)
VSS(VSS_BUCK0)
G7
G8
VSS(VSS_BUCK01)
VSS(VSS_BUCK01)
C7
C8
VSS(VSS_BUCK01)
C6
71A4 71B7
67C7 68C7 69C7 70C7 71A3 67B5 67D1 67D6 68B5 68D1 68D6 69B6 69D1 69D5 70B5
71B4
---------------------------------------------------------
SSD0_OCARINA_POK2
71A5
71B7
71B3
71A7
70D1
69D5
69B6
68D1
67D6
PPVCCQ_ANI_SSD0
67B5
67D1
68B5
68D6
69D1
70B5
70D6
71B2
71B7 77A2
--------------------------------------------
------------------------------------------------------------
---------------------------------------------------------
R9012
0
21
5%
1/20W
MF
0201
OMIT_TABLE
R9015
0.001
OMIT_TABLE
1%
1W
MF
1206
21
R9017
0
21
5%
1/20W
MF
0201
OMIT_TABLE
S4E/S5E BOM Option
70C8 70D6 70D8 71A6
PP1V8_IO_SSD0
SSD0_WP_LSSD0_OCARINA_WP_L
68D7 69A4 69A5 69C8
67A4 67A5 67D6 67D8
68A4 68B5 68C8 68D5
69D5 69D7 70A4 70A5
71C5 72D4 77A2
67C7 68C7 69C7 70C7
71A5
RES,MF,1A MAX,0.0OHM,5%,0201,BLACK
2
RES,MF,1A MAX,0.0OHM,5%,0201,BLACK
117S0201 CRITICAL
107S0118
107S0118
--------------------------------------------
2
RES,FILM,0.001OHM,1W,1%,1206
1 CRITICAL
RES,FILM,0.001OHM,1W,1%,1206
1 CRITICAL
SYNC_MASTER=X1795_MIHIR SYNC_DATE=06/04/2019
PAGE TITLE
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#
R9012,R9017
R9012,R9017
R9015
CRITICAL117S0201
BOM OPTIONCRITICAL
SSD:S4E
SSD:S5E
SSD:S4ER9015
SSD:S5E
OCARINA PMIC & NAND VCC VR
DRAWING NUMBER
051-05198
Apple Inc.
REVISION
6.0.0
BRANCH
evt-3
PAGE
90 OF 150
SHEET
71 OF 109
TABLE_5_HEAD
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
A
SIZE
D
8
67
35 4
2
1
D
www.haojiyoubbs.com
QQ微信：181806465
678
3 245
1
SSD0
SSD_DBG
J9600
67C7
70C7 69C7 68C7 67C7 32B8 24A3
70C7 69C7 68C7 67C7 32B8 24A3
67C7 68C7 69C7 70C7
67C7 68C7 69C7 70C7
SSD0_S4E0_JTAG_TDI
SSD0_SWDIO
SSD0_SWCLK
SSD0_S4E_JTAG_SEL
SSD0_S4E_UART_RX
71A6 71C5 72D4 77A2
PP1V8_IO_SSD0
67A4 67A5 67D6 67D8 68A4 68B5 68C8 68D5 68D7 69A4
69A5 69C8 69D5 69D7 70A4 70A5 70C8 70D6 70D8 71A3
DF40C-20DP-0.4V
NC
M-ST-SM
22
21
21
43
65
87
109
1211
1413
1615
1817
2019
23
24
SSD0_S4E3_JTAG_TDO
SSD0_S4E_JTAG_TRST_L
SSD_BFH
SSD0_S4E_BOOT2
SSD0_S4E_UART_TX
SSD0_LPB_L
PP1V8_IO_SSD0
1
C9651
2.2UF
20%
6.3V
2
X5R-CERM
0201
23C6 67C7 68C7 69C7 70C7
67C7 68C7 69C7 70C7
1
C9652
2.2UF
20%
6.3V
2
X5R-CERM
0201
70C7
67C4 68C2 69C2 70C2
R9655
0
21
5%
1/20W
MF
0201
SSD0_OCARINA_LPB_L
71B7
67C7 68C7
69C7 70C7
R9651
0
5%
1/20W
MF
0201
R9652
0
21
5%
1/20W
MF
0201
R9653
0
5%
1/20W
MF
0201
R9654
0
5%
1/20W
MF
0201
21
NOSTUFF
NOSTUFF
21
NOSTUFF
21
SSD0_S4E0_UART_TX
SSD0_S4E1_UART_TX
SSD0_S4E2_UART_TX
SSD0_S4E3_UART_TX
67C7
D
68C7
69C7
70C7
C
C
B
B
A
8
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
PAGE TITLE
A
SSD Support
DRAWING NUMBER
051-05198
Apple Inc.
REVISION
6.0.0
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
BOM_COST_GROUP=SSD
67
35 4
IV ALL RIGHTS RESERVED
2
BRANCH
evt-3
PAGE
96 OF 150
SHEET
72 OF 109
1
SIZE
D
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
D
C
C
B
B
A
8
A
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
PAGE TITLE
Display Mux
DRAWING NUMBER
051-05198
Apple Inc.
REVISION
6.0.0
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
BOM_COST_GROUP=GRAPHICS
67
35 4
IV ALL RIGHTS RESERVED
2
BRANCH
evt-3
PAGE
98 OF 150
SHEET
73 OF 109
1
SIZE
D
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
77B2 60D1
77B2 60C1
77C2 60C1
PMIC Buck0 - SoC VDD_CPU
PPVDDCPU_AWAKE
Sourced from 3V3 G3H
Enabled by
PPVDDCPU_AWAKE
MIN_LINE_WIDTH=0.4000
MIN_NECK_WIDTH=0.0900
VOLTAGE=1.06V
MAKE_BASE=TRUE
PPVDDCPU_AWAKE
PMIC Buck1 - SoC VDD_CPU_SRAM
PPVDDCPUSRAM_AWAKE
Sourced from 3V3 G3H
Enabled by
PPVDDCPUSRAM_AWAKE
MIN_LINE_WIDTH=0.4000
MIN_NECK_WIDTH=0.0900
VOLTAGE=1.06V
MAKE_BASE=TRUE
PPVDDCPUSRAM_AWAKE
PMIC Buck2 - SoC VDD_SOC
PP0V82_SLPDDR
Sourced from 3V3 G3H
Enabled by
PP0V82_SLPDDR
MIN_LINE_WIDTH=0.7000
MIN_NECK_WIDTH=0.0900
VOLTAGE=0.82V
MAKE_BASE=TRUE
PP0V82_SLPDDR
27D1
PMIC BUCK3 SW 4 - VDD1
PP1V8_S3
60A2
Sourced from PP1V8_SLPS2R
Enabled by
32D8 27D7
PP1V8_S3
MIN_LINE_WIDTH=0.1000
MIN_NECK_WIDTH=0.1000
VOLTAGE=1.8V
MAKE_BASE=TRUE
PP1V8_S3
PP1V8_S3
41C4
77D2
D
PMIC LDO0 - VDD_LOW
PP1V8_S3_MEM
41C4
PP1V8_S3_MEM
MIN_LINE_WIDTH=0.1000
MIN_NECK_WIDTH=0.0900
VOLTAGE=1.8V
MAKE_BASE=TRUE
77C2 61C2
PP1V8_S3_MEM
32D8 27B7
PP0V8_SLPS2R
Sourced from PP1V1_SLP2R
Enabled by
77B4 63B6 63A6 18D6 18C6 18B6
PMIC LDO1 - PCH VCCRTC
PP0V8_SLPS2R
MIN_LINE_WIDTH=0.1000
MIN_NECK_WIDTH=0.0900
VOLTAGE=1.06V
MAKE_BASE=TRUE
PP0V8_SLPS2R
28A7
C
77C2 60B1
81B4
PMIC BUCK3 - SoC AOP/SMC/VDD1
PP1V8_SLPS2R
Sourced from 3V3 G3H
Enabled by
PP1V8_SLPS2R
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
VOLTAGE=1.8V
MAKE_BASE=TRUE
PP1V8_SLPS2R
PP1V8_SLPS2R
PP1V8_SLPS2R
PP1V8_SLPS2R
PP1V8_SLPS2R
PP1V8_SLPS2R
PP1V8_SLPS2R
PP1V8_SLPS2R
PP1V8_SLPS2R
PP1V8_SLPS2R
PP1V8_SLPS2R
PP1V8_SLPS2R
PP1V8_SLPS2R
PP1V8_SLPS2R
PP1V8_SLPS2R
PP1V8_SLPS2R
PP1V8_SLPS2R
PP1V8_SLPS2R
PP1V8_SLPS2R
PMIC BUCK3 SW 1
19B3 71A7
60B3
64C6
61C7
31C4
62A7
49D6
31A8
29C7
29C7
29C7
29D7
53A7
52D1 36D3
36C8
36B3
32D4 32D3
64A8
33D2
77C2 60B1
81B8 32A7 23A7
77B2 61A4
77B2 60A1
PMIC Buck4 - SDRAM VDD2
PP1V1_SLPS2R
Sourced from 3V3_G3H
Enabled by
U7901 - VDDIO_DDR & PLL
PP1V1_SLPDDR
Sourced from
Enabled by
PMIC Buck5 - VDD_FIXED
PP0V9_SLPDDR
Sourced from 3V3_G3H
Enabled by
PP1V1_SLPS2R
MIN_LINE_WIDTH=0.5000
MIN_NECK_WIDTH=0.0900
VOLTAGE=1.1V
MAKE_BASE=TRUE
PP1V1_SLPS2R
PP1V1_SLPS2R
PP1V1_SLPS2R
PP1V1_SLPS2R
PP1V1_SLPDDR
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.0900
VOLTAGE=1.1V
MAKE_BASE=TRUE
PP1V1_SLPDDR
PP1V1_SLPDDR
PP1V1_SLPDDR
PP1V1_SLPDDR
PP0V9_SLPDDR
MIN_LINE_WIDTH=0.3000
MIN_NECK_WIDTH=0.0900
VOLTAGE=0.9V
MAKE_BASE=TRUE
PP0V9_SLPDDR
PP0V9_SLPDDR
PP0V9_SLPDDR
PP0V9_SLPDDR
PP0V9_SLPDDR
61A4
61C7
28D1
29B2
23B2
28D6
28D2
29A2
28C8
28B7
28B8
28B7
77B2 61C2
77B2 61C2
28B3 28A8 28A3
PP3V_G3H_RTC
61C2
Sourced from PP3V3_G3H
Enabled by
PMIC LDO2 - PCIE_REFBUF/PLL
PP1V2_AWAKE
Sourced from PP1V8_SLPS2R
Enabled by
PMIC V3P3 SW 1 - USB
PP3V3_AWAKE
Sourced from 3V3_G3H
Enabled by
PP3V_G3H_RTC
MIN_LINE_WIDTH=0.1000
MIN_NECK_WIDTH=0.0900
VOLTAGE=3V
MAKE_BASE=TRUE
PP3V_G3H_RTC
PP3V_G3H_RTC
PP1V2_AWAKE
MIN_LINE_WIDTH=0.1000
MIN_NECK_WIDTH=0.0900
VOLTAGE=1.2V
MAKE_BASE=TRUE
PP1V2_AWAKE
PP1V2_AWAKE
PP1V2_AWAKE
PP1V2_AWAKE
PP3V3_AWAKE
MIN_LINE_WIDTH=0.1000
MIN_NECK_WIDTH=0.0900
VOLTAGE=3.3V
MAKE_BASE=TRUE
PP3V3_AWAKE
77C2
29D3
29C2
29B2
29A3
11B8 8B1
29C2 29C1
C
B
77C2 60A2
81A4
64A6
PP1V8_AWAKE
Sourced from PP1V8_SLPS2R
Enabled by
U8270 - 3V3 Sensors
PP1V8_S4SW_SNS
Sourced from 1V8_SLPS2R
Enabled by SENSOR_PWR_EN
PP1V8_AWAKE
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=1.8V
MAKE_BASE=TRUE
PP1V8_AWAKE
PP1V8_AWAKE
PP1V8_AWAKE
PP1V8_AWAKE
PP1V8_AWAKE
PP1V8_AWAKE
PP1V8_AWAKE
PP1V8_AWAKE
PP1V8_AWAKE
PP1V8_AWAKE
PP1V8_S4SW_SNS
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=3.3V
MAKE_BASE=TRUE
PP1V8_S4SW_SNS
PP1V8_S4SW_SNS
PP1V8_S4SW_SNS
PP1V8_S4SW_SNS
38B8
38D7
62B7
31B8
29B7
29B8
29A7
29B7
29B6
31B4
51D8
77C2 60B8
77C2 60B8 60A6
38D7 38C7 38C3
PMIC Buck7 - VCCPRIM_CORE
PPVNN_PCH_EXT
32A7 31D6 31D5 31C6 26A7 23A7
Sourced from 3V3_G3H
Enabled by
PMIC Buck8
PP1P05_PCH_EXT
Sourced from 3V3_G3H
Enabled by
43C7 43B7 41D7 41D3 41C7 41C3 41B3 41A5
40D3 40C7 40C3 39D7 39D4 39C7 39B3 38B4 38A6 38A4
PPVNN_PCH_EXT
MIN_LINE_WIDTH=0.5000
MIN_NECK_WIDTH=0.0900
VOLTAGE=1.05V
MAKE_BASE=TRUE
PPVNN_PCH_EXT
PP1P05_PCH_EXT
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=1.05V
MAKE_BASE=TRUE
PP1P05_PCH_EXT
PMIC V3P3 SW 2 -
77C2 61C2
8B1 8A4
77D2 8B1 8A4
PP3V3_S5
Sourced from 3V3_G3H
Enabled by
PP3V3_S5
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=3.3V
MAKE_BASE=TRUE
PP3V3_S5
PP3V3_S5
PP3V3_S5
PP3V3_S5
PP3V3_S5
PP3V3_S5
PP3V3_S5
PP3V3_S5
PP3V3_S5
PP3V3_S5
PP3V3_S5
PP3V3_S5
PP3V3_S5
59D4
36D8
17D6
64C3
81D4
36B5
16A4
56B4
15B4 11B8 8B4
31C1 17C7 16A7
14A7 13A7 12B7 5B7
11C8 8A4
64B5 64A5
32C3 32B2
B
A
Digital Ground
GND
VOLTAGE=0V
MIN_LINE_WIDTH=0.0600
MIN_NECK_WIDTH=0.0700
8
SYNC_MASTER=myEE SYNC_DATE=03/01/2019
PAGE TITLE
A
Power Aliases - 1
DRAWING NUMBER
051-05198
Apple Inc.
REVISION
6.0.0
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
67
35 4
2
BRANCH
evt-3
PAGE
120 OF 150
SHEET
74 OF 109
1
SIZE
D
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
C
B
A
PBUS Rails
77D2
53D1
77C4
38A5
59D8
38C4
U7000 - PBUS
PPBUS_G3H
PPBUS_HS_CPU
38D8
79B6
PPVIN_S0_PRIM1V8
PPVIN_G3H_P5VG3S
38C8
PPVIN_G3H_P3V3G3H
38B8
PPVIN_G3H_P3V3G3HRTC
38B4
PPBUS_G3H_SSD0
38A8
PPBUS_G3H_SPKRAMP_LEFT
38A5
PPDCIN_G3H
5V Rails
77B2
58C8
58D5
41C8
43D8
41B8
U7600 - 5V G3S
PP5V_G3S
Sourced from PBus
Enabled by P5VG3S_EN
PP5V_G3S_CPUREG
PP5V_G3S_TPAD
PP5V_G3S_KBD
PP5V_G3S_ALSCAM
40A8
PPBUS_G3H
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=13.1V
MAKE_BASE=TRUE
PPBUS_G3H
PPBUS_G3H
PPBUS_G3H
PPBUS_G3H
PPBUS_G3H
PPBUS_G3H
PPBUS_G3H
PPBUS_G3H
PPBUS_G3H
PPBUS_G3H
PPBUS_G3H
PPBUS_G3H
PPBUS_HS_CPU
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.2500
VOLTAGE=13.1V
MAKE_BASE=TRUE
PPBUS_HS_CPU
PPBUS_HS_CPU
PPBUS_HS_CPU
PPBUS_HS_CPU
PPBUS_HS_CPU
PPVIN_S0_PRIM1V8
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=13.1V
MAKE_BASE=TRUE
PPVIN_G3H_P5VG3S
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=13.1V
MAKE_BASE=TRUE
PPVIN_G3H_P5VG3S
PPVIN_G3H_P3V3G3H
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=13.1V
MAKE_BASE=TRUE
PPVIN_G3H_P3V3G3H
PPVIN_G3H_P3V3G3HRTC
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=13.1V
MAKE_BASE=TRUE
PPVIN_G3H_P3V3G3HRTC
PPBUS_G3H_SSD0
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=13.1V
MAKE_BASE=TRUE
PPBUS_G3H_SSD0
PPBUS_G3H_SPKRAMP_LEFT
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=13.1V
MAKE_BASE=TRUE
PPBUS_G3H_SPKRAMP_LEFT
PPDCIN_G3H
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
VOLTAGE=20V
MAKE_BASE=TRUE
PP5V_G3S
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=5V
MAKE_BASE=TRUE
PP5V_G3S
PP5V_G3S
PP5V_G3S
PP5V_G3S
PP5V_G3S
PP5V_G3S
PP5V_G3S
PP5V_G3S
PP5V_G3S
PP5V_G3S
PP5V_G3S
PP5V_G3S_CPUREG
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=5V
MAKE_BASE=TRUE
PP5V_G3S_CPUREG
PP5V_G3S_CPUREG
PP5V_G3S_CPUREG
PP5V_G3S_TPAD
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=5V
MAKE_BASE=TRUE
PP5V_G3S_TPAD
PP5V_G3S_KBD
MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.1500
VOLTAGE=5V
MAKE_BASE=TRUE
PP5V_G3S_KBD
PP5V_G3S_ALSCAM
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=5V
MAKE_BASE=TRUE
PP5V_G3S_ALSCAM
5V Rails Continued
PP5V_S4SW
38B4
51C3 51C2
64B7
43A8
38B5
66D4
48D3 48C3 48A6
43D6
PP5V_S4SW_ISNS
PP5V_S0SW_LCD_ISNS_R
PP5V_S0SW_LCD
19C3
38C8
38C8
65D8
38D8
38A8
77A8
38D4
62A5
32B1
U7550 - 5V LDO - UNUSED
PP5V_S5_LDO
58D3
3V3 Rails
38A5
77B2 52B1
54D6
63D4
56D7 56D4
58D8
58D6
52B8
71D7
19C3 53B1 53D7 77C4 77D2 77D4
77B2 58D1 58B5
19C3 79A8
43D8
41C8
40A8
65C6 65B7
79D8 35C8
41C8
66D7
64B8
39A7
64D3
56D5
63D8
77B2 64D6
51D1
65B5
66D3
U6960 - 3V3_G3H_RTC
PP3V3_G3H_RTC
Sourced from PBus
55D8 55C8 55B8
43B8
47D3 47C3 47A6
43A8
Enabled by CHGR_EN_MVR
PP3V3_G3H_SSD0
PP3V3_G3H_RTC_MESA
U7660 - 3V3_G3H
PP3V3_G3H
PP3V3_G3H
61C1
Sourced from PBus
Enabled by PMU_VDDMAIN_EN
VOUT_RTC sourced from
PP3V3_G3H_RTC input to PMIC
77A5 44B7 44B6 44A7
PP3V3_G3H_PMU_VDDMAIN
41D8
PP3V3_G3H_DFR
39B8
55D8 55C8 55B8 54D3
U8200 - 3V3_G3S
PP3V3_G3S
Sourced from 3V3_G3H_RTC
Enabled by P3V3G3S_EN
PP5V_S4SW
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=5V
MAKE_BASE=TRUE
PP5V_S4SW
PP5V_S4SW_ISNS
MIN_LINE_WIDTH=0.6000
MIN_NECK_WIDTH=0.2000
VOLTAGE=5V
MAKE_BASE=TRUE
PP5V_S4SW_ISNS
PP5V_S0SW_LCD_ISNS_R
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=5V
MAKE_BASE=TRUE
PP5V_S0SW_LCD_ISNS_R
PP5V_S0SW_LCD
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=5V
MAKE_BASE=TRUE
PP5V_S5_LDO
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=5V
MAKE_BASE=TRUE
PP3V3_G3H_RTC
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.0550
VOLTAGE=3.3V
MAKE_BASE=TRUE
PP3V3_G3H_RTC
PP3V3_G3H_RTC
PP3V3_G3H_RTC
PP3V3_G3H_RTC
PP3V3_G3H_RTC
PP3V3_G3H_RTC
PP3V3_G3H_RTC
PP3V3_G3H_RTC
PP3V3_G3H_RTC
PP3V3_G3H_RTC
PP3V3_G3H_RTC
PP3V3_G3H_RTC
PP3V3_G3H_RTC
PP3V3_G3H_RTC
PP3V3_G3H_RTC
PP3V3_G3H_RTC
PP3V3_G3H_RTC
PP3V3_G3H_RTC
PP3V3_G3H_SSD0
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=3.3V
MAKE_BASE=TRUE
PP3V3_G3H_SSD0
PP3V3_G3H_RTC_MESA
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=3.3V
MAKE_BASE=TRUE
PP3V3_G3H_RTC_MESA
PP3V3_G3H
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=3.3V
MAKE_BASE=TRUE
PP3V3_G3H
PP3V3_G3H
PP3V3_G3H
PP3V3_G3H
PP3V3_G3H
PP3V3_G3H
PP3V3_G3H_PMU_VDDMAIN
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=3.3V
MAKE_BASE=TRUE
PP3V3_G3H_PMU_VDDMAIN
PP3V3_G3H_PMU_VDDMAIN
PP3V3_G3H_DFR
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=3.3V
MAKE_BASE=TRUE
PP3V3_G3H_DFR
PP3V3_G3S
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=3.3V
MAKE_BASE=TRUE
PP3V3_G3S
PP3V3_G3S
PP3V3_G3S
PP3V3_G3S
PP3V3_G3S
PP3V3_G3S
PP3V3_G3S
PP3V3_G3S
3V3 Rails Continued
PP3V3_S0_TBT_XT_ISNS_R
40C5
43A8
PP3V3_S0_TBT_WR_ISNS_R
40B5
41B8 36C4
43D6
66B3 77C2 77D5 79B7
19B3
61B6
64D6
61C7
61C7
64C8
64D8
52C4
52D2
62B7
52D1
66D5 66C8
43B8
43B8
81B7
40B5
16D3
50D8 50D6
77C2 8B1
33B8 33A8
33D2 33C8
63B1
41D8
40C5
79D8
63C6
39B8
64D5 16C2
31B6 16C7 13D8 10B3 8C7 8A5 6D6
79B8
40D8
34D6
40B8
39A8
79C8
66B6
65B7
77D2 64A2 54B3
60D8
61D7
PP1V05_S0SW_VCCSTG
64C4
35C8 35C5
77D2 64B1
U8305 - 3V3_TBT_X_S0
Sourced from 3V3_G3H
Enabled by TBT_PWR_EN
U8303 - 3V3_TBT_T_S0
Sourced from 3V3_G3H
Enabled by TBT_PWR_EN
U8321 - 3V3_TBT_W_S0
Sourced from 3V3_G3H_RTC
Enabled by TBT_PWR_EN
U8331 - 3V3_TBT_R_S0
Sourced from 3V3_G3H_RTC
Enabled by TBT_PWR_EN
79B8 46D4 46C6
CPU/PCH Rails
U7100, U7210, U7220 (IMVP9) - VCCIN
PPVCCIN_S0_CPU
55D1
PCH VCC1P05 -> CPU VCCSTG / VCCST SW
PP1V05_PCH_OUT_FET
71C8 71C6 71A8
PCH VCC1P05 OUT PLL -> CPU VCCPLL
8C4
10C3
77D2
U8255 - CPU VCCSTG
Sourced from VCC1P05
Enabled by CPU_C10_GATE_L
U8207 - VCCPLL OC SW
PP1V1_S0SW
Sourced from PP1V2_S3
Enabled by CPU_C10_GATE_L
77D2 64D1 10C3 8C4
U5000 - 1V05 PRIM PCH
77D2 11D8 8B4
51D5 51C4 51C2 51B5 51B2
Removed due to USBC block
Sourced from PBus
Enabled by CPU_VR_EN
Sourced from VCC1P05
Enabled by CPU_C10_GATE_L
PP1V05_S0_CPU_VCCPLL
U7400 - VCCINAUX
PPVCCIN_AUX_PCH_PRIM
56D1
U8350 - VCCST
PP1V05_S0_CPU_VCCST
&& PVCCPLLOC_EN
U8310 - VCCA
PP1V05_PRIM_OUT_PCH
8B1
77D2
PPVCCIO_OUT
PP1V8_S0SW
PP3V3_S0_TBT_XT_ISNS_R
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0700
VOLTAGE=3.3V
MAKE_BASE=TRUE
PP3V3_S0_TBT_WR_ISNS_R
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=3.3V
MAKE_BASE=TRUE
PPVCCIN_S0_CPU
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=1.5V
MAKE_BASE=TRUE
PPVCCIN_S0_CPU
PPVCCIN_S0_CPU
PP1V05_PCH_OUT_FET
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=1.05V
MAKE_BASE=TRUE
PP1V05_PCH_OUT_FET
PP1V05_PCH_OUT_FET
PP1V05_S0_CPU_VCCPLL
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=1.05V
MAKE_BASE=TRUE
PPVCCIN_AUX_PCH_PRIM
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=1.8V
MAKE_BASE=TRUE
PPVCCIN_AUX_PCH_PRIM
PPVCCIN_AUX_PCH_PRIM
PP1V05_S0_CPU_VCCST
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=1.05V
MAKE_BASE=TRUE
PP1V05_S0_CPU_VCCST
PP1V05_S0SW_VCCSTG
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=1.05V
MAKE_BASE=TRUE
PP1V05_S0SW_VCCSTG
PP1V1_S0SW
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=1.1V
MAKE_BASE=TRUE
PP1V1_S0SW
PP1V8_S0SW
MIN_LINE_WIDTH=0.7000
MIN_NECK_WIDTH=0.0750
VOLTAGE=1.8V
MAKE_BASE=TRUE
PP1V05_PRIM_OUT_PCH
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=1.05V
MAKE_BASE=TRUE
PPVCCIO_OUT
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=1.0V
MAKE_BASE=TRUE
PPVCCIO_OUT
PPVCCIO_OUT
79C8 39A8
19B3
40B8
40D8
77B2 64C6
39A4
77C2 59C1
10D8
15D5
64C6 64A4
11D6
77D2 77B4 63D7 63D1
31D2
10C3 8C4
77D2 10B3 8C7
39B8
63B1
3V3 Rails Continued
PP3V3_G3S_WLANBT
PP3V3_G3S_TPAD
PP3V3_G3S_KBD
1V8 Rails
U8220 - 1V8_G3S
PP1V8_G3S
Sourced from 1V8 SLEEPS2R
Enabled by P1V8G3S_EN
PP1V8_G3S_WLANBT
U7700 - 1V8_S5
PP1V8_S5
80D8 79D6 77D2 40B4 8D7
80D8 79C6 77D2 40A5 16D2 8D4
Memory Rails
U8100 - VDD2
PP1V1_S3
Sourced from PBUS
Enabled by PVDDQ_EN
PP1V1_S3_CPU
PP0V6_S3
SYNC_MASTER=myEE SYNC_DATE=03/01/2019
PAGE TITLE
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
15C7 6B7
15D4
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PP3V3_G3S_WLANBT
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=3.3V
MAKE_BASE=TRUE
PP3V3_G3S_WLANBT
PP3V3_G3S_TPAD
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=3.3V
MAKE_BASE=TRUE
PP3V3_G3S_TPAD
PP3V3_G3S_KBD
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=3.3V
MAKE_BASE=TRUE
PP3V3_G3S_KBD
PP1V8_G3S
MIN_LINE_WIDTH=0.1000
MIN_NECK_WIDTH=0.2000
VOLTAGE=1.8V
MAKE_BASE=TRUE
PP1V8_G3S
PP1V8_G3S
PP1V8_G3S
PP1V8_G3S
PP1V8_G3S
PP1V8_G3S
PP1V8_G3S
PP1V8_G3S
PP1V8_G3S
PP1V8_G3S
PP1V8_G3S
PP1V8_G3S
PP1V8_G3S
PP1V8_G3S
PP1V8_G3S
PP1V8_G3S
PP1V8_G3S
PP1V8_G3S
PP1V8_G3S_WLANBT
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=1.8V
MAKE_BASE=TRUE
PP1V8_G3S_WLANBT
PP1V8_G3S_WLANBT
PP1V8_G3S_WLANBT
PP1V8_S5
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=1.8V
MAKE_BASE=TRUE
PP1V8_S5
PP1V8_S5
PP1V8_S5
PP1V8_S5
PP1V8_S5
PP1V8_S5
PP1V8_S5
PP1V8_S5
PP1V8_S5
PP1V8_S5
PP1V8_S5
PP1V8_S5
PP1V8_S5
PP1V8_S5
PP1V8_S5
PP1V8_S5
PP1V8_S5
PP1V8_S5
PP1V8_S5
PP1V1_S3
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=1.1V
MAKE_BASE=TRUE
PP1V1_S3
PP1V1_S3
PP1V1_S3
PP1V1_S3_CPU
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=1.1V
MAKE_BASE=TRUE
PP1V1_S3_CPU
PP1V1_S3_CPU
PP0V6_S3
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
VOLTAGE=0.6V
MAKE_BASE=TRUE
PP0V6_S3
Power Aliases - 1
DRAWING NUMBER
051-05198
Apple Inc.
REVISION
BRANCH
PAGE
SHEET
79C7
64D4
46D7
49C5
37B8
37D8
37D8
58B6
34D6
51C7
39B4
48D7
33B2
36C6
50D8
21D3
21C6
21B8
21C2
20C6
20D5
56D7
59D3
8B1
79A6
11C8
8B4
17B7
12A7
14A7
24A8
16B3
21C2
62B7
17D8
36D6
36B8
31D4
64C4
79C8
42B6
42D5
36C2
31B4
15C7
15B3
15B4
31A6
64D3
64B5
64D1
8B1
64C1
39C8
8D7 7B1
10D4
SIZE
6.0.0
evt-3
121 OF 150
75 OF 109
21D3 21A7
77B4 21D6
77A8 51D2
77B8 77B7
50B8 50A5
50D4 50C8
46C7 46C2
44D6 44D4
66A3 37C6
34C6 34A8
49D3 49C3
51B7 51B3
51C3
48C7 48A5
47C7 47A5
47D7 47D2
48D2
17C4 17B4
50D4 50D2
50B5 50B2
50C8 50C6
77B4
80C8
63C2 63A8
18C6 18B6
63A5 18D6
80B8 79B6
79C4 77B4
79C6 77B4
18C6 18B6
63A6 18D6
D
D
C
54D3
11C5
B
A
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
C
B
A
Unused SoC Signals
NC_ALTIMETER_INT
24D6
NC_DISP_GCON_INT_L
24B3
NC_DFR_TOUCH_RSVD
25B3
NC_ENET_LOW_PWR
24C6
NC_ENET_MEDIA_SENSE
24C6
NC_ENET_RESET_L
26C3
NC_FTCAM_CLK12M_R
25D3
NC_FTCAM_RESET_L
25D3
NC_GNSS_DEV_WAKE
23D6
NC_GNSS_HOST_TIME
23D6
NC_I2S_CODEC_MCLK
25A3
NC_I2S_CODEC1_MCLK
25A3
NC_I2S_CODEC1_R2D_R
25A3
NC_I2S_HAWKING_BCLK_R
25A3
NC_I2S_HAWKING_D2R
25A3
NC_I2S_HAWKING_LRCLK
25A3
NC_MESA_MENUKEY_L
24C3
NC_PCC_EVENT
24B3
NC_SOC_PCH_GCON_INT_L
24B3
NC_PCIE_CLK100M_ENET_N
26C3
NC_PCIE_CLK100M_ENET_P
26C3
NC_PCIE_CLK100M_SSD1_01_N
26A3
NC_PCIE_CLK100M_SSD1_01_P
26B3
NC_PCIE_CLK100M_SSD1_23_N
26A3
NC_PCIE_CLK100M_SSD1_23_P
26A3
NC_PCIE_CLK100M_WLAN_N
26C3
NC_PCIE_CLK100M_WLAN_P
26D3
NC_PCIE_ENET_D2R_N
26D3
NC_PCIE_ENET_D2R_P
26D3
NC_PCIE_ENET_R2D_C_N
26D3
NC_PCIE_ENET_R2D_C_P
26D3
NC_PCIE_SSD1_D2R_N<3..0>
26B3
NC_PCIE_SSD1_D2R_P<3..0>
26B3
NC_PCIE_SSD1_R2D_C_N<3..0>
26B3
NC_PCIE_SSD1_R2D_C_P<3..0>
26B3
NC_PCIE_WLAN_D2R_N
26D3
NC_PCIE_WLAN_D2R_P
26D3
NC_PCIE_WLAN_R2D_C_N
26D3
NC_PCIE_WLAN_R2D_C_P
26D3
NC_PCIEDN_WAKE_L
24C6
NC_PLCAM_PROX_INT_L
24D3
NC_PLCAM_ROMEO_B2B_DETECT
24D3
NC_PLCAM_RX_CLK12M_R
25D3
NC_PLCAM_RX_RESET_L
25D3
NC_PLCAM_TX_CLK12M_R
25D3
NC_PLCAM_TX_INT
25D3
NC_PLCAM_TX_RESET_L
25D3
NC_PLCAM_TX_THROTTLE
23D6
NC_SDCONN_STATE_CHANGE_L
24C6
NC_SMC_GFX_SELF_THROTTLE
24C6
NC_SMC_LED_ONEWIRE
24A3
NC_SMC_TOPBLK_SWP_L
24C6
NC_SPI_ALTIMETER_CS_L
24D6
NC_SSD1_CLK24M_R
26A3
NC_SSD1_CLKREQ0_L
26A3
NC_SSD1_CLKREQ1_L
26A3
NC_SSD1_CLKREQ2_L
26A3
NC_SSD1_CLKREQ3_L
26A3
NC_SSD1_PCIE_RESET_L
26A3
NC_SSD1_SWCLK_UART_R2D
24A3
NC_SSD1_SWDIO_UART_D2R
24A3
NC_PCHROM_SW_EN
25B3
NC_PCIE_DN2_R2D_CP
26D3
NC_PCIE_DN2_R2D_CN
26D3
NC_PCIE_DN2_D2RP
26D3
NC_PCIE_DN2_D2RN
26D3
NC_PCIE_DN3_R2D_CP
26D3
NC_PCIE_DN3_R2D_CN
26D3
NC_PCIE_DN3_D2RP
26D3
NC_PCIE_DN3_D2RN
26D3
NC_PCIE_CLK100M_DN2P
26C3
NC_PCIE_CLK100M_DN2N
26C3
NC_PCIEDN2_CLKREQ_L
26C3
NC_PCIEDN2_RESET_L
26C3
NC_PCIE_CLK100M_DN3P
26C3
NC_PCIE_CLK100M_DN3N
26C3
NC_PCIEDN3_CLKREQ_L
26C3
NC_PCIEDN3_RESET_L
26C3
NC_SOC_USB_ID
23B6
NC_SOC_VDDSOC_SENSE
27A3
NC_SOC_VSSCPU_SENSE
27C3
NC_SOC_VSSSOC_SENSE
27A3
NC_TPAD_VIBE_L
24B3
NC_UART_GNSS_D2R_CTS_L
25A6
NC_UART_GNSS_R2D_RTS_L
25A6
NC_WLAN_CLKREQ_L
26C3
NC_WLAN_DEV_WAKE
23C6
NC_WLAN_PERST_L
26C3
NC_SWD_WLAN_SWDIO
24C3
NC_SWD_WLAN_SWDCLK
24C3
NC_UART_BT_D2R
25B6
NC_UART_BT_R2D
25B6
NC_UART_BT_D2R_CTS_L
25B6
NC_UART_BT_R2D_RTS_L
25B6
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
NC_ALTIMETER_INT
NC_DISP_GCON_INT_L
NC_DFR_TOUCH_RSVD
NC_ENET_LOW_PWR
NC_ENET_MEDIA_SENSE
NC_ENET_RESET_L
NC_FTCAM_CLK12M_R
NC_FTCAM_RESET_L
NC_GNSS_DEV_WAKE
NC_GNSS_HOST_TIME
NC_I2S_CODEC_MCLK
NC_I2S_CODEC1_MCLK
NC_I2S_CODEC1_R2D_R
NC_I2S_HAWKING_BCLK_R
NC_I2S_HAWKING_D2R
NC_I2S_HAWKING_LRCLK
NC_MESA_MENUKEY_L
NC_PCC_EVENT
NC_SOC_PCH_GCON_INT_L
NC_PCIE_CLK100M_ENET_N
NC_PCIE_CLK100M_ENET_P
NC_PCIE_CLK100M_SSD1_01_N
NC_PCIE_CLK100M_SSD1_01_P
NC_PCIE_CLK100M_SSD1_23_N
NC_PCIE_CLK100M_SSD1_23_P
NC_PCIE_CLK100M_WLAN_N
NC_PCIE_CLK100M_WLAN_P
NC_PCIE_ENET_D2R_N
NC_PCIE_ENET_D2R_P
NC_PCIE_ENET_R2D_C_N
NC_PCIE_ENET_R2D_C_P
NC_PCIE_SSD1_D2R_N<3..0>
NC_PCIE_SSD1_D2R_P<3..0>
NC_PCIE_SSD1_R2D_C_N<3..0>
NC_PCIE_SSD1_R2D_C_P<3..0>
NC_PCIE_WLAN_D2R_N
NC_PCIE_WLAN_D2R_P
NC_PCIE_WLAN_R2D_C_N
NC_PCIE_WLAN_R2D_C_P
NC_PCIEDN_WAKE_L
NC_PLCAM_PROX_INT_L
NC_PLCAM_ROMEO_B2B_DETECT
NC_PLCAM_RX_CLK12M_R
NC_PLCAM_RX_RESET_L
NC_PLCAM_TX_CLK12M_R
NC_PLCAM_TX_INT
NC_PLCAM_TX_RESET_L
NC_PLCAM_TX_THROTTLE
NC_SDCONN_STATE_CHANGE_L
NC_SMC_GFX_SELF_THROTTLE
NC_SMC_LED_ONEWIRE
NC_SMC_TOPBLK_SWP_L
NC_SPI_ALTIMETER_CS_L
NC_SSD1_CLK24M_R
NC_SSD1_CLKREQ0_L
NC_SSD1_CLKREQ1_L
NC_SSD1_CLKREQ2_L
NC_SSD1_CLKREQ3_L
NC_SSD1_PCIE_RESET_L
NC_SSD1_SWCLK_UART_R2D
NC_SSD1_SWDIO_UART_D2R
NC_PCHROM_SW_EN
NC_PCIE_DN2_R2D_CP
NC_PCIE_DN2_R2D_CN
NC_PCIE_DN2_D2RP
NC_PCIE_DN2_D2RN
NC_PCIE_DN3_R2D_CP
NC_PCIE_DN3_R2D_CN
NC_PCIE_DN3_D2RP
NC_PCIE_DN3_D2RN
NC_PCIE_CLK100M_DN2P
NC_PCIE_CLK100M_DN2N
NC_PCIEDN2_CLKREQ_L
NC_PCIEDN2_RESET_L
NC_PCIE_CLK100M_DN3P
NC_PCIE_CLK100M_DN3N
NC_PCIEDN3_CLKREQ_L
NC_PCIEDN3_RESET_L
NC_SOC_USB_ID
NC_SOC_VDDSOC_SENSE
NC_SOC_VSSCPU_SENSE
NC_SOC_VSSSOC_SENSE
NC_TPAD_VIBE_L
NC_UART_GNSS_D2R_CTS_L
NC_UART_GNSS_R2D_RTS_L
NC_WLAN_CLKREQ_L
NC_WLAN_DEV_WAKE
NC_WLAN_PERST_L
NC_SWD_WLAN_SWDIO
NC_SWD_WLAN_SWDCLK
NC_UART_BT_D2R
NC_UART_BT_R2D
NC_UART_BT_D2R_CTS_L
NC_UART_BT_R2D_RTS_L
77B2 24D3
77C4 25B6
77C4 25B6
23C3
23C3
25D6
25D6
25D6
25D6
25D6
25D6
25D6
25D6
53A4
62D6
62B3
62B3
62B3
62B3
62D6
62C3
62C3
62D6
60A2
60A2
60A2
60A2
62B3
62C3
62C3
TP SoC Signals
TP_SMC_FIXTURE_MODE_L
TP_SOC_DEBUGPRT_RX
TP_SOC_DEBUGPRT_TX
TEST_SOC_AMUXOUT
TEST_SOC_TST_CLKOUT
SoC Aliases
GND
GND
GND
GND
GND
GND
GND
GND
Unused PMIC Signals
NC_CHGR_AUX_OK
NC_GPU_THRMTRIP
NC_PVCCEOPIO_EDRAM_PGOOD
NC_NAND_RESET_L_SD_PWR_EN
NC_NAND_WP_L_ENET_PWR_EN
NC_PEARL_PWREN_P2V7NAND_EN
NC_PMU_CLK32K_GNSS_R
NC_P3V3G3W_EN
NC_P3V3G3W_PGOOD
NC_PMU_CLK32K
NC_PPBUCK8_SW1
NC_PPBUCK8_SW2
NC_PPBUCK3_SW3
NC_PPBUCK3_SW5
PMIC Aliases
UVP_DIS_L
GND
GND
used SoC Signals
SE_HOST_WAKE_R
24D6
MAKE_BASE=TRUE
Unused SoC Signals cont'd
NC_TBT_WAKE_L
24B3
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
TP_SMC_FIXTURE_MODE_L
TP_SOC_DEBUGPRT_RX
TP_SOC_DEBUGPRT_TX
TEST_SOC_AMUXOUT
TEST_SOC_TST_CLKOUT
NC_CHGR_AUX_OK
NC_GPU_THRMTRIP
NC_PVCCEOPIO_EDRAM_PGOOD
NC_NAND_RESET_L_SD_PWR_EN
NC_NAND_WP_L_ENET_PWR_EN
NC_PEARL_PWREN_P2V7NAND_EN
NC_PMU_CLK32K_GNSS_R
NC_P3V3G3W_EN
NC_P3V3G3W_PGOOD
NC_PMU_CLK32K
NC_PPBUCK8_SW1
NC_PPBUCK8_SW2
NC_PPBUCK3_SW3
NC_PPBUCK3_SW5
UVP_DIS_L
SE_HOST_WAKE_R
NC_TBT_WAKE_L
34C6
78C4
78B4
32C3
12C2
12C2
12C2
12C2
12C2
12C2
12C2
12B5
12B5
12B5
12B5
12C5
12C5
12C5
12C5
12C5
12C5
12C5
6B3
6A3
6A3
6B3
6B3
6B3
6B3
6A3
6B3
6B3
6B3
6B3
6B3
6A3
6B3
78A8 14C6
78A6 14C6
78A8 14C6
78A6 14C6
78A8 14D3
78A6 14D3
78A8 14D3
78A6 14D3
52D3
TP points with NO_TEST=1
NC_TP_PCH_GPP_R6
NC_TP_PCH_GPP_R5
NC_TP_PCH_GPP_H5
NC_TP_PCH_GPP_H22
NC_TP_PCH_GPP_H21
NC_TP_PCH_GPP_H19
NC_TP_PCH_GPP_H18
NC_TP_PCH_GPP_E23
NC_TP_PCH_GPP_E22
NC_TP_PCH_GPP_E21
NC_TP_PCH_GPP_E20
NC_TP_PCH_GPP_D20
NC_TP_PCH_GPP_D19
NC_TP_PCH_GPP_C9
NC_TP_PCH_GPP_C8
NC_TP_PCH_GPP_C10
NC_TP_PCH_GPP_A19
NC_TP_PCH_GPP_A11
NC_TP_CPU_RSVD_DJ9
NC_TP_CPU_RSVD_DJ46
NC_TP_CPU_RSVD_DJ45
NC_TP_CPU_RSVD_DH9
NC_TP_CPU_RSVD_DH20
NC_TP_CPU_RSVD_DD1
NC_TP_CPU_RSVD_DC1
NC_TP_CPU_RSVD_CV10
NC_TP_CPU_RSVD_CP33
NC_TP_CPU_RSVD_CN32
NC_TP_CPU_RSVD_BM2
NC_TP_CPU_RSVD_AW1
NC_TP_CPU_RSVD_AV1
NC_TP_CPU_RSVD_CR32
NC_TP_CPU_RSVD_BL2
USB3_EXTC_R2D_C_P
USB3_EXTC_R2D_C_N
USB3_EXTC_D2R_P
USB3_EXTC_D2R_N
USB_FIXT1_P
USB_FIXT1_N
USB_FIXT2_P
USB_FIXT2_N
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NO_TEST=1
MAKE_BASE=TRUE
NC_TP_PCH_GPP_R6
NC_TP_PCH_GPP_R5
NC_TP_PCH_GPP_H5
NC_TP_PCH_GPP_H22
NC_TP_PCH_GPP_H21
NC_TP_PCH_GPP_H19
NC_TP_PCH_GPP_H18
NC_TP_PCH_GPP_E23
NC_TP_PCH_GPP_E22
NC_TP_PCH_GPP_E21
NC_TP_PCH_GPP_E20
NC_TP_PCH_GPP_D20
NC_TP_PCH_GPP_D19
NC_TP_PCH_GPP_C9
NC_TP_PCH_GPP_C8
NC_TP_PCH_GPP_C10
NC_TP_PCH_GPP_A19
NC_TP_PCH_GPP_A11
NC_TP_CPU_RSVD_DJ9
NC_TP_CPU_RSVD_DJ46
NC_TP_CPU_RSVD_DJ45
NC_TP_CPU_RSVD_DH9
NC_TP_CPU_RSVD_DH20
NC_TP_CPU_RSVD_DD1
NC_TP_CPU_RSVD_DC1
NC_TP_CPU_RSVD_CV10
NC_TP_CPU_RSVD_CP33
NC_TP_CPU_RSVD_CN32
NC_TP_CPU_RSVD_BM2
NC_TP_CPU_RSVD_AW1
NC_TP_CPU_RSVD_AV1
NC_TP_CPU_RSVD_CR32
NC_TP_CPU_RSVD_BL2
USB3_EXTC_R2D_C_P
USB3_EXTC_R2D_C_N
USB3_EXTC_D2R_P
USB3_EXTC_D2R_N
USB_FIXT1_P
USB_FIXT1_N
USB_FIXT2_P
USB_FIXT2_N
NC nets with test points
TP_BMON_IOUT
MAKE_BASE=TRUE
SYNC_MASTER=myEE SYNC_DATE=03/01/2019
PAGE TITLE
TP_BMON_IOUT
Signal Aliases
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
122 OF 150
SHEET
76 OF 109
D
C
B
A
SIZE
D
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
C
B
A
35C4
25D3
35B7
35C7
35C7
35D6
77D8
35D6
77C8
25D3
35D4
23C6
35D4
25D3
35B7
35C4
35D3
78C5
35D3
78C5
35D3
78D5
35D3
78D5
35C2
37A6
35C2
37A6
35B7
35D7
25B3
35D7
32B6
35D7
35C7
37A6
35C7
37A6
77D8
35D6
35B7
35C6
37B8
79D8
35D5
35B7
32B8
35D5
32B6
35C5
32B6
35B7
25C3
35C5
35D7
35D5
77C8
35D5
77C8
50C2 50C3 50D8
50C2 50C3 50D8
50C2 50C3 50D8
50C2 50C4 50D5
50A7 50C2 50C4
50A6 50C2 50C3
50A6 50C2 50C3
50A6 50B4 50C2
50B4 50B5 50C2
50B3 50B5 50C2
50B3 50B6 50C2
50A7 50B3 50D2
50A5 50B8 50C8
50D4 75D1 77B7
50A8 50D6 51D3
50B8 50D6 51D3
77A8
50A8 50D6 51D3
50C6 52C4 62A6
62C3 81D5 81D7
50B6 50D6
50B6 50D6
50B6 50D6
50A5
50A4 50A8
50A6 50A8
50A6 50A8
50A6 50D4
50D3
50B8 50D6
51D3 77B8
51B4 51D3
51C4 51D3
51D2 75D1
51D2
51C2 51C3
51C2 51C3
75D7
51D2 51D4
51A4 51D2
51D2 51D5
51D2 51D4
51C4 51D2
51C2 51D1
51B1 51D2
32B6 51B3
51D2
32D2 35D8
51D2 77A4
Functional Test Points
J5110 - DFR Display Connector
DFR_DISP_VSYNC
IN
DFR_DISP_TE
IN
DFR_DISP_INT
IN
DFR_DISP_RESET_L
IN
PP3V3_G3HSW_DFR
IN
MIPI_DFR_CLK_FILT_CONN_P
IN
MIPI_DFR_CLK_FILT_CONN_N
IN
MIPI_DFR_DATA_FILT_CONN_P
IN
MIPI_DFR_DATA_FILT_CONN_N
IN
PP1V8_DFR
IN
I2C_DFR_SCL_R
IN
I2C_DFR_SDA_R
IN
GND
7 TPs
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
J5100 - DFR Touch Connector
DFR_TOUCH_LID_OPEN_L
IN
SPI_DFR_CS_L
IN
SPI_DFR_MOSI
IN
I2C_DFR_SCL_R
IN
I2C_DFR_SDA_R
IN
DFR_TOUCH_RESET_L
IN
PP1V8_DFR
IN
PP5V_G3S_DFR_FILT
IN
DFR_DISP_VSYNC
IN
SPI_DFR_MISO_R
IN
SPI_DFR_CLK
IN
DFR_TOUCH_INT_L
IN
DFR_TOUCH_CLK32K_RESET_L
IN
TP_DFR_TOUCH_GPIO2
IN
TP_DFR_TOUCH_PANEL_DETECT
IN
TP_DFR_TOUCH_PANEL_DETECT
IN
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
GND
6 TPs
FUNC_TEST=TRUE
J6700 - Keyboard Connector
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
KBD_CONTROL_KEY
KBD_LEFT_OPTION_KEY
KBD_RIGHT_SHIFT_KEY
PP3V3_G3H_RSLOC
KBD_CAP_CATHODE
KBD_DRIVE_Y0
KBD_DRIVE_Y6
KBD_DRIVE_Y5
KBD_SENSE_X8
KBD_SENSE_X7
KBD_SENSE_X6
KBD_ID1
PP3V3_G3S_KBD
I2C_KBD_SDA
KBD_INT_L
I2C_KBD_SCL
PMU_RSLOC_RST_L
KBD_RIGHT_SHIFT_L
KBD_LEFT_OPTION_L
KBD_CONTROL_L
CAPSLOCK_LED_EN
KBD_CAPSLOCK_LED
KBD_ID_DETECT1
HW_ID1
EEPROM_WC_L
WC_L
GND
6 TPs
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
J6701 - Trackpad Connector
KBD_INT_L
IN
I2C_TPAD_3V3_SDA
IN
I2C_TPAD_3V3_SCL
IN
PP3V3_G3S_TPAD
IN
PP5V_G3S_TPAD_CONN
IN
ACT_GND
IN
PPBUS_G3H
IN
SPI_TPAD_3V3_CLK
IN
TPAD_3V3_SPI_EN
IN
SPI_TPAD_3V3_MISO
IN
SPI_TPAD_3V3_CS_L
IN
SPI_TPAD_3V3_MOSI
IN
TPAD_3V3_SPI_INT_L
IN
TPAD_3V3_ACTUATOR_DISABLE_L
IN
TPAD_KBD_WAKE_L
IN
IPD_LID_OPEN
IN
GND
6 TPs
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
3 TPs
2 TPs
2 TPs
1 TPs
2 TPs
1 TPs
1 TPs
8 TPs
8 TPs
48D3
48C3
25B6 48C3
33B3 33D6
33D4 33D6
33C6 33D4
33A4 33D4
33D4 33D6
33C4 33D6
77B2
33D4 33D6
33C3 33D4
32B6 49C6
49C6 49D3
49C6
49C3 49C6
47D3
47C3
25B6 47C3
47B3
47B3
50A4 50B5 50C2
50A3 50C6 50D2
50A3 50B5 50D2
50A4 50B5 50D2
50B2 50C6 50D2
50B1 50C6 50D2
50A1 50C6 50D2
50A1 50C6 50D2
50A2 50C6 50D2
50A6 50B2 50D2 50A6 50B3 50C2
50A6 50B1 50D2
50A6 50B1 50D2
50A6 50B1 50D2
50A5 50B8 50C8 50D4 75D1 77B8
48B3
48B3
49B2 49B5
49B2 49B5
49B2 49B5
49B5
49A5
49A5
49A5
49A5
49A5
52D5 53C1 77C4
77D2
52D3 77D2
52D3
52D3
38D4 39B3 62B3 64A8 64B8
J4900 - Mesa Connector
IN
IN
IN
IN
IN
IN
IN
IN
IN
PP3V0_MESA_FILT_CONN
SPI_MESA_MISO_CONN
MESA_INT_CONN
MESA_BOOST_EN_CONN
PP1V8_MESA_FILT_CONN
SPI_MESA_MOSI_CONN
PMU_ONOFF_R_L_CONN
SPI_MESA_CLK_CONN
PP16V0_MESA_FILT_CONN
GND
2 TPs
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
2 TPs
1 TPs
1 TPs
J6640 - MIC Connector
IN
IN
IN
IN
IN
IN
IN
IN
PDM_DMIC_CLK0
AUD_DMIC0_DATA_CONN
PP1V8_DMIC
PDM_DMIC_CLK1
AUD_DMIC1_DATA_CONN
GND
2 TPs
J6400 - Left Tweeter Connector
SPKRCONN_LT_OUTP
FUNC_TEST=TRUE
SPKRCONN_LT_OUTN
SPKR_ID0
GND
2 TPs
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
1 TPs
J6450 - Left Woofer Connector
IN
IN
SPKRCONN_LW_OUTP
SPKRCONN_LW_OUTN
GND
2 TPs
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
J6700 - Keyboard Connector Cont'd
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
KBD_SENSE_X10
KBD_SENSE_X11
KBD_SENSE_X4
KBD_SENSE_X12
KBD_SENSE_X9
KBD_SENSE_X3
KBD_SENSE_X5
KBD_SENSE_X2
KBD_SENSE_X1
KBD_SENSE_X0
KBD_DRIVE_Y4KBD_DRIVE_Y7
KBD_DRIVE_Y3
KBD_DRIVE_Y1
KBD_DRIVE_Y2
PP3V3_G3S_KBD
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
J6500 - Right Tweeter Connector
IN
IN
IN
SPKRCONN_RT_OUTP
SPKRCONN_RT_OUTN
SPKR_ID1
GND
2 TPs
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
J6550 - Right Woofer Connector
IN
IN
SPKRCONN_RW_OUTP
SPKRCONN_RW_OUTN
GND
2 TPs
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
J6600 - Audio Jack Connector
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
AUD_CONN_HP_LEFT
AUD_CONN_HP_RIGHT
AUD_CONN_RING2
AUD_CONN_SLEEVE
AUD_CONN_HP_SENSE_L
AUD_CONN_HP_SENSE_R
AUD_CONN_TIP_SENSE
AUD_CONN_RING_SENSE
AUD_CONN_SLEEVE_XW
AUD_CONN_RING2_XW
GND
4 TPs
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
4 TPs
4 TPs
J6950 - Battery Connector
IN
PPVBAT_G3H_CONN
GND
8 TPs
FUNC_TEST=TRUE
FUNC_TEST=TRUE
J6951 - Battery Sense Connector
IN
IN
IN
IN
SYS_DETECT_L
SMBUS_3V3_BATT_SCL
SMBUS_3V3_BATT_SDA
SENSOR_PWR_EN
GND
1 TPs
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
8 TPs
J8500 - eDP Connector
65A3 65D1 66A7 66C3
77B4
66A3 66B1
66A3 66B1
37B6 66B1
37B6 66B1
36D3 66B1
36D3 66B1
65A7 66B1
65A7 66C1
17D2 66C1
66C1
32C5 66C1
66C1 66C5
36D4 66A7 66C1 66C3 77C2 79B7
66B3 75D5 77C2 79B7
66B1 66D1 79B8
66B3 66D1 78C5
66B3 66D1 78C5
66B3 66D1 78C5
66B3 66D1 78C5
66B3 66B6
66B3 66B6
66B3 66B6
66B6 66C3
66B6 66C3
66B6 66C3
66A7 66B6 66C3
66A7 66B6 66C3
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
PPVOUT_S0_LCDBKLT
I2C_FTCAM_ISOL_SCL
I2C_FTCAM_ISOL_SDA
I2C_ALS_SCL
I2C_ALS_SDA
I2C_TCON_SCL
I2C_TCON_SDA
I2C_BKLT_SCL
I2C_BKLT_SDA
BKLT_PWM_MLB2TCON
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
TP_LCD_IRQ_L
DP_INT_HPD
EDP_PANEL_PWR_BUF_EN
PP3V3_S0SW_LCD
PP5V_S0SW_LCD
PP5V_G3S_ALSCAM_F
MIPI_FTCAM_CLK_ISOL_FILT_CONN_P
MIPI_FTCAM_CLK_ISOL_FILT_CONN_N
MIPI_FTCAM_DATA_ISOL_FILT_CONN_P<0>
MIPI_FTCAM_DATA_ISOL_FILT_CONN_N<0>
EDP_INT_ML_P<3>
EDP_INT_ML_N<3>
EDP_INT_ML_P<2>
EDP_INT_ML_N<2>
EDP_INT_ML_P<1>
EDP_INT_ML_N<1>
EDP_INT_ML_P<0>
EDP_INT_ML_N<0>
EDP_INT_AUX_P
EDP_INT_AUX_N
GND
8 TPs
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
J3300 - Left USB-C Connector
PP20V_USBC_X_VBUS TEST POINT IN USBC BLOCK
GND
4 TPs
USBC_X_CC1/2_CONN TEST POINT IN USBC BLOCK
USBC_X_SBU1/2 TEST POINT IN USBC BLOCK
PP20V_USBC_T_VBUS TEST POINT IN USBC BLOCK
FUNC_TEST=TRUE
GND
4 TPs
USBC_T_CC1/2_CONN TEST POINT IN USBC BLOCK
TP_USBC_PP20V_T TEST POINT IN USBC BLOCK
TP_USBC_PP20V_X TEST POINT IN USBC BLOCK
TP_USBC_PP20V_W TEST POINT IN USBC BLOCK
TP_USBC_PP20V_R TEST POINT IN USBC BLOCK
USBC_X_SBU1/2 TEST POINT IN USBC BLOCK
FUNC_TEST=TRUE
JB500 - Right USB-C Connector
PP20V_USBC_W_VBUS TEST POINT IN USBC BLOCK
GND
4 TPs
USBC_W_CC1/2_CONN TEST POINT IN USBC BLOCK
PP20V_USBC_R_VBUS TEST POINT IN USBC BLOCK
FUNC_TEST=TRUE
GND
4 TPs
USBC_R_CC1/2_CONN TEST POINT IN USBC BLOCK
FUNC_TEST=TRUE
J6000 & J6001 - Fan
44B7 44C6
IN
44A6 44B7 44C6
IN
44B6 44C4
IN
44A6 44B6 44C4
IN
44A7 44B6 44B7 75B7
IN
FAN_LT_TACH
FAN_LT_PWM
FAN_RT_TACH
FAN_RT_PWM
PP5V_G3S
GND
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
J8400 - J8402 - KBD BLC
65B2
65B2 65C3
65C2
65A2
IN
IN
IN
IN
IN
PPVOUT_S0_KBDLED
KBDLED_CATHODE1
KBDLED_CATHODE2
KBDLED_CATHODE1_R
KBDLED_CATHODE2_R
GND
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
4 TPs
4 TPs
4 TPs
4 TPs
7 TPs
1 TPs
6D5 15D6
CPU_BPM_L<0>
IN
6A7
PPDCIN_G3H
I2736
19C3 53B1 53D7 75B7 77C4 77D2
GND
6 TPs
DFU/SOC/FCT DEBUG
23A7 23B6
19D3 23D3 62C7 81B7
19D3 23C3 81A4
19D3 24A7 24C3
19C3 81C3
19C3 81C3
12A6 12D5 19C3
12A6 12D5 19C3
17A6 24C3
17A6 24C3
24C3
24C3
24C3
19D3 24A3
19D3 24A3
25B6 76D6
25B6 76D6
24A6 36D3
24A6 36D3
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
SOC_USB_VBUS
SOC_FORCE_DFU
SOC_DFU_STATUS
SOC_DOCK_CONNECT
USB_SOC_P
USB_SOC_N
PCH_UART_DEBUG_R2D_1
PCH_UART_DEBUG_D2R_1
SWD_SOC_SWCLK
SWD_SOC_SWDIO
TP_JTAG_SOC_TDI
TP_JTAG_SOC_TDO
TP_JTAG_SOC_TRST_L
SMC_DEBUGPRT_TX
SMC_DEBUGPRT_RX
TP_SOC_DEBUGPRT_TX
TP_SOC_DEBUGPRT_RX
I2C_PWR_SCL
I2C_PWR_SDA
GND
4 TPs
FUNC_TEST=TRUE
DFU/SOC/FCT DISCHARGE
PP20V_USBC_X_VBUS TEST POINT IN USBC BLOCK
PP20V_USBC_T_VBUS TEST POINT IN USBC BLOCK
PP20V_USBC_W_VBUS TEST POINT IN USBC BLOCK
PP20V_USBC_W_VBUS TEST POINT IN USBC BLOCK
19C3 53B1 53D7 75B7 77D2 77D4
52D5 53C1 77A7 77D2
53D1 75D8 77D2
53D5
53B7 53D3
52C2
65A3 65D1 66A7 66C3 77D5
IN
IN
IN
IN
IN
IN
IN
PPDCIN_G3H
PPVBAT_G3H_CONN
PPBUS_G3H
PPDCIN_G3H_CHGR
PPVBAT_G3H_CHGR_REG
SYS_DETECT
PPVOUT_S0_LCDBKLT
Memory Power
62B3 63A3 63B8 63D8 81A8
IN
62B3 63B5
IN
63D1 63D7 75B2 77D2
IN
7B1 8D7 75A1 79C4
IN
18B6 18C6 18D6 63A6 63B6 74D4
IN
18B6 18C6 18D6 63A6 75A1 79C6
IN
PVDDQ_EN
PVDDQ_PGOOD
PP1V1_S3
PP1V1_S3_CPU
PP1V8_S3_MEM
PP0V6_S3
GND
6 TPs
FUNC_TEST=TRUE
Wireless/BT Power
21A7 21D3 21D6 75D1 79C7
75C1
IN
IN
PP3V3_G3S_WLANBT
PP1V8_G3S_WLANBT
GND
2 TPs
FUNC_TEST=TRUE
Hall Effect
32D4 49D6
IN
32D4 49D6
IN
32D2 35D8 51D2 77A8
IN
LID_OPEN_LEFT
LID_OPEN_RIGHT
IPD_LID_OPEN
GND
1 TPs
FUNC_TEST=TRUE
FCT request
35C5
24C6 62D7
23B6 81C2
23B6 81C2
IN
IN
IN
IN
P1V8_DFR_R
PMU_CLK32K_SOC
USB_SOC_P
USB_SOC_N
TP9820
FUNC_TEST=TRUE
1
A
TP-P5
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
6 TPs
DFU/SOC/FCT DMM/Power Sequence
19C3 53B1 53D7 75B7 77C4 77D4
IN
52D5 53C1 77A7 77C4
IN
53D1 75D8 77C4
IN
52D3 77A7
IN
8D7 40B4 75C3 79D6 80D8
IN
8D4 16D2 40A5 75B3 79C6 80D8
IN
8A4 11A5 11C8 77D2
IN
8A4 11A5 11C8 77D2
IN
8A4 8B1 74A4
IN
8B1 75A4
IN
8B1 11B5 11C3
IN
8C7 11A5 11B8 16C2
IN
8C4 10C3 75B4
IN
8C4 10C3 64D1 75A4
IN
8C7 10B3 75A3
IN
64B1 75A4
IN
6D6 8A5 8C7 10B3 13D8 16C7 31B6 54B3 64A2 75B4
IN
8B1 11A5 11D8
IN
8B1 11A5 11D8
IN
74D4
IN
63D1 63D7 75B2 77B4
IN
8B4 11D8 75A4
IN
8B1 75B4
IN
60A6 60B8 74B6
IN
60B8 74B6
IN
61C2 74B4
IN
59C1 75C2
IN
74C2
IN
36D4 66A7 66C1 66C3 77D5 79B7
IN
66B3 75D5 77D5 79B7
IN
16C7 62A6 62C6
IN
14A3 17D2 62C3
IN
13D6 15C1 31C1
IN
13C6 16A5 17B8
IN
13C6 31C1
IN
13D6 15C8 16B7 17B8 17C6 19C3
IN
64C3 81C3
13A6 13D3 16A7 16B7
IN
19B5 62D6 64A6 64B5
16B2 24B6 81A8 81C3
IN
13A6 13D6 17A4 17B4 17D8 20C5 20D5 31B6
IN
6D5 31B6 62D6 80A6
IN
13A6 13D3 15C8 62C6
IN
6D5
IN
6D5 62B6
IN
54C2 62B3
IN
60B1 74C8 81B4
IN
60A2 74B8 81A4
IN
60B1 74C6
IN
61C2 74D4
IN
60C1 74D8
IN
61C2 74C4
IN
60C1 74D8
IN
60A1 74C6
IN
61A4 74C6
IN
61C2 74C4
IN
60D1 74D8
IN
24C6 49D6 62A6 62D6 80A7
IN
23A3 24B6 62A6 62C6 71B7 80A8
IN
19C3 23D3 62A6 62D6 81A8
IN
52A7 53A4 53B8
IN
52B1 75D6
IN
58A5 62C3
IN
58B5 58D1 75B6
IN
24D3 76D6
IN
24C3 62D6 80A7
IN
23A7 23C3 62D6 80A8
IN
19C3 52C2 62D6 80A7
IN
33C4 33D6 77D7
IN
62B3 64D8
IN
64D6 75A6
IN
58A7 62B3
IN
58C8 58D5 75B8
IN
62B3 64C8 64D6 81A8
IN
64C6 75D2
IN
23C6 32A6 71B7
IN
71A3 71A6 71C5 72D4
67A4 67A5 67D6 67D8 68A4 68B5 68C8 68D5 68D7 69A4
IN
69A5 69C8 69D5 69D7 70A4 70A5 70C8 70D6 70D8
67B8 67D4 67D8 68B8 68D4 68D8 69B8 69D4 69D8 70B8
IN
70D4 70D8 71B2 71B3
67A8 67D6 68A8 68D6 69A8 69D6 70A8 70D6 71B4 71D4
IN
71A4 71B7
IN
67C7 68C7 69C7 70C8 71B7
IN
67C3 68C3 69C3 70C3 71B7
IN
SYNC_MASTER=myEE SYNC_DATE=03/01/2019
PAGE TITLE
PPDCIN_G3H
PPVBAT_G3H_CONN
PPBUS_G3H
SYS_DETECT_L
PPVCCIN_S0_CPU
PPVCCIN_AUX_PCH_PRIM
PP1V05_S5_PCH_VCCDSW
PP1V05_S5_PCH_VCCDSW
PP1P05_PCH_EXT
PPVCCIO_OUT
PP1V8_PCH_CLKLDO
PP1V05_VCCSTG_OUT
PP1V05_S0_CPU_VCCPLL
PP1V8_S0SW
PP1V05_S0SW_VCCSTG
PP1V1_S0SW
PP1V05_S0_CPU_VCCST
PP1V24_S5_PCH_VCCDPHY
PP0V85_LDOSTD
PP1V8_S3
PP1V1_S3
PP1V05_PRIM_OUT_PCH
PP1V05_PCH_OUT_FET
PP1P05_PCH_EXT
PPVNN_PCH_EXT
PP3V3_S5
PP1V8_S5
PP3V_G3H_RTC
PP3V3_S0SW_LCD
PP5V_S0SW_LCD
ALL_SYS_PWRGD
PCH_RTC_RESET_L
PM_SYSRST_L
PM_PCH_PWROK
PM_PCH_SYS_PWROK
PM_RSMRST_L
PM_SLP_S3_L_1
PM_SLP_S0_L
PLT_RST_L
PM_THRMTRIP_L
PCH_PWRBTN_L
CPU_PROCHOT_R_L
CPU_CATERR_L
CPUVR_PGOOD
PP1V8_SLPS2R
PP1V8_AWAKE
PP1V1_SLPS2R
PP0V8_SLPS2R
PP0V82_SLPDDR
PP3V3_AWAKE
PPVDDCPUSRAM_AWAKE
PP0V9_SLPDDR
PP1V1_SLPDDR
PP1V2_AWAKE
PPVDDCPU_AWAKE
PMU_COLD_RESET_L
PMU_SYS_ALIVE
PMU_ACTIVE_READY
CHGR_EN_MVR
PP3V3_G3H_RTC
PMU_PVDDMAIN_EN
PP3V3_G3H
TP_SMC_FIXTURE_MODE_L
SOC_WDOG
SOC_SOCHOT_L
UPC_PMU_RESET
PMU_ONOFF_R_L_CONN
P3V3G3S_EN
PP3V3_G3S
P5VG3S_EN
PP5V_G3S
P1V8G3S_EN
PP1V8_G3S
SSD_PMU_RESET_L
PP1V8_IO_SSD0
PP0V9_SSD0
PP2V5_NAND_SSD0
SSD0_OCARINA_WP_L
SSD0_OCARINA_PFN_L
SSD0_OCARINA_RESET_L
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
ICT FCT 1
SIZE
D
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
124 OF 150
SHEET
77 OF 109
D
C
B
A
8
67
35 4
2
1
D
www.haojiyoubbs.com
QQ微信：181806465
C
678
P2MM
SM
26B6 67C2
26B6 67C2
14A6 26C6
OUT
14A6 26C6
OUT
26A6 67C3 68C3 78C8
OUT
26B6 67C3 68C3 78C8
OUT
26A6 69C3 70C3 78C8
OUT
26A6 69C3 70C3 78C8
OUT
14A6 21D3
OUT
14A6 21D3
OUT
26A6 67C3 68C3 78D8
OUT
26B6 67C3 68C3 78D8
OUT
26A6 69C3 70C3 78D8
OUT
26A6 69C3 70C3 78D8
OUT
PCIE_CLK100M_SOC_N
PCIE_CLK100M_SOC_P
PCIE_CLK100M_SSD0_01_N
PCIE_CLK100M_SSD0_01_P
PCIE_CLK100M_SSD0_23_N
PCIE_CLK100M_SSD0_23_P
PCH_PCIE_CLK100M_WLAN_N
PCH_PCIE_CLK100M_WLAN_P
PCIE_CLK100M_SSD0_01_N
PCIE_CLK100M_SSD0_01_P
PCIE_CLK100M_SSD0_23_N
PCIE_CLK100M_SSD0_23_P
PCIE_SSD0_D2R_N<0>
IN
PCIE_SSD0_D2R_P<0>
IN
P2MM
P2MM
1
1
P2MM
1
P2MM
1
P2MM
1
P2MM
1
P2MM
1
P2MM
1
P2MM
1
P2MM
1
P2MM
1
P2MM
1
P2MM
1
P2MM
1
SM
PP
SM
PP
SM
PP
SM
PP
SM
PP
SM
PP
SM
PP
SM
PP
SM
PP
SM
PP
SM
PP
SM
PP
PP
PP
SM
PP9910
SM
PP9911
PP9939
PP9940
PP9941
PP9942
PP9953
PP9954
PP9955
PP9956
PP9947
PP9948
PP9958
PP9959
I110
I109
I88
I87
I86
I85
I84
I83
MIPI_FTCAM_DATA_P<0>
25D6 66A6
MIPI_FTCAM_DATA_N<0>
25D6 66A6
MIPI_FTCAM_CLK_P
25D6 66B6
MIPI_FTCAM_CLK_N
25D6 66B6
MIPI_DFR_DATA_FILT_CONN_P
TRUE
MIPI_DFR_DATA_FILT_CONN_N
TRUE
MIPI_DFR_CLK_FILT_CONN_P
TRUE
MIPI_DFR_CLK_FILT_CONN_N
TRUE
MIPI_FTCAM_DATA_ISOL_FILT_CONN_P<0>
TRUE
MIPI_FTCAM_DATA_ISOL_FILT_CONN_N<0>
TRUE
MIPI_FTCAM_CLK_ISOL_FILT_CONN_P
TRUE
MIPI_FTCAM_CLK_ISOL_FILT_CONN_N
TRUE
1
P2MM
1
P2MM
1
P2MM
1
PP
PP
PP
PP
SM
SM
SM
PP9949
PP9950
PP9951
PP9952
BI
BI
OUT
OUT
BI
BI
OUT
OUT
35D3 77D8
35D3 77D8
35D3 77D8
35D3 77D8
66B3 66D1 77D5
66B3 66D1 77D5
66B3 66D1 77D5
66B3 66D1 77D5
SAR Fusion Sensor Debug removed
AUDIO CODEC
P2MM
SM
32C6 46B1
32C8 46B1
32C6 46B1
I2S_CODEC_BCLK
I2S_CODEC_LRCLK_R
I2S_CODEC_R2D
1
P2MM
1
P2MM
1
PP
SM
PP
SM
PP
PP9966
PP9967
PP9968
SOC SENSE
P2MM
SM
27C3 62C3
SOC_VDDCPU_SENSE
1
PP
PP9930
ACE-TR AUX/LS
10
P2MM
SM
5C3 19D5
5C3 19D5
5C3 19C5
5C3 19C5
5C3 19C5
5C3 19C5
5C3 19B5
5C3 19B5
USBC_HSX_AUXCH_C_P
USBC_HSX_AUXCH_C_N
USBC_HST_AUXCH_C_P
USBC_HST_AUXCH_C_N
USBC_HSW_AUXCH_C_P
USBC_HSW_AUXCH_C_N
USBC_HSR_AUXCH_C_P
USBC_HSR_AUXCH_C_N
1
P2MM
1
P2MM
1
P2MM
1
P2MM
1
P2MM
1
P2MM
1
P2MM
1
PP
SM
PP
SM
PP
SM
PP
SM
PP
SM
PP
SM
PP
SM
PP
12
PP9970
PP9971
PP9972
PP9973
PP9974
PP9975
PP9976
PP9977
SoC PPs
P2MM
SM
76D3
76D3
TEST_SOC_AMUXOUT
TEST_SOC_TST_CLKOUT
1
P2MM
1
PP
SM
PP
PP9990
PP9991
3 245
PMIC Switch Nodes
P2MM
SM
60D4
60D4
60D4
60D4
60C4
60C4
60C4
60B4
60B4
60B4
60A4
60A4
60B6
60B6
60B6
60B6
62B3 64A6
62B3
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
PVDDCPUAWAKE_SW0
PVDDCPUAWAKE_SW1
PVDDCPUAWAKE_SW2
PVDDCPUAWAKE_SW3
PVDDCPUSRAMAWAKE_SW0
P0V8SLPDDR_SW0
P0V8SLPDDR_SW1
P1V8SLPS2R_SW0
P1V1SLPS2R_SW0
P1V1SLPS2R_SW1
P0V9SLPDDR_SW0
P0V9SLPDDR_SW1
PVCCPCOREPRIM_SW0
PVCCPCOREPRIM_SW1
P1VPRIM_SW0
P1VPRIM_SW1
PMIC GPIOs
PVCCST_EN
PVCCPLLOC_EN
1
P2MM
1
P2MM
1
P2MM
1
P2MM
1
P2MM
1
P2MM
1
P2MM
1
P2MM
1
P2MM
1
P2MM
1
P2MM
1
P2MM
1
P2MM
1
P2MM
1
P2MM
1
P2MM
1
P2MM
1
PP
SM
PP
SM
PP
SM
PP
SM
PP
SM
PP
SM
PP
SM
PP
SM
PP
SM
PP
SM
PP
SM
PP
SM
PP
SM
PP
SM
PP
SM
PP
SM
PP
SM
PP
PP7806
PP7807
PP7808
PP7809
PP7810
PP7811
PP7812
PP7813
PP7814
PP7815
PP7816
PP7817
PP7819
PP7820
PP7821
PP7822
PP7823
PP7824
1
D
C
B
Probe Block Grid - DFU/SOC
SC400
SWDL
SM-TP-0.5MM
APN 998-15937
21C6
21C6
WIRELESS PPs
WLAN_CONTEXT_A
WLAN_CONTEXT_B
P2MM
1
P2MM
1
SM
PP
SM
PP
PP9994
PP9995
B
A
14C6 76B3
14D3 76B3
14C6 76B3
USB3_EXTC_D2R_P
IN
USB_FIXT1_P USB_FIXT1_N
IN
USB3_EXTC_R2D_C_P
1
5 6
USB3_D2R_P
GND
USB2_D_P
OMIT
GND
9 10
USB3_R2D_P
USB3_D2R_N
GND
USB2_D_N
GND
USB3_R2D_N
2
USB3_EXTC_D2R_N
IN
14C6 76B3
43
14D3 76B3
IN
87
USB3_EXTC_R2D_C_N
ININ
14C6 76B3
SC401
SWDL
SM-TP-0.5MM
14C6 14C6
IN
14D3 76B3
IN
USB3_EXTD_D2R_P USB3_EXTD_D2R_N
USB_FIXT2_P
1
5 6
USB3_D2R_P
GND
USB2_D_P
OMIT
USB3_D2R_N
GND
14B6
IN
USB3_EXTD_R2D_C_P
9 10
USB3_R2D_P
USB3_R2D_N
APN 998-15937
GND
USB2_D_N
GND
2
IN
43
USB_FIXT2_N
IN
14D3 76B3
87
USB3_EXTD_R2D_C_N
IN
14B6
PAGE TITLE
ICT FCT 2
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
125 OF 150
SHEET
78 OF 109
A
SIZE
D
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
75B7 35C8
35B7 35C6 35D6 37B8 77C8
77D8
75B4
PP5V_G3S
PP1V8_DFR
PP3V3_G3H
DESENSE
1
CC700
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC704
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC707
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC701
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC705
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC702
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC703
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
80D8 77D2 75C3 40B4 8D7
PPVCCIN_S0_CPU
DESENSE
1
CC740
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC74E
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC760
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC741
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC74F
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC761
12PF
5%
25V
2
NP0-C0G
DESENSE
1
CC742
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC750
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC762
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC743
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC751
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC763
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC744
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC752
3.0PF
+/-0.1PF
2
NP0-C0G
0201
DESENSE
1
CC764
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC745
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC753
12PF
5%
25V25V
2
NP0-C0G
0201
DESENSE
1
CC765
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC746
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC754
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201 0201
DESENSE
1
CC766
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC747
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC755
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC767
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC748
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
1
CC756
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201 0201
DESENSE
1
CC768
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC749
12PF
5%
25V
2
NP0-C0G
0201
DESENSEDESENSE
1
CC757
12PF
5%
25V
2
NP0-C0G
DESENSE
1
CC769
12PF3.0PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC74A
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC758
3.0PF
25V
2
NP0-C0G
0201 0201
DESENSE
1
CC76A
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
1
2
DESENSE
1
CC74B
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC759
12PF
5%+/-0.1PF
25V
2
NP0-C0G
DESENSE
CC76B
12PF
5%
25V
NP0-C0G
0201
DESENSE
1
CC74C
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC75A
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201 0201
DESENSE
1
CC76C
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201 0201
DESENSE
1
CC74D
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC75B
12PF
5%
25V
2
NP0-C0G
DESENSE
1
CC76D
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC75C
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201 0201
DESENSE
1
CC76E
3.0PF
+/-0.1PF
25V
2
NP0-C0G
02010201
DESENSE
1
CC75D
12PF
5%
25V
2
NP0-C0G
DESENSE
1
CC76F
12PF
5%
25V
2
NP0-C0G
DESENSE
1
CC75E
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
1
2
DESENSE
CC75F
12PF
5%
25V
NP0-C0G
D
C
75D2 39A8
75A5
PP3V3_G3S_WLANBT
DESENSE
1
CC711
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
PP3V3_G3S
DESENSE
1
CC715
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
C9745
12PF
5%
25V
2
NP0-C0G
0201
21D6 21D3 21A7
DESENSE
1
CC716
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
C9746
12PF
5%
25V
2
NP0-C0G
0201
77B4 75D1
PP3V3_G3S_WLANBT
DESENSE
1
CC712
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC717
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
C9747
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC718
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
C9748
12PF
5%
25V
2
NP0-C0G
0201
80D8 77D2 75B3 40A5 16D2 8D4
DESENSE
1
CC713
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
77B4 75A1 63A6 18D6 18C6 18B6
PPVCCIN_AUX_PCH_PRIM
DESENSE
1
CC770
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC782
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC771
15PF
5%
25V
2
C0G
0201
DESENSE
1
CC783
15PF
5%
25V
2
C0G
0201
PP0V6_S3
DESENSE
1
CC7A0
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC7A1
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC772
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC784
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC7A2
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC773
15PF
5%
25V
2
C0G
0201
DESENSE
1
CC785
15PF
5%
25V
2
C0G
0201
DESENSE
1
CC7A3
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC774
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC786
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
77B4 75A1 8D7 7B1
DESENSE
1
CC775
15PF
5%
25V
2
C0G
0201
DESENSE
1
CC787
15PF
5%
25V
2
C0G
0201
PP1V1_S3_CPU
DESENSE
1
CC7A4
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC776
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC788
3.0PF
+/-0.1PF
25V
2
0201
1
2
1
2
DESENSE
1
CC7A5
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
CC777
15PF
5%
25V
C0G
0201
DESENSE
CC789
15PF
5%
25V
C0G
0201
1
2
DESENSE
1
CC7A6
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC778
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
CC78A
3.0PF
+/-0.1PF
25V
NP0-C0GNP0-C0G
0201
1
2
DESENSE
1
CC7A7
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC779
15PF
5%
25V
2
C0G
0201
DESENSE
CC78B
15PF
5%
25V
C0G
0201
DESENSE
1
CC7A8
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC77A
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC7A9
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC77B
15PF
5%
25V
2
C0G
0201
DESENSE
1
CC7AA
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC77C
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC7AB
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC77D
15PF
5%
25V
2
C0G
0201
DESENSE
1
CC77E
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC77F
15PF
5%
25V
2
C0G
0201
DESENSE
1
CC780
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC781
15PF
5%
25V
2
C0G
0201
C
B
75B1 42D5 42B6
75C4 46D4 46C6
66B1 66D1 77D5
75A5
19C3 75B7
PP1V8_S5
DESENSE
1
CC719
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
PP3V3_G3H_RTC
DESENSE
1
CC724
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
PP5V_G3S_ALSCAM_F
DESENSE
1
CC727
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
PP3V3_G3S
DESENSE
1
CC730
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
PP5V_G3S
DESENSE
1
CC735
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC720
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC725
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
PP3V3_S0SW_LCD
36D4 66A7
66C1 66C3 77C2 77D5
DESENSE
1
CC731
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC736
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
1
2
1
2
1
2
1
2
DESENSE
CC721
3.0PF
+/-0.1PF
25V
NP0-C0G
0201
DESENSE
CC726
3.0PF
+/-0.1PF
25V
NP0-C0G
0201
1
2
DESENSE
CC732
3.0PF
+/-0.1PF
25V
NP0-C0G
0201
DESENSE
CC737
3.0PF
+/-0.1PF
25V
NP0-C0G
0201
1
2
66B3 75D5
77C2 77D5
DESENSE
CC728
3.0PF
+/-0.1PF
25V
NP0-C0G
0201
1
2
1
2
DESENSE
CC722
3.0PF
+/-0.1PF
25V
NP0-C0G
0201
1
2
PP5V_S0SW_LCD
DESENSE
CC733
3.0PF
+/-0.1PF
25V
NP0-C0G
0201
DESENSE
CC738
3.0PF
+/-0.1PF
25V
NP0-C0G
0201
1
2
1
2
DESENSE
CC723
3.0PF
+/-0.1PF
25V
NP0-C0G
0201
1
2
DESENSE
CC734
3.0PF
+/-0.1PF
25V
NP0-C0G
0201
DESENSE
CC739
3.0PF
+/-0.1PF
25V
NP0-C0G
0201
63A8 63A5 18D6 18C6 18B6
80C8 80B8 75A1 63C2
75D8 38D8
DESENSE
CC729
3.0PF
+/-0.1PF
25V
NP0-C0G
0201
75C1 11C8 8B4
PP1V1_S3
DESENSE
1
CC790
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
PPBUS_HS_CPU
DESENSE DESENSE
1
CC7B0
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
1
CC7C2
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
PP1V8_S5
DESENSE
1
CC7D0
12PF
5%
25V
2
NP0-C0G NP0-C0G
0201
DESENSE
1
CC791
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC7B1
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC7C3
12PF
5%
25V
2
NP0-C0G
0201
1
CC7D1
2
DESENSE
12PF
5%
25V
0201
DESENSE
1
CC792
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC7B2
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC7C4
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
1
CC7D2
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
DESENSE
1
CC793
12PF
5%
25V
2
NP0-C0G
0201
1
CC7B3
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC7C5
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC7D3
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC794
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC7B4
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC7C6
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC795
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC7B5
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC7C7
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC796
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC7B6
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC7C8
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC797
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC7B7
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC7C9
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC798
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC7B8
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC7CA
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC799
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC7B9
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC7CB
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC79A
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC7BA
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC7CC
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC79B
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC7BB
12PF
5%
25V
2
NP0-C0G
0201
DESENSEDESENSE
1
CC7CD
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC79C
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC7BC
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC7CE
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC79D
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC7BD
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC7BE
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC7BF
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC7C0
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC7C1
12PF3.0PF
5%
25V
2
NP0-C0G
0201
B
A
8
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
PAGE TITLE
A
Desense Capacitors 1
DRAWING NUMBER
051-05198
Apple Inc.
REVISION
6.0.0
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
BOM_COST_GROUP=WIRELESS
67
35 4
IV ALL RIGHTS RESERVED
2
BRANCH
evt-3
PAGE
127 OF 150
SHEET
79 OF 109
1
SIZE
D
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
79D6 77D2 75C3 40B4 8D7
PPVCCIN_S0_CPU
DESENSE
1
CC8A0
3.0PF 3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC8A1
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC8A2
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC8A3
12PF
5%
25V
2
NP0-C0G
0201
DESENSE DESENSE
1
CC8A4
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
1
CC8A5
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC8A6
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC8A7
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC8A8
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC8A9
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC8AA
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC8AB
12PF
5%
25V
2
NP0-C0G
0201
D
C
79C6 77D2 75B3 40A5 16D2 8D4
63C2 63A8 63A5 18D6 18C6 18B6
80B8 79B6 75A1
PPVCCIN_AUX_PCH_PRIM
DESENSE
1
CC8B0
15PF
5%
25V
2
C0G
0201
DESENSE
1
CC8B1
15PF
5%
25V
2
C0G
0201
PP1V1_S3
DESENSE DESENSE
1
CC8C0
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC8C1
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC8B2
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
1
CC8C2
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC8B3
15PF
5%
25V
2
C0G
0201
DESENSE
1
CC8C3
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC8B4
3.0PF
+/-0.1PF
25V 25V
2
NP0-C0G
0201
DESENSE
1
CC8C4
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC8B5
15PF
5%
25V
2
C0G
0201
DESENSE
1
CC8C5
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC8B6
3.0PF
2
NP0-C0G
0201
DESENSE
1
CC8C6
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC8B7
12PF
5%+/-0.1PF
100V
2
CERM
0402
DESENSE
1
CC8C7
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC8B8
12PF
5%
100V
2
CERM
0402
DESENSE
1
CC8C8
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC8B9
12PF
5%
100V
2
CERM
0402
DESENSE
1
CC8C9
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC8BA
12PF
5%
100V
2
CERM
0402
DESENSE
1
CC8CA
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC8CB
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC8CC
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC8CD
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC8CE
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC8CF
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC8D0
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC8D1
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC8D2
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC8D3
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
C
B
63A8 63A5 18D6 18C6 18B6
80C8 79B6 75A1 63C2
1
2
PP1V1_S3
1
CC8F0
2
DESENSE
CC8E0
3.0PF
+/-0.1PF
25V
NP0-C0G
0201
DESENSE
3.0PF
+/-0.1PF
25V
NP0-C0G
0201
DESENSE
1
CC8E1
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC8F1
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC8E2
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC8F2
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC8E3
5%
25V
2
NP0-C0G
0201
1
2
DESENSE
1
CC8FB
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
CC8E4
3.0PF12PF
+/-0.1PF
25V
NP0-C0G
0201
1
2
DESENSE
1
CC8E5
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
CC8F3
12PF
5%
25V
NP0-C0G
0201
DESENSE
1
CC8F4
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC8F5
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC8F6
12PF
5%
25V
2
0201
DESENSE
1
CC8F7
3.0PF
+/-0.1PF
25V
2
NP0-C0GNP0-C0G
0201
DESENSE
1
CC8F8
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
CC8F9
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
CC8FA
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
B
A
PMU_SYS_ALIVE
23A3 24B6 62A6 62C6 71B7 77B2
23A7 23C3 62D6 77B2
PMU_COLD_RESET_L
24C6 49D6 62A6
62D6 77B2
DESENSE
1
CC80A
100PF
5%
25V
2
C0G C0G
0201
SOC_PERST_L
12C5 17D6 24D6
DESENSE
1
CC80E
100PF
5%
25V
2
C0G
0201
DESENSE
1
CC80B
100PF
5%
25V
2
0201
DESENSE
1
CC80F
100PF
5%
25V
2
C0G
0201
SOC_WDOG PM_THRMTRIP_L
24C3 62D6
77B2
19C3 52C2 62D6
77B2
DESENSE
1
CC80C
100PF
5%
25V
2
C0G
0201
UPC_PMU_RESETSOC_SOCHOT_L
DESENSE
1
CC80G
100PF
5%
25V
2
C0G
0201
6D5 31B6 62D6
77C2
DESENSE
1
CC80D
100PF
5%
25V
2
C0G
0201
BOM_COST_GROUP=WIRELESS
PAGE TITLE
Desense Capacitors 2
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
128 OF 150
SHEET
80 OF 109
A
SIZE
D
8
67
35 4
2
1
Debug Power "Buttons"
www.haojiyoubbs.com
QQ微信：181806465
678
3 245
1
Power State Debug LEDs
(For development only)
PP3V3_S5
74B2
D
DEBUG_BUTTON
PLACE_SIDE=BOTTOM
SILK_PART=RSLOC
CRITICAL
RE028
SKSGPCE010
SM
1
3
GND
5
2
4
6
PMU_RSLOC_RST_L
50C6 52C4 62A6 62C3 77B8 81D5
OUT
NOSTUFF
SILK_PART=RSLOC
PLACE_SIDE=TOP
0%
1/4W
MF
0603
1
0
2
RE029
PMU_RSLOC_RST_L
50C6 52C4 62A6 62C3 77B8 81D7
OUT
DBGLED
RE091
1/20W
DBGLED_S4
DBGLED
A
DE091
GRN-90MCD-5MA-2.85V
0402
K
PLACE_SIDE=BOTTOM
SILK_PART=STBY_ON
DBGLED_S4_D
DBGLED
QE090
DMN5L06VK-7
SOT563
VER-3
2
20K
5%
MF
201
DBGLED
20K
5%
1/20W
MF
201
1
2
1
2
RE092
DBGLED_S0I3DBGLED_S3
DBGLED
A
DE092
GRN-90MCD-5MA-2.85V
0402
K
PLACE_SIDE=BOTTOM
SILK_PART=S3_ON
DBGLED
A
DE093
GRN-90MCD-5MA-2.85V
0402
K
PLACE_SIDE=BOTTOM
SILK_PART=S0I3_ON
DBGLED_S3_D
DBGLED
QE090
6
D
SG
1
DMN5L06VK-7
SOT563
VER-3
5
3
D
SG
4
DMN5L06VK-7
DBGLED
RE093
1/20W
DBGLED
QE091
SOT563
VER-3
2
20K
5%
MF
201
DBGLED
20K
5%
1/20W
MF
201
1
2
1
2
RE095
DBGLED_S0
DBGLED
A
DE095
GRN-90MCD-5MA-2.85V
0402
K
PLACE_SIDE=BOTTOM
SILK_PART=S0_ON
D
DBGLED_S0_DDBGLED_S0I3_D
DBGLED
QE091
6
D
SG
1
DMN5L06VK-7
SOT563
VER-3
5
3
D
SG
4
C
DEBUG_BUTTON
PLACE_SIDE=BOTTOM
SILK_PART=PWR_BTN
CRITICAL
RE030
SKSGPCE010
SM
1
3
GND
5
2
4
6
PMU_ONOFF_L
33C1 52C4 62A6 62C3 81C5
OUT
NOSTUFF
SILK_PART=PWR_BTN
PLACE_SIDE=TOP
RE031
1/4W
0603
0%
MF
13A6 13D3
13A6 13D3
13A6 13D3 16A7 16B7 19B5 62D6 64A6 64B5 64C3 77C2
16B2 24B6 77C2 81A8
PMU_ONOFF_L
1
33C1 52C4 62A6 62C3 81C7
OUT
PM_SLP_S5_L
IN
PM_SLP_S4_L
IN
PM_SLP_S3_L_1
IN
PM_SLP_S0_L
IN
0
2
C
77D4 19C3
USB_SOC_P
USB_SOC_P
MAKE_BASE=TRUE
23B6 77A4
B
32A7 23A7
74C6
SILK_PART=FORCE_DFU
PP1V8_SLPS2R
NOSTUFF
PLACE_SIDE=TOP
0
0%
1/4W
MF
0603
1
2
RE032
SOC_FORCE_DFU
19D3 23D3 62C7 77D4
OUT
77D4 19C3
USB_SOC_N
USB_SOC_N
MAKE_BASE=TRUE
SOC State LEDs
23B6 77A4
B
A
19C3 23D3 62A6
62D6 77B2
61A6 62B3
81A4
16B2 24B6 77C2
81C3
62B3 63A3 63B8
63D8 77B4
62B3 64C8 64D6
77B2
IN
IN
IN
IN
IN
PMU_ACTIVE_READY
DBGLED
P1V1_SLPDDR_SOCFET_EN
DBGLED
PM_SLP_S0_L
DBGLED
PVDDQ_EN
DBGLED
P1V8G3S_EN
DBGLED
RE027
0
21
5%
1/20W
MF
0201
RE016
0
21
5%
1/20W
MF
0201
RE018
0
21
5%
1/20W
MF
0201
RE015
0
21
5%
1/20W
MF
0201
RE017
0
21
5%
1/20W
MF
0201
PP3V3_G3H_RTC
75C4
PMU_ACTIVE_READY_R
P1V1_SLPDDR_SOCFET_EN_R
PM_SLP_S0_R_L
PVDDQ_EN_LED
P1V8_G3S_EN_R
System State LEDs
See color table on next page
DBGLED
RE022
0
21
5%
1/20W
MF
0201
SLG4AP41990
2
PMU_ACTIVE_READY
3
P1V1_SLPDDR_SCFET_EN
4
PM_SLP_S0*
5
PVDDQ_EN
6
P1V8G3S_EN
(IPD)
1
VDD
UE020
STQFN
CRITICAL
(IPD)
(IPD)
(IPD)
GND
8
DBGLED
(IPD)
(OD)
(OD)
(OD)
R
G
B
RFU1
RFU2
RFU3
RFU4
DBGLED
1
CE007
0.1UF
10%
16V
2
X5R-CERM
0201
BYPASS=UE020::5mm
12
SSTATE_RED_R
11
SSTATE_GREEN_R
10
SSTATE_BLUE_R
7
NC
9
NC
13
NC
14
NC
P3V3_G3H_RTC_DEBUG_LED_R
LTST-C32JBGEW
DBGLED
RE019
2.1K
1/20W
RE021
4.75K
1/20W
1%
MF
201
1%
MF
201
21
RE020
5.1K
1/20W
21
DBGLED
1%
MF
201
21
DBGLED
DE000
SM
SSTATE_RED
DBGLED
SSTATE_GREEN
SSTATE_BLUE
DBGLED
QE000
77C2 74C8 60B1
PP1V8_SLPS2R
2
G
DMN5L06VK-7
SOT563
VER-5
DBGLED
1
DE001
S D
1
P1V1_SLPDDR_SOCFET_EN
61A6 62B3 81A8
1
R
4
G
3
74B8 60A2
B
2
PP1V8_AWAKE
77C2
5
G
S D
4
2
G
6
DBGLED
QE000
DMN5L06VK-7
SOT563
VER-5
3
DBGLED
QE001
DMN5L06VK-7
SOT563
VER-5
SOC_RED_SLPS2R
SOC_BLUE_AWAKE
DBGLED
RE023
2.1K
1%
1/20W
MF
201
RE025
4.75K
1%
1/20W
MF
201
SOC_AMBER_DFU
S D
1
6
DBGLED
PAGE TITLE
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
19D3 23C3
77D4
IN
SOC_DFU_STATUS
QE001
5
G
S D
4
DMN5L06VK-7
SOT563
VER-5
3
BOM_COST_GROUP=DEBUG
LTST-C32JBGEW
21
SOC_RED_R
RE024
5.1K
1/20W
21
DBGLED
1%
MF
201
21
RE026
5.1K
5%
1/20W
MF
201
Apple Inc.
SM
R
4
G
3
B
2
DBGLED
SOC_GREEN_RSOC_GREEN_DDR
SOC_BLUE_R
21
SOC_AMBER_R
DBGLED
Dev Support 1
DFU LED
DBGLED
A
DE002
K
AMBER-605NM-35-56MCD
LTST-C281KFKT-SM
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
140 OF 150
SHEET
81 OF 109
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
SIZE
A
D
8
67
35 4
2
1
DEBUG LED STATUS TABLE
www.haojiyoubbs.com
QQ微信：181806465
DE000
678
3 245
1
D
LED COLOR
Breathing RED
RED
YELLOW
WHITE
BLUE
GREEN
Magenta
SYSTEM STATE
SHUTDOWN (G3H)
Standby (G3S)
Standby (G3S)
SLEEP
SLEEP
ACTIVE
INVALID
SOC STATE
SLPS2R
SLPS2R
AWAKE
SLPS2R
AWAKE
AWAKE
INVALID
CPU STATE
OFF
D
OFF
OFF
S0i
S0i
S0
INVALID
C
DE001
LED COLOR
RED
YELLOW
WHITE
GREEN LEDS
LED STATE
SLP_S5#
SOC STATE
SLPS2R
SLPDDR
AWAKE
S5
x86 State
S4 S3
ON ON
S0i S0
ON ON
C
Obsolete
UE020 SAK Truth Table:
B
SLP_S4#
SLP_S3#
SLP_S0#
ON
ON
ONON
ON ON
ON
PMU_ACT_RDY
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
SLP_SCFET_EN
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
INPUTS
SLP_S0_L
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
VDDQ_EN
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
0
1
1
0
0
1
1
0
0
1
1
1V8G3S_EN
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
01
1
0
1
0
1
0
1
0
0
1
0
1
R
BLINK
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
BLINK
0
0
11
0
0
0
1
OUTPUTS (OD)
G
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
1
1
1
1
0
B
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
01
0
0
1
COLOR
Blinking Red
Red
Magenta
White
Magenta
Magenta
Magenta
Magenta
Magenta
Magenta
Magenta
Magenta
Magenta
Magenta
Magenta
Magenta
Magenta
Magenta
Magenta
Magenta
Magenta
Magenta
Magenta
Magenta
Blinking Green & Yellow
Yellow
Magenta
Blue
Magenta
Magenta
Magenta
Green
B
A
8
SYNC_MASTER=myEE SYNC_DATE=03/01/2019
A
PAGE TITLE
Dev Support 2
DRAWING NUMBER
051-05198
Apple Inc.
REVISION
6.0.0
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
67
35 4
2
BRANCH
evt-3
PAGE
141 OF 150
SHEET
82 OF 109
1
SIZE
D
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
C
BOM Variants
EVT BOM release CPU:PRQ-BST
BOM NUMBER BOM NAME BOM OPTIONS
639-10425
639-10426
639-10427
639-10428
639-10429
639-10430
639-10431
639-10432
639-10433
639-10434
639-10435
639-10436
639-10437
639-10438
639-10439
639-10440
639-10441
639-10442
639-10324
639-10325
639-10326
639-10327
639-10308
639-10328
639-10329
639-10330
639-10331
PCBA,MLB-WELL,CPU-BST-PRQ,HY-8G,HY-1T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,MU-8G,HY-1T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,SS-8G,HY-1T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,HY-16G,HY-1T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,MU-16G,HY-1T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,SS-16G,HY-1T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,HY-32G,HY-1T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,MU-32G,HY-1T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,SS-32G,HY-1T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,HY-8G,HY-2T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,MU-8G,HY-2T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,SS-8G,HY-2T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,HY-16G,HY-2T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,MU-16G,HY-2T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,SS-16G,HY-2T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,HY-32G,HY-2T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,MU-32G,HY-2T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,SS-32G,HY-2T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,HY-8G,HY-4T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,MU-8G,HY-4T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,SS-8G,HY-4T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,HY-16G,HY-4T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,MU-16G,HY-4T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,SS-16G,HY-4T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,HY-32G,HY-4T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,MU-32G,HY-4T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,SS-32G,HY-4T,X1795
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:HY_8G,NANDCFG:HY_1T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:MI_8G,NANDCFG:HY_1T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:SS_8G,NANDCFG:HY_1T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:HY_16G,NANDCFG:HY_1T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:MI_16G,NANDCFG:HY_1T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:SS_16G,NANDCFG:HY_1T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:HY_32G,NANDCFG:HY_1T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:MI_32G,NANDCFG:HY_1T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:SS_32G,NANDCFG:HY_1T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:HY_8G,NANDCFG:HY_2T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:MI_8G,NANDCFG:HY_2T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:SS_8G,NANDCFG:HY_2T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:HY_16G,NANDCFG:HY_2T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:MI_16G,NANDCFG:HY_2T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:SS_16G,NANDCFG:HY_2T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:HY_32G,NANDCFG:HY_2T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:MI_32G,NANDCFG:HY_2T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:SS_32G,NANDCFG:HY_2T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:HY_8G,NANDCFG:HY_4T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:MI_8G,NANDCFG:HY_4T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:SS_8G,NANDCFG:HY_4T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:HY_16G,NANDCFG:HY_4T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:MI_16G,NANDCFG:HY_4T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:SS_16G,NANDCFG:HY_4T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:HY_32G,NANDCFG:HY_4T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:MI_32G,NANDCFG:HY_4T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:SS_32G,NANDCFG:HY_4T_S4E
TABLE_BOMGROUP_HEAD
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
EVT BOM release CPU:PRQ-BST
BOM NUMBER BOM NAME BOM OPTIONS
639-10478
639-10479
639-10480
639-10481
639-10482
639-10483
639-10484
639-10485
639-10486
639-10317
639-10318
639-10319
639-10320
639-10321
639-10322
639-10307
639-10323
639-10295
639-10487
639-10488
639-10489
639-10490
639-10491
639-10492
639-10493
639-10494
639-10495
PCBA,MLB-WELL,CPU-BST-PRQ,HY-8G,WD-2T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,MU-8G,WD-2T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,SS-8G,WD-2T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,HY-16G,WD-2T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,MU-16G,WD-2T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,SS-16G,WD-2T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,HY-32G,WD-2T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,MU-32G,WD-2T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,SS-32G,WD-2T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,HY-8G,WD-4T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,MU-8G,WD-4T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,SS-8G,WD-4T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,HY-16G,WD-4T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,MU-16G,WD-4T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,SS-16G,WD-4T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,HY-32G,WD-4T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,MU-32G,WD-4T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,SS-32G,WD-4T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,HY-8G,WD-512G,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,MU-8G,WD-512G,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,SS-8G,WD-512G,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,HY-16G,WD-512G,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,MU-16G,WD-512G,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,SS-16G,WD-512G,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,HY-32G,WD-512G,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,MU-32G,WD-512G,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,SS-32G,WD-512G,X1795
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:HY_8G,NANDCFG:WD_2T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:MI_8G,NANDCFG:WD_2T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:SS_8G,NANDCFG:WD_2T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:HY_16G,NANDCFG:WD_2T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:MI_16G,NANDCFG:WD_2T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:SS_16G,NANDCFG:WD_2T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:HY_32G,NANDCFG:WD_2T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:MI_32G,NANDCFG:WD_2T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:SS_32G,NANDCFG:WD_2T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:HY_8G,NANDCFG:WD_4T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:MI_8G,NANDCFG:WD_4T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:SS_8G,NANDCFG:WD_4T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:HY_16G,NANDCFG:WD_4T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:MI_16G,NANDCFG:WD_4T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:SS_16G,NANDCFG:WD_4T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:HY_32G,NANDCFG:WD_4T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:MI_32G,NANDCFG:WD_4T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:SS_32G,NANDCFG:WD_4T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:HY_8G,NANDCFG:WD_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:MI_8G,NANDCFG:WD_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:SS_8G,NANDCFG:WD_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:HY_16G,NANDCFG:WD_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:MI_16G,NANDCFG:WD_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:SS_16G,NANDCFG:WD_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:HY_32G,NANDCFG:WD_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:MI_32G,NANDCFG:WD_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:SS_32G,NANDCFG:WD_512G_S4E
EVT BOM release 998 NAND
TABLE_BOMGROUP_HEAD
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
D
C
B
639-10443
639-10444
639-10445
639-10446
639-10447
639-10448
639-10449
639-10450
639-10451
639-10452
639-10453
639-10454
PCBA,MLB-WELL,CPU-BST-PRQ,HY-8G,HY-512G,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,MU-8G,HY-512G,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,SS-8G,HY-512G,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,HY-16G,HY-512G,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,MU-16G,HY-512G,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,SS-16G,HY-512G,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,HY-32G,HY-512G,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,MU-32G,HY-512G,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,SS-32G,HY-512G,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,HY-8G,TS-1T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,MU-8G,TS-1T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,SS-8G,TS-1T,X1795
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:HY_8G,NANDCFG:HY_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:MI_8G,NANDCFG:HY_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:SS_8G,NANDCFG:HY_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:HY_16G,NANDCFG:HY_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:MI_16G,NANDCFG:HY_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:SS_16G,NANDCFG:HY_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:HY_32G,NANDCFG:HY_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:MI_32G,NANDCFG:HY_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:SS_32G,NANDCFG:HY_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:HY_8G,NANDCFG:TS_1T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:MI_8G,NANDCFG:TS_1T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:SS_8G,NANDCFG:TS_1T_S4E
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
939-09452
939-09487
939-09488
939-09494
939-09511
639-10382
639-10420
PCBA,MLB-WELL,CPU-BST-PRQ,HY-8G,TS-512G-SUB1,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,MU-8G,TS-512G-SUB1,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,MU-16G,WD-512G-SUB1,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,SS-16G,TS-512G-SUB1,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,SS-8G,TS-512G-SUB1,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,SS-8G,TS-512G-SUB2,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,MU-16G,WD-512G-SUB2,X1795
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:HY_8G,NANDCFG:TS_512G_SUB1_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:MI_8G,NANDCFG:TS_512G_SUB1_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:MI_16G,NANDCFG:WD_512G_SUB1_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:SS_16G,NANDCFG:TS_512G_SUB1_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:SS_8G,NANDCFG:TS_512G_SUB1_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:SS_8G,NANDCFG:TS_512G_SUB2_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:MI_16G,NANDCFG:WD_512G_SUB2_S4E
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
LBU-prod
Ma-01
Ma-03
Ma-02/C1/C2
B
A
639-10455
639-10456
639-10457
639-10294
639-10458
639-10459
639-10460
639-10461
639-10462
639-10463
639-10464
639-10465
639-10466
639-10467
639-10468
PCBA,MLB-WELL,CPU-BST-PRQ,HY-16G,TS-1T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,MU-16G,TS-1T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,SS-16G,TS-1T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,HY-32G,TS-1T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,MU-32G,TS-1T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,SS-32G,TS-1T,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,HY-8G,TS-512G,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,MU-8G,TS-512G,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,SS-8G,TS-512G,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,HY-16G,TS-512G,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,MU-16G,TS-512G,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,SS-16G,TS-512G,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,HY-32G,TS-512G,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,MU-32G,TS-512G,X1795
PCBA,MLB-WELL,CPU-BST-PRQ,SS-32G,TS-512G,X1795
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:HY_16G,NANDCFG:TS_1T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:MI_16G,NANDCFG:TS_1T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:SS_16G,NANDCFG:TS_1T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:HY_32G,NANDCFG:TS_1T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:MI_32G,NANDCFG:TS_1T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:SS_32G,NANDCFG:TS_1T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:HY_8G,NANDCFG:TS_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:MI_8G,NANDCFG:TS_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:SS_8G,NANDCFG:TS_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:HY_16G,NANDCFG:TS_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:MI_16G,NANDCFG:TS_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:SS_16G,NANDCFG:TS_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:HY_32G,NANDCFG:TS_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:MI_32G,NANDCFG:TS_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BST,DRAMCFG:SS_32G,NANDCFG:TS_512G_S4E
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
PAGE TITLE
BOM Variants 1
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
142 OF 150
SHEET
83 OF 109
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
A
SIZE
D
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
BOM Variants
EVT BOM release CPU:PRQ-BTR EVT BOM release CPU:PRQ-BTR
TABLE_BOMGROUP_HEAD
BOM NUMBER BOM NAME BOM OPTIONS
639-10338
639-10339
639-10340
PCBA,MLB-WELL,CPU-BTR-PRQ,HY-8G,HY-1T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,MU-8G,HY-1T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,SS-8G,HY-1T,X1795
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:HY_8G,NANDCFG:HY_1T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:MI_8G,NANDCFG:HY_1T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:SS_8G,NANDCFG:HY_1T_S4E
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
BOM NUMBER BOM NAME BOM OPTIONS
639-10389
639-10390
639-10391
PCBA,MLB-WELL,CPU-BTR-PRQ,HY-8G,WD-2T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,MU-8G,WD-2T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,SS-8G,WD-2T,X1795
3 245
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:HY_8G,NANDCFG:WD_2T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:MI_8G,NANDCFG:WD_2T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:SS_8G,NANDCFG:WD_2T_S4E
1
TABLE_BOMGROUP_HEAD
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
D
LB1
639-10291
639-10341
639-10342
639-10343
639-10344
639-10345
639-10346
639-10347
639-10348
639-10349
639-10350
639-10351
PCBA,MLB-WELL,CPU-BTR-PRQ,HY-16G,HY-1T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,MU-16G,HY-1T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,SS-16G,HY-1T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,HY-32G,HY-1T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,MU-32G,HY-1T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,SS-32G,HY-1T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,HY-8G,HY-2T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,MU-8G,HY-2T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,SS-8G,HY-2T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,HY-16G,HY-2T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,MU-16G,HY-2T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,SS-16G,HY-2T,X1795
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:HY_16G,NANDCFG:HY_1T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:MI_16G,NANDCFG:HY_1T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:SS_16G,NANDCFG:HY_1T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:HY_32G,NANDCFG:HY_1T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:MI_32G,NANDCFG:HY_1T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:SS_32G,NANDCFG:HY_1T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:HY_8G,NANDCFG:HY_2T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:MI_8G,NANDCFG:HY_2T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:SS_8G,NANDCFG:HY_2T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:HY_16G,NANDCFG:HY_2T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:MI_16G,NANDCFG:HY_2T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:SS_16G,NANDCFG:HY_2T_S4E
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
639-10392
639-10393
639-10394
639-10395
639-10396
639-10397
639-10398
639-10399
639-10400
639-10401
639-10402
639-10403
PCBA,MLB-WELL,CPU-BTR-PRQ,HY-16G,WD-2T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,MU-16G,WD-2T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,SS-16G,WD-2T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,HY-32G,WD-2T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,MU-32G,WD-2T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,SS-32G,WD-2T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,HY-8G,WD-4T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,MU-8G,WD-4T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,SS-8G,WD-4T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,HY-16G,WD-4T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,MU-16G,WD-4T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,SS-16G,WD-4T,X1795
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:HY_16G,NANDCFG:WD_2T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:MI_16G,NANDCFG:WD_2T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:SS_16G,NANDCFG:WD_2T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:HY_32G,NANDCFG:WD_2T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:MI_32G,NANDCFG:WD_2T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:SS_32G,NANDCFG:WD_2T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:HY_8G,NANDCFG:WD_4T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:MI_8G,NANDCFG:WD_4T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:SS_8G,NANDCFG:WD_4T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:HY_16G,NANDCFG:WD_4T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:MI_16G,NANDCFG:WD_4T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:SS_16G,NANDCFG:WD_4T_S4E
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
D
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
C
LB4
639-10302
639-10352
639-10353
639-10354
639-10355
639-10356
639-10357
639-10358
639-10359
639-10360
639-10296
639-10361
PCBA,MLB-WELL,CPU-BTR-PRQ,HY-32G,HY-2T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,MU-32G,HY-2T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,SS-32G,HY-2T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,HY-8G,HY-4T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,MU-8G,HY-4T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,SS-8G,HY-4T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,HY-16G,HY-4T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,MU-16G,HY-4T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,SS-16G,HY-4T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,HY-32G,HY-4T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,MU-32G,HY-4T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,SS-32G,HY-4T,X1795
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:HY_32G,NANDCFG:HY_2T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:MI_32G,NANDCFG:HY_2T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:SS_32G,NANDCFG:HY_2T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:HY_8G,NANDCFG:HY_4T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:MI_8G,NANDCFG:HY_4T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:SS_8G,NANDCFG:HY_4T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:HY_16G,NANDCFG:HY_4T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:MI_16G,NANDCFG:HY_4T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:SS_16G,NANDCFG:HY_4T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:HY_32G,NANDCFG:HY_4T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:MI_32G,NANDCFG:HY_4T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:SS_32G,NANDCFG:HY_4T_S4E
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
639-10404
639-10405
639-10406
639-10407
639-10408
639-10409
639-10410
639-10411
639-10412
639-10413
639-10414
639-10415
PCBA,MLB-WELL,CPU-BTR-PRQ,HY-32G,WD-4T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,MU-32G,WD-4T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,SS-32G,WD-4T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,HY-8G,WD-512G,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,MU-8G,WD-512G,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,SS-8G,WD-512G,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,HY-16G,WD-512G,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,MU-16G,WD-512G,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,SS-16G,WD-512G,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,HY-32G,WD-512G,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,MU-32G,WD-512G,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,SS-32G,WD-512G,X1795
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:HY_32G,NANDCFG:WD_4T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:MI_32G,NANDCFG:WD_4T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:SS_32G,NANDCFG:WD_4T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:HY_8G,NANDCFG:WD_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:MI_8G,NANDCFG:WD_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:SS_8G,NANDCFG:WD_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:HY_16G,NANDCFG:WD_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:MI_16G,NANDCFG:WD_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:SS_16G,NANDCFG:WD_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:HY_32G,NANDCFG:WD_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:MI_32G,NANDCFG:WD_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:SS_32G,NANDCFG:WD_512G_S4E
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
C
B
MINI1
639-10362
639-10363
639-10364
639-10365
639-10366
639-10367
639-10368
639-10369
639-10370
639-10306
639-10309
639-10310
PCBA,MLB-WELL,CPU-BTR-PRQ,HY-8G,HY-512G,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,MU-8G,HY-512G,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,SS-8G,HY-512G,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,HY-16G,HY-512G,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,MU-16G,HY-512G,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,SS-16G,HY-512G,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,HY-32G,HY-512G,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,MU-32G,HY-512G,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,SS-32G,HY-512G,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,HY-8G,TS-1T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,MU-8G,TS-1T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,SS-8G,TS-1T,X1795
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:HY_8G,NANDCFG:HY_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:MI_8G,NANDCFG:HY_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:SS_8G,NANDCFG:HY_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:HY_16G,NANDCFG:HY_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:MI_16G,NANDCFG:HY_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:SS_16G,NANDCFG:HY_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:HY_32G,NANDCFG:HY_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:MI_32G,NANDCFG:HY_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:SS_32G,NANDCFG:HY_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:HY_8G,NANDCFG:TS_1T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:MI_8G,NANDCFG:TS_1T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:SS_8G,NANDCFG:TS_1T_S4E
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
B
A
639-10311
639-10312
639-10313
639-10314
639-10315
639-10316
639-10371
639-10372
639-10373
639-10374
639-10375
639-10376
639-10377
639-10378
639-10379
PCBA,MLB-WELL,CPU-BTR-PRQ,HY-16G,TS-1T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,MU-16G,TS-1T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,SS-16G,TS-1T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,HY-32G,TS-1T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,MU-32G,TS-1T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,SS-32G,TS-1T,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,HY-8G,TS-512G,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,MU-8G,TS-512G,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,SS-8G,TS-512G,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,HY-16G,TS-512G,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,MU-16G,TS-512G,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,SS-16G,TS-512G,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,HY-32G,TS-512G,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,MU-32G,TS-512G,X1795
PCBA,MLB-WELL,CPU-BTR-PRQ,SS-32G,TS-512G,X1795
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:HY_16G,NANDCFG:TS_1T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:MI_16G,NANDCFG:TS_1T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:SS_16G,NANDCFG:TS_1T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:HY_32G,NANDCFG:TS_1T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:MI_32G,NANDCFG:TS_1T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:SS_32G,NANDCFG:TS_1T_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:HY_8G,NANDCFG:TS_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:MI_8G,NANDCFG:TS_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:SS_8G,NANDCFG:TS_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:HY_16G,NANDCFG:TS_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:MI_16G,NANDCFG:TS_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:SS_16G,NANDCFG:TS_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:HY_32G,NANDCFG:TS_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:MI_32G,NANDCFG:TS_512G_S4E
BASE_BOM,DEVEL_BOM,ALTERNATE,PRQ:BTR,DRAMCFG:SS_32G,NANDCFG:TS_512G_S4E
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
SYNC_MASTER=myEE SYNC_DATE=03/01/2019
PAGE TITLE
BOM Variants 2
SIZE
D
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
143 OF 150
SHEET
84 OF 109
A
8
67
35 4
2
1
D
www.haojiyoubbs.com
QQ微信：181806465
C
B
Alternate Parts
System EE
PART NUMBER
103S0321
103S00248
103S00250
107S0284
103S0276 ALL
103S00247
103S00249
ALL 8.06K 0.1% RESISTOR
ALL 18.2K 0.1% RESISTOR
107S00021
107S00005
107S00017 Cyntec w/ YageoALL107S00102
SENSOR:DEV
SENSOR:DEV
ALL Cyntec w/ Yageo107S00101
SENSOR:DEV
107S00100 ALL107S00057 Cyntec w/ TFT
107S00297
107S00344 ALL
138S00060 ALL138S00084
138S00071138S00117 ALL
138S0714 ALL138S0713 Murata w/ Samsung
138S0715 ALL Murata w/ Samsung138S0732
ALL138S0739 NEC w/ Vishay138S0706
138S0739 ALL138S0945 NEC w/ Rohm
138S0831 ANY ALL138S00049
ALL138S0978 Murata w/ Taiyo138S00104
138S00056 138S1100 ALL
ALL152S00369 Cyntec w/ NEC152S00268
152S00403 ALL Murata w/ Chillisin152S00322
ALL152S00864 152S00851
152S00434 ALL152S1829
ALL155S0665 155S00232
ALL155S00018 155S0664 Murata w/ Taiyo
ALL155S0897155S0914
ALL155S0897155S00190
ALL197S00046 197S00036 Epson w/ TXC
197S00120 197S00118 ALL
311S00007311S0426 ALL
ANY311S00091 ALL311S00104
311S00156 311S00129 ALL
311S00196 311S00195 ALL
311S00060 311S0273 ALL
311S00138 311S0436 ALL
311S0508311S00013 NXP w/ DiodesALL
335S00203 ALL335S00270
335S00213 ALL335S0888
353S00878 ALL353S00599
353S00879 ALL353S00754
353S00750 ALL353S00877
353S01042353S01041 ALL
353S01320353S01346 ALL
371S00190 ALL rdr47657476371S00085
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
TFT w/ YageoSENSOR:DEV ALL
Cyntec w/ TFT107S00020 ALL107S0276
rdr47657689/7932 R9002/4 100K THERMISTOR
rdr47657616ALL138S0835138S00181
Kyocera w/ TXCALL197S00047 197S00036
Murata w/ TXCALL197S00048 197S00036
rdr47643734311S00121 311S0398 ALL
TABLE_ALT_HEAD
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
678
System EE
PART NUMBER
376S1080
376S00282
376S1128
ALL376S0820
ALL
377S0077 ALL377S0183 Infineon w/ ST
Keyboard
PART NUMBER
138S0945 rdr52917381ALL138S0706
377S0184 377S0155 ALL rdr52918994
Audio
PART NUMBER
138S0641
ALL Murata w/ SS&Taiyo138S0700
138S0660 138S0684 ALL
138S1103
138S0719
ALL
155S0387155S0694 ALL
155S0660
155S00034 Taiyo w/ MurataALL
311S0271 ALL
155S0513
155S0706
311S00008
ALL
BLC
PART NUMBER
107S00034 ALL107S00033
ALL138S0738 138S1101
ALL
ALL
152S00359
138S0811138S0846
152S00253
376S1053 376S0604 ALL
376S0678 ALL376S1106
740S0159740S00041 ALL
152S00812 ALL
371S00217
152S1701
371S00079
ALL
371S00077 371S00180 ALL
WIRELESS
PART NUMBER
138S0986 ALL138S00024
ALL152S00659152S00769
152S00770
155S00067
ALL152S0857
ALL155S00401
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
NXP w/ DiodesALL376S00146 376S1061
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
rdr52917381ALL138S0706138S0739
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
Samsung alt to Murata
Samsung alt to Murata
Chilisin alt to Cyntec
Diodes alt to Fairchild
Fairchild alt to Vishay
rdr 51541757
rdr 51541757
rdr 51541757ALL138S00087 138S1086
D8410
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
3 245
DC-DC
TABLE_ALT_HEAD
PART NUMBER
TABLE_ALT_ITEM
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
ALL107S00015 107S00011
TABLE_ALT_ITEM
107S00029
TABLE_ALT_ITEM
ALL107S00087 TFT w/ Yageo
ALL107S00071 107S00053
TABLE_ALT_ITEM
ALL107S00139 107S0178
ALL107S0249 107S0251
128S00011 ALL128S00026
TABLE_ALT_HEAD
TABLE_ALT_ITEM
Q6710 etc
TABLE_ALT_ITEM
Q6710 etc
TABLE_ALT_ITEM
DZ6710/1/2
128S0302 128S00038 ALL
128S00039 ALL128S00038
128S00011 ALL128S00031
ALL128S00011128S00087
ALL128S00094 128S00067
rdr47625024
128S00065 128S00067 ALL
128S00069
128S0364
132S00012
128S00067 ALL
128S0264 ALL Kemet w/ Panasonic
132S0401 ALL
132S00064 ALL132S0409
138S00035
ALL138S00077
ALL138S00035138S00093
TABLE_ALT_HEAD
TABLE_ALT_ITEM
TABLE_ALT_ITEM
138S00111 ALL
138S00047 ALL
138S00036
138S00073
ALL138S00097 138S0750
ALL138S0775 138S0860
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
152S00048 ALL152S00363
152S00388
152S00182 ALL
ALL152S00703 152S00182
152S00383
152S00680 ALL
152S00198
152S00198
ALL
Murata w/ SSALL138S0941138S0789
Cyntec w/ Vishay
152S00398 ALL152S00204
TABLE_ALT_HEAD
152S00724
TABLE_ALT_ITEM
152S00786
TABLE_ALT_ITEM
152S00269152S00368 ALL
152S00311
ALL
152S00344 ALL
ALL152S00725 152S00590
152S00592152S00726
TABLE_ALT_ITEM
ALL
353S00831 353S00519 ALL
TABLE_ALT_ITEM
353S01831
TABLE_ALT_ITEM
TABLE_ALT_ITEM TABLE_ALT_ITEM
353S00519
353S00519353S02192
ALL
ALL
rdr52925387//U7210,etc
376S00203 ALL376S00204
TABLE_ALT_ITEM
L8450
D8450
TABLE_ALT_ITEM
C8453,etc
TABLE_ALT_ITEM
376S00203 ALL376S00226
376S00203376S00227 ALL
376S1038376S00373 ALL
376S1147 ALL376S00281
376S1179376S00007 ALL
TABLE_ALT_HEAD
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
376S1179376S00228
740S0118740S0144 ALL
740S00028
740S0118 ALL
376S1112376S00388 ALL rdr47655415
132S00176 132S0640 ALL rdr47638536
ALL
ALL rdr47616194371S00220 371S00181
TABLE_ALT_HEAD
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEMTABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEMTABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
System EE
PART NUMBER
152S01024 152S00386 rdr47616316ALL
ALL376S00328376S00036 rdr47624421
ALL376S00321 rdr49224226376S00397
ALL rdr47624585152S00439 152S00237
128S0352 rdr47615697128S0631 ALL
152S01011152S01012 rdrALL
ALL138S00107 rdr47616835138S00229
138S0786 138S0705 ALL Murata w/ Samsung
138S0746 ALL rdr47625279138S0705
152S01023 rdr47616530ALL
152S00384
107S00101 ALL rdr47615262107S00005
ALL rdr47615349107S00020107S0276
376S00074 376S00309 ALL rdr47645573
311S00096
311S00040 ALL rdr47646617
138S00139 rdr47616026138S00138 ALL
138S00138 ALL rdr47616026138S00164
353S4376 rdr47645195ALL353S3384
138S0931 ALL rdr47639616138S0933
371S0602 rdr47645369ALL371S00074
ALL
311S00178 ALL rdr47643915311S00177
311S0372 ALL311S0562 rdr47644278
311S0437 rdr47644489ALL311S00112
ALL371S00193371S00064 rdr48944134
705S00009
311S0315
376S00399
376S0855 rdr
376S00401
376S00403 rdr376S00398
372S00033
372S0183
197S00244
197S00258
197S00227
311S0593
353S01615
107S00016
107S00016
116S00006
353S4160
107S0118 rdr54314890ALL
107S0118
116S0175 rdr55262183ALL
SSD:S4E
SSD:S5E
ALL
ALL
ALL
ALL
ALL rdr52598787197S00227
ALL rdr52917700311S0596
ALL
ALL
335S00254 rdr52918703335S00410 ALL
377S00186 377S00060
ALL rdr56920619
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
rdr47624709ALL152S00997 152S00476
rdr47625081ALL376S00304376S1187
rdr47615887138S0914 ALL138S00109
rdr47643734311S00121311S0398
rdr48937018ALL705S00044
rdr48937850311S00239
rdr376S00398
rdr50212437ALL
rdr52598787ALL
rdr52861967
rdr54314890
rdr55225545131S00041131S00134 ALL
1
TABLE_ALT_HEAD
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
Q6861 etc
TABLE_ALT_ITEM
Q6861 etc
TABLE_ALT_ITEM
Q5874 etc
TABLE_ALT_ITEM
Y1900
TABLE_ALT_ITEM
TABLE_ALT_ITEM
U8472
TABLE_ALT_ITEM
U8400
TABLE_ALT_ITEM
R9015
TABLE_ALT_ITEM
TABLE_ALT_ITEM
R8159
TABLE_ALT_ITEM
C8490 etc
TABLE_ALT_ITEM
U6700
TABLE_ALT_ITEM
DZ3300* etc
D
C
B
A
8
USBC BLOCK
PART NUMBER
138S0852 rdr47616715138S0818
138S00071138S00116 ALL rdr47625423
67
ALL377S00031 rdr47657749377S00165
ALL
POLY CAP ALTs
TABLE_ALT_HEAD
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
TABLE_ALT_ITEM
TABLE_ALT_ITEM
rdr47565127ALL377S00106377S00166
TABLE_ALT_ITEM
128S00009 33UF
128S00107
TABLE_ALT_ITEM
TABLE_ALT_ITEM
PART NUMBER
128S00093
128S00093
128S00106 ALL128S00110
POLY:33UF128S00103152S01085 ALL152S01090
POLY:33UF
POLY:27UF
POLY:27UF
ALL
ALL
ALL128S00106
COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR
33UF rdr47540033
27UF
27UF
35 4
TABLE_ALT_HEAD
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
SYNC_MASTER=myEE SYNC_DATE=03/01/2019
PAGE TITLE
Alternates BOM Table
SIZE
D
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
2
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
145 OF 150
SHEET
85 OF 109
1
A
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
NAND U8600
998-17175 CRITICAL
998-17176 CRITICAL
998-16394
998-16395
998-16396
998-16397
998-16945
998-16970
335S00394
335S00378
NAND,3DV4,64GBT,S4E,256G,H,SUBX,SLGA110
1
1
1
1
1 U8600
1
1
1 U8600
NAND,3DV4,64GBT,S4E,256G,H,SUBY,SLGA110
NAND,3DV4,64GBT,S4E,256G,T,SUBX,SLGA110
NAND,3DV5,64GBT,S4E,256G,T,SUBY,SLGA110
NAND,3DV4,128GBT,S4E,256G,T,SUBX,SLGA110
NAND,3DV4,128GBT,S4E,256G,T,SUBY,SLGA110
NAND,3DV4,128GBT,S4E,256G,SD,SUBX,BGA110
NAND,3DV4,128GBT,S4E,256G,SD,SUBY,SBGA11
NAND,3DV4,128GBT,S4E,256G,T,SUBX,SLGA110
NAND,3DV4,128GBT,S4E,256G,H,SLGA110
NAND,3DV4,128GBT,S4E,256G,SD,SUBX,BGA110
U86001
U8600
U86001
U86001
U8600
U8600
U8600
U8600
U8600
CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL335S00389
NAND_U8600:2DP_SUB1_HY
NAND_U8600:2DP_SUB2_HY
NAND_U8600:2DP_SUB1_TS
NAND_U8600:2DP_SUB2_TS
NAND_U8600:4DP_SUB1_TS
NAND_U8600:4DP_SUB2_TS
NAND_U8600:4DP_SUB1_WD
NAND_U8600:4DP_SUB2_WD
NAND_U8600:4DP_TS
NAND_U8600:4DP_HY
NAND_U8600:4DP_WD
256G STALE
256G STALE
256G STALE
256G STALE
512G 998
512G 998
512G 998
512G 998
NAND U8700
CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION
998-17175
998-17176
998-16394
998-16395
998-16396
998-16397 CRITICAL
998-16945
998-16970
335S00378
335S00389
1
1
1
1
1
1 U8700
1
1
1
1
1
NAND,3DV4,64GBT,S4E,256G,H,SUBX,SLGA110
NAND,3DV4,64GBT,S4E,256G,H,SUBY,SLGA110
NAND,3DV4,64GBT,S4E,256G,T,SUBX,SLGA110
NAND,3DV5,64GBT,S4E,256G,T,SUBY,SLGA110
NAND,3DV4,128GBT,S4E,256G,T,SUBX,SLGA110
NAND,3DV4,128GBT,S4E,256G,T,SUBY,SLGA110
NAND,3DV4,128GBT,S4E,256G,SD,SUBX,BGA110
NAND,3DV4,128GBT,S4E,256G,SD,SUBY,SBGA11
NAND,3DV4,128GBT,S4E,256G,T,SUBX,SLGA110
NAND,3DV4,128GBT,S4E,256G,H,SLGA110
NAND,3DV4,128GBT,S4E,256G,SD,SUBX,BGA110
U8700
U8700
U8700
U8700
U8700
U8700
U8700
U8700
U8700
U8700
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL335S00394
CRITICAL
CRITICAL
NAND_U8700:2DP_SUB1_HY
NAND_U8700:2DP_SUB2_HY
NAND_U8700:2DP_SUB1_TS
NAND_U8700:2DP_SUB2_TS
NAND_U8700:4DP_SUB1_TS
NAND_U8700:4DP_SUB2_TS
NAND_U8700:4DP_SUB1_WD
NAND_U8700:4DP_SUB2_WD
NAND_U8700:4DP_TS
NAND_U8700:4DP_HY
NAND_U8700:4DP_WD
256G STALE
256G STALE
256G STALE
256G STALE
512G 998
512G 998
D
512G 998
512G 998
C
335S00395
335S00407 CRITICAL
335S00398
335S00379
335S00396
335S00397
1
1
1
1
1
335S00399
335S00380
335S00391
335S00433
1
335S00444
NAND,3DV4,192GBT,XXX,S4E,256G,T,SLGA110
NAND,3DV4,192GBT,XXX,S4E,256G,H,SBGA110
NAND,3DV4,192GBT,XXX,S4E,256G,H,SLGA110
NAND,3DV4,256GBT,S4E,256G,H,SLGA110
NAND,3DV4,256GBT,S4E,256G,T,SUBX,SLGA110
NAND,3DV4,320GBT,XXX,S4E,256G,T,SLGA110
NAND,3DV4,320GBT,XXX,S4E,256G,H,SLGA110
NAND,3DV4,512GBT,S4E,256G,H,SLGA110
NAND,3DV4,512GBT,XXX,S4E,256G,SD,SLGA110
NAND,3DV4,1TBT,XXX,S4E,512G,SD,SLGA110
NAND,3DV5,1024GBT,XXX,S4E,512G,H,SLGA110
U86001
U8600
U8600
U8600
U8600
U8600
U86001
U86001
U86001
U8600
U86001
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
NAND U8800
CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION
NAND_U8600:6DP_TS
NAND_U8600:6DP_WD
NAND_U8600:6DP_HY
NAND_U8600:8DP_HY
NAND_U8600:8DP_TS
NAND_U8600:10DP_TS
NAND_U8600:10DP_HY
NAND_U8600:16DP_HY
NAND_U8600:16DP_WD
NAND_U8600:16DP_2_WD
NAND_U8600:16DP_2_HY
335S00395
335S00407
335S00398
335S00396
335S00397
335S00380
335S00391
335S00433
NAND U8900
1
1
1
1
1
1
1
1
NAND,3DV4,192GBT,XXX,S4E,256G,T,SLGA110
NAND,3DV4,192GBT,XXX,S4E,256G,H,SBGA110
NAND,3DV4,192GBT,XXX,S4E,256G,H,SLGA110
NAND,3DV4,256GBT,S4E,256G,H,SLGA110
NAND,3DV4,256GBT,S4E,256G,T,SUBX,SLGA110
NAND,3DV4,320GBT,XXX,S4E,256G,T,SLGA110
NAND,3DV4,320GBT,XXX,S4E,256G,H,SLGA110
NAND,3DV4,512GBT,S4E,256G,H,SLGA110
NAND,3DV4,512GBT,XXX,S4E,256G,SD,SLGA110
NAND,3DV4,1TBT,XXX,S4E,512G,SD,SLGA110
NAND,3DV5,1024GBT,XXX,S4E,512G,H,SLGA110
U87001
U8700
U8700
U8700
U8700
U8700
U87001
U8700
U87001
U8700
U8700
CRITICAL
CRITICAL
CRITICAL
CRITICAL335S00379
CRITICAL
CRITICAL
CRITICAL335S00399
CRITICAL
CRITICAL
CRITICAL
CRITICAL335S00444
CRITICALPART NUMBER QTY BOM OPTIONREFERENCE DESDESCRIPTION
NAND_U8700:6DP_TS
NAND_U8700:6DP_WD
NAND_U8700:6DP_HY
NAND_U8700:8DP_HY
NAND_U8700:8DP_TS
NAND_U8700:10DP_TS
NAND_U8700:10DP_HY
NAND_U8700:16DP_HY
NAND_U8700:16DP_WD
NAND_U8700:16DP_2_WD
NAND_U8700:16DP_2_HY
C
998-17175
998-17176
998-16394
998-16395
998-16396
998-16397 CRITICAL
998-16945
998-16970
335S00394
335S00378
335S00389
335S00395
335S00407
1
1
1
1
1
1
1
1
1
1
1
1
NAND,3DV4,64GBT,S4E,256G,H,SUBX,SLGA110
NAND,3DV4,64GBT,S4E,256G,H,SUBY,SLGA110
NAND,3DV4,64GBT,S4E,256G,T,SUBX,SLGA110
NAND,3DV5,64GBT,S4E,256G,T,SUBY,SLGA110
NAND,3DV4,128GBT,S4E,256G,T,SUBX,SLGA110
NAND,3DV4,128GBT,S4E,256G,T,SUBY,SLGA110
NAND,3DV4,128GBT,S4E,256G,SD,SUBX,BGA110
NAND,3DV4,128GBT,S4E,256G,SD,SUBY,SBGA11
NAND,3DV4,128GBT,S4E,256G,T,SUBX,SLGA110
NAND,3DV4,128GBT,S4E,256G,H,SLGA110
NAND,3DV4,128GBT,S4E,256G,SD,SUBX,BGA110
NAND,3DV4,192GBT,XXX,S4E,256G,T,SLGA110
NAND,3DV4,192GBT,XXX,S4E,256G,H,SBGA110
U8800
U8800
U8800
U8800
U8900
U8900
U8900
U8900
U8800
U8800
U8800
U8800
U88001
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
NAND_U8800:2DP_SUB1_HY
NAND_U8800:2DP_SUB2_HY
NAND_U8800:2DP_SUB1_TS
NAND_U8800:2DP_SUB2_TS
NAND_U8900:4DP_SUB1_TS
NAND_U8900:4DP_SUB2_TS
NAND_U8900:4DP_SUB1_WD
NAND_U8900:4DP_SUB2_WD
NAND_U8800:4DP_TS
NAND_U8800:4DP_HY
NAND_U8800:4DP_WD
NAND_U8800:6DP_TS
NAND_U8800:6DP_WD
256G STALE
256G STALE
256G STALE
256G STALE
512G 998
512G 998
512G 998
998-17175
998-17176
998-16394
998-16395
998-16396
998-16945
998-16970
335S00394
335S00378
335S00389
335S00395
335S00407
1 U8900
1
1
1
1
1
1
1
1
NAND,3DV4,64GBT,S4E,256G,H,SUBX,SLGA110
NAND,3DV4,64GBT,S4E,256G,H,SUBY,SLGA110
NAND,3DV4,64GBT,S4E,256G,T,SUBX,SLGA110
NAND,3DV5,64GBT,S4E,256G,T,SUBY,SLGA110
NAND,3DV4,128GBT,S4E,256G,T,SUBX,SLGA110
NAND,3DV4,128GBT,S4E,256G,T,SUBY,SLGA110
NAND,3DV4,128GBT,S4E,256G,SD,SUBX,BGA110
NAND,3DV4,128GBT,S4E,256G,SD,SUBY,SBGA11
NAND,3DV4,128GBT,S4E,256G,T,SUBX,SLGA110
NAND,3DV4,128GBT,S4E,256G,H,SLGA110
NAND,3DV4,128GBT,S4E,256G,SD,SUBX,BGA110
NAND,3DV4,192GBT,XXX,S4E,256G,T,SLGA110
NAND,3DV4,192GBT,XXX,S4E,256G,H,SBGA110
U8900
U8900
U8900
U8800
U88001
U8800
U8800
U8900
U89001
U89001
U89001
U8900
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL998-16397
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
NAND_U8900:2DP_SUB1_HY
NAND_U8900:2DP_SUB2_HY
NAND_U8900:2DP_SUB1_TS
NAND_U8900:2DP_SUB2_TS
NAND_U8800:4DP_SUB1_TS
NAND_U8800:4DP_SUB2_TS
NAND_U8800:4DP_SUB1_WD
NAND_U8800:4DP_SUB2_WD
NAND_U8900:4DP_TS
NAND_U8900:4DP_HY
NAND_U8900:4DP_WD
NAND_U8900:6DP_TS
NAND_U8900:6DP_WD
256G STALE
256G STALE
256G STALE
256G STALE
512G 998512G 998
512G 998
512G 998
512G 998
B
A
335S00398
335S00379
335S00396
335S00399
335S00391
335S00444
1
1
1
1 U8800
1
1
1
NAND,3DV4,192GBT,XXX,S4E,256G,H,SLGA110
NAND,3DV4,256GBT,S4E,256G,H,SLGA110
NAND,3DV4,256GBT,S4E,256G,T,SUBX,SLGA110
NAND,3DV4,320GBT,XXX,S4E,256G,T,SLGA110
NAND,3DV4,320GBT,XXX,S4E,256G,H,SLGA110
NAND,3DV4,512GBT,S4E,256G,H,SLGA110
NAND,3DV4,512GBT,XXX,S4E,256G,SD,SLGA110
NAND,3DV4,1TBT,XXX,S4E,512G,SD,SLGA110
NAND,3DV5,1024GBT,XXX,S4E,512G,H,SLGA110
NAND/SOC Configs
BOM GROUP BOM OPTIONS
NANDCFG:TS_512G_S4E
NANDCFG:WD_512G_S4E
NANDCFG:HY_512G_S4E
NANDCFG:TS_1T_S4E
NANDCFG:HY_1T_S4E
NANDCFG:WD_2T_S4E
NANDCFG:HY_2T_S4E
NANDCFG:WD_4T_S4E
NANDCFG:HY_4T_S4E
256G STALE starting P1B
NANDCFG:TS_256G_SUB1_S4E
NANDCFG:HY_256G_SUB1_S4E
NANDCFG:HY_256G_SUB2_S4E
NAND_U8600:6DP_TS,NAND_U8700:6DP_TS,NAND_U8800:4DP_TS,NAND_U8900:4DP_TS,SOC:B0_1G,SSD:S4E,CMPT:512GSSD
NAND_U8600:6DP_WD,NAND_U8700:6DP_WD,NAND_U8800:4DP_WD,NAND_U8900:4DP_WD,SOC:B0_1G,SSD:S4E,CMPT:512GSSD
NAND_U8600:6DP_HY,NAND_U8700:6DP_HY,NAND_U8800:4DP_HY,NAND_U8900:4DP_HY,SOC:B0_1G,SSD:S4E,CMPT:512GSSD
NAND_U8600:10DP_TS,NAND_U8700:10DP_TS,NAND_U8800:8DP_TS,NAND_U8900:8DP_TS,SOC:B0_2G,SSD:S4E,CMPT:THRSSD
NAND_U8600:10DP_HY,NAND_U8700:10DP_HY,NAND_U8800:8DP_HY,NAND_U8900:8DP_HY,SOC:B0_2G,SSD:S4E,CMPT:THRSSD
NAND_U8600:16DP_WD,NAND_U8700:16DP_WD,NAND_U8800:16DP_WD,NAND_U8900:16DP_WD,SOC:B0_2G,SSD:S4E,CMPT:THRSSD
NAND_U8600:16DP_HY,NAND_U8700:16DP_HY,NAND_U8800:16DP_HY,NAND_U8900:16DP_HY,SOC:B0_2G,SSD:S4E,CMPT:THRSSD
NAND_U8600:16DP_2_WD,NAND_U8700:16DP_2_WD,NAND_U8800:16DP_2_WD,NAND_U8900:16DP_2_WD,SOC:B0_2G,SSD:S4E,CMPT:THRSSD
NAND_U8600:16DP_2_HY,NAND_U8700:16DP_2_HY,NAND_U8800:16DP_2_HY,NAND_U8900:16DP_2_HY,SOC:B0_2G,SSD:S4E,CMPT:THRSSD
NAND_U8600:4DP_SUB1_TS,NAND_U8700:2DP_SUB1_TS,NAND_U8800:2DP_SUB1_TS,NAND_U8900:2DP_SUB1_TS,SOC:B0_1G,SSD:S4E
NAND_U8600:4DP_HY,NAND_U8700:2DP_SUB1_HY,NAND_U8800:2DP_SUB1_HY,NAND_U8900:2DP_SUB1_HY,SOC:B0_1G,SSD:S4E
NAND_U8600:4DP_HY,NAND_U8700:2DP_SUB2_HY,NAND_U8800:2DP_SUB2_HY,NAND_U8900:2DP_SUB2_HY,SOC:B0_1G,SSD:S4E
U88001
U8800
U8800
U8800
U88001
U8800
U8800
U8800
CRITICAL
CRITICAL
CRITICAL
CRITICAL335S00397
CRITICAL
CRITICAL335S00380
CRITICAL
CRITICAL335S00433
CRITICAL
NAND_U8800:6DP_HY
NAND_U8800:8DP_HY
NAND_U8800:8DP_TS
NAND_U8800:10DP_TS
NAND_U8800:10DP_HY
NAND_U8800:16DP_HY
NAND_U8800:16DP_WD
NAND_U8800:16DP_2_WD
NAND_U8800:16DP_2_HY
TABLE_BOMGROUP_HEAD
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
335S00398
335S00396
335S00397
335S00399
335S00380
335S00391
335S00433
335S00444
1
1
1
1
1 U8900
NAND,3DV4,192GBT,XXX,S4E,256G,H,SLGA110
NAND,3DV4,256GBT,S4E,256G,H,SLGA110
NAND,3DV4,256GBT,S4E,256G,T,SUBX,SLGA110
NAND,3DV4,320GBT,XXX,S4E,256G,T,SLGA110
NAND,3DV4,320GBT,XXX,S4E,256G,H,SLGA110
NAND,3DV4,512GBT,S4E,256G,H,SLGA110
NAND,3DV4,512GBT,XXX,S4E,256G,SD,SLGA110
NAND,3DV4,1TBT,XXX,S4E,512G,SD,SLGA110
NAND,3DV5,1024GBT,XXX,S4E,512G,H,SLGA110
998 NAND/SOC Configs
BOM GROUP BOM OPTIONS
NANDCFG:TS_512G_SUB1_S4E
NANDCFG:TS_512G_SUB2_S4E
NANDCFG:WD_512G_SUB1_S4E
NANDCFG:WD_512G_SUB2_S4E
NAND_U8600:6DP_TS,NAND_U8700:6DP_TS,NAND_U8800:4DP_SUB1_TS,NAND_U8900:4DP_SUB1_TS,SOC:B0_1G,SSD:S4E,CMPT:512GSSD
NAND_U8600:6DP_TS,NAND_U8700:6DP_TS,NAND_U8800:4DP_SUB2_TS,NAND_U8900:4DP_SUB2_TS,SOC:B0_1G,SSD:S4E,CMPT:512GSSD
NAND_U8600:6DP_WD,NAND_U8700:6DP_WD,NAND_U8800:4DP_SUB1_WD,NAND_U8900:4DP_SUB1_WD,SOC:B0_1G,SSD:S4E,CMPT:512GSSD
NAND_U8600:6DP_WD,NAND_U8700:6DP_WD,NAND_U8800:4DP_SUB2_WD,NAND_U8900:4DP_SUB2_WD,SOC:B0_1G,SSD:S4E,CMPT:512GSSD
U8900
U89001
U8900
U8900
U8900
U89001
U89001
U89001
CRITICAL
CRITICAL335S00379
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
SYNC_MASTER=myEE
PAGE TITLE
NAND_U8900:6DP_HY
NAND_U8900:8DP_HY
NAND_U8900:8DP_TS
NAND_U8900:10DP_TS
NAND_U8900:10DP_HY
NAND_U8900:16DP_HY
NAND_U8900:16DP_WD
NAND_U8900:16DP_2_WD
NAND_U8900:16DP_2_HY
NAND BOM Config/Groups
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
SYNC_DATE=03/01/2019
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
149 OF 150
SHEET
86 OF 109
B
TABLE_BOMGROUP_HEAD
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
A
SIZE
D
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
Confluence:
https://confluence.appsit.apple.com/confluence/display/J214EE/Mac+HW+EE+Home
3 245
1
D
D
Kismet:
AFP://KISMET.APPLE.COM/KISMET-PROJECTS/J214
Useful Wiki Links:
Schematic Conventions - https://hmts.ecs.apple.com/wiki/index.php/User:Wferry/SchConventions
Schematic Design Wiki - https://hmts.ecs.apple.com/wiki/index.php/Schematic_Design
J214 HW Radar:
<rdar://component/XXXXXX> J214 HW EE | Proto 0
<rdar://component/XXXXXX> J214 HW EE BOM | Proto 0
C
<rdar://component/XXXXXX> J214 HW EE Characterization | Proto 0
<rdar://component/XXXXXX> J214 HW EE Layout | Proto 0
<rdar://component/XXXXXX> J214 HW EE Schematic | Proto 0
<rdar://component/XXXXXX> J214 HW EE SI | Proto 0
C
Other Info:
Page Allocations - box file
B
BLOCK Table
SOURCE PROJECT SUB-DESIGN NAME VERSION
J214.MIHIR_MARATHE
J214.ASARHANGNEJAD
J214.ASARHANGNEJAD
J214.ASARHANGNEJAD
J214.ASARHANGNEJAD
J214.ASARHANGNEJAD
MLB_WELL.LPDDR4X
5.0.8 2019_12_10_14:42:14SMLB_WELL.USBC_CONNECTOR
HARD/
SOFT
S5.0.8 2019_12_10_14:42:37MLB_WELL.USBC_SW
S5.0.8 2019_12_10_14:43:28MLB_WELL.USBC_VR
S5.0.8 2019_12_10_14:43:02MLB_WELL.ACE2BBR
SYNC_DATE/TIME
2019_09_25_18:49:11S1.9.2
2019_12_10_14:41:475.0.8 SMLB_WELL.USBC
B
TABLE_HIERARCHY_CONFIG_HEAD
TABLE_HIERARCHY_CONFIG_ITEM
TABLE_HIERARCHY_CONFIG_ITEM
TABLE_HIERARCHY_CONFIG_ITEM
TABLE_HIERARCHY_CONFIG_ITEM
TABLE_HIERARCHY_CONFIG_ITEM
TABLE_HIERARCHY_CONFIG_ITEM
A
8
SYNC_DATE=03/01/2019SYNC_MASTER=myEE
PAGE TITLE
A
References
DRAWING NUMBER
051-05198
Apple Inc.
REVISION
6.0.0
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
67
35 4
2
BRANCH
evt-3
PAGE
150 OF 150
SHEET
87 OF 109
1
SIZE
D
678
www.haojiyoubbs.com
QQ微信：181806465
LPDDR4x SUB CHANNEL
3 245
1
D
C
B
88C7 88C4 88B7 18D7
88D7 88C4 88B7 18D7
IN
IN
PP0V6_S3
VOLTAGE=0.6V
PP0V6_S3
VOLTAGE=0.6V
R2300_1
240
1%
1/20W
MF
201
240
1%
1/20W
MF
201
1
2
R2301_1
U2300_1
FBGA
SYM 1 OF 2
NC5
B2
C2
E2
F2
F4
E4
C4
B4
B11
C11
E11
F11
F9
E9
C9
B9
E3
D3
E10
D10
AA2
Y2
V2
U2
U4
V4
Y4
AA4
AA11
Y11
V11
U11
U9
V9
Y9
AA9
V3
W3
V10
W10
N8
T11
MEM_A_DQ_2<2>
MEM_A_DQ_2<5>
MEM_A_DQ_2<4>
MEM_A_DQ_2<3>
MEM_A_DQ_2<0>
MEM_A_DQ_2<6>
MEM_A_DQ_2<7>
MEM_A_DQ_2<1>
MEM_A_DQ_0<6>
MEM_A_DQ_0<5>
MEM_A_DQ_0<7>
MEM_A_DQ_0<3>
MEM_A_DQ_0<4>
MEM_A_DQ_0<2>
MEM_A_DQ_0<1>
MEM_A_DQ_0<0>
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
MEM_A_DQS_N<2>
MEM_A_DQS_P<2>
MEM_A_DQS_N<0>
MEM_A_DQS_P<0>
MEM_A_DQ_3<6>
MEM_A_DQ_3<7>
MEM_A_DQ_3<1>
MEM_A_DQ_3<4>
MEM_A_DQ_3<0>
MEM_A_DQ_3<5>
MEM_A_DQ_3<3>
MEM_A_DQ_3<2>
MEM_A_DQ_1<1>
MEM_A_DQ_1<2>
MEM_A_DQ_1<0>
MEM_A_DQ_1<4>
MEM_A_DQ_1<3>
MEM_A_DQ_1<5>
MEM_A_DQ_1<6>
MEM_A_DQ_1<7>
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
MEM_A_DQS_N<3>
MEM_A_DQS_P<3>
MEM_A_DQS_N<1>
MEM_A_DQS_P<1>
MEM_RESET_L
88C7 18D7
88C7 18D7
88C7 18D7
88C7 18D7
88C7 18D7
88C7 18D7 18D7
88C7 18D7
88C7 18D7
88C7 18D7
88C7 18D7
88C7 18D7
88C7 18D7
IN
IN
NO_TEST=1
IN
NO_TEST=1
IN
NO_TEST=1
IN
NO_TEST=1
IN
NO_TEST=1
IN
NO_TEST=1
IN IO
MEM_A_CKE<0>
IN
MEM_A_CKE<1>
IN
MEM_A_CLK_N
IN
MEM_A_CLK_P
IN
NO_TEST=1
NO_TEST=1
MEM_A_CA<0>
MEM_A_CA<1>
MEM_A_CA<2>
MEM_A_CA<3>
MEM_A_CA<4>
MEM_A_CA<5>
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
MEM_A_CS_L<0>
MEM_A_CS_L<1>
1
ODT_1
2
ZQ<0>_1
88D7 18D7
88D7 18D7
88D7 18D7
88D7 18D7
88D7 18D7
88D7 18D7
88D7 18D7
88D7 18D7
88D7 18D7
88D7 18D7
88D7 18D7
88D7 18D7
IN
IN
NO_TEST=1
IN
NO_TEST=1
IN
NO_TEST=1
IN
NO_TEST=1
IN
NO_TEST=1
IN
NO_TEST=1
IN
MEM_A_CKE<0>
IN
MEM_A_CKE<1>
IN
MEM_A_CLK_N
IN
MEM_A_CLK_P
IN
NO_TEST=1
NO_TEST=1
MEM_A_CA<0>
MEM_A_CA<1>
MEM_A_CA<2>
MEM_A_CA<3>
MEM_A_CA<4>
MEM_A_CA<5>
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
MEM_A_CS_L<0>
MEM_A_CS_L<1>
ODT_1
ZQ<1>_1
H2
CA0_A
J2
CA1_A
H9
CA2_A
H10
H11
J11
G11
NC
NC
C10
R10
R11
P11
NC
NC
Y10
NC NC
A11
NC
A12
NC
NC
AA1
NC
AA12
NC
AB1
NC
AB11
NC
AB12
NC
AB2
NC
NC
B12
NC
J4
J5
J9
J8
H4
H3
K5
C3
G2
A5
R2
P2
R9
P4
P5
K8
P9
P8
R4
R3
N5
Y3
T2
A8
A1
A2
B1
CA3_A
CA4_A
CA5_A
CKE0_A
CKE1_A
NC1
CK_C_A
CK_T_A
CS0_A
CS1_A
NC2
DMI0_A
DMI1_A
ODT_A
ZQ0
CA0_B
CA1_B
CA2_B
CA3_B
CA4_B
CA5_B
CKE0_B
CKE1_B
NC3
CK_C_B
CK_T_B
CS0_B
CS1_B
NC4
DMI0_B
DMI1_B
ODT_B
ZQ1
DNU
H9HCNNNFAMMLRR-NME
LPDDR4X-3200-64GBIT-21NM-1CS
OMIT_TABLE
CHANNEL A
CHANNEL B
DQ0_A
DQ1_A
DQ2_A
DQ3_A
DQ4_A
DQ5_A
DQ6_A
DQ7_A
DQ8_A
DQ9_A
DQ10_A
DQ11_A
DQ12_A
DQ13_A
DQ14_A
DQ15_A
DQS0_C_A
DQS0_T_A
DQS1_C_A
DQS1_T_A
DQ0_B
DQ1_B
DQ2_B
DQ3_B
DQ4_B
DQ5_B
DQ6_B
DQ7_B
DQ8_B
DQ9_B
DQ10_B
DQ11_B
DQ12_B
DQ13_B
DQ14_B
DQ15_B
DQS0_C_B
DQS0_T_B
DQS1_C_B
DQS1_T_B
RESET*
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
18D7
18D7
18D7
18D7
18D7
18D7
18D7
18D7
18D7
18D7
18D7
18D7
18D7
18D7
18D7
18D7
18D7
18D7
18D7
18D7
18D7
18D7
18D7
18D7
18D7
18D7
18D7
18D7
18D7
18D7
18D7
U2300_1
FBGA
SYM 2 OF 2
88A7 18D7
PP1V8_S3_MEM
IN
VOLTAGE=1.8V
F1
F12
G4
G9
T4
T9
U1
U12
GROUNDPOWER
VDD1
H9HCNNNFAMMLRR-NME
A10
A3
AB10
AB3
AB5
AB8
C1
C12
D
C5
88A7 88A3 18D7
PP1V1_S3
IN
VOLTAGE=1.1V
A4
A9
LPDDR4X-3200-64GBIT-21NM-1CS
AB4
AB9
F5
F8
H1
18D7
IO
18D7
IO
H12
H5
H8
18D7
IO
18D7
IO
K1
K10
K12
VDD2
K3
N1
N10
N12
N3
VSS
R1
R12
R5
R8
U5
U8
C8
D11
D2
D4
D9
E1
E12
E5
E8
G1
G10
G12
G3
G5
G8
J1
J10
J12
J3
K11
K2
K4
K9
N11
C
N2
88D7 88C7 88B7 18D7
PP0V6_S3
IN
VOLTAGE=0.6V
AA10
AA3
AA5
AA8
B10
18D7
IO
18D7
IO
B3
B5
B8
18D7
IO
18D7
IO
D1
D12
VDDQ
D5
D8
18D7
IN
F10
F3
U10
U3
W1
W12
W5
W8
N4
N9
P1
P10
P12
P3
T1
T10
T12
T3
T5
T8
V1
V12
V5
V8
W11
W2
W4
W9
Y1
Y12
Y5
B
Y8
A
88D7 88C7 88C4 18D7
88D4 88A3 18D7
88D4 18D7
PP0V6_S3
IN
PP1V1_S3
IN
PP1V8_S3_MEM
IN
1
1UF
20%
10V
2
X5R
0201
1
C2302_1
1UF
20%
10V
2
X5R
0201
1
1UF
20%
10V
2
X5R
0201
1
2
1
2
1
2
C2321_1C2320_1
1UF
20%
10V
X5R
0201
1UF
20%
10V
X5R
0201
1UF
20%
10V
X5R
0201
1
C2323_1
10UF
20%
10V
2
X5R-CERM
0402-7
1
C2304_1C2303_1
1UF
20%
10V
2
X5R
0201
1
C2332_1C2331_1C2330_1
10UF
20%
10V
2
X5R-CERM
0402-7
1
C2324_1
10UF
20%
10V
2
X5R-CERM
0402-7
1
C2305_1
1UF
20%
10V
2
X5R
0201
1
C2333_1
10UF
20%
10V
2
X5R-CERM
0402-7
DESENSE
1
C2340_1
12PF
5%
25V
2
NP0-C0G
0201
1
C2306_1
10UF
20%
10V
2
X5R-CERM
0402-7
1
C2334_1 C2335_1 C2338_1 C2339_1 C2345_1
10UF
20%
10V
2
X5R-CERM
0402-7
DESENSE
1
C2336_1
12PF
5%
25V
2
NP0-C0G
0201
1
C2307_1
10UF
20%
10V
2
X5R-CERM
0402-7
1
10UF
20%
10V
2
X5R-CERM
0402-7
DESENSE
1
C2337_1
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
C2341_1
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
C2343_1
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
C2342_1
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
C2344_1
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
H9HCNNNFAMMLRR 3.3.23 NOTE 4: ODT_CA PIN IGNORED BY
LPDDR4X DEVICES, CONNECT TO VALID-LOGIC LEVEL EITHER VDD2 OR VSS
PP1V1_S3
VOLTAGE=1.1V
R2390_1
0201
R2391_1
NOSTUFF
VOLTAGE=0V
IN
0
12
MF 5% 1/20W
0
2 1
5%
1/20W
MF
0201
88D4 88A7 18D7
ODT_1
SYNC_MASTER=J79A_MLB
PAGE TITLE
LPDDR4x Sub-Channel
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
BOM_COST_GROUP=DRAM
IV ALL RIGHTS RESERVED
SYNC_DATE=01/31/2017
DRAWING NUMBER
051-05198
REVISION
BRANCH
PAGE
1 OF 1
SHEET
88 OF 109
A
SIZE
D
6.0.0
evt-3
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
LPDDR4x SUB CHANNEL
3 245
1
D
C
B
89C7 89C4 89B7 18C7
89D7 89C4 89B7 18C7
IN
IN
PP0V6_S3
VOLTAGE=0.6V
PP0V6_S3
VOLTAGE=0.6V
R2300_2
240
1%
1/20W
MF
201
240
1%
1/20W
MF
201
1
2
R2301_2
U2300_2
FBGA
SYM 1 OF 2
NC5
B2
C2
E2
F2
F4
E4
C4
B4
B11
C11
E11
F11
F9
E9
C9
B9
E3
D3
E10
D10
AA2
Y2
V2
U2
U4
V4
Y4
AA4
AA11
Y11
V11
U11
U9
V9
Y9
AA9
V3
W3
V10
W10
N8
T11
MEM_B_DQ_2<3>
MEM_B_DQ_2<2>
MEM_B_DQ_2<4>
MEM_B_DQ_2<0>
MEM_B_DQ_2<5>
MEM_B_DQ_2<6>
MEM_B_DQ_2<1>
MEM_B_DQ_2<7>
MEM_B_DQ_0<2>
MEM_B_DQ_0<5>
MEM_B_DQ_0<3>
MEM_B_DQ_0<0>
MEM_B_DQ_0<4>
MEM_B_DQ_0<6>
MEM_B_DQ_0<1>
MEM_B_DQ_0<7>
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
MEM_B_DQS_N<2>
MEM_B_DQS_P<2>
MEM_B_DQS_N<0>
MEM_B_DQS_P<0>
MEM_B_DQ_3<4>
MEM_B_DQ_3<3>
MEM_B_DQ_3<2>
MEM_B_DQ_3<6>
MEM_B_DQ_3<5>
MEM_B_DQ_3<0>
MEM_B_DQ_3<7>
MEM_B_DQ_3<1>
MEM_B_DQ_1<3>
MEM_B_DQ_1<7>
MEM_B_DQ_1<4>
MEM_B_DQ_1<1>
MEM_B_DQ_1<6>
MEM_B_DQ_1<5>
MEM_B_DQ_1<0>
MEM_B_DQ_1<2>
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
MEM_B_DQS_N<3>
MEM_B_DQS_P<3>
MEM_B_DQS_N<1>
MEM_B_DQS_P<1>
MEM_RESET_L
89C7 18C7
89C7 18C7
89C7 18C7
89C7 18C7
89C7 18C7
89C7 18C7 18C7
89C7 18C7
89C7 18C7
89C7 18C7
89C7 18C7
89C7 18C7
89C7 18C7
IN
IN
NO_TEST=1
IN
NO_TEST=1
IN
NO_TEST=1
IN
NO_TEST=1
IN
NO_TEST=1
IN
NO_TEST=1
IN IO
MEM_B_CKE<0>
IN
MEM_B_CKE<1>
IN
MEM_B_CLK_N
IN
MEM_B_CLK_P
IN
NO_TEST=1
NO_TEST=1
MEM_B_CA<0>
MEM_B_CA<1>
MEM_B_CA<2>
MEM_B_CA<3>
MEM_B_CA<4>
MEM_B_CA<5>
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
MEM_B_CS_L<0>
MEM_B_CS_L<1>
1
ODT_2
2
ZQ<0>_2
89D7 18C7
89D7 18C7
89D7 18C7
89D7 18C7
89D7 18C7
89D7 18C7
89D7 18C7
89D7 18C7
89D7 18C7
89D7 18C7
89D7 18C7
89D7 18C7
IN
IN
NO_TEST=1
IN
NO_TEST=1
IN
NO_TEST=1
IN
NO_TEST=1
IN
NO_TEST=1
IN
NO_TEST=1
IN
MEM_B_CKE<0>
IN
MEM_B_CKE<1>
IN
MEM_B_CLK_N
IN
MEM_B_CLK_P
IN
NO_TEST=1
NO_TEST=1
MEM_B_CA<0>
MEM_B_CA<1>
MEM_B_CA<2>
MEM_B_CA<3>
MEM_B_CA<4>
MEM_B_CA<5>
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
MEM_B_CS_L<0>
MEM_B_CS_L<1>
ODT_2
ZQ<1>_2
H2
CA0_A
J2
CA1_A
H9
CA2_A
H10
H11
J11
G11
NC
NC
C10
R10
R11
P11
NC
NC
Y10
NC NC
A11
NC
A12
NC
NC
AA1
NC
AA12
NC
AB1
NC
AB11
NC
AB12
NC
AB2
NC
NC
B12
NC
J4
J5
J9
J8
H4
H3
K5
C3
G2
A5
R2
P2
R9
P4
P5
K8
P9
P8
R4
R3
N5
Y3
T2
A8
A1
A2
B1
CA3_A
CA4_A
CA5_A
CKE0_A
CKE1_A
NC1
CK_C_A
CK_T_A
CS0_A
CS1_A
NC2
DMI0_A
DMI1_A
ODT_A
ZQ0
CA0_B
CA1_B
CA2_B
CA3_B
CA4_B
CA5_B
CKE0_B
CKE1_B
NC3
CK_C_B
CK_T_B
CS0_B
CS1_B
NC4
DMI0_B
DMI1_B
ODT_B
ZQ1
DNU
H9HCNNNFAMMLRR-NME
LPDDR4X-3200-64GBIT-21NM-1CS
OMIT_TABLE
CHANNEL A
CHANNEL B
DQ0_A
DQ1_A
DQ2_A
DQ3_A
DQ4_A
DQ5_A
DQ6_A
DQ7_A
DQ8_A
DQ9_A
DQ10_A
DQ11_A
DQ12_A
DQ13_A
DQ14_A
DQ15_A
DQS0_C_A
DQS0_T_A
DQS1_C_A
DQS1_T_A
DQ0_B
DQ1_B
DQ2_B
DQ3_B
DQ4_B
DQ5_B
DQ6_B
DQ7_B
DQ8_B
DQ9_B
DQ10_B
DQ11_B
DQ12_B
DQ13_B
DQ14_B
DQ15_B
DQS0_C_B
DQS0_T_B
DQS1_C_B
DQS1_T_B
RESET*
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
U2300_2
FBGA
SYM 2 OF 2
89A7 18C7
PP1V8_S3_MEM
IN
VOLTAGE=1.8V
F1
F12
G4
G9
T4
T9
U1
U12
GROUNDPOWER
VDD1
H9HCNNNFAMMLRR-NME
A10
A3
AB10
AB3
AB5
AB8
C1
C12
D
C5
89A7 89A3 18C7
PP1V1_S3
IN
VOLTAGE=1.1V
A4
A9
LPDDR4X-3200-64GBIT-21NM-1CS
AB4
AB9
F5
F8
H1
18C7
IO
18C7
IO
H12
H5
H8
18C7
IO
18C7
IO
K1
K10
K12
VDD2
K3
N1
N10
N12
N3
VSS
R1
R12
R5
R8
U5
U8
C8
D11
D2
D4
D9
E1
E12
E5
E8
G1
G10
G12
G3
G5
G8
J1
J10
J12
J3
K11
K2
K4
K9
N11
C
N2
89D7 89C7 89B7 18C7
PP0V6_S3
IN
VOLTAGE=0.6V
AA10
AA3
AA5
AA8
B10
18C7
IO
18C7
IO
B3
B5
B8
18C7
IO
18C7
IO
D1
D12
VDDQ
D5
D8
18C7
IN
F10
F3
U10
U3
W1
W12
W5
W8
N4
N9
P1
P10
P12
P3
T1
T10
T12
T3
T5
T8
V1
V12
V5
V8
W11
W2
W4
W9
Y1
Y12
Y5
B
Y8
A
89D7 89C7 89C4 18C7
89D4 89A3 18C7
89D4 18C7
PP0V6_S3
IN
PP1V1_S3
IN
PP1V8_S3_MEM
IN
1
1UF
20%
10V
2
X5R
0201
1
C2302_2
1UF
20%
10V
2
X5R
0201
1
1UF
20%
10V
2
X5R
0201
1
2
1
2
1
2
C2321_2C2320_2
1UF
20%
10V
X5R
0201
1UF
20%
10V
X5R
0201
1UF
20%
10V
X5R
0201
1
C2323_2
10UF
20%
10V
2
X5R-CERM
0402-7
1
C2304_2C2303_2
1UF
20%
10V
2
X5R
0201
1
C2332_2C2331_2C2330_2
10UF
20%
10V
2
X5R-CERM
0402-7
1
C2324_2
10UF
20%
10V
2
X5R-CERM
0402-7
1
C2305_2
1UF
20%
10V
2
X5R
0201
1
C2333_2
10UF
20%
10V
2
X5R-CERM
0402-7
DESENSE
1
C2340_2
12PF
5%
25V
2
NP0-C0G
0201
1
C2306_2
10UF
20%
10V
2
X5R-CERM
0402-7
1
C2334_2 C2335_2 C2338_2 C2339_2 C2345_2
10UF
20%
10V
2
X5R-CERM
0402-7
DESENSE
1
C2336_2
12PF
5%
25V
2
NP0-C0G
0201
1
C2307_2
10UF
20%
10V
2
X5R-CERM
0402-7
1
10UF
20%
10V
2
X5R-CERM
0402-7
DESENSE
1
C2337_2
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
C2341_2
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
C2343_2
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
C2342_2
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
C2344_2
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
H9HCNNNFAMMLRR 3.3.23 NOTE 4: ODT_CA PIN IGNORED BY
LPDDR4X DEVICES, CONNECT TO VALID-LOGIC LEVEL EITHER VDD2 OR VSS
PP1V1_S3
VOLTAGE=1.1V
R2390_2
0201
R2391_2
NOSTUFF
VOLTAGE=0V
IN
0
12
MF 5% 1/20W
0
2 1
5%
1/20W
MF
0201
89D4 89A7 18C7
ODT_2
SYNC_MASTER=J79A_MLB
PAGE TITLE
LPDDR4x Sub-Channel
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
BOM_COST_GROUP=DRAM
IV ALL RIGHTS RESERVED
SYNC_DATE=01/31/2017
DRAWING NUMBER
051-05198
REVISION
BRANCH
PAGE
1 OF 1
SHEET
89 OF 109
A
SIZE
D
6.0.0
evt-3
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
LPDDR4x SUB CHANNEL
3 245
1
D
C
B
90C7 90C4 90B7 18C7
90D7 90C4 90B7 18C7
IN
IN
PP0V6_S3
VOLTAGE=0.6V
PP0V6_S3
VOLTAGE=0.6V
R2300_3
240
1%
1/20W
MF
201
240
1%
1/20W
MF
201
1
2
R2301_3
U2300_3
FBGA
SYM 1 OF 2
NC5
B2
C2
E2
F2
F4
E4
C4
B4
B11
C11
E11
F11
F9
E9
C9
B9
E3
D3
E10
D10
AA2
Y2
V2
U2
U4
V4
Y4
AA4
AA11
Y11
V11
U11
U9
V9
Y9
AA9
V3
W3
V10
W10
N8
T11
MEM_C_DQ_1<0>
MEM_C_DQ_1<6>
MEM_C_DQ_1<7>
MEM_C_DQ_1<3>
MEM_C_DQ_1<1>
MEM_C_DQ_1<4>
MEM_C_DQ_1<2>
MEM_C_DQ_1<5>
MEM_C_DQ_3<5>
MEM_C_DQ_3<4>
MEM_C_DQ_3<2>
MEM_C_DQ_3<1>
MEM_C_DQ_3<3>
MEM_C_DQ_3<0>
MEM_C_DQ_3<7>
MEM_C_DQ_3<6>
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
MEM_C_DQS_N<1>
MEM_C_DQS_P<1>
MEM_C_DQS_N<3>
MEM_C_DQS_P<3>
MEM_C_DQ_0<7>
MEM_C_DQ_0<6>
MEM_C_DQ_0<0>
MEM_C_DQ_0<5>
MEM_C_DQ_0<1>
MEM_C_DQ_0<4>
MEM_C_DQ_0<2>
MEM_C_DQ_0<3>
MEM_C_DQ_2<0>
MEM_C_DQ_2<3>
MEM_C_DQ_2<2>
MEM_C_DQ_2<5>
MEM_C_DQ_2<1>
MEM_C_DQ_2<4>
MEM_C_DQ_2<7>
MEM_C_DQ_2<6>
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
MEM_C_DQS_N<0>
MEM_C_DQS_P<0>
MEM_C_DQS_N<2>
MEM_C_DQS_P<2>
MEM_RESET_L
90C7 18C7
90C7 18C7
90C7 18C7
90C7 18C7
90C7 18C7
90C7 18C7 18C7
90C7 18C7
90C7 18C7
90C7 18C7
90C7 18C7
90C7 18C7
90C7 18C7
IN
IN
NO_TEST=1
IN
NO_TEST=1
IN
NO_TEST=1
IN
NO_TEST=1
IN
NO_TEST=1
IN
NO_TEST=1
IN IO
MEM_C_CKE<0>
IN
MEM_C_CKE<1>
IN
MEM_C_CLK_N
IN
MEM_C_CLK_P
IN
NO_TEST=1
NO_TEST=1
MEM_C_CA<0>
MEM_C_CA<1>
MEM_C_CA<2>
MEM_C_CA<3>
MEM_C_CA<4>
MEM_C_CA<5>
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
MEM_C_CS_L<0>
MEM_C_CS_L<1>
1
ODT_3
2
ZQ<0>_3
90D7 18C7
90D7 18C7
90D7 18C7
90D7 18C7
90D7 18C7
90D7 18C7
90D7 18C7
90D7 18C7
90D7 18C7
90D7 18C7
90D7 18C7
90D7 18C7
IN
IN
NO_TEST=1
IN
NO_TEST=1
IN
NO_TEST=1
IN
NO_TEST=1
IN
NO_TEST=1
IN
NO_TEST=1
IN
MEM_C_CKE<0>
IN
MEM_C_CKE<1>
IN
MEM_C_CLK_N
IN
MEM_C_CLK_P
IN
NO_TEST=1
NO_TEST=1
MEM_C_CA<0>
MEM_C_CA<1>
MEM_C_CA<2>
MEM_C_CA<3>
MEM_C_CA<4>
MEM_C_CA<5>
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
MEM_C_CS_L<0>
MEM_C_CS_L<1>
ODT_3
ZQ<1>_3
H2
CA0_A
J2
CA1_A
H9
CA2_A
H10
H11
J11
G11
NC
NC
C10
R10
R11
P11
NC
NC
Y10
NC NC
A11
NC
A12
NC
NC
AA1
NC
AA12
NC
AB1
NC
AB11
NC
AB12
NC
AB2
NC
NC
B12
NC
J4
J5
J9
J8
H4
H3
K5
C3
G2
A5
R2
P2
R9
P4
P5
K8
P9
P8
R4
R3
N5
Y3
T2
A8
A1
A2
B1
CA3_A
CA4_A
CA5_A
CKE0_A
CKE1_A
NC1
CK_C_A
CK_T_A
CS0_A
CS1_A
NC2
DMI0_A
DMI1_A
ODT_A
ZQ0
CA0_B
CA1_B
CA2_B
CA3_B
CA4_B
CA5_B
CKE0_B
CKE1_B
NC3
CK_C_B
CK_T_B
CS0_B
CS1_B
NC4
DMI0_B
DMI1_B
ODT_B
ZQ1
DNU
H9HCNNNFAMMLRR-NME
LPDDR4X-3200-64GBIT-21NM-1CS
OMIT_TABLE
CHANNEL A
CHANNEL B
DQ0_A
DQ1_A
DQ2_A
DQ3_A
DQ4_A
DQ5_A
DQ6_A
DQ7_A
DQ8_A
DQ9_A
DQ10_A
DQ11_A
DQ12_A
DQ13_A
DQ14_A
DQ15_A
DQS0_C_A
DQS0_T_A
DQS1_C_A
DQS1_T_A
DQ0_B
DQ1_B
DQ2_B
DQ3_B
DQ4_B
DQ5_B
DQ6_B
DQ7_B
DQ8_B
DQ9_B
DQ10_B
DQ11_B
DQ12_B
DQ13_B
DQ14_B
DQ15_B
DQS0_C_B
DQS0_T_B
DQS1_C_B
DQS1_T_B
RESET*
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
18C7
U2300_3
FBGA
SYM 2 OF 2
90A7 18C7
PP1V8_S3_MEM
IN
VOLTAGE=1.8V
F1
F12
G4
G9
T4
T9
U1
U12
GROUNDPOWER
VDD1
H9HCNNNFAMMLRR-NME
A10
A3
AB10
AB3
AB5
AB8
C1
C12
D
C5
90A7 90A3 18C7
PP1V1_S3
IN
VOLTAGE=1.1V
A4
A9
LPDDR4X-3200-64GBIT-21NM-1CS
AB4
AB9
F5
F8
H1
18C7
IO
18C7
IO
H12
H5
H8
18C7
IO
18C7
IO
K1
K10
K12
VDD2
K3
N1
N10
N12
N3
VSS
R1
R12
R5
R8
U5
U8
C8
D11
D2
D4
D9
E1
E12
E5
E8
G1
G10
G12
G3
G5
G8
J1
J10
J12
J3
K11
K2
K4
K9
N11
C
N2
90D7 90C7 90B7 18C7
PP0V6_S3
IN
VOLTAGE=0.6V
AA10
AA3
AA5
AA8
B10
18C7
IO
18C7
IO
B3
B5
B8
18C7
IO
18C7
IO
D1
D12
VDDQ
D5
D8
18C7
IN
F10
F3
U10
U3
W1
W12
W5
W8
N4
N9
P1
P10
P12
P3
T1
T10
T12
T3
T5
T8
V1
V12
V5
V8
W11
W2
W4
W9
Y1
Y12
Y5
B
Y8
A
90D7 90C7 90C4 18C7
90D4 90A3 18C7
90D4 18C7
PP0V6_S3
IN
PP1V1_S3
IN
PP1V8_S3_MEM
IN
1
1UF
20%
10V
2
X5R
0201
1
C2302_3
1UF
20%
10V
2
X5R
0201
1
1UF
20%
10V
2
X5R
0201
1
2
1
2
1
2
C2321_3C2320_3
1UF
20%
10V
X5R
0201
1UF
20%
10V
X5R
0201
1UF
20%
10V
X5R
0201
1
C2323_3
10UF
20%
10V
2
X5R-CERM
0402-7
1
C2304_3C2303_3
1UF
20%
10V
2
X5R
0201
1
C2332_3C2331_3C2330_3
10UF
20%
10V
2
X5R-CERM
0402-7
1
C2324_3
10UF
20%
10V
2
X5R-CERM
0402-7
1
C2305_3
1UF
20%
10V
2
X5R
0201
1
C2333_3
10UF
20%
10V
2
X5R-CERM
0402-7
DESENSE
1
C2340_3
12PF
5%
25V
2
NP0-C0G
0201
1
C2306_3
10UF
20%
10V
2
X5R-CERM
0402-7
1
C2334_3 C2335_3 C2338_3 C2339_3 C2345_3
10UF
20%
10V
2
X5R-CERM
0402-7
DESENSE
1
C2336_3
12PF
5%
25V
2
NP0-C0G
0201
1
C2307_3
10UF
20%
10V
2
X5R-CERM
0402-7
1
10UF
20%
10V
2
X5R-CERM
0402-7
DESENSE
1
C2337_3
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
C2341_3
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
C2343_3
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
C2342_3
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
C2344_3
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
H9HCNNNFAMMLRR 3.3.23 NOTE 4: ODT_CA PIN IGNORED BY
LPDDR4X DEVICES, CONNECT TO VALID-LOGIC LEVEL EITHER VDD2 OR VSS
PP1V1_S3
VOLTAGE=1.1V
R2390_3
0201
R2391_3
NOSTUFF
VOLTAGE=0V
IN
0
12
MF 5% 1/20W
0
2 1
5%
1/20W
MF
0201
90D4 90A7 18C7
ODT_3
SYNC_MASTER=J79A_MLB
PAGE TITLE
LPDDR4x Sub-Channel
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
BOM_COST_GROUP=DRAM
IV ALL RIGHTS RESERVED
SYNC_DATE=01/31/2017
DRAWING NUMBER
051-05198
REVISION
BRANCH
PAGE
1 OF 1
SHEET
90 OF 109
A
SIZE
D
6.0.0
evt-3
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
LPDDR4x SUB CHANNEL
3 245
1
D
C
B
91C7 91C4 91B7 18B7
91D7 91C4 91B7 18B7
IN
IN
PP0V6_S3
VOLTAGE=0.6V
PP0V6_S3
VOLTAGE=0.6V
R2300_4
240
1%
1/20W
MF
201
240
1%
1/20W
MF
201
1
2
R2301_4
U2300_4
FBGA
SYM 1 OF 2
NC5
B2
C2
E2
F2
F4
E4
C4
B4
B11
C11
E11
F11
F9
E9
C9
B9
E3
D3
E10
D10
AA2
Y2
V2
U2
U4
V4
Y4
AA4
AA11
Y11
V11
U11
U9
V9
Y9
AA9
V3
W3
V10
W10
N8
T11
MEM_D_DQ_1<0>
MEM_D_DQ_1<1>
MEM_D_DQ_1<6>
MEM_D_DQ_1<2>
MEM_D_DQ_1<7>
MEM_D_DQ_1<5>
MEM_D_DQ_1<3>
MEM_D_DQ_1<4>
MEM_D_DQ_3<5>
MEM_D_DQ_3<6>
MEM_D_DQ_3<4>
MEM_D_DQ_3<0>
MEM_D_DQ_3<7>
MEM_D_DQ_3<2>
MEM_D_DQ_3<1>
MEM_D_DQ_3<3>
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
MEM_D_DQS_N<1>
MEM_D_DQS_P<1>
MEM_D_DQS_N<3>
MEM_D_DQS_P<3>
MEM_D_DQ_0<1>
MEM_D_DQ_0<3>
MEM_D_DQ_0<6>
MEM_D_DQ_0<5>
MEM_D_DQ_0<2>
MEM_D_DQ_0<4>
MEM_D_DQ_0<0>
MEM_D_DQ_0<7>
MEM_D_DQ_2<1>
MEM_D_DQ_2<3>
MEM_D_DQ_2<0>
MEM_D_DQ_2<4>
MEM_D_DQ_2<2>
MEM_D_DQ_2<5>
MEM_D_DQ_2<6>
MEM_D_DQ_2<7>
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
MEM_D_DQS_N<0>
MEM_D_DQS_P<0>
MEM_D_DQS_N<2>
MEM_D_DQS_P<2>
MEM_RESET_L
91C7 18B7
91C7 18B7
91C7 18B7
91C7 18B7
91C7 18B7
91C7 18B7 18B7
91C7 18B7
91C7 18B7
91C7 18B7
91C7 18B7
91C7 18B7
91C7 18B7
IN
IN
NO_TEST=1
IN
NO_TEST=1
IN
NO_TEST=1
IN
NO_TEST=1
IN
NO_TEST=1
IN
NO_TEST=1
IN IO
MEM_D_CKE<0>
IN
MEM_D_CKE<1>
IN
MEM_D_CLK_N
IN
MEM_D_CLK_P
IN
NO_TEST=1
NO_TEST=1
MEM_D_CA<0>
MEM_D_CA<1>
MEM_D_CA<2>
MEM_D_CA<3>
MEM_D_CA<4>
MEM_D_CA<5>
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
MEM_D_CS_L<0>
MEM_D_CS_L<1>
1
ODT_4
2
ZQ<0>_4
91D7 18B7
91D7 18B7
91D7 18B7
91D7 18B7
91D7 18B7
91D7 18B7
91D7 18B7
91D7 18B7
91D7 18B7
91D7 18B7
91D7 18B7
91D7 18B7
IN
IN
NO_TEST=1
IN
NO_TEST=1
IN
NO_TEST=1
IN
NO_TEST=1
IN
NO_TEST=1
IN
NO_TEST=1
IN
MEM_D_CKE<0>
IN
MEM_D_CKE<1>
IN
MEM_D_CLK_N
IN
MEM_D_CLK_P
IN
NO_TEST=1
NO_TEST=1
MEM_D_CA<0>
MEM_D_CA<1>
MEM_D_CA<2>
MEM_D_CA<3>
MEM_D_CA<4>
MEM_D_CA<5>
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
MEM_D_CS_L<0>
MEM_D_CS_L<1>
ODT_4
ZQ<1>_4
H2
CA0_A
J2
CA1_A
H9
CA2_A
H10
H11
J11
G11
NC
NC
C10
R10
R11
P11
NC
NC
Y10
NC NC
A11
NC
A12
NC
NC
AA1
NC
AA12
NC
AB1
NC
AB11
NC
AB12
NC
AB2
NC
NC
B12
NC
J4
J5
J9
J8
H4
H3
K5
C3
G2
A5
R2
P2
R9
P4
P5
K8
P9
P8
R4
R3
N5
Y3
T2
A8
A1
A2
B1
CA3_A
CA4_A
CA5_A
CKE0_A
CKE1_A
NC1
CK_C_A
CK_T_A
CS0_A
CS1_A
NC2
DMI0_A
DMI1_A
ODT_A
ZQ0
CA0_B
CA1_B
CA2_B
CA3_B
CA4_B
CA5_B
CKE0_B
CKE1_B
NC3
CK_C_B
CK_T_B
CS0_B
CS1_B
NC4
DMI0_B
DMI1_B
ODT_B
ZQ1
DNU
H9HCNNNFAMMLRR-NME
LPDDR4X-3200-64GBIT-21NM-1CS
OMIT_TABLE
CHANNEL A
CHANNEL B
DQ0_A
DQ1_A
DQ2_A
DQ3_A
DQ4_A
DQ5_A
DQ6_A
DQ7_A
DQ8_A
DQ9_A
DQ10_A
DQ11_A
DQ12_A
DQ13_A
DQ14_A
DQ15_A
DQS0_C_A
DQS0_T_A
DQS1_C_A
DQS1_T_A
DQ0_B
DQ1_B
DQ2_B
DQ3_B
DQ4_B
DQ5_B
DQ6_B
DQ7_B
DQ8_B
DQ9_B
DQ10_B
DQ11_B
DQ12_B
DQ13_B
DQ14_B
DQ15_B
DQS0_C_B
DQS0_T_B
DQS1_C_B
DQS1_T_B
RESET*
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
18B7
18B7
18B7
18B7
18B7
18B7
18B7
18B7
18B7
18B7
18B7
18B7
18B7
18B7
18B7
18B7
18B7
18B7
18B7
18B7
18B7
18B7
18B7
18B7
18B7
18B7
18B7
18B7
18B7
18B7
18B7
U2300_4
FBGA
SYM 2 OF 2
91A7 18B7
PP1V8_S3_MEM
IN
VOLTAGE=1.8V
F1
F12
G4
G9
T4
T9
U1
U12
GROUNDPOWER
VDD1
H9HCNNNFAMMLRR-NME
A10
A3
AB10
AB3
AB5
AB8
C1
C12
D
C5
91A7 91A3 18B7
PP1V1_S3
IN
VOLTAGE=1.1V
A4
A9
LPDDR4X-3200-64GBIT-21NM-1CS
AB4
AB9
F5
F8
H1
18B7
IO
18B7
IO
H12
H5
H8
18B7
IO
18B7
IO
K1
K10
K12
VDD2
K3
N1
N10
N12
N3
VSS
R1
R12
R5
R8
U5
U8
C8
D11
D2
D4
D9
E1
E12
E5
E8
G1
G10
G12
G3
G5
G8
J1
J10
J12
J3
K11
K2
K4
K9
N11
C
N2
91D7 91C7 91B7 18B7
PP0V6_S3
IN
VOLTAGE=0.6V
AA10
AA3
AA5
AA8
B10
18B7
IO
18B7
IO
B3
B5
B8
18B7
IO
18B7
IO
D1
D12
VDDQ
D5
D8
18B7
IN
F10
F3
U10
U3
W1
W12
W5
W8
N4
N9
P1
P10
P12
P3
T1
T10
T12
T3
T5
T8
V1
V12
V5
V8
W11
W2
W4
W9
Y1
Y12
Y5
B
Y8
A
91D7 91C7 91C4 18B7
91D4 91A3 18B7
91D4 18B7
PP0V6_S3
IN
PP1V1_S3
IN
PP1V8_S3_MEM
IN
1
1UF
20%
10V
2
X5R
0201
1
C2302_4
1UF
20%
10V
2
X5R
0201
1
1UF
20%
10V
2
X5R
0201
1
2
1
2
1
2
C2321_4C2320_4
1UF
20%
10V
X5R
0201
1UF
20%
10V
X5R
0201
1UF
20%
10V
X5R
0201
1
C2323_4
10UF
20%
10V
2
X5R-CERM
0402-7
1
C2304_4C2303_4
1UF
20%
10V
2
X5R
0201
1
C2332_4C2331_4C2330_4
10UF
20%
10V
2
X5R-CERM
0402-7
1
C2324_4
10UF
20%
10V
2
X5R-CERM
0402-7
1
C2305_4
1UF
20%
10V
2
X5R
0201
1
C2333_4
10UF
20%
10V
2
X5R-CERM
0402-7
DESENSE
1
C2340_4
12PF
5%
25V
2
NP0-C0G
0201
1
C2306_4
10UF
20%
10V
2
X5R-CERM
0402-7
1
C2334_4 C2335_4 C2338_4 C2339_4 C2345_4
10UF
20%
10V
2
X5R-CERM
0402-7
DESENSE
1
C2336_4
12PF
5%
25V
2
NP0-C0G
0201
1
C2307_4
10UF
20%
10V
2
X5R-CERM
0402-7
1
10UF
20%
10V
2
X5R-CERM
0402-7
DESENSE
1
C2337_4
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
C2341_4
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
C2343_4
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
C2342_4
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
12PF
5%
25V
2
NP0-C0G
0201
DESENSE
1
C2344_4
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
DESENSE
1
3.0PF
+/-0.1PF
25V
2
NP0-C0G
0201
H9HCNNNFAMMLRR 3.3.23 NOTE 4: ODT_CA PIN IGNORED BY
LPDDR4X DEVICES, CONNECT TO VALID-LOGIC LEVEL EITHER VDD2 OR VSS
PP1V1_S3
VOLTAGE=1.1V
R2390_4
0201
R2391_4
NOSTUFF
VOLTAGE=0V
IN
0
12
MF 5% 1/20W
0
2 1
5%
1/20W
MF
0201
91D4 91A7 18B7
ODT_4
SYNC_MASTER=J79A_MLB
PAGE TITLE
LPDDR4x Sub-Channel
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
BOM_COST_GROUP=DRAM
IV ALL RIGHTS RESERVED
SYNC_DATE=01/31/2017
DRAWING NUMBER
051-05198
REVISION
BRANCH
PAGE
1 OF 1
SHEET
91 OF 109
A
SIZE
D
6.0.0
evt-3
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
C
PP3V3_TBT_X_SX
PP3V3_UPC_X_LDO
PP3V3_TBT_X_S0
PP3V3_G3H_RTC
10K
100K
21
5%
21
5%
R3042
R2842
1/20W
BBR_GP6:BBR_S0
100K
100K
10K
1M
1M
NOSTUFF
R2843
21
5% 2011/20W MF
NOSTUFF
R2845
21
5% 2011/20W MF
R3107
21
5% 2011/20W MF
5% 2011/20W MF
R3108
21
5% 2011/20W MF
R3109
21
5% 2011/20W MF
MF1/20W
MF
2.2K
95C4 95D4
BI
92B3 95D2
92B3 95D4
BI
19B4 92D4 93D4 93D8
19B3 95C4 95D7
IN
201
100K
201
100K
21
R3044
100K
2 1
201
100K
10K
2 1
19B3 98C3
OUT
19B3 98A3
21
5% 201
NO_TEST=1
OUT
NO_TEST=1
R2850
1/20W
MF
NOSTUFF
R2841
21
MF1/20W 2015%
5%
1/20W
98C3
92B2 92B6 92D3 100D2 98D2
92A4 98D2
R3032
19C3 92B8 92C3 93B8 93C3 93C7 101C5 99C5
IO
92A6 99C5
92B6 99C5
19C3 99C5
IN
21
R3034
92B3 95D7 99C5
R3070
19C3 92B3 92C3 93A3 93C3 93C7 101C5 99C5
19D3 92C4 101C5 99C5
OUT
19C3 92C3 93C3 93C7 101C5 99C5
OUT
19D3 99C5
19D3 99C5
Either a Testpoint or Arkanoid connector
must be present for GPIO0
(EVEN IN PRODUCTION)
TBT_XT_FLASH_BUSY_L
TBT_X_THERM_D_P
TBT_X_THERM_D_N
TBT_X_GPIO_5
TBT_X_GPIO_6
MF 201
100K
NOSTUFF
R2851
21
5%
MF1/20W 201
TBT_X_FLASH_SHARE_EN
TBT_X_FLASH_MSTR_H_SLV_L
TBT_X_GPIO_12
98C3
TBT_XT_PERST_L
USBC_X_RESET_L
UPC_X_RESET
5%1/20WMF
TBT_POC_RESET
USBC_X_RST_L
UPC_X_SER_DBG
PMU_ACTIVE_READY
I2C_UPC_X_INTM_L
92B1 98D3
99C5
101C5
95C7
UPC_XT_5V_EN
92C3
UPC_X_FORCE_PWR
UPC_X_FAULT_L
99C5
5%201 1/20WMF
PCH_BBR_FORCE_PWR
SOC_DOCK_CONNECT
UPC_PMU_RESET
SOC_DFU_STATUS
IO
SOC_FORCE_DFU
IO
I2C_UPC_X_SDAM
92B1 98D3
I2C_UPC_X_SCLM
92B1 98D3
TP_DP_X_HPD
99B5
Port-X
TBT_FLASH_BUSY_L
TBT_THERM_D_P
TBT_THERM_D_N
TBT_GPIO_5
TBT_GPIO_6
ACE2BBR
TBT_GPIO_10
TBT_GPIO_11
TBT_GPIO_12
TBT_PERST_L
USBC_RESET_L
UPC_RESET
ACE2
TBT_POC_RESET
USBC_RST_L
UPC_GPIO0
UPC_GPIO1
UPC_GPIO2
UPC_GPIO3
UPC_GPIO4
UPC_GPIO5
UPC_GPIO6
UPC_GPIO7
UPC_GPIO8
UPC_GPIO9
UPC_GPIO10
I2C_UPC_SDAM
I2C_UPC_SCLM
DP_HPD
BBR
ACE2
JTAG_BB_TDI
JTAG_BB_TMS
JTAG_BB_TCK
JTAG_BB_TDO
TBT_SPI_MOSI
TBT_SPI_MISO
TBT_SPI_CS_L
TBT_SPI_CLK
TBT_FORCE_PWR
UPC_I2C_ADDR
I2C_UPC_SDA1
I2C_UPC_SCL1
I2C_UPC_INT1_L
I2C_UPC_SDA2
I2C_UPC_SCL2
I2C_UPC_INT2_L
UPC_SPI_CLK
UPC_SPI_MOSI
UPC_SPI_MISO
UPC_SPI_CS_L
UPC_SWD_DATA
UPC_SWD_CLK
UPC_UART_RX
UPC_UART_TX
92D2 101B5 99B5
92D2 101B5 99B5
92B6 92C2 101B5 99B5
99A5
UPC_DBG0
UPC_DBG1
UPC_DBG2
UPC_DBG3
99A5
UPC_DBG4
99A5
UPC_DBG5
UPC_DBG6
UPC_DBG7
JTAG_ISP_TDI
JTAG_TBT_X_TMS
JTAG_ISP_TCK
JTAG_ISP_TDO
TBT_X_SPI_MOSI
TBT_X_SPI_MISO
TBT_X_SPI_CS_L
TBT_X_SPI_CLK
TBT_X_FORCE_PWR
GND I2C_ADDR
PRIMARY ONLY
IN
IN
IN
OUT
92A4 98C2
92A4 98C2
92A4 98C2
92A4 98C2
92B2 98C2
PCH_I2C_UPC_SDA
PCH_I2C_UPC_SCL
PCH_UPC_I2C_INT_L
I2C_UPC_XT_SDA2
I2C_UPC_XT_SCL2
UPC_I2C_INT_L
REAR PORT:
CONNECT UPC SPI TO ROM
FRONT PORT:
GROUND UPC SPI
UPC_X_SWD_DATA
UPC_X_SWD_CLK
92B3 99B5
92B3 99B5
UPC_XT_UART_RX
UPC_XT_UART_TX
92B8 92C2
101B5 99B5
SPARE_UPC_X_DBG
BOTTOM
U3100_X:5MM
BOTTOM
U3100_X:5MM
SWD_SOC_SWCLK_X
BOTTOM
U3100_X:5MM
SWD_SOC_SWDIO_X
BOTTOM
U3100_X:5MM
PCH_UART_DEBUG_R2D_1
PCH_UART_DEBUG_D2R_1
19C3 92D2 93D2 93D6 100D2 98D2
19C3 98D2
19C3 92D2 93D2 93D6 100D2 98D2
19C3 92D2 93D2 93D6 100D2 98D2
19D3 92B5 92B6 92D2 93B5 93B6 93D2 93D5 101C5 99C5
IO
19D3 92B5 92B6 92D2 93B5 93B6 93D2 93D5 101B5 99B5
IO
101B5 99B5
19D3 92B6 92D2 93B6
OUT
R3057
5% 2011/20W MF
101B5 99B5
OUT
19C3 92B8 92D2 93B8
5% 2011/20W MF
1M
21
5% 2011/20W MF
100K
21
5% 2011/20W MF
33
20
0
93D2 93D5
PLACE_NEAR=U3100_X:13mm
93C2 93C5
R3058
PLACE_NEAR=U3100_X:13mm
33
33
21
21
R3105
R3022
R3110
21
5% 2011/20W MF
R3111
21
5% 2011/20W MF
0
OUT
21
5%
21
5%
19C3 99A5
IN
19C3 99A5
R3010
R3011
SWD_SOC_SWCLK_R
SWD_SOC_SWDIO_R
SWD_SOC_SWCLK_T
02011/20W MF
SWD_SOC_SWDIO_T
02011/20W MF
I2C_UPC_SDA
I2C_UPC_SCL
TO SMC
IO
IO
19D3 92B8 93B8 93D5
IO
19C3 92B8 93B8 93C5
IO
19D3
19D3
92C2 101A5
92C2 101A5
PP3V3_TBT_T_SX
PP3V3_UPC_T_LDO
PP3V3_TBT_T_S0
PM_SLP_S3_L_1PM_SLP_S3_L_1
PP3V3_G3H_RTC
100K
21
5% 1/20W
R2942
BBR_GP6:BBR_S0
100K
100K
100K
10K
NOSTUFF
R2943
21
5% 2011/20W MF
NOSTUFF
R3047
21
5% 2011/20W MF
NOSTUFF
R2945
21
5% 2011/20W MF
R3207
21
5% 2011/20W MF
R3074
5% 2011/20W MF
1M
1M
R3208
21
5% 2011/20W MF
R3209
21
5% 2011/20W MF
95C4 95D4
BI
92A6 92B5 95C2
BIBI
92B3 95C4 95D4
BI
19B4 92D8 93D4 93D8
ININ
19B3 95C4 95D7
IN
100K
MF 201
100K
2 1
100K
100K
2 1
100K
2 1
10K
2 1
99C5 101C5 92C7 19D3
100K
21
92D7 100C2 98C2
19B3 100C3
19B3 100A3
21
R2950
5% 2011/20W MF
NOSTUFF
R2941
21
5% MF
R3033
19C3 92B8 92C7 93B8 93C3 93C7 101C5 99C5
101C5 92B6
R3071
R3072
R3075
OUT
OUT
1/20W
TBT_T_FLASH_SHARE_EN
100C3
TBT_T_FLASH_MSTR_H_SLV_L
100C3
92B2 92B6 92C7 100D2 98D2
92B4 100D2
101C5
5%201 1/20WMF
IO
92B6 101C5
101C5
92B1 100D3
92C7 95C7 101C5 99C5
92A3 95D7 101C5
101C5
19C3 92B3 92C7 93A3 93C3 93C7 101C5 99C5
FUNC_TEST=TRUE
93C3 93C7 101C5
19C3
OUT
92C7
99C5
101C5
101C5
5%201 1/20WMF
92B2 100D3
92B1 100D3
101B5
TBT_XT_FLASH_BUSY_L
TBT_T_THERM_D_P
TBT_T_THERM_D_N
TBT_T_GPIO_5
TBT_T_GPIO_6
201
100K
NOSTUFF
R2951
21
MF1/20W 2015%
TBT_T_GPIO_12
TBT_XT_PERST_L
USBC_T_RESET_L
UPC_T_RESET
TBT_POC_RESET
USBC_T_RESET_L
UPC_T_SER_DBG
PD_UPC_T_GPIO1
5%201 1/20WMF
I2C_UPC_T_INTM_L
UPC_XT_5V_EN
UPC_T_FORCE_PWR
UPC_T_FAULT_L
5%201 1/20WMF
PCH_BBR_FORCE_PWR
SOC_DOCK_CONNECT
UPC_PMU_RESET
PD_UPC_T_GPIO9
PD_UPC_T_GPIO10
I2C_UPC_T_SDAM
I2C_UPC_T_SCLM
TP_DP_T_HPD
Port-T
TBT_FLASH_BUSY_L
TBT_THERM_D_P
TBT_THERM_D_N
TBT_GPIO_5
TBT_GPIO_6
ACE2BBR
TBT_GPIO_10
TBT_GPIO_11
TBT_GPIO_12
TBT_PERST_L
USBC_RESET_L
UPC_RESET
ACE2
TBT_POC_RESET
USBC_RST_L
UPC_GPIO0
UPC_GPIO1
UPC_GPIO2
UPC_GPIO3
UPC_GPIO4
UPC_GPIO5
UPC_GPIO6
UPC_GPIO7
UPC_GPIO8
UPC_GPIO9
UPC_GPIO10
I2C_UPC_SDAM
I2C_UPC_SCLM
DP_HPD
BBR
ACE2
JTAG_BB_TDI
JTAG_BB_TMS
JTAG_BB_TCK
JTAG_BB_TDO
TBT_SPI_MOSI
TBT_SPI_MISO
TBT_SPI_CS_L
TBT_SPI_CLK
TBT_FORCE_PWR
UPC_I2C_ADDR
I2C_UPC_SDA1
I2C_UPC_SCL1
I2C_UPC_INT1_L
I2C_UPC_SDA2
I2C_UPC_SCL2
I2C_UPC_INT2_L
UPC_SPI_CLK
UPC_SPI_MOSI
UPC_SPI_MISO
UPC_SPI_CS_L
UPC_SWD_DATA
UPC_SWD_CLK
UPC_UART_RX
UPC_UART_TX
92B8 92C6 101B5 99B5
101A5
UPC_DBG0
101A5
UPC_DBG1
101A5
UPC_DBG2
101A5
UPC_DBG3
UPC_DBG4
UPC_DBG5
101A5
UPC_DBG6
101A5
UPC_DBG7
JTAG_ISP_TDI
JTAG_TBT_T_TMS
JTAG_ISP_TCK
JTAG_ISP_TDO
TBT_T_SPI_MOSI
TBT_T_SPI_MISO
TBT_T_SPI_CS_L
TBT_T_SPI_CLK
TBT_T_FORCE_PWR
NC_UPC_T_I2C_ADDR
NO_TEST=1
PCH_I2C_UPC_SDA
PCH_I2C_UPC_SCL
PCH_UPC_I2C_INT_L
I2C_UPC_XT_SDA2
I2C_UPC_XT_SCL2
UPC_I2C_INT_L
UPC_T_SPI_CLK
UPC_T_SPI_MOSI
UPC_T_SPI_MISO
UPC_T_SPI_CS_L
UPC_T_SWD_DATA
UPC_T_SWD_CLK
UPC_XT_UART_TX
UPC_XT_UART_RX
USB3_BSSB_D2R_R_P
USB3_BSSB_D2R_R_N
0201 1/20WMF
1/20WMF0201
USB3_BSSB_R2D_P
0201
X5R-CERM 16V 10%
USB3_BSSB_R2D_N
X5R-CERM 10%16V0201
SWD_SOC_SWCLK_T
SWD_SOC_SWDIO_T
SMC_DEBUGPRT_R_TX
SMC_DEBUGPRT_R_RX
0201 1/20WMF
0201 1/20WMF
19C3 92D6 93D2 93D6 100D2 98D2
IN
19C3 100D2
IN
19C3 92D6 93D2 93D6 100D2 98D2
IN
19C3 92D6 93D2 93D6 100D2 98D2
OUT
92A4 100C2
92A4 100C2
92A4 100C2
92A4 100C2
92A2 92B1 100C2
101C5
19D3 92B5 92B6 92D5 93B5 93B6 93D2 93D5 101C5 99C5
IO
19D3 92B5 92B6 92D5 93B5 93B6 93D2 93D5 101B5 99B5
IO
19D3 92B6 92D5 93B6 93D2 93D5 101B5 99B5
OUT
92D6
101B5
99B5
OUT
92B5 101B5
92B5 101B5
1M
92B6 92C6
101B5 99B5
2 1
5%
2 1
5%
2 1
2 1
92C5 101A5
92C5 101A5
2 1
5%
2 1
5%
TO SMC
19C3 92B8 92C5 93B8 93C2 93C5 101B5 99B5
92A4 101B5
92A4 101B5
92A4 101B5
92A4 101B5
21
R3205
5% 2011/20W MF
117S0201
0
117S0201
0
0.1UF
GND_VOID=TRUE
0.1UF
GND_VOID=TRUE
0
0
R3012
R3013
C3010
C3011
R3016
R3017
USB3_BSSB_D2R_P
USB3_BSSB_D2R_N
USB3_BSSB_R2D_C_P
NO_TEST=1
USB3_BSSB_R2D_C_N
NO_TEST=1
SMC_DEBUGPRT_TX
SMC_DEBUGPRT_RX
D
IO
IO
IO
IO
IO
IO
19D3
C
19D3
19D3
19D3
19D3
19D3
B
ACE ARKANOID CONN
J3000
USBC_DBG
19C3 92C3 92C7 93B8 93C3 93C7 101C5 99C5
19C3 92C5 93B8 93C5
19D3 92D5 93B8 93D5
19C3 92C5 92D2 93B8 93C2 93C5 101B5 99B5
TBT_POC_RESET
IO
I2C_UPC_SCL
IO
I2C_UPC_SDA
IO
UPC_I2C_INT_L
OUT
TBT_XT_SPI_CLK_DBG UPC_T_SER_DBG
92A4 92C3 101C5
UPC_XT_UART_TX
92C2 92C6 101B5 99B5
SMC
505070-1222 505070-1222
M-ST-SM
1413
21
43
65
87
109
1211
15
16
PLACE_SIDE=BOTTOM
PCH_UPC_I2C_INT_L
PCH_I2C_UPC_SDA
PCH_I2C_UPC_SCL
UPC_X_SER_DBG
UPC_XT_UART_RX
19D3 92D2 92D5 93B6 93D2 93D5 101B5 99B5
OUT
PCH
IO
IO
92C7 99C5
92C2 92C6 101B5 99B5
19D3 92B5 92D2 92D5 93B5 93B6 93D2 93D5 101C5 99C5
19D3 92B5 92D2 92D5 93B5 93B6 93D2 93D5 101B5 99B5
SPI ACE
92A6 92D4 95C2
PP3V3_UPC_T_LDO
BI
UPC_T_SWD_DATA
92C2 101B5
UPC_T_SWD_CLK
92C2 101B5
TBT_XT_SPI_MISO
92A7
PCH_I2C_UPC_SDA
19D3 92B6 92D2 92D5 93B5 93B6 93D2 93D5 101C5 99C5
PCH_I2C_UPC_SCL
19D3 92B6 92D2 92D5 93B5 93B6 93D2 93D5 101B5 99B5
AARDVARKANOID CONN
J3002
USBC_DBG
505070-1222
M-ST-SM
1413
21
43
65
87
109
1211
15
16
PLACE_SIDE=BOTTOM
TBT_XT_SPI_CS_L
TBT_XT_SPI_CLK
TBT_XT_SPI_MOSI
UPC_X_SWD_CLK
UPC_X_SWD_DATA
PP3V3_UPC_X_LDO
UART ACE
92A6 92A8
92A6 92A8
92A7
92C6 99B5
92C6 99B5
BI
92D8 95D2
92D8 95D4
95C2
92D4 95C4 95D4
USBC_DBG
TBT_X_FORCE_PWR
PP3V3_TBT_X_S0
BI
PP0V9_TBT_X_LC
BI
PP3V3_TBT_T_S0
BI
BRIDGE ARKANOID CONN
J3001
PLACE_SIDE=BOTTOM
6/4/2/1/3/5 -> X BRIDGE
I2C_UPC_X_INTM_L
I2C_UPC_X_SCLM
I2C_UPC_X_SDAM
TBT_T_FORCE_PWRTBT_XT_PERST_L
I2C_UPC_T_INTM_L
I2C_UPC_T_SCLMI2C_UPC_T_SDAM
7 -> BOTH X , T BRIDGE
15
M-ST-SM
1413
21
43
65
87
109
1211
16
92C7 98D3 92B2 92D6 98C2
92C7 98D3
92C7 98D3
92A2 92D2 100C2 92B6 92C7 92D3 100D2 98D2
92C3 100D3
92C3 100D3 92C3 100D3
B
9/11/12/10/8 -> T BRIDGE
R2031
19C3 93B8
PLT_RST_3V3_L
IN
100K
117S0201
R3056
19C3 93A8
PCH_STRP_GPD7
IN
0
BBR_PERST:PLTRST
21
1/20W
201
5%
BBR_PERST:GPD_7
21
1/20W
0201
5%
MF
TBT_XT_PERST_L
MF
92B2 92C7 92D3 100D2 98D2
101C5 92C3
USBC_T_RESET_L
SPI ACE
UART ACE
USBC_X_RST_L
92C7 99C5
0201 1/20WMF
117S0201
R3440
0
5%
21
BBR_RST:SPLIT
USBC_T_RESET_L
MAKE_BASE=TRUE
1
R3441
2
0
5%
1/20W
MF
0201
Bridges
BBR_RST:SHARED
USBC_X_RESET_L
92C3 100D2
92C7 98D2
BBR_FORCE_PWR:ACE
UPC_X_FORCE_PWR
92C7 95D7 99C5 92B2 92D6 98C2
19C3 92C3 92C7 93A3 93C3 93C7 101C5 99C5
PCH_BBR_FORCE_PWR
IN
0201 1/20WMF
0201 1/20WMF
0201 1/20WMF
R3050
0
5%
R3051
0
5%
21
R3053
0
5%
21
21
TBT_X_FORCE_PWR
BBR_FORCE_PWR:PCH
BBR_FORCE_PWR:PCH
A
1
R3060
3.3K
5%
1/20W
MF
201
2
TBT_XT_SPI_CLK
92A6
92B3
TBT_XT_SPI_CS_L
92A6
92B3
R3061
TBT_XT_ROM_WP_L
TBT_XT_ROM_HOLD_L
3.3K
5%
1/20W
MF
201
92B5 92D4 95C2
BI
TBT_XT_SPI_CLK
1
1
1
R3063
3.3K
5%
1/20W
MF
2
201
2
8
VCC
R3062
3.3K
5%
1/20W
MF
201
1
2
C3060
1UF
10%
6.3V
2
CERM
402
92A8 92B3
TBT_XT_SPI_CS_L
92A8 92B3
ROM
U3060
8MBIT-3.0V
W25Q80DVUXIE
6
CLK
1
CS*
3
WP*(IO2)
7
HOLD*(IO3)
USON
DI(IO0)
DO(IO1)
OMIT_TABLE
CRITICAL
GND EPAD
9
4
5
2
TBT_XT_SPI_MOSI
92B3
TBT_XT_SPI_MISO
92B5
R3094
R3095
R3096
R3097
R3098
R3090
R3091
R3092
R3093
R3099
R309A
R309B
100
R309C
15
15
15
15
15
15
15
15
15
15
15
15
21
21
21
21
21
21
21
21
21
21
21
21
21
TBT_XT_SPI_CLK_DBGPP3V3_UPC_T_LDO
5% 2011/20W MF
UPC_T_SPI_CLK
5% 2011/20W MF
UPC_T_SPI_CS_L
5% 2011/20W MF
UPC_T_SPI_MOSI
5% 2011/20W MF
UPC_T_SPI_MISO
5% 2011/20W MF
TBT_X_SPI_CLK
5% 2011/20W MF
TBT_X_SPI_CS_L
5% 2011/20W MF
TBT_X_SPI_MOSI
5% 2011/20W MF
TBT_X_SPI_MISO
5% 2011/20W MF
TBT_T_SPI_CLK
5% 2011/20W MF
TBT_T_SPI_CS_L
5% 2011/20W MF
TBT_T_SPI_MOSI
5% 2011/20W MF
TBT_T_SPI_MISO
5% 2011/20W MF
92B8
92C2 101B5
92C2 101B5
92C2 101B5
92C2 101B5
92D6 98C2
92D6 98C2
92D6 98C2
92D6 98C2
92D2 100C2
92D2 100C2
92D2 100C2
92D2 100C2
UPC_T_FORCE_PWR
92C3 95D7 101C5
BBR_FORCE_PWR:ACE
0201 1/20WMF
BOM_COST_GROUP=TBT
R3052
0
5%
21
TBT_T_FORCE_PWR
SYNC_MASTER=t290 icl yn
PAGE TITLE
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
92B1 92D2 100C2
SYNC_DATE=02/01/2018
USB-C COMM + DEBUG X-T
DRAWING NUMBER
051-05198
Apple Inc.
REVISION
6.0.0
BRANCH
evt-3
PAGE
1 OF 4
SHEET
92 OF 109
A
SIZE
D
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
C
PP3V3_TBT_W_SX
PP3V3_UPC_W_LDO
PP3V3_TBT_W_S0
PM_SLP_S3_L_1
PP3V3_G3H_RTC
10K
100K
21
21
5%
RB242
1/20W5%
RB042
1/20W
BBR_GP6:BBR_S0
100K
100K
100K
NOSTUFF
21
NOSTUFF
21
NOSTUFF
21
RB043
RB244
1/20W 201MF5%
RB045
1/20W MF 2015%
RB270
10K
RB271
21
100K
MF1/20W 2015%
RB307
100K
MF1/20W 2015%
95B4
BI
93A6 93B5 95B2
BI
93B2 95B4
BI
19B4 92D4 92D8 93D4
IN
19B3 95B4 95B7
IN
201
MF
100K
201MF
201MF1/20W5%
100K
2 1
100K
2 1
MF1/20W 2015%
MF1/20W
2015%
2 1
100K
2 1
21
21
1M
21
1M
21
19B3 96C3
19B3 96A3
RB050
21
100K
100K
1/20W MF
5%
NOSTUFF
21
5% 201
RB232
MF 1/20W201 5%
MF
21
RB770
MF 1/20W201 5%
R3073
MF 1/20W201 5%
RB273
RB308
RB309
PP3V3_TBT_R_SX
PP3V3_UPC_R_LDO
Either a Testpoint or Arkanoid connector
must be present for GPIO0
(EVEN IN PRODUCTION)
TBT_WR_FLASH_BUSY_L
OUT
OUT
TBT_W_THERM_D_P
TBT_W_THERM_D_N
201
TBT_W_GPIO_5
TBT_W_GPIO_6
RB041
1/20W
96C3 102C3
93B2 93B6 93D3 96D2 102D2
93B4 96D2
19C3 92B8 92C3 92C7 93B8 93C3 97C5 103C5
97C5 93B6
93B6 97C5
1/20W201 5%
RB234
93B3 95B7 97C5
19C3 92B3 92C3 92C7 93A3 93C3 97C5 103C5
92C7 93C3 97C5
19C3
92C3
103C5
MF1/20W 2015%
MF1/20W 2015%
MF
100K
NOSTUFF
RB051
21
5%
MF1/20W 201
TBT_W_FLASH_SHARE_EN
TBT_W_FLASH_MSTR_H_SLV_L
TBT_W_GPIO_12
96C3
TBT_WR_PERST_L
USBC_W_RESET_L
UPC_W_RESET
TBT_POC_RESET
USBC_W_RESET_L
UPC_W_SER_DBG
PD_UPC_W_GPIO1
97C5
I2C_UPC_W_INTM_L
93B1 96D3
103C5
97C5
95A7
UPC_WR_5V_EN
93C3
UPC_W_FORCE_PWR
UPC_W_FAULT_L
97C5
PCH_BBR_FORCE_PWR
PD_UPC_WR_GPIO7
93C3 97C5 103C5
UPC_PMU_RESET
OUT
PD_UPC_W_GPIO9
97C5
PD_UPC_W_GPIO10
97C5
I2C_UPC_W_SDAM
93B1 96D3
I2C_UPC_W_SCLM
93B1 96D3
TP_DP_W_HPD
97B5
Port-W
TBT_FLASH_BUSY_L
TBT_THERM_D_P
TBT_THERM_D_N
TBT_GPIO_5
TBT_GPIO_6
ACE2BBR
TBT_GPIO_10
TBT_GPIO_11
TBT_GPIO_12
TBT_PERST_L
USBC_RESET_L
UPC_RESET
ACE2
TBT_POC_RESET
USBC_RST_L
UPC_GPIO0
UPC_GPIO1
UPC_GPIO2
UPC_GPIO3
UPC_GPIO4
UPC_GPIO5
UPC_GPIO6
UPC_GPIO7
UPC_GPIO8
UPC_GPIO9
UPC_GPIO10
I2C_UPC_SDAM
I2C_UPC_SCLM
DP_HPD
BBR
ACE2
JTAG_BB_TDI
JTAG_BB_TMS
JTAG_BB_TCK
JTAG_BB_TDO
TBT_SPI_MOSI
TBT_SPI_MISO
TBT_SPI_CS_L
TBT_SPI_CLK
TBT_FORCE_PWR
UPC_I2C_ADDR
I2C_UPC_SDA1
I2C_UPC_SCL1
I2C_UPC_INT1_L
I2C_UPC_SDA2
I2C_UPC_SCL2
I2C_UPC_INT2_L
UPC_SPI_CLK
UPC_SPI_MOSI
UPC_SPI_MISO
UPC_SPI_CS_L
UPC_SWD_DATA
UPC_SWD_CLK
UPC_UART_RX
UPC_UART_TX
93D2 97B5 103B5
93D2 97B5 103B5
93B6 93C2 97B5 103B5
UPC_DBG0
UPC_DBG1
97A5
UPC_DBG2
UPC_DBG3
UPC_DBG4
UPC_DBG5
UPC_DBG6
JTAG_ISP_TDI
JTAG_TBT_W_TMS
JTAG_ISP_TCK
JTAG_ISP_TDO
TBT_W_SPI_MOSI
TBT_W_SPI_MISO
TBT_W_SPI_CS_L
TBT_W_SPI_CLK
TBT_W_FORCE_PWR
PCH_I2C_UPC_SDA
PCH_I2C_UPC_SCL
PCH_UPC_I2C_INT_L
I2C_UPC_WR_SDA2
I2C_UPC_WR_SCL2
UPC_I2C_INT_L
UPC_W_SPI_CLK
UPC_W_SPI_MOSI
UPC_W_SPI_MISO
UPC_W_SPI_CS_L
UPC_W_SWD_DATA
UPC_W_SWD_CLK
UPC_WR_UART_RX
UPC_WR_UART_TX
SMC_FAN_0_TACH
SMC_FAN_1_TACH
SPARE_UPC_W_DBG
19C3 92D2 92D6 93D2 96D2 102D2
IN
19C3 96D2
IN
19C3 92D2 92D6 93D2 96D2 102D2
IN
19C3 92D2 92D6 93D2 96D2 102D2
OUT
93A4 96C2
93A4 96C2
93A4 96C2
93A4 96C2
93B1 93B2 96C2
19D3 92B5 92B6 92D2 92D5 93B5 93B6 93D2 97C5 103C5
IO
19D3 92B5 92B6 92D2 92D5 93B5 93B6 93D2 97B5 103B5
IO
97B5 103B5
19D3 92B6 92D2 92D5
OUT
OUT
93A4 97B5
93A4 97B5
93A4 97B5
93B5 97B5
93B5 97B5
1M
93B8 93C2
97B5 103B5
IO
IO
100K
RB257
97B5 103B5
19C3 92B8 92C5 92D2
21
19B3 97A5
19B3 97A5
21
5% 201
93B6 93D2
MF1/20W 2015%
PLACE_NEAR=U3100_W:13mm
RB258
PLACE_NEAR=U3100_W:13mm
93B8 93C2
MF 2015% 1/20W
RB305
RB222
33
21
I2C_UPC_SDA
33
21
I2C_UPC_SCL
MF1/20W 2015%
MF1/20W
TO SMC
19D3 92B8 92D5 93B8
IO
19C3 92B8 92C5 93B8
IO
PP3V3_TBT_R_S0
PM_SLP_S3_L_1
PP3V3_G3H_RTC
100K
21
5%
RB142
1/20W
BBR_GP6:BBR_S0
100K
100K
10K
NOSTUFF
21
NOSTUFF
21
RB407
21
2 1
RB143
RB145
1/20W MF 2015%
RB274
1/20W 2015% MF
10K10K
MF1/20W 2015%
2.2K
2 1
2 1
MF1/20W 2015%
100K
2 1
95A4 95B4
BI
93B3 95B2
BI
93B2 95B4
BI
19B4 92D4 92D8 93D8
IN
19B3 95A4 95B7
IN
93D7 96C2 102C2
100K
201MF
100K
21
5% 1/20W
100K
21
5% 1/20W MF
21
RB247
RB233
MF 1/20W201 5%
100K
RB272
RB771
MF 1/20W201 5%
100K
21
RB275
1M
1M
RB408
21
RB409
21
19B3 102C3
19B3 102A3
OUT
OUT
RB150
MF
102D3
201
NOSTUFF
RB141
1/20W
TBT_R_FLASH_SHARE_EN
TBT_R_FLASH_MSTR_H_SLV_L
201
102C3
93B2 93B6 93D7 96D2 102D2
93A4 102D2
103C5
19C3 92B8 92C3 92C7 93B8 93C7 97C5 103C5
IOIO
93A6 103C5
93B6 103C5
103C5
1/20W
MF201 5%
93B1 102D3
93C7 95A7 97C5 103C5
93A3 95B7 103C5
103C5
19C3 92B3 92C3 92C7 93A3 93C7 97C5 103C5
93C7 97C5 103C5
19C3 92C3 92C7
OUT
93C7 97C5 103C5
MF 1/20W201 5%
MF1/20W 2015%
MF1/20W 2015%
103C5
103C5
93B2 102D3
93B1 102D3
103B5
TBT_WR_FLASH_BUSY_L
TBT_R_THERM_D_P
TBT_R_THERM_D_N
TBT_R_GPIO_5
TBT_R_GPIO_6
201MF5%
100K
NOSTUFF
21
5%
NO_TEST=1
RB151
MF1/20W 201
TBT_R_GPIO_12
NO_TEST=1
TBT_WR_PERST_L
USBC_R_RESET_L
UPC_R_RESET
TBT_POC_RESET
USBC_R_RST_L
UPC_R_SER_DBG
PD_UPC_R_GPIO1
I2C_UPC_R_INTM_L
UPC_WR_5V_EN
UPC_R_FORCE_PWR
UPC_R_FAULT_L
PCH_BBR_FORCE_PWR
PD_UPC_WR_GPIO7
FUNC_TEST=TRUE
UPC_PMU_RESET
PD_UPC_R_GPIO9
PD_UPC_R_GPIO10
I2C_UPC_R_SDAM
I2C_UPC_R_SCLM
TP_DP_R_HPD
Port-R
TBT_FLASH_BUSY_L
TBT_THERM_D_P
TBT_THERM_D_N
TBT_GPIO_5
TBT_GPIO_6
TBT_GPIO_10
TBT_GPIO_11
TBT_GPIO_12
TBT_PERST_L
USBC_RESET_L
UPC_RESET
TBT_POC_RESET
USBC_RST_L
UPC_GPIO0
UPC_GPIO1
UPC_GPIO2
UPC_GPIO3
UPC_GPIO4
UPC_GPIO5
UPC_GPIO6
UPC_GPIO7
UPC_GPIO8
UPC_GPIO9
UPC_GPIO10
I2C_UPC_SDAM
I2C_UPC_SCLM
DP_HPD
NO_TEST=1
ACE2BBR
ACE2
BBR
ACE2
JTAG_BB_TDI
JTAG_BB_TMS
JTAG_BB_TCK
JTAG_BB_TDO
TBT_SPI_MOSI
TBT_SPI_MISO
TBT_SPI_CS_L
TBT_SPI_CLK
TBT_FORCE_PWR
UPC_I2C_ADDR
I2C_UPC_SDA1
I2C_UPC_SCL1
I2C_UPC_INT1_L
I2C_UPC_SDA2
I2C_UPC_SCL2
I2C_UPC_INT2_L
UPC_SPI_CLK
UPC_SPI_MOSI
UPC_SPI_MISO
UPC_SPI_CS_L
UPC_SWD_DATA
UPC_SWD_CLK
UPC_UART_RX
UPC_UART_TX
93B8 93C6 97B5 103B5
103A5
UPC_DBG0
UPC_DBG1
UPC_DBG2
UPC_DBG3
UPC_DBG4
UPC_DBG5
UPC_DBG6
JTAG_ISP_TDI
JTAG_TBT_R_TMS
JTAG_ISP_TCK
JTAG_ISP_TDO
TBT_R_SPI_MOSI
TBT_R_SPI_MISO
TBT_R_SPI_CS_L
TBT_R_SPI_CLK
TBT_R_FORCE_PWR
NC_UPC_R_I2C_ADDR
PCH_I2C_UPC_SDA
PCH_I2C_UPC_SCL
PCH_UPC_I2C_INT_L
I2C_UPC_WR_SDA2
I2C_UPC_WR_SCL2
UPC_I2C_INT_L
REAR PORT:
CONNECT UPC SPI TO ROM
FRONT PORT:
GROUND UPC SPI
UPC_R_SWD_DATA
UPC_R_SWD_CLK
UPC_WR_UART_TX
UPC_WR_UART_RX
SPARE_UPC_R_DBG
19C3 92D2 92D6 93D6 96D2 102D2
IN
19C3 102D2
IN
19C3 92D2 92D6 93D6 96D2 102D2
IN
19C3 92D2 92D6 93D6 96D2 102D2
OUT
93A4 102C2
93A4 102C2
93A4 102C2
93A4 102C2
93A1 93B1 102C2
103C5
19D3 92B5 92B6 92D2 92D5 93B5 93B6 93D5 97C5 103C5
IO
19D3 92B5 92B6 92D2 92D5 93B5 93B6 93D5 97B5 103B5
IO
19D3 92B6 92D2 92D5 93B6 93D5 97B5 103B5
OUT
103B5
93D6
97B5
OUT
93B3 103B5
93B3 103B5
1M
93B6 93C6
97B5 103B5
100K
TO SMC
19C3 92B8 92C5 92D2 93B8 93C5 97B5 103B5
21
RB405
RB224
21
D
MF1/20W 2015%
MF1/20W 2015%
C
B
UPC_DBG7
JB200
USBC_DBG
19C3 92B8 92C3 92C7 93C3 93C7 97C5 103C5
19C3 92B8 92C5 93C5
19D3 92B8 92D5 93D5
19C3 92B8 92C5 92D2 93C2 93C5 97B5 103B5
TBT_POC_RESET
IO
I2C_UPC_SCL
IO
I2C_UPC_SDA
IO
UPC_I2C_INT_L
OUT
TBT_WR_SPI_CLK_DBG UPC_R_SER_DBG
93A4 93C3 103C5
UPC_WR_UART_TX UPC_WR_UART_RX
93C2 93C6 97B5 103B5 93C2 93C6 97B5 103B5
SMC
505070-1222
M-ST-SM
1413
21
43
65
87
109
1211
15
16
PLACE_SIDE=BOTTOM
PCH_UPC_I2C_INT_L
PCH_I2C_UPC_SDA
PCH_I2C_UPC_SCL
UPC_W_SER_DBG
19D3 92B6 92D2 92D5 93D2 93D5 97B5 103B5
OUT
PCH
IO
19D3 92B5 92B6 92D2 92D5 93B5 93D2 93D5 97B5 103B5
IO
93C7 97C5
19D3 92B5 92B6 92D2 92D5 93B5 93D2 93D5 97C5 103C5
UPC_DBG7
AARDVARKANOID CONN
JB202
USBC_DBG
505070-1222
M-ST-SM
1413
SPI ACE
93A6 93D8 95B2
PP3V3_UPC_W_LDO
BI
UPC_W_SWD_DATA
93C6 97B5
UPC_W_SWD_CLK
93C6 97B5
TBT_WR_SPI_MISO
93A7
PCH_I2C_UPC_SDA
19D3 92B5 92B6 92D2 92D5 93B6 93D2 93D5 97C5 103C5
PCH_I2C_UPC_SCL
19D3 92B5 92B6 92D2 92D5 93B6 93D2 93D5 97B5 103B5
15
21
43
65
87
109
1211
16
PLACE_SIDE=BOTTOM
TBT_WR_SPI_CS_L
TBT_WR_SPI_CLK
TBT_WR_SPI_MOSI
UPC_R_SWD_CLK
UPC_R_SWD_DATA
PP3V3_UPC_R_LDO
UART ACE
93A6 93A8
93A6 93A8
93A7
93C2 103B5
93C2 103B5
93D4 95B2
BI
93D8 95B4
95B2
93D4 95B4
TBT_W_FORCE_PWR
93B1 93D6 96C2
PP3V3_TBT_W_S0
BI
PP0V9_TBT_W_LC
BI
TBT_WR_PERST_L
93B6 93D3 93D7 96D2 102D2
PP3V3_TBT_R_S0
BI
I2C_UPC_R_SDAM
93C3 102D3
BRIDGE ARKANOID CONNACE ARKANOID CONN
USBC_DBG
JB201
505070-1222
M-ST-SM
1413
21
43
65
87
109
1211
15
16
PLACE_SIDE=BOTTOM
6/4/2/1/3/5 -> W BRIDGE
I2C_UPC_W_INTM_L
I2C_UPC_W_SCLM
I2C_UPC_W_SDAM
TBT_R_FORCE_PWR
I2C_UPC_R_INTM_L
I2C_UPC_R_SCLM
93C7 96D3
93C7 96D3
93C7 96D3
93A1 93D2 102C2
93C3 102D3
93C3 102D3
7 -> BOTH W , R BRIDGE
B
9/11/12/10/8 -> R BRIDGE
A
19C3 92B8
IN
1
RB260
3.3K 3.3K
5%
1/20W
MF
201
2
TBT_WR_SPI_CLK
93A6
93B3
TBT_WR_SPI_CS_L
93A6
93B3
RB261
1/20W
TBT_WR_ROM_WP_L
TBT_WR_ROM_HOLD_L
PLT_RST_3V3_L
1
1
RB263
5%
MF
201
2
3.3K
5%
1/20W
MF
201
2
RB254
100K
RB256
6
CLK
1
CS*
3
WP*(IO2)
7
HOLD*(IO3)
BBR_PERST:PLTRST
21
1/20W
5%
117S0201
BBR_PERST:GPD_7
0
21
1/20W
5%
8
VCC
UB260
8MBIT-3.0V
W25Q80DVUXIE
USON
OMIT_TABLE
CRITICAL
GND EPAD
9
4
TBT_WR_PERST_L
201
MF
0201
MF
PP3V3_UPC_W_LDO
RB262
3.3K
5%
1/20W
MF
201
DI(IO0)
DO(IO1)
5
2
93B3
93B5
93B2 93D3 93D7 96D2 102D2
1
1
2
CB260
1UF
10%
6.3V
2
CERM
402
TBT_WR_SPI_MOSI
TBT_WR_SPI_MISO
93B5 93D8 95B2
BI
ROM
TBT_WR_SPI_CLK
93A8 93B3
TBT_WR_SPI_CS_L
93A8 93B3
97C5 93C7
93C3 103C5
USBC_W_RESET_L
SPI ACE
UART ACE
USBC_R_RST_L
MF 1/20W0201
BBR_RST:SPLIT
RB294
RB295
RB296
RB297
RB298
RB290
RB291
RB292
RB293
RB299
RB29A
RB29B
RB29C
117S0201
RB265
0
5%
100
15
15
15
15
15
15
15
15
15
15
15
15
21
21
21
21
21
21
21
21
21
21
21
21
21
21
USBC_W_RESET_L
MAKE_BASE=TRUE
1
RB266
0
5%
1/20W
MF
0201
2
BBR_RST:SHARED
Bridges
USBC_R_RESET_L
TBT_WR_SPI_CLK_DBG
MF1/20W 2015%
UPC_W_SPI_CLK
MF1/20W 2015%
UPC_W_SPI_CS_L
MF1/20W 2015%
UPC_W_SPI_MOSI
MF1/20W 2015%
UPC_W_SPI_MISO
MF1/20W 2015%
TBT_W_SPI_CLK
MF1/20W 2015%
TBT_W_SPI_CS_L
MF1/20W 2015%
TBT_W_SPI_MOSI
MF1/20W 2015%
TBT_W_SPI_MISO
MF1/20W 2015%
TBT_R_SPI_CLK
MF1/20W 2015%
TBT_R_SPI_CS_L
MF1/20W 2015%
TBT_R_SPI_MOSI
MF1/20W 2015%
TBT_R_SPI_MISO
MF1/20W 2015%
93C7 96D2
93C3 102D2
93B8
93C5 97B5
Ace
93C5 97B5
93C5 97B5
93D6 96C2
BB
93D6 96C2
93D6 96C2
93D6 96C2
93D2 102C2
BB
93D2 102C2
93D2 102C2
93C5 97B5
93D2 102C2
UPC_W_FORCE_PWR
93C7 95B7 97C5
19C3 92B3 92C3 92C7 93C3 93C7 97C5 103C5 19C3 92A8
UPC_R_FORCE_PWR
93C3 95B7 103C5
PCH_BBR_FORCE_PWRPCH_STRP_GPD7
ININ
BBR_FORCE_PWR:ACE
MF 1/20W0201
RB251
0
MF 1/20W0201
5%
RB253
0
MF 1/20W0201
BBR_FORCE_PWR:ACE
MF 1/20W0201
BOM_COST_GROUP=TBT
5%
5%
RB250
0
5%
21
21
21
RB252
0
21
TBT_W_FORCE_PWR
93B2 93D6 96C2
BBR_FORCE_PWR:PCH
BBR_FORCE_PWR:PCH
TBT_R_FORCE_PWR
SYNC_MASTER=t290 icl yn
PAGE TITLE
93B1 93D2 102C2
USB-C COMM + DEBUG W-R
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
SYNC_DATE=02/01/2018
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
2 OF 4
SHEET
93 OF 109
A
SIZE
D
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
19C3
19C3
USB_SOC_P
IO
USB_SOC_N
IO
19D4 98D5
IN
19D4 98D5
IN
19D4 98D5
IN
19D4 98D5
IN
19D4 98D5
OUT
19D4 98D5
OUT
19D4 98D5
OUT
19D4 98D5
OUT
19D4 98D3
IO
19D4 98D3
IO
19D4 98D5
IN
19D4 98D5
OUT
19D4 99B7
IO
19D4 99B7
IO
R3018
R3019
R3023
USBC_HSX_R2D_C_P<1>
USBC_HSX_R2D_C_N<1>
USBC_HSX_R2D_C_P<2>
USBC_HSX_R2D_C_N<2>
USBC_HSX_D2R_C_P<1>
USBC_HSX_D2R_C_N<1>
USBC_HSX_D2R_C_P<2>
USBC_HSX_D2R_C_N<2>
USBC_HSX_AUXCH_C_P
USBC_HSX_AUXCH_C_N
LSX_HSX_R2P
LSX_HSX_P2R
USB2_TBT_X_P
USB2_TBT_X_N
0
21
USB_UPC_X2_P
1/16W MF-LF 402
0
21
100K
21
5%
USB_UPC_X2_N
5%
SPARE_UPC_X
NO_TEST=1
MF-LF1/16W
NO_TEST=1
MF1/20W 2015%
402
Port-X
USBC_HS_R2D_C_P<1>
USBC_HS_R2D_C_N<1>
USBC_HS_R2D_C_P<2>
USBC_HS_R2D_C_N<2>
USBC_HS_D2R_C_P<1>
USBC_HS_D2R_C_N<1>
USBC_HS_D2R_C_P<2>
USBC_HS_D2R_C_N<2>
USBC_HS_AUXCH_C_P
USBC_HS_AUXCH_C_N
USBC_HS_LSX_R2P
USBC_HS_LSX_P2R
USB2_TBT_P
USB2_TBT_N
USB_UPC_2_P
USB_UPC_2_N
USB_UPC_3_P
USB_UPC_3_N
USBC_R2D_CR_P<1>
USBC_R2D_CR_N<1>
USBC_R2D_CR_P<2>
USBC_R2D_CR_N<2>
ACE2BBR
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
99C3 104A4 101C3 104D4
PP20V_USBC_VBUS
98D2 104B2
98D2 104B2
98D2 104B7
98D2 104B7
98D2 104B2
USBC_D2R_P<1>
98D2 104B2
USBC_D2R_N<1>
98D2 104B7
USBC_D2R_P<2>
98D2 104B7
USBC_D2R_N<2>
99B3 104B2
USBC_USB_TP
99B3 104B2
USBC_USB_TN
99B3 104B7
USBC_USB_BP
99B3 104C7
USBC_USB_BN
99B3 104B7
USBC_SBU1
99B3 104C2
USBC_SBU2
99C3 104B2
USBC_CC1
99B3 99C3 104A7
USBC_CC2
PP20V_USBC_X_VBUS PP20V_USBC_T_VBUS
USBC_X_R2D_CR_P<1>
USBC_X_R2D_CR_N<1>
USBC_X_R2D_CR_P<2>
USBC_X_R2D_CR_N<2>
USBC_X_D2R_P<1>
USBC_X_D2R_N<1>
USBC_X_D2R_P<2>
USBC_X_D2R_N<2>
USBC_X_USB_TOP_P
USBC_X_USB_TOP_N
USBC_X_USB_BOT_P
USBC_X_USB_BOT_N
USBC_X_SBU1
USBC_X_SBU2
USBC_X_CC1
FUNC_TEST=TRUE
FUNC_TEST=TRUE
USBC_X_CC2
PP20V_USBC_A_VBUS
USBC_A_R2D_CR_P<1>
USBC_A_R2D_CR_N<1>
USBC_A_R2D_CR_P<2>
USBC_A_R2D_CR_N<2>
USBC_A_D2R_P<1>
USBC_A_D2R_N<1>
USBC_A_D2R_P<2>
USBC_A_D2R_N<2>
USBC_A_USB_TOP_P
USBC_A_USB_TOP_N
USBC_A_USB_BOT_P
USBC_A_USB_BOT_N
USBC_A_SBU1
USBC_A_SBU2
USBC_A_CC1
USBC_A_CC2
SUBDESIGN_SUFFIX=CXT
PP20V_USBC_B_VBUS
USBC_B_R2D_CR_P<1>
USBC_B_R2D_CR_N<1>
USBC_B_R2D_CR_P<2>
USBC_B_R2D_CR_N<2>
USBC_B_D2R_P<1>
USBC_B_D2R_N<1>
USBC_B_D2R_P<2>
USBC_B_D2R_N<2>
USBC_B_USB_TOP_P
USBC_B_USB_TOP_N
USBC_B_USB_BOT_P
USBC_B_USB_BOT_N
USBC_B_SBU1
USBC_B_SBU2
USBC_B_CC1
USBC_B_CC2
USBC_CONNECTOR
USBC_RPD_G1
USBC_RPD_G2
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.2000
100D2 104C7
100D2 104D7
100D2 104C2
100D2 104D2
100D2 104C7
100D2 104C7
100D2 104C2
100D2 104C2
101B3 104C2
101B3 104C2
101B3 104C7
101B3 104C7
101B3 104C2
101B3 104C7
101C3 104D7
101B3
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
USBC_T_R2D_CR_P<1>
USBC_T_R2D_CR_N<1>
USBC_T_R2D_CR_P<2>
USBC_T_R2D_CR_N<2>
USBC_T_D2R_P<1>
USBC_T_D2R_N<1>
USBC_T_D2R_P<2>
USBC_T_D2R_N<2>
USBC_T_USB_TOP_P
USBC_T_USB_TOP_N
USBC_T_USB_BOT_P
USBC_T_USB_BOT_N
USBC_T_SBU1
USBC_T_SBU2
USBC_T_CC1
101C3 104D2
USBC_T_CC2
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.2000
SUBDESIGN_SUFFIX=TSUBDESIGN_SUFFIX=X
PP20V_USBC_VBUS
USBC_R2D_CR_P<1>
USBC_R2D_CR_N<1>
USBC_R2D_CR_P<2>
USBC_R2D_CR_N<2>
USBC_D2R_P<1>
USBC_D2R_N<1>
USBC_D2R_P<2>
USBC_D2R_N<2>
USBC_USB_TP
USBC_USB_TN
USBC_USB_BP
USBC_USB_BN
USBC_SBU1
USBC_SBU2
USBC_CC1
USBC_CC2
USBC_RPD_G1
USBC_RPD_G2
ACE2BBR
Port-T
USBC_HS_R2D_C_P<1>
USBC_HS_R2D_C_N<1>
USBC_HS_R2D_C_P<2>
USBC_HS_R2D_C_N<2>
USBC_HS_D2R_C_P<1>
USBC_HS_D2R_C_N<1>
USBC_HS_D2R_C_P<2>
USBC_HS_D2R_C_N<2>
USBC_HS_AUXCH_C_P
USBC_HS_AUXCH_C_N
USBC_HS_LSX_R2P
USBC_HS_LSX_P2R
USB2_TBT_P
USB2_TBT_N
USB_UPC_2_P
USB_UPC_2_N
USB_UPC_3_P
101B5
USB_UPC_3_N
USBC_HST_R2D_C_P<1>
USBC_HST_R2D_C_N<1>
USBC_HST_R2D_C_P<2>
USBC_HST_R2D_C_N<2>
USBC_HST_D2R_C_P<1>
USBC_HST_D2R_C_N<1>
USBC_HST_D2R_C_P<2>
USBC_HST_D2R_C_N<2>
USBC_HST_AUXCH_C_P
USBC_HST_AUXCH_C_N
LSX_HST_R2P
LSX_HST_P2R
USB2_TBT_T_P
USB2_TBT_T_N
100K
SPARE_UPC_T
MF 1/20W201 5%
2 1
19D4 100D5
IN
19C4 100D5
IN
19D4 100D5
IN
19C4 100D5
IN
19C4 100D5
OUT
19C4 100D5
OUT
19C4 100D5
OUT
19C4 100D5
OUT
19C4 100D3
IO
19C4 100D3
IO
19C4 100D5
IN
19C4 100D5
OUT
19C4 101B7
IO
19C4 101B7
IO
R3028
D
C
C
MIN_LINE_WIDTH=0.2000
Port-W
19C4 96D5
19C4 96D5
19C4 96D5
19C4 96D5
19C4 96D5
19C4 96D5
19C4 96D5
19C4 96D5
19C4 96D3
19C4 96D3
19C4 96D5
19C4 96D5
19B4 97B7
19B4 97B7
USBC_HSW_R2D_C_P<1>
IN
USBC_HSW_R2D_C_N<1>
IN
USBC_HSW_R2D_C_P<2>
IN
USBC_HSW_R2D_C_N<2>
IN
USBC_HSW_D2R_C_P<1>
OUT
USBC_HSW_D2R_C_N<1>
OUT
USBC_HSW_D2R_C_P<2>
OUT
USBC_HSW_D2R_C_N<2>
OUT
USBC_HSW_AUXCH_C_P
IO
USBC_HSW_AUXCH_C_N
IO
LSX_HSW_R2P
IN
LSX_HSW_P2R
OUT
USB2_TBT_W_P
IO
USB2_TBT_W_N
IO
USBC_HS_R2D_C_P<1>
USBC_HS_R2D_C_N<1>
USBC_HS_R2D_C_P<2>
USBC_HS_R2D_C_N<2>
USBC_HS_D2R_C_P<1>
USBC_HS_D2R_C_N<1>
USBC_HS_D2R_C_P<2>
USBC_HS_D2R_C_N<2>
USBC_HS_AUXCH_C_P
USBC_HS_AUXCH_C_N
USBC_HS_LSX_R2P
USBC_HS_LSX_P2R
USB2_TBT_P
USB2_TBT_N
USB_UPC_2_P
SUBDESIGN_SUFFIX=W
PP20V_USBC_VBUS
USBC_R2D_CR_P<1>
USBC_R2D_CR_N<1>
USBC_R2D_CR_P<2>
USBC_R2D_CR_N<2>
97C3 105A4
96D2 105B2
96D2 105B2
96D2 105B7
96D2 105B7 102D2 105D2
96D2 105B2
USBC_D2R_P<1>
96D2 105B2
USBC_D2R_N<1>
96D2 105B7
USBC_D2R_P<2>
96D2 105B7
USBC_D2R_N<2>
97B3 105B2 103B3 105C2
USBC_USB_TP
97B3 105B2
USBC_USB_TN
97B3 105B7
USBC_USB_BP
97B3 105C7
USBC_USB_BN
97B3 105B7
USBC_SBU1
97B3 105C2
USBC_SBU2
97C3 105B2
USBC_CC1
97B3 97C3 105A7
USBC_CC2
MIN_NECK_WIDTH=0.0900
PP20V_USBC_W_VBUS
USBC_W_R2D_CR_P<1>
USBC_W_R2D_CR_N<1>
USBC_W_R2D_CR_P<2>
USBC_W_R2D_CR_N<2> USBC_R_R2D_CR_N<2>
USBC_W_D2R_P<1>
USBC_W_D2R_N<1>
USBC_W_D2R_P<2>
USBC_W_D2R_N<2>
USBC_W_USB_TOP_P USBC_R_USB_TOP_P
USBC_W_USB_TOP_N
USBC_W_USB_BOT_P
USBC_W_USB_BOT_N
USBC_W_SBU1
USBC_W_SBU2
USBC_W_CC1
PP20V_USBC_A_VBUS
USBC_A_R2D_CR_P<1>
USBC_A_R2D_CR_N<1>
USBC_A_R2D_CR_P<2>
USBC_A_R2D_CR_N<2>
USBC_A_D2R_P<1>
USBC_A_D2R_N<1>
USBC_A_D2R_P<2>
USBC_A_D2R_N<2>
USBC_A_USB_TOP_P
USBC_A_USB_TOP_N
USBC_A_USB_BOT_P
USBC_A_USB_BOT_N
USBC_A_SBU1
USBC_A_SBU2
USBC_A_CC1
USBC_A_CC2
SUBDESIGN_SUFFIX=CWR
PP20V_USBC_B_VBUS
USBC_B_R2D_CR_P<1>
USBC_B_R2D_CR_N<1>
USBC_B_R2D_CR_P<2>
USBC_B_R2D_CR_N<2>
USBC_B_D2R_P<1>
USBC_B_D2R_N<1>
USBC_B_D2R_P<2>
USBC_B_D2R_N<2>
USBC_B_USB_TOP_P
USBC_B_USB_TOP_N
USBC_B_USB_BOT_P
USBC_B_USB_BOT_N
USBC_B_SBU1
USBC_B_SBU2
USBC_B_CC1
USBC_B_CC2
103C3 105D4
102D2 105C7
102D2 105D7
102D2 105C2
102D2 105C7
102D2 105C7
102D2 105C2
102D2 105C2
103B3 105C2
103B3 105C7
103B3 105C7
103B3 105C2
103B3 105C7
103C3 105D7
103B3
103C3 105D2
USBC_CONNECTOR
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.0900
PP20V_USBC_R_VBUS
USBC_R_R2D_CR_P<1>
USBC_R_R2D_CR_N<1>
USBC_R_R2D_CR_P<2>
USBC_R_D2R_P<1>
USBC_R_D2R_N<1>
USBC_R_D2R_P<2>
USBC_R_D2R_N<2>
USBC_R_USB_TOP_N
USBC_R_USB_BOT_P
USBC_R_USB_BOT_N
USBC_R_SBU1
USBC_R_SBU2
USBC_R_CC1
USBC_R_CC2USBC_W_CC2
SUBDESIGN_SUFFIX=R
PP20V_USBC_VBUS
USBC_R2D_CR_P<1>
USBC_R2D_CR_N<1>
USBC_R2D_CR_P<2>
USBC_R2D_CR_N<2>
USBC_D2R_P<1>
USBC_D2R_N<1>
USBC_D2R_P<2>
USBC_D2R_N<2>
USBC_USB_TP
USBC_USB_TN
USBC_USB_BP
USBC_USB_BN
USBC_SBU1
USBC_SBU2
USBC_CC1
USBC_CC2
Port-R
USBC_HS_R2D_C_P<1>
USBC_HS_R2D_C_N<1>
USBC_HS_R2D_C_P<2>
USBC_HS_R2D_C_N<2>
USBC_HS_D2R_C_P<1>
USBC_HS_D2R_C_N<1>
USBC_HS_D2R_C_P<2>
USBC_HS_D2R_C_N<2>
USBC_HS_AUXCH_C_P
USBC_HS_AUXCH_C_N
USBC_HS_LSX_R2P
USBC_HS_LSX_P2R
USB2_TBT_P
USB2_TBT_N
USB_UPC_2_P
USBC_HSR_R2D_C_P<1>
USBC_HSR_R2D_C_N<1>
USBC_HSR_R2D_C_P<2>
USBC_HSR_R2D_C_N<2>
USBC_HSR_D2R_C_P<1>
USBC_HSR_D2R_C_N<1>
USBC_HSR_D2R_C_P<2>
USBC_HSR_D2R_C_N<2>
USBC_HSR_AUXCH_C_P
USBC_HSR_AUXCH_C_N
LSX_HSR_R2P
LSX_HSR_P2R
USB2_TBT_R_P
USB2_TBT_R_N
19B4 102D5
IN
19B4 102D5
IN
19B4 102D5
IN
19B4 102D5
IN
OUT
OUT
OUT
OUT
IO
IO
19B4 102D5
IN
OUT
IO
IO
19B4 102D5
19B4 102D5
19B4 102D5
19B4 102D5
19B4 102D3
19B4 102D3
19B4 102D5
19B4 103B7
19B4 103B7
B
RB223
100K
USB_UPC_2_N
USB_UPC_3_P
21
MF1/20W 2015%
USB_UPC_3_N
ACE2BBR
USBC_RPD_G1
USBC_RPD_G2
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.2000
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.2000
USBC_RPD_G1
USBC_RPD_G2
ACE2BBR
USB_UPC_2_N
USB_UPC_3_P
103B5 97B5
USB_UPC_3_N
B
SPARE_UPC_RSPARE_UPC_W
MF 1/20W201 5%
100K
RB225
21
A
8
LAST CHANGE: Wed Apr 1 22:57:37 2015
SYNC_MASTER=J132_RUENJOU SYNC_DATE=03/22/2017
PAGE TITLE
A
USB-C CONNECTOR
DRAWING NUMBER
051-05198
Apple Inc.
REVISION
6.0.0
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
67
35 4
2
BRANCH
evt-3
PAGE
3 OF 4
SHEET
94 OF 109
1
SIZE
D
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
19B3 106C6
IN
19C3 95C7 107C8 106C8
IN
IN
106A7 99C3 95C4 92D8 19B3
95C2 99C3 106A7
92A3 92C3 106B8
IN
106A5 101C3 95C4 92D4 19B3
95C2 101C3 106A5
PP3V3_S0_TBT_XT_ISNS_R
TBT_PWR_EN
PP3V3_G3H_RTC
PP3V3_UPC_X_VOUTLV
UPC_T_FORCE_PWR
PP3V3_G3H_RTC
PP3V3_UPC_T_VOUTLV
SUBDESIGN_SUFFIX=SXT
PP3V3_S0_TBT
TBT_PWR_EN
UPC_X_FORCE_PWR
PP3V3_VIN_X
PP3V3_UPC_X_VOUTLV
UPC_T_FORCE_PWR
PP3V3_VIN_T PP3V3_TBT_T_SX
PP3V3_UPC_T_VOUTLV
USBC_SW
PP3V3_TBT_X_S0
PP3V3_TBT_X_SX
PP3V3_TBT_T_S0
PP3V3_TBT_X_S0UPC_X_FORCE_PWR
PP3V3_TBT_X_SX
PP3V3_TBT_T_S0
PP3V3_TBT_T_SX
FUNC_TEST=TRUE
PP3V3_G3H_RTC
PP1V8_SLPS2R
VOLTAGE=3.3V
MIN_NECK_WIDTH=0.1200
MIN_LINE_WIDTH=0.2000
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1200
VOLTAGE=3.3V
VOLTAGE=3.3V
MIN_NECK_WIDTH=0.1200
MIN_LINE_WIDTH=0.2000
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1200
VOLTAGE=3.3V
92B3 92D8 95D4 98B2 106D4 92B3 92C7 106D8
BI
92D8 95C4 98B4 106D7
92B3 92D4 95C4 100B2 106C4
BI
92D4 95C4 100B4 106C7
PP3V3_TBT_X_S0
PPDCIN_G3H
IN
PP3V3_G3H_RTC
IN
PP1V8_SLPS2R
IN
PP3V3_TBT_X_SX
92D8 95D4 98B4 106D7
101C3
92B3 92D8 95D4 98B2 106D4
19C3 95A4 95B4 95C4 103D7 97D7 99D7 101D7
19B3 92D8 95D7 99C3 106A7
19B3 95A4 95B4 95C4 103C3 97C3 99C3
PP3V3_TBT_S0
PPDCIN_G3H
PP3V3_VIN
PP1V8_VDDIO
PP3V3_TBT_SX
PP_5V0
PORT-X
PP3V3_UPC_VOUTLV
ACE2BBR
PP3V3_UPC_LDO
PP0V9_TBT_LC
UPC_VDDIO_CFG
PP3V3_UPC_X_LDO
PP0V9_TBT_X_LC
PP3V3_UPC_X_VOUTLV
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
NC_UPC_X_VDDIO_CFG
19B3 109B3
OUT
19B3 109A3
OUT
92B3 92D8 99C3
OUT
92B3 98A5
BI
95D7 99C3 106A7
99C3
D
C
19C3 95A7 109D2 108D2
19C3 95A7 109D5 108D5
19B3 95A7 109D8 108D8
19C3 95A7 109D8 108D8
92C3 92C7 109D8
93B3 93C7 107D8
107A7 97C3 95B4 93D8 19B3
93A3 93C3 107B8
107A5 103C3 95A4 93D4 19B3
PPBUS_G3H
IN
PP5V_G3S
IN
PP3V3_G3H_RTC
IN
PM_RSMRST_L
IN
UPC_XT_5V_EN
IN
19B3 107C6
IN
19C3 95D7 107C8 106C8
IN
IN
95B2 97C3 107A7
IN
95A2 103C3 107A5
UPC_5V_EN
PP3V3_S0_TBT_WR_ISNS_R
TBT_PWR_EN
UPC_W_FORCE_PWR
PP3V3_G3H_RTC
PP3V3_UPC_W_VOUTLV
UPC_R_FORCE_PWR
PP3V3_G3H_RTC
PP3V3_UPC_R_VOUTLV
SUBDESIGN_SUFFIX=VXT
PPVIN_5VUSBC
PP5V_G3S_USBC
PP3V3_G3H_UPC5VEN
PM_RSMRST_L
P5VUSBC_POS
P5VUSBC_NEG
USBC_VR
99D5 101D5 109C1 101C3
PP5V_USBC
SUBDESIGN_SUFFIX=SWR
PP3V3_S0_TBT
TBT_PWR_EN
UPC_X_FORCE_PWR
PP3V3_VIN_X
PP3V3_UPC_X_VOUTLV
UPC_T_FORCE_PWR
PP3V3_VIN_T PP3V3_TBT_T_SX
PP3V3_UPC_T_VOUTLV
USBC_SW
PP3V3_TBT_X_S0
PP3V3_TBT_X_SX
PP3V3_TBT_T_S0
Port-T
92B3 92D4 95D4 100B2 106C4
19C3 95A4 95B4 95C4 103D7 97D7
P5VUSBC_POS_XT
P5VUSBC_NEG_XT
PP5V_S4_XT_USBC NC_UPC_T_VDDIO_CFG
PP3V3_TBT_W_S0
PP3V3_G3H_RTC
PP1V8_SLPS2R
VOLTAGE=5V
VOLTAGE=3.3V
MIN_NECK_WIDTH=0.1200
MIN_LINE_WIDTH=0.2000
PP3V3_TBT_W_SX
MIN_LINE_WIDTH=0.1400
MIN_NECK_WIDTH=0.0750
VOLTAGE=3.3V
VOLTAGE=3.3V
PP3V3_TBT_R_S0
MIN_NECK_WIDTH=0.1200
MIN_LINE_WIDTH=0.2000
PP3V3_TBT_R_SX
MIN_LINE_WIDTH=0.1400
MIN_NECK_WIDTH=0.0750
VOLTAGE=3.3V
99D7 101D7
19B3 92D4 95D7 101C3 106A5
19B3 95A4 95B4 95C4 103C3 97C3
99C3 101C3
93B2 93D8 95B4 96B2 107D4
BI
93D8 95B4 96B4 107D7
93B2 93D4 95B4 102B2 107C4
BI
93D4 95A4 102B4 107C7
PP3V3_TBT_T_S0
PPDCIN_G3H
IN
PP3V3_G3H_RTC
IN
PP1V8_SLPS2R
IN
PP3V3_TBT_T_SX
92D4 95D4 100B4 106C7
PP3V3_TBT_S0
PPDCIN_G3H
PP3V3_VIN
PP1V8_VDDIO
PP3V3_TBT_SX
PP_5V0
PP3V3_UPC_LDO
PP0V9_TBT_LC
PP3V3_UPC_VOUTLV
ACE2BBR
UPC_VDDIO_CFG
PP3V3_UPC_T_LDO
PP0V9_TBT_T_LC
PP3V3_UPC_T_VOUTLV
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
92A6 92B5 92D4 101C3
OUT
100A5
95D7 101C3 106A5
C
B
19B3 108B3
OUT
19B3 108A3
OUT
B
Port-W
PP3V3_TBT_W_S0 PP3V3_UPC_W_LDO
PPDCIN_G3H
IN
PP3V3_G3H_RTC
IN
PP1V8_SLPS2R
IN
PP3V3_TBT_W_SX
VOLTAGE=5V
PP3V3_TBT_S0
PPDCIN_G3H
PP3V3_VIN
PP1V8_VDDIO
PP3V3_TBT_SX
PP_5V0
ACE2BBR
PP3V3_UPC_LDO
PP0V9_TBT_LC
PP3V3_UPC_VOUTLV
UPC_VDDIO_CFG
PP0V9_TBT_W_LC
PP3V3_UPC_W_VOUTLV
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
NC_UPC_W_VDDIO_CFG
97C3
PP3V3_G3H_RTC
PP1V8_SLPS2R
101C3
93B2 93D8 95B4 96B2 107D4
19C3 95A4 95C4 103D7 97D7 99D7 101D7
19B3 93D8 95B7 97C3 107A7
19B3 95A4 95C4 103C3 97C3 99C3
93D8 95B4 96B4 107D7
Port-R
PP3V3_TBT_R_S0 PP3V3_UPC_R_LDO
93B2 93D4 95B4 102B2 107C4
19C3 95C7 109D2 108D2
19C3 95C7 109D5 108D5
19B3 95C7 109D8 108D8
19C3 95C7 109D8 108D8
93C3 93C7 108D8
PPBUS_G3H
IN
PP5V_G3S
IN
PP3V3_G3H_RTC
IN
PM_RSMRST_L
IN
UPC_WR_5V_EN
IN
PPVIN_5VUSBC
PP5V_G3S_USBC
PP3V3_G3H_UPC5VEN
PM_RSMRST_L
UPC_5V_EN
SUBDESIGN_SUFFIX=VWR
P5VUSBC_POS
P5VUSBC_NEG
USBC_VR
103D5 97D5 108C1
PP5V_USBC
P5VUSBC_POS_WR
P5VUSBC_NEG_WR
PP5V_S4_WR_USBC
PP3V3_G3H_RTC
PP1V8_SLPS2R
VOLTAGE=5V
101D7
101C3
19C3 95B4 95C4 103D7 97D7 99D7
19B3 93D4 95B7 103C3 107A5
19B3 95B4 95C4 103C3 97C3 99C3
PPDCIN_G3H
IN
PP3V3_G3H_RTC
IN
PP1V8_SLPS2R
IN
PP3V3_TBT_R_SX
93D4 95B4 102B4 107C7
PP3V3_TBT_S0
PPDCIN_G3H
PP3V3_VIN
PP1V8_VDDIO
PP3V3_TBT_SX
PP_5V0
ACE2BBR
PP3V3_UPC_LDO
PP0V9_TBT_LC
PP3V3_UPC_VOUTLV
UPC_VDDIO_CFG
PP0V9_TBT_R_LC
PP3V3_UPC_R_VOUTLV
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
NC_UPC_R_VDDIO_CFG
102A5
103C3
93A6 93B5 93D8 97C3
BI
93B2 96A5
BI
95B7 97C3 107A7
93B3 93D4 103C3
BI
95B7 103C3 107A5
A
8
SYNC_DATE=02/01/2018SYNC_MASTER=t290 icl yn
PAGE TITLE
A
USB-C VRs AND POWER
DRAWING NUMBER
051-05198
Apple Inc.
REVISION
6.0.0
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
67
35 4
2
BRANCH
evt-3
PAGE
4 OF 4
SHEET
95 OF 109
1
SIZE
D
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
USBC HIGH-SPEED 1 AC COUPLING
BURNSIDE BRIDGE I2C ADDRESS = 0x18
94C6
94C6
94C6
94C6
94C6
94C6
USBC_HSW_R2D_C_P<1>
IN
USBC_HSW_R2D_C_N<1>
IN
USBC_HSW_R2D_C_P<2>
IN
USBC_HSW_R2D_C_N<2>
IN
USBC_HSW_D2R_C_P<1>
OUT
USBC_HSW_D2R_C_N<1>
OUT
USBC_HSW_D2R_C_P<2>
OUT
USBC_HSW_D2R_C_N<2>
OUT
94B6
IN
94B6
OUT
GND_VOID=TRUE
NO_TEST=1
GND_VOID=TRUE
NO_TEST=1
GND_VOID=TRUE
NO_TEST=1
GND_VOID=TRUE
NO_TEST=1
GND_VOID=TRUE
NO_TEST=1
GND_VOID=TRUE
NO_TEST=1
GND_VOID=TRUE
NO_TEST=1
GND_VOID=TRUE
NO_TEST=1
C2820_W
0.22UF
C2821_W
0.22UF
C2824_W
0.22UF
C2825_W
0.22UF
C2822_W
0.22UF
C2823_W
0.22UF
C2826_W
0.22UF
C2827_W
0.22UF
LSX_HSW_R2P
LSX_HSW_P2R USBC_W_RESET_L
NOSTUFF
20K
5%
1/20W
MF
201
1
2
R2808_W
R2809_W
20K
5%
1/20W
MF
201
1
2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
20% 6.3V
X5R
20%
6.3V
X5R
20%
6.3V
X5R
20% 6.3V
X5R
6.3V20%
X5R
6.3V20%
X5R
6.3V
20%
X5R
20%
6.3V
X5R
0201
0201
0201
0201
0201
0201
0201
0201
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
97C6 93C7
97C6 93C7
97C6 93C7
94B6
94B6
93D7
93D7
93D7
93D7
93D7
U2800_W
BURNSIDE-BRIDGE
USBC_HS_R2D_P<1>_W
USBC_HS_R2D_N<1>_W
USBC_HS_R2D_P<2>_W
USBC_HS_R2D_N<2>_W
USBC_HS_D2R_P<1>_W
USBC_HS_D2R_N<1>_W
USBC_HS_D2R_P<2>_W
USBC_HS_D2R_N<2>_W
USBC_HSW_AUXCH_C_P
IO
USBC_HSW_AUXCH_C_N
IO
BI
BI
BI
IO
IO
IO
IN
IO
I2C_UPC_W_INTM_L
I2C_UPC_W_SCLM
I2C_UPC_W_SDAM
TBT_W_GPIO_5
TBT_W_GPIO_6
TBT_W_FLASH_SHARE_EN
TBT_W_FLASH_MSTR_H_SLV_L
TBT_W_GPIO_12
NO_TEST=1
NO_TEST=1
J1
ASSRXP1
J2
ASSRXN1
C1
ASSRXP2
C2
ASSRXN2
G1
ASSTXP1
G2
ASSTXN1
E1
ASSTXP2
E2
ASSTXN2
L8
PA_AUX_P
M8
PA_AUX_N
M7 B8
PA_LSTX_SBU1
L7
PA_LSRX_SBU2
A10
I2C_INT
C9
I2C_SCL
E7
I2C_SDA
B9
POC_GPIO_5
A8
POC_GPIO_6
A4
POC_GPIO_10
A5
POC_GPIO_11
A6
POC_GPIO_12
INTERNAL CAPS,
PU, PD
BGA
SYM 1 OF 2
CRITICAL
OMIT_TABLE
To SPI Flash
BSSRXP1
BSSRXN1
BSSRXP2
BSSRXN2
BSSTXP1
BSSTXN1
BSSTXP2
BSSTXN2
BSBU1
BSBU2
PERST*
RESET*
TDI
TMS
TCK
TDO
EE_DI
EE_DO
EE_CS*
EE_CLK
J12
USBC_W_D2R_P<1>
J11
USBC_W_D2R_N<1>
C12
USBC_W_D2R_P<2>
C11
USBC_W_D2R_N<2>
G12
USBC_W_R2D_CR_P<1>
G11
USBC_W_R2D_CR_N<1>
E12
USBC_W_R2D_CR_P<2>
E11
USBC_W_R2D_CR_N<2>
M10
USBC_AUXLSX_P_W
L10
USBC_AUXLSX_N_W
TBT_WR_PERST_L
L11
A3
JTAG_ISP_TDI
C3
JTAG_TBT_W_TMS
B5
JTAG_ISP_TCK
C5
JTAG_ISP_TDO
C6
TBT_W_SPI_MOSI
B4
TBT_W_SPI_MISO
B6
TBT_W_SPI_CS_L
C7
TBT_W_SPI_CLK
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
IO
IO
IO
IO
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
94C6
94C6
94C6
94C6
94C6
94C6
D
94C6
94C6
97B7
BI
97B7
BI
93D7
IN
93C7
IN
93D6
IN
93D6
IN
93D6
IN
93D6
93D6
93D6
IN
93D6
93D6
C
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#
CAP,CER,20UF,20%,2.5V,X6S,HRZTL,0402 C2862,C2863,C2864,C2865
117S0201
BB XTAL
5%
25V
C0G
0201
0201
C0G
25V
5%
1
CRITICAL
2
1 3
2
1
Y2800_W
2 4
TBT_XTAL25M_OUT_R_W
25MHZ-25PPM-20PF-50OHM
2.00X1.60-SM
C2803_W
20PF
20PF
C2802_W
TABLE_5_HEAD
BOM OPTIONCRITICAL
TABLE_5_ITEM
CRITICAL4138S00035
R2803_W
0
0201
5%
1/20WMF
117S0201
R2802_W
0
0201
5%
1/20WMF
12
12
93D7
TBT_W_THERM_D_P
OUT
TBT_XTAL25M_IN_WTBT_XTAL25M_IN_R_W
TBT_XTAL25M_OUT_W
1
C2836_W
2.2UF
20%
6.3V
2
X5R-CERM
0201
1
C2837_W
2.2UF
20%
6.3V
2
X5R-CERM
0201
NC
NC
NC
NC
1
2
M11
THERMDA
L9
XTAL_25_IN
M9
XTAL_25_OUT
L12
MONDC_SVR
A11
MONDC
M12
TEST_EDM
A12
NC_A12
J6
NC_J6
L3
NC_L3
J5
NC_J5
NOSTUFF
C2842_W
47UF
20%
6.3V
CER-X5R
0603
TEST_EN
TEST_PWR_GOOD
RBIAS
RSENSE
ATEST_P
ATEST_N
FORCE_PWR
FLASH_BUSY*
FUSE_VQPS_64
SMBUS_SCL
SMBUS_SDA
B11
B3
TBT_TEST_PWR_GOOD_W
L4
TBT_RBIAS_W
L5
TBT_RSENSE_W
4.75K
A1
A2
B10
A9
B2
A7
B7
NC
NC
TBT_W_FORCE_PWR
TBT_WR_FLASH_BUSY_L
TP_SMBUS_TBT_SCL_W
TP_SMBUS_TBT_SDA_W
0.5%
0201
PLACE_NEAR=U2800_W.L5:2MM
PLACE_NEAR=U2800_W.L4:2MM
FROM USB-C PORT
CONTROLLER (UPC)
PP3V3_TBT_W_SX
12
1/20W
TF
R2807_W
R2806_W
IN
IO
95B3
IN
100
5%
1/20W
MF
201
93D6
93D7
1
2
C
B
A
1
12PF
5%
25V
2
CERM
0201
C2854_W C2855_W
10UF
20%
6.3V
CERM-X5R
0402-4 0201
1
C2873_WC2872_W
3PF
+/-0.1PF
25V
2
C0G
0201
1
2.2UF
20%
2
6.3V
X5R-CERM
MIN_NECK_WIDTH=0.0750
MIN_LINE_WIDTH=0.1400
VOLTAGE=0.9V
1
2
1
C2856_W
2.2UF
20%
6.3V
2
X5R-CERM
0201
1
4UF
20%
6.3V
2
CER-X5R
0201
MIN_NECK_WIDTH=0.0750
MIN_LINE_WIDTH=0.1400
VOLTAGE=3.3V
1
2
1
2
1
4UF
20%
6.3V
CER-X5R
0201
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.1400
MIN_NECK_WIDTH=0.0750
1
C2857_W
2.2UF
20%
6.3V
2
X5R-CERM
0201
2
CRITICAL
OMIT_TABLE
20UF
20%
2.5V
X6S-CERM
0402-1
4UF
20%
6.3V
CER-X5R
CRITICAL
OMIT_TABLE
1
20UF
20%
2.5V
2
X6S-CERM
0402-1
1
20%
6.3V
2
CER-X5R
02010201
CRITICAL
OMIT_TABLE
1
20UF
20%
2.5V
2
X6S-CERM
0402-1
PP0V9_TBT_SVR_W
1
C2852_W
4UF
20%
6.3V
2
CER-X5R
0201
PP0V9_TBT_LVR_W
PP3V3_TBT_LC_W
PP3V3_TBT_ANA_W
95B3
IO
PP0V9_TBT_W_LC
VOLTAGE=0.9V
MIN_NECK_WIDTH=0.0750
MIN_LINE_WIDTH=0.1400
1
C2858_W
2.2UF
20%
6.3V
2
X5R-CERM
0201
CRITICAL
OMIT_TABLE
1
C2862_WC2863_WC2864_WC2865_W
20UF
20%
2.5V
2
X6S-CERM
0402-1
1
C2853_WC2851_WC2850_WC2860_WC2861_W
4UF4UF
20%
6.3V
2
CER-X5R
0201
F6
G6
E9
G9
L6
M6
E5
L2
J3
F3
F5
G5
B1
B12
D1
D11
D12
D2
F1
F11
F12
F2
BURNSIDE-BRIDGE
VCC0P9_SVR_ANA
VCC0P9_SVR_PB_ANA
VCC0P9_LVR
VCC0P9_LVR_SENSE
VCC3P3_LC
VCC3P3_ANA
VCC0P9_LC
VSS
VSS_ANA
U2800_W
BGA
SYM 2 OF 2
CRITICAL
OMIT_TABLE
VCC3P3_SX
VCC3P3A
VCC3P3_SVR
VCC0P9_SVR
SVR_IND
SVR_VSS
VSS_ANA
VOLTAGE=3.3V
MIN_NECK_WIDTH=0.0750
MIN_LINE_WIDTH=0.1400
1
C2843_W
12PF
5%
25V
2
NP0-C0G
0201
E6
VOLTAGE=3.3V
J7
M4
M5
E3
G3
L1
M1
M2
M3
F7
F9
G7
H1
H11
H12
H2
J9
K1
K11
K12
K2
MIN_NECK_WIDTH=0.0750
MIN_LINE_WIDTH=0.1400
1
C2832_W
10UF
20%
6.3V
2
CERM-X5R
0402-4
BYPASS=U2800.M4:M3:3MM
1
C2838_W
12PF
5%
25V
2
NP0-C0G
0201
PP0V9_TBT_SVR_IND_W
VOLTAGE=3.3V
DIDT=TRUE
SWITCH_NODE=TRUE
XW2830_W
PLACE_NEAR=U2800_W.K11:2MM
NO_XNET_CONNECTION=1
SM
1 2
PP3V3_TBT_VCCA_W
1
C2830_W
2.2UF
20%
6.3V
2
X5R-CERM
0201
1
C2831_W
10UF
20%
6.3V
2
CERM-X5R
0402-4
1
C2871_W
3PF
+/-0.1PF
25V
2
C0G
0201
PP3V3_TBT_S0_SVR_W
1
C2833_W
10UF
20%
6.3V
2
CERM-X5R
0402-4
1
C2834_W
10UF
20%
6.3V
2
CERM-X5R
0402-4
1
C2835_W
10UF
20%
6.3V
2
CERM-X5R
0402-4
Layout: Place these CAPs close to M4, M5, J5
PP0V9_TBT_SVR_W
VOLTAGE=0.9V
1
C2839_W
4UF
20%
6.3V
2
CER-X5R
0201
1
C2841_W
4UF
20%
6.3V
2
CER-X5R
0201
CRITICAL
MIN_NECK_WIDTH=0.0750
MIN_LINE_WIDTH=0.1400
L2800_W
0.68UH-20%-4.3A-0.043OHM
1 2
0805
TBT_W_THERM_D_N
CONNECT TO GND PIN
CLOSEST TO THERMDA PIN
BOM_COST_GROUP=TBT
OUT
93D7
R2800_W
0
1 2
5%
402
1/16W
MF-LF
R2801_W
0
1 2
5%
402
MF-LF1/16W
XW2801_W
SM
1 2
NO_XNET_CONNECTION=1
Layout: Use a bigger XW
P0V9_TBT_SVR_PGND_W
NO_XNET_CONNECTION=1
PLACE_NEAR=C2832_W.2:2MM
1
C2840_W
47UF
20%
6.3V
2
CER-X5R
0603
PAGE TITLE
1
2
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PP3V3_TBT_W_S0
XW2800_W
SM
1 2
95B3
IN
C2870_W
3PF
+/-0.1PF
25V
C0G
0201
BURNSIDE BRIDGE
DRAWING NUMBER
051-05198
REVISION
BRANCH
PAGE
SHEET
96 OF 109
SYNC_DATE=02/01/2018SYNC_MASTER=t290 icl yn
6.0.0
evt-3
1 OF 2
B
A
SIZE
D
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
ACE2 USB-C PORT CONTROLLER (UPC)
3 245
VOLTAGE=20V
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.0750
PP20V_USBC_W_VBUS
IO
1
94C6 97C2
D
C
95B3
PPDCIN_G3H
IN
Either a Testpoint or Arkanoid connector
must be present for GPIO0
(EVEN IN PRODUCTION)
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
VOLTAGE=20V
REAR PORT:
CONNECT UPC SPI TO ROM
FRONT PORT:
GROUND UPC SPI
FUSES FOR UPC
CRITICAL
0603-1
F3100_W
6A-32V
21
PLACE_NEAR=U3100_W.G2:5MM
GND I2C_ADDR
PRIMARY ONLY
CRITICAL
15K
0.1%
1/20W
TF-LF
0201
1
2
TO SMC
R3103_W
PPHV_INT_G3H_W
MAX 100uF TOTAL ON RAIL
95B3
CAP FOR PP_5V0 ON VR PAGE
PP5V_S4_WR_USBC
IO
93C7
93C7
93C7
93C7
93C7
93C7 96D4
93C7
93C7
93C7
93C7
93C7
93C7
93C7
93C7
UPC_W_RESET
IN
TBT_POC_RESET
IN
USBC_W_RESET_L
OUT
UPC_W_SER_DBG
IN
PD_UPC_W_GPIO1
IN
I2C_UPC_W_INTM_L
IN
UPC_WR_5V_EN
OUT
UPC_W_FORCE_PWR
OUT
UPC_W_FAULT_L
OUT
PCH_BBR_FORCE_PWR
IN
PD_UPC_WR_GPIO7
OUT
UPC_PMU_RESET
OUT
PD_UPC_W_GPIO9
IO
PD_UPC_W_GPIO10
IO
PP3V3_UPC_W_LDO
GND
IN
UPC_R_OSC_W
93C7 96D4
93C7 96D4
93D6
93D6
93D6
93D6
93D6
93C6
93C6
93C6
93C6
93C6
I2C_UPC_W_SDAM
IO
I2C_UPC_W_SCLM
IO
PCH_I2C_UPC_SDA
IO
PCH_I2C_UPC_SCL
IO
PCH_UPC_I2C_INT_L
OUT
I2C_UPC_WR_SDA2
IO
I2C_UPC_WR_SCL2
IO
UPC_I2C_INT_L
OUT
UPC_W_SPI_CLK
OUT
UPC_W_SPI_MOSI
OUT
UPC_W_SPI_MISO
IN
UPC_W_SPI_CS_L
OUT
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0750
VOLTAGE=20V
B13
A14
B17
A18
M19
M21
A16
B15
B11
A10
HRESET
MRESET
RESET*
A2
B1
D1
F1
C2
E2
B3
C4
D3
E4
F3
F7
B5
A4
D7
B7
A6
C8
B9
A8
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
BUSPOWER
I2C_ADDR
R_OSC
I2CM_SDA_CNFG
I2CM_SCL_CNFG
I2C_SDA1
I2C_SCL1
I2C_IRQ1*
I2C_SDA2
I2C_SCL2
I2C_IRQ2*
SPI_CLK
SPI_MOSI
SPI_MISO
SPI_SSZ
K9
L10
M3
M1
L4
L2
K3
K1
J4
J2
H3
H1
G4
G2
M13
N14
N12
M11
L12
K11
N10
M9
PP_5V0
PP_CABLE
PP_HV
U3100_W
CD3217B12ACE
FCBGA
DIGITAL CORE I/O & CONTROL POWER
IPU-BOOTIPU
N2
N4
TYPE-C
G6
G8
H5
J6
H7
CRITICAL
OMIT_TABLE
J8
K5
K7
VBUS
L6
L8
M5
M7
N8
N6
VDDIO_CFG
LDO_3V3
PP_HV_OPT
VIN_3V3
VDDIO
VIN_LV
VOUT_LV
VRET
SS
LDO_CORE
VBUS_OPT
C_CC1
C_CC2
RPD_G1
RPD_G2
C_USB_TP
C_USB_TN
C_USB_BP
C_USB_BN
C_SBU1
C_SBU2
C20
A12
D11
C22
D21
L20
L18
C16
L22
E22
D5
F5
M15
N16
M17
N18
L14
L16
K19
K21
J20
J22
J16
H15
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
1UF
10%
35V
X5R
0402
20%
6.3V
20%
6.3V
X5R
1
2
1
2
1
2
C3101_W
C3100_W
10UF
CERM-X5R
0402-1
C3102_W
1.0UF
0201-1
NC_UPC_W_VDDIO_CFG
PP3V3_UPC_W_LDO
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0900
PP3V3_UPC_W_VOUTLV
UPC_X_VRET_W
UPC_SS_W
PP1V5_UPC_LDO_CORE_W
PP20V_USBC_W_VBUS
PPHV_INT_G3H_W
USBC_W_CC1
USBC_W_CC2
USBC_W_CC1
USBC_W_CC2
USBC_W_USB_TOP_P
USBC_W_USB_TOP_N
USBC_W_USB_BOT_P
USBC_W_USB_BOT_N
USBC_W_SBU1
USBC_W_SBU2
FUNC_TEST=TRUE
FUNC_TEST=TRUE
IO
IO
IO
IO
IO
IO
IO
IO
CRITICAL
D3100_W
NSR20F40NX_G
PP3V3_G3H_RTC
PP1V8_SLPS2R
VOLTAGE=1.5V
MIN_NECK_WIDTH=0.0750
MIN_LINE_WIDTH=0.2800
94B6
94B6
94B6
94B6
94B6
94B6
94B6
94B6
K
DSN2
A
0
R3120_W
21
5%
1
C3105_W
10UF
20%
6.3V
2
CERM-X5R
0402-1
IO
IO
IO
95B3
95B3
95B3
117S0201
1
2
MF1/20W 0201
C3109_W
0.68UF
5%
6.3V
X6S
0402
1
C3114_W
220PF
10%
16V
2
CER-X7R
0201
1
C3106_W
1.0UF
20%
6.3V
2
X5R
0201-1
IO
95B3
OUT
94B6
IO
1
C3113_W
220PF
10%
16V
2
CER-X7R
0201
IO
1
C3108_W
10UF
20%
6.3V
2
CERM-X5R
0402-1
94B6
95B3
97C6
D
C
B
94B6
94B6
USB2_TBT_W_P
IO
USB2_TBT_W_N
IO
PP9970_W
PP9971_W
NO_TEST=1
NO_TEST=1
P2MM
SM
PP
96D1
BI
96D1
BI
P2MM
SM
PP
PLACE_NEAR=U3100_W.H19:5MM
R3100_W
R3101_W
PLACE_NEAR=U3100_W.H21:5MM
1
NO_TEST=1
NO_TEST=1
1
1 2
1
5%
0
93C6
93C6
93C6
0
0201
5% MF1/20W
2
MF1/20W 0201
93C6
94B6
94B6
94B6
94B6
UPC_W_SWD_DATA
IO
UPC_W_SWD_CLK
IO
UPC_WR_UART_RX
IN
UPC_WR_UART_TX
OUT
USB_UPC_1_P_W
USB_UPC_1_N_W
SPARE_UPC_W
IO
SPARE_UPC_W
IO
SPARE_UPC_W
IO
SPARE_UPC_W
IO
NO_TEST=1
NO_TEST=1
USBC_AUXLSX_P_W
USBC_AUXLSX_N_W
P4MM
SM
1
PP
PP7901_W
93C7
93C6
93C6
93C6
93C6
93C6
93C6
93C6
93B6
TP_DP_W_HPD
OUT
SMC_FAN_0_TACH
IO
SMC_FAN_1_TACH
IO
SPARE_UPC_W_DBG
IO
SPARE_UPC_W_DBG
IO
SPARE_UPC_W_DBG
IO
SPARE_UPC_W_DBG
IO
SPARE_UPC_W_DBG
IO
SPARE_UPC_W_DBG
IO
E20
E16
B19
A20
H19
H21
G20
G22
F19
F21
J12
H11
C12
G12
F11
E8
E12
G16
F15
D15
D19
SWD_DATA
SWD_CLK
UART_RX
UART_TX
USB_RP1_P
USB_RP1_N
USB_RP2_P
USB_RP2_N
USB_RP3_P
USB_RP3_N
AUX_P
AUX_N
HPD
DEBUG0
DEBUG1
DEBUG2
DEBUG3
DEBUG4
DEBUG5
DEBUG6
DEBUG7
IPU
IPU
B
GND_OPT
GND_OPT
GND_OPT
GNDPORT_MUX
GND
GND_OPT
C18
E18
D17
G18
SoC SWD
A
T
SMC UART
DCI
SoC SWD
SoC USB2
X
x86 UART
8
FAN TACH
W
R
Port
T
W
R
I2C_ADDR
GND (0)X
FLOAT (7)
OVERRIDE OTP (3)
OVERRIDE OTP (4)
67
I2CM_CNFG
PU (3)
PU (3)
OVERRIDE OTP (3)
OVERRIDE OTP (3)
I2C1_OA
0x38
0x3F
0x3B
0x3C
I2C1_AA
0x6B
0x6B
0x6B
0x6B
I2C2_OA
0x38
0x3F
0x3B
0x3C
I2C2_AA
0x6B
0x6B
0x6B
0x6B
A22
H9
N20
B21
K15
N22
BOM_COST_GROUP=USB-C
35 4
SYNC_MASTER=t290 icl yn SYNC_DATE=02/01/2018
PAGE TITLE
ACE2 CONTROLLER
SIZE
D
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
2
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
2 OF 2
SHEET
97 OF 109
1
A
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
USBC HIGH-SPEED 1 AC COUPLING
BURNSIDE BRIDGE I2C ADDRESS = 0x18
94D6
94D6
94D6
94D6
94D6
94D6
USBC_HSX_R2D_C_P<1>
IN
USBC_HSX_R2D_C_N<1>
IN
USBC_HSX_R2D_C_P<2>
IN
USBC_HSX_R2D_C_N<2>
IN
USBC_HSX_D2R_C_P<1>
OUT
USBC_HSX_D2R_C_N<1>
OUT
USBC_HSX_D2R_C_P<2>
OUT
USBC_HSX_D2R_C_N<2>
OUT
94D6
IN
94D6
OUT
GND_VOID=TRUE
NO_TEST=1
GND_VOID=TRUE
NO_TEST=1
GND_VOID=TRUE
NO_TEST=1
GND_VOID=TRUE
NO_TEST=1
GND_VOID=TRUE
NO_TEST=1
GND_VOID=TRUE
NO_TEST=1
GND_VOID=TRUE
NO_TEST=1
GND_VOID=TRUE
NO_TEST=1
C2820_X
0.22UF
C2821_X
0.22UF
C2824_X
0.22UF
C2825_X
0.22UF
C2822_X
0.22UF
C2823_X
0.22UF
C2826_X
0.22UF
C2827_X
0.22UF
LSX_HSX_R2P
LSX_HSX_P2R USBC_X_RESET_L
NOSTUFF
20K
5%
1/20W
MF
201
1
2
R2808_X
R2809_X
20K
5%
1/20W
MF
201
1
2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
20% 6.3V
X5R
20%
6.3V
X5R
20%
6.3V
X5R
20% 6.3V
X5R
6.3V20%
X5R
6.3V20%
X5R
6.3V
20%
X5R
20%
6.3V
X5R
0201
0201
0201
0201
0201
0201
0201
0201
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
99C6 92C7
99C6 92C7
99C6 92C7
94D6
94D6
92D7
92D7
92D7
92D7
92D7
U2800_X
BURNSIDE-BRIDGE
USBC_HS_R2D_P<1>_X
USBC_HS_R2D_N<1>_X
USBC_HS_R2D_P<2>_X
USBC_HS_R2D_N<2>_X
USBC_HS_D2R_P<1>_X
USBC_HS_D2R_N<1>_X
USBC_HS_D2R_P<2>_X
USBC_HS_D2R_N<2>_X
USBC_HSX_AUXCH_C_P
IO
USBC_HSX_AUXCH_C_N
IO
BI
BI
BI
IO
IO
IO
IN
IO
I2C_UPC_X_INTM_L
I2C_UPC_X_SCLM
I2C_UPC_X_SDAM
TBT_X_GPIO_5
TBT_X_GPIO_6
TBT_X_FLASH_SHARE_EN
TBT_X_FLASH_MSTR_H_SLV_L
TBT_X_GPIO_12
NO_TEST=1
NO_TEST=1
J1
ASSRXP1
J2
ASSRXN1
C1
ASSRXP2
C2
ASSRXN2
G1
ASSTXP1
G2
ASSTXN1
E1
ASSTXP2
E2
ASSTXN2
L8
PA_AUX_P
M8
PA_AUX_N
M7 B8
PA_LSTX_SBU1
L7
PA_LSRX_SBU2
A10
I2C_INT
C9
I2C_SCL
E7
I2C_SDA
B9
POC_GPIO_5
A8
POC_GPIO_6
A4
POC_GPIO_10
A5
POC_GPIO_11
A6
POC_GPIO_12
INTERNAL CAPS,
PU, PD
BGA
SYM 1 OF 2
CRITICAL
OMIT_TABLE
To SPI Flash
BSSRXP1
BSSRXN1
BSSRXP2
BSSRXN2
BSSTXP1
BSSTXN1
BSSTXP2
BSSTXN2
BSBU1
BSBU2
PERST*
RESET*
TDI
TMS
TCK
TDO
EE_DI
EE_DO
EE_CS*
EE_CLK
J12
USBC_X_D2R_P<1>
J11
USBC_X_D2R_N<1>
C12
USBC_X_D2R_P<2>
C11
USBC_X_D2R_N<2>
G12
USBC_X_R2D_CR_P<1>
G11
USBC_X_R2D_CR_N<1>
E12
USBC_X_R2D_CR_P<2>
E11
USBC_X_R2D_CR_N<2>
M10
USBC_AUXLSX_P_X
L10
USBC_AUXLSX_N_X
TBT_XT_PERST_L
L11
A3
JTAG_ISP_TDI
C3
JTAG_TBT_X_TMS
B5
JTAG_ISP_TCK
C5
JTAG_ISP_TDO
C6
TBT_X_SPI_MOSI
B4
TBT_X_SPI_MISO
B6
TBT_X_SPI_CS_L
C7
TBT_X_SPI_CLK
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
IO
IO
IO
IO
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
94D6
94D6
94D6
94D6
94D6
94D6
D
94D6
94D6
99B7
BI
99B7
BI
92C7
IN
92C7
IN
92D6
IN
92D6
IN
92D6
IN
92D6
92D6
92D6
IN
92D6
92D6
C
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#
CAP,CER,20UF,20%,2.5V,X6S,HRZTL,0402 C2862,C2863,C2864,C2865
117S0201
BB XTAL
5%
25V
C0G
0201
0201
C0G
25V
5%
1
CRITICAL
2
1 3
2
1
Y2800_X
2 4
TBT_XTAL25M_OUT_R_X
25MHZ-25PPM-20PF-50OHM
2.00X1.60-SM
C2803_X
20PF
20PF
C2802_X
TABLE_5_HEAD
BOM OPTIONCRITICAL
TABLE_5_ITEM
CRITICAL4138S00035
R2803_X
0
0201
5%
1/20WMF
117S0201
R2802_X
0
0201
5%
1/20WMF
12
12
92D7
TBT_X_THERM_D_P
OUT
TBT_XTAL25M_IN_XTBT_XTAL25M_IN_R_X
TBT_XTAL25M_OUT_X
1
C2836_X
2.2UF
20%
6.3V
2
X5R-CERM
0201
1
C2837_X
2.2UF
20%
6.3V
2
X5R-CERM
0201
NC
NC
NC
NC
1
2
M11
THERMDA
L9
XTAL_25_IN
M9
XTAL_25_OUT
L12
MONDC_SVR
A11
MONDC
M12
TEST_EDM
A12
NC_A12
J6
NC_J6
L3
NC_L3
J5
NC_J5
NOSTUFF
C2842_X
47UF
20%
6.3V
CER-X5R
0603
TEST_EN
TEST_PWR_GOOD
RBIAS
RSENSE
ATEST_P
ATEST_N
FORCE_PWR
FLASH_BUSY*
FUSE_VQPS_64
SMBUS_SCL
SMBUS_SDA
B11
B3
TBT_TEST_PWR_GOOD_X
L4
TBT_RBIAS_X
L5
TBT_RSENSE_X
4.75K
A1
A2
B10
A9
B2
A7
B7
NC
NC
TBT_X_FORCE_PWR
TBT_XT_FLASH_BUSY_L
TP_SMBUS_TBT_SCL_X
TP_SMBUS_TBT_SDA_X
0.5%
0201
PLACE_NEAR=U2800_X.L5:2MM
PLACE_NEAR=U2800_X.L4:2MM
FROM USB-C PORT
CONTROLLER (UPC)
PP3V3_TBT_X_SX
12
1/20W
TF
R2807_X
R2806_X
IN
IO
95C3
IN
100
5%
1/20W
MF
201
92D6
92D7
1
2
C
B
A
1
12PF
5%
25V
2
CERM
0201
C2854_X C2855_X
10UF
20%
6.3V
CERM-X5R
0402-4 0201
1
C2873_XC2872_X
3PF
+/-0.1PF
25V
2
C0G
0201
1
2.2UF
20%
2
6.3V
X5R-CERM
MIN_NECK_WIDTH=0.0750
MIN_LINE_WIDTH=0.1400
VOLTAGE=0.9V
1
2
1
C2856_X
2.2UF
20%
6.3V
2
X5R-CERM
0201
1
4UF
20%
6.3V
2
CER-X5R
0201
MIN_NECK_WIDTH=0.0750
MIN_LINE_WIDTH=0.1400
VOLTAGE=3.3V
1
2
1
2
1
4UF
20%
6.3V
CER-X5R
0201
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.1400
MIN_NECK_WIDTH=0.0750
1
C2857_X
2.2UF
20%
6.3V
2
X5R-CERM
0201
2
CRITICAL
OMIT_TABLE
20UF
20%
2.5V
X6S-CERM
0402-1
4UF
20%
6.3V
CER-X5R
CRITICAL
OMIT_TABLE
1
20UF
20%
2.5V
2
X6S-CERM
0402-1
1
20%
6.3V
2
CER-X5R
02010201
CRITICAL
OMIT_TABLE
1
20UF
20%
2.5V
2
X6S-CERM
0402-1
PP0V9_TBT_SVR_X
1
C2852_X
4UF
20%
6.3V
2
CER-X5R
0201
PP0V9_TBT_LVR_X
PP3V3_TBT_LC_X
PP3V3_TBT_ANA_X
95C3
IO
PP0V9_TBT_X_LC
VOLTAGE=0.9V
MIN_NECK_WIDTH=0.0750
MIN_LINE_WIDTH=0.1400
1
C2858_X
2.2UF
20%
6.3V
2
X5R-CERM
0201
CRITICAL
OMIT_TABLE
1
C2862_XC2863_XC2864_XC2865_X
20UF
20%
2.5V
2
X6S-CERM
0402-1
1
C2853_XC2851_XC2850_XC2860_XC2861_X
4UF4UF
20%
6.3V
2
CER-X5R
0201
F6
G6
E9
G9
L6
M6
E5
L2
J3
F3
F5
G5
B1
B12
D1
D11
D12
D2
F1
F11
F12
F2
BURNSIDE-BRIDGE
VCC0P9_SVR_ANA
VCC0P9_SVR_PB_ANA
VCC0P9_LVR
VCC0P9_LVR_SENSE
VCC3P3_LC
VCC3P3_ANA
VCC0P9_LC
VSS
VSS_ANA
U2800_X
BGA
SYM 2 OF 2
CRITICAL
OMIT_TABLE
VCC3P3_SX
VCC3P3A
VCC3P3_SVR
VCC0P9_SVR
SVR_IND
SVR_VSS
VSS_ANA
VOLTAGE=3.3V
MIN_NECK_WIDTH=0.0750
MIN_LINE_WIDTH=0.1400
1
C2843_X
12PF
5%
25V
2
NP0-C0G
0201
E6
VOLTAGE=3.3V
J7
M4
M5
E3
G3
L1
M1
M2
M3
F7
F9
G7
H1
H11
H12
H2
J9
K1
K11
K12
K2
MIN_NECK_WIDTH=0.0750
MIN_LINE_WIDTH=0.1400
1
C2832_X
10UF
20%
6.3V
2
CERM-X5R
0402-4
BYPASS=U2800.M3:3MM
1
C2838_X
12PF
5%
25V
2
NP0-C0G
0201
PP0V9_TBT_SVR_IND_X
VOLTAGE=3.3V
DIDT=TRUE
SWITCH_NODE=TRUE
XW2830_X
PLACE_NEAR=U2800_X.K11:2MM
NO_XNET_CONNECTION=1
SM
1 2
PP3V3_TBT_VCCA_X
1
C2830_X
2.2UF
20%
6.3V
2
X5R-CERM
0201
1
C2831_X
10UF
20%
6.3V
2
CERM-X5R
0402-4
1
C2871_X
3PF
+/-0.1PF
25V
2
C0G
0201
PP3V3_TBT_S0_SVR_X
1
C2833_X
10UF
20%
6.3V
2
CERM-X5R
0402-4
1
C2834_X
10UF
20%
6.3V
2
CERM-X5R
0402-4
1
C2835_X
10UF
20%
6.3V
2
CERM-X5R
0402-4
Layout: Place these CAPs close to M4, M5, J5
PP0V9_TBT_SVR_X
VOLTAGE=0.9V
1
C2839_X
4UF
20%
6.3V
2
CER-X5R
0201
1
C2841_X
4UF
20%
6.3V
2
CER-X5R
0201
CRITICAL
MIN_NECK_WIDTH=0.0750
MIN_LINE_WIDTH=0.1400
L2800_X
0.68UH-20%-4.3A-0.043OHM
1 2
0805
TBT_X_THERM_D_N
CONNECT TO GND PIN
CLOSEST TO THERMDA PIN
BOM_COST_GROUP=TBT
OUT
92D7
R2800_X
0
1 2
5%
402
1/16W
MF-LF
R2801_X
0
1 2
5%
402
MF-LF1/16W
XW2801_X
SM
1 2
NO_XNET_CONNECTION=1
Layout: Use a bigger XW
P0V9_TBT_SVR_PGND_X
NO_XNET_CONNECTION=1
PLACE_NEAR=C2832_X.2:2MM
1
C2840_X
47UF
20%
6.3V
2
CER-X5R
0603
PAGE TITLE
1
2
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PP3V3_TBT_X_S0
XW2800_X
SM
1 2
95D3
IN
C2870_X
3PF
+/-0.1PF
25V
C0G
0201
BURNSIDE BRIDGE
DRAWING NUMBER
051-05198
REVISION
BRANCH
PAGE
SHEET
98 OF 109
SYNC_DATE=02/01/2018SYNC_MASTER=t290 icl yn
6.0.0
evt-3
1 OF 2
B
A
SIZE
D
8
67
35 4
2
1
678
www.haojiyoubbs.com
QQ微信：181806465
ACE2 USB-C PORT CONTROLLER (UPC)
3 245
VOLTAGE=20V
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0750
PP20V_USBC_X_VBUS
IO
1
94D6 99C2
D
C
95C3
PPDCIN_G3H
IN
Either a Testpoint or Arkanoid connector
must be present for GPIO0
(EVEN IN PRODUCTION)
MIN_LINE_WIDTH=0.2000
MIN_NECK_WIDTH=0.1000
VOLTAGE=20V
REAR PORT:
CONNECT UPC SPI TO ROM
FRONT PORT:
GROUND UPC SPI
FUSES FOR UPC
CRITICAL
0603-1
F3100_X
6A-32V
21
PLACE_NEAR=U3100_X.G2:5MM
GND I2C_ADDR
PRIMARY ONLY
CRITICAL
15K
0.1%
1/20W
TF-LF
0201
1
2
TO SMC
R3103_X
PPHV_INT_G3H_X
MAX 100uF TOTAL ON RAIL
95C3
CAP FOR PP_5V0 ON VR PAGE
PP5V_S4_XT_USBC
IO
92C7
92C7
92C7
92C7
92C7
92C7 98D4
92C7
92C7
92C7
92C7
92C7
92C7
92C7
92C7
UPC_X_RESET
IN
TBT_POC_RESET
IN
USBC_X_RST_L
OUT
UPC_X_SER_DBG
IN
PMU_ACTIVE_READY
IN
I2C_UPC_X_INTM_L
IN
UPC_XT_5V_EN
OUT
UPC_X_FORCE_PWR
OUT
UPC_X_FAULT_L
OUT
PCH_BBR_FORCE_PWR
IN
SOC_DOCK_CONNECT
OUT
UPC_PMU_RESET
OUT
SOC_DFU_STATUS
IO
SOC_FORCE_DFU
IO
PP3V3_UPC_X_LDO
GND
IN
UPC_R_OSC_X
92C7 98D4
92C7 98D4
92D6
92D6
92D6
92D6
92D6
92C6
I2C_UPC_X_SDAM
IO
I2C_UPC_X_SCLM
IO
PCH_I2C_UPC_SDA
IO
PCH_I2C_UPC_SCL
IO
PCH_UPC_I2C_INT_L
OUT
I2C_UPC_XT_SDA2
IO
I2C_UPC_XT_SCL2
IO
UPC_I2C_INT_L
OUT
GND
OUT
GND
OUT
GND
IN
GND
OUT
MIN_LINE_WIDTH=0.0900
MIN_NECK_WIDTH=0.0750
VOLTAGE=20V
B13
A14
B17
A18
M19
M21
A16
B15
B11
A10
HRESET
MRESET
RESET*
A2
B1
D1
F1
C2
E2
B3
C4
D3
E4
F3
F7
B5
A4
D7
B7
A6
C8
B9
A8
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
BUSPOWER
I2C_ADDR
R_OSC
I2CM_SDA_CNFG
I2CM_SCL_CNFG
I2C_SDA1
I2C_SCL1
I2C_IRQ1*
I2C_SDA2
I2C_SCL2
I2C_IRQ2*
SPI_CLK
SPI_MOSI
SPI_MISO
SPI_SSZ
K9
L10
M3
M1
L4
L2
K3
K1
J4
J2
H3
H1
G4
G2
M13
N14
N12
M11
L12
K11
N10
M9
PP_5V0
PP_CABLE
PP_HV
U3100_X
CD3217B12ACE
FCBGA
DIGITAL CORE I/O & CONTROL POWER
IPU-BOOTIPU
N2
N4
TYPE-C
G6
G8
H5
J6
H7
CRITICAL
OMIT_TABLE
J8
K5
K7
VBUS
L6
L8
M5
M7
N8
N6
VDDIO_CFG
LDO_3V3
PP_HV_OPT
VIN_3V3
VDDIO
VIN_LV
VOUT_LV
VRET
SS
LDO_CORE
VBUS_OPT
C_CC1
C_CC2
RPD_G1
RPD_G2
C_USB_TP
C_USB_TN
C_USB_BP
C_USB_BN
C_SBU1
C_SBU2
C20
A12
D11
C22
D21
L20
L18
C16
L22
E22
D5
F5
M15
N16
M17
N18
L14
L16
K19
K21
J20
J22
J16
H15
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
1UF
10%
35V
X5R
0402
20%
6.3V
20%
6.3V
X5R
1
2
1
2
1
2
C3101_X
C3100_X
10UF
CERM-X5R
0402-1
C3102_X
1.0UF
0201-1
NC_UPC_X_VDDIO_CFG
PP3V3_UPC_X_LDO
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.2800
MIN_NECK_WIDTH=0.0750
PP3V3_UPC_X_VOUTLV
UPC_X_VRET_X
UPC_SS_X
PP1V5_UPC_LDO_CORE_X
PP20V_USBC_X_VBUS
PPHV_INT_G3H_X
USBC_X_CC1
USBC_X_CC2
USBC_X_CC1
USBC_X_CC2
USBC_X_USB_TOP_P
USBC_X_USB_TOP_N
USBC_X_USB_BOT_P
USBC_X_USB_BOT_N
USBC_X_SBU1
USBC_X_SBU2
FUNC_TEST=TRUE
FUNC_TEST=TRUE
IO
IO
IO
IO
IO
IO
IO
IO
CRITICAL
D3100_X
NSR20F40NX_G
PP3V3_G3H_RTC
PP1V8_SLPS2R
VOLTAGE=1.5V
MIN_NECK_WIDTH=0.0750
MIN_LINE_WIDTH=0.2800
94C6
94C6
94D6
94D6
94D6
94D6
94D6
94D6
K
DSN2
A
0
R3120_X
21
5%
1
C3105_X
10UF
20%
6.3V
2
CERM-X5R
0402-1
IO
IO
IO
95C3
95C3
95C3
117S0201
1
2
MF1/20W 0201
C3109_X
0.68UF
5%
6.3V
X6S
0402
1
C3114_X
220PF
10%
16V
2
CER-X7R
0201
1
C3106_X
1.0UF
20%
6.3V
2
X5R
0201-1
IO
95C3
OUT
94D6
IO
1
C3113_X
220PF
10%
16V
2
CER-X7R
0201
IO
1
C3108_X
10UF
20%
6.3V
2
CERM-X5R
0402-1
94D6
95D3
99C6
D
C
B
94D6
94D6
USB2_TBT_X_P
IO
USB2_TBT_X_N
IO
PP9970_X
PP9971_X
NO_TEST=1
NO_TEST=1
P2MM
SM
PP
98D1
BI
98D1
BI
P2MM
SM
PP
PLACE_NEAR=U3100_X.H21:5MM
R3100_X
R3101_X
PLACE_NEAR=U3100_X.H21:5MM
1
NO_TEST=1
NO_TEST=1
1
1 2
1
5%
0
92C6
92C6
92C6
0
0201
5% MF1/20W
2
MF1/20W 0201
92C6
94D6
94C6
94C6
94C6
UPC_X_SWD_DATA
IO
UPC_X_SWD_CLK
IO
UPC_XT_UART_RX
IN
UPC_XT_UART_TX
OUT
USB_UPC_1_P_X
USB_UPC_1_N_X
USB_UPC_X2_P
IO
USB_UPC_X2_N
IO
SPARE_UPC_X
IO
SPARE_UPC_X
IO
NO_TEST=1
NO_TEST=1
USBC_AUXLSX_P_X
USBC_AUXLSX_N_X
P4MM
SM
1
PP
PP7901_X
92C7
92C6
92C6
92C6
92C6
92C6
92C6
92C6
92B6
TP_DP_X_HPD
OUT
SPARE_UPC_X_DBG
IO
SPARE_UPC_X_DBG
IO
SPARE_UPC_X_DBG
IO
SPARE_UPC_X_DBG
IO
SWD_SOC_SWCLK_X
IO
SWD_SOC_SWDIO_X
IO
PCH_UART_DEBUG_R2D_1
IO
PCH_UART_DEBUG_D2R_1
IO
E20
E16
B19
A20
H19
H21
G20
G22
F19
F21
J12
H11
C12
G12
F11
E8
E12
G16
F15
D15
D19
SWD_DATA
SWD_CLK
UART_RX
UART_TX
USB_RP1_P
USB_RP1_N
USB_RP2_P
USB_RP2_N
USB_RP3_P
USB_RP3_N
AUX_P
AUX_N
HPD
DEBUG0
DEBUG1
DEBUG2
DEBUG3
DEBUG4
DEBUG5
DEBUG6
DEBUG7
IPU
IPU
B
GND_OPT
GND_OPT
GND_OPT
GNDPORT_MUX
GND
GND_OPT
C18
E18
D17
G18
SoC SWD
A
T
SMC UART
DCI
SoC SWD
SoC USB2
X
x86 UART
8
FAN TACH
W
R
Port
T
W
R
I2C_ADDR
GND (0)X
FLOAT (7)
OVERRIDE OTP (3)
OVERRIDE OTP (4)
67
I2CM_CNFG
PU (3)
PU (3)
OVERRIDE OTP (3)
OVERRIDE OTP (3)
I2C1_OA
0x38
0x3F
0x3B
0x3C
I2C1_AA
0x6B
0x6B
0x6B
0x6B
I2C2_OA
0x38
0x3F
0x3B
0x3C
I2C2_AA
0x6B
0x6B
0x6B
0x6B
A22
H9
N20
B21
K15
N22
BOM_COST_GROUP=USB-C
35 4
SYNC_MASTER=t290 icl yn SYNC_DATE=02/01/2018
PAGE TITLE
ACE2 CONTROLLER
SIZE
D
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
2
DRAWING NUMBER
051-05198
REVISION
6.0.0
BRANCH
evt-3
PAGE
2 OF 2
SHEET
99 OF 109
1
A
678
www.haojiyoubbs.com
QQ微信：181806465
3 245
1
D
USBC HIGH-SPEED 1 AC COUPLING
BURNSIDE BRIDGE I2C ADDRESS = 0x18
94D2
94D2
94D2
94D2
94D2
94D2
USBC_HST_R2D_C_P<1>
IN
USBC_HST_R2D_C_N<1>
IN
USBC_HST_R2D_C_P<2>
IN
USBC_HST_R2D_C_N<2>
IN
USBC_HST_D2R_C_P<1>
OUT
USBC_HST_D2R_C_N<1>
OUT
USBC_HST_D2R_C_P<2>
OUT
USBC_HST_D2R_C_N<2>
OUT
94D2
IN
94D2
OUT
GND_VOID=TRUE
NO_TEST=1
GND_VOID=TRUE
NO_TEST=1
GND_VOID=TRUE
NO_TEST=1
GND_VOID=TRUE
NO_TEST=1
GND_VOID=TRUE
NO_TEST=1
GND_VOID=TRUE
NO_TEST=1
GND_VOID=TRUE
NO_TEST=1
GND_VOID=TRUE
NO_TEST=1
C2820_T
0.22UF
C2821_T
0.22UF
C2824_T
0.22UF
C2825_T
0.22UF
C2822_T
0.22UF
C2823_T
0.22UF
C2826_T
0.22UF
C2827_T
0.22UF
LSX_HST_R2P
LSX_HST_P2R USBC_T_RESET_L
NOSTUFF
20K
5%
1/20W
MF
201
1
2
R2808_T
R2809_T
20K
5%
1/20W
MF
201
1
2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
20% 6.3V
X5R
20%
6.3V
X5R
20%
6.3V
X5R
20% 6.3V
X5R
6.3V20%
X5R
6.3V20%
X5R
6.3V
20%
X5R
20%
6.3V
X5R
0201
0201
0201
0201
0201
0201
0201
0201
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
101C6 92C3
101C6 92C3
101C6 92C3
94D2
94D2
92D3
92D3
92D3
92D3
92D3
U2800_T
BURNSIDE-BRIDGE
USBC_HS_R2D_P<1>_T
USBC_HS_R2D_N<1>_T
USBC_HS_R2D_P<2>_T
USBC_HS_R2D_N<2>_T
USBC_HS_D2R_P<1>_T
USBC_HS_D2R_N<1>_T
USBC_HS_D2R_P<2>_T
USBC_HS_D2R_N<2>_T
USBC_HST_AUXCH_C_P
IO
USBC_HST_AUXCH_C_N
IO
BI
BI
BI
IO
IO
IO
IN
IO
I2C_UPC_T_INTM_L
I2C_UPC_T_SCLM
I2C_UPC_T_SDAM
TBT_T_GPIO_5
TBT_T_GPIO_6
TBT_T_FLASH_SHARE_EN
TBT_T_FLASH_MSTR_H_SLV_L
TBT_T_GPIO_12
NO_TEST=1
NO_TEST=1
J1
ASSRXP1
J2
ASSRXN1
C1
ASSRXP2
C2
ASSRXN2
G1
ASSTXP1
G2
ASSTXN1
E1
ASSTXP2
E2
ASSTXN2
L8
PA_AUX_P
M8
PA_AUX_N
M7 B8
PA_LSTX_SBU1
L7
PA_LSRX_SBU2
A10
I2C_INT
C9
I2C_SCL
E7
I2C_SDA
B9
POC_GPIO_5
A8
POC_GPIO_6
A4
POC_GPIO_10
A5
POC_GPIO_11
A6
POC_GPIO_12
INTERNAL CAPS,
PU, PD
BGA
SYM 1 OF 2
CRITICAL
OMIT_TABLE
To SPI Flash
BSSRXP1
BSSRXN1
BSSRXP2
BSSRXN2
BSSTXP1
BSSTXN1
BSSTXP2
BSSTXN2
BSBU1
BSBU2
PERST*
RESET*
TDI
TMS
TCK
TDO
EE_DI
EE_DO
EE_CS*
EE_CLK
J12
USBC_T_D2R_P<1>
J11
USBC_T_D2R_N<1>
C12
USBC_T_D2R_P<2>
C11
USBC_T_D2R_N<2>
G12
USBC_T_R2D_CR_P<1>
G11
USBC_T_R2D_CR_N<1>
E12
USBC_T_R2D_CR_P<2>
E11
USBC_T_R2D_CR_N<2>
M10
USBC_AUXLSX_P_T
L10
USBC_AUXLSX_N_T
TBT_XT_PERST_L
L11
A3
JTAG_ISP_TDI
C3
JTAG_TBT_T_TMS
B5
JTAG_ISP_TCK
C5
JTAG_ISP_TDO
C6
TBT_T_SPI_MOSI
B4
TBT_T_SPI_MISO
B6
TBT_T_SPI_CS_L
C7
TBT_T_SPI_CLK
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
NO_TEST=1
IO
IO
IO
IO
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
94D3
94D3
94D3
94D3
94D3
94D3
D
94D3
94D3
101B7
BI
101B7
BI
92D3
IN
92C3
IN
92D2
IN
92D2
IN
92D2
IN
92D2
92D2
92D2
IN
92D2
92D2
C
REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#
CAP,CER,20UF,20%,2.5V,X6S,HRZTL,0402 C2862,C2863,C2864,C2865
117S0201
BB XTAL
5%
25V
C0G
0201
0201
C0G
25V
5%
1
CRITICAL
2
1 3
2
1
Y2800_T
2 4
TBT_XTAL25M_OUT_R_T
25MHZ-25PPM-20PF-50OHM
2.00X1.60-SM
C2803_T
20PF
20PF
C2802_T
TABLE_5_HEAD
BOM OPTIONCRITICAL
TABLE_5_ITEM
CRITICAL4138S00035
R2803_T
0
0201
5%
1/20WMF
117S0201
R2802_T
0
0201
5%
1/20WMF
12
12
92D3
TBT_T_THERM_D_P
OUT
TBT_XTAL25M_IN_TTBT_XTAL25M_IN_R_T
TBT_XTAL25M_OUT_T
1
C2836_T
2.2UF
20%
6.3V
2
X5R-CERM
0201
1
C2837_T
2.2UF
20%
6.3V
2
X5R-CERM
0201
NC
NC
NC
NC
1
2
M11
THERMDA
L9
XTAL_25_IN
M9
XTAL_25_OUT
L12
MONDC_SVR
A11
MONDC
M12
TEST_EDM
A12
NC_A12
J6
NC_J6
L3
NC_L3
J5
NC_J5
NOSTUFF
C2842_T
47UF
20%
6.3V
CER-X5R
0603
TEST_EN
TEST_PWR_GOOD
RBIAS
RSENSE
ATEST_P
ATEST_N
FORCE_PWR
FLASH_BUSY*
FUSE_VQPS_64
SMBUS_SCL
SMBUS_SDA
B11
B3
TBT_TEST_PWR_GOOD_T
L4
TBT_RBIAS_T
L5
TBT_RSENSE_T
4.75K
A1
A2
B10
A9
B2
A7
B7
NC
NC
TBT_T_FORCE_PWR
TBT_XT_FLASH_BUSY_L
TP_SMBUS_TBT_SCL_T
TP_SMBUS_TBT_SDA_T
0.5%
0201
PLACE_NEAR=U2800_T.L5:2MM
PLACE_NEAR=U2800_T.L4:2MM
FROM USB-C PORT
CONTROLLER (UPC)
PP3V3_TBT_T_SX
12
1/20W
TF
R2807_T
R2806_T
IN
IO
95C3
IN
100
5%
1/20W
MF
201
92D2
92D3
1
2
C
B
A
1
12PF
5%
25V
2
CERM
0201
C2854_T C2855_T
10UF
20%
6.3V
CERM-X5R
0402-4 0201
1
C2873_TC2872_T
3PF
+/-0.1PF
25V
2
C0G
0201
1
2.2UF
20%
2
6.3V
X5R-CERM
MIN_NECK_WIDTH=0.0750
MIN_LINE_WIDTH=0.1400
VOLTAGE=0.9V
1
2
1
C2856_T
2.2UF
20%
6.3V
2
X5R-CERM
0201
1
4UF
20%
6.3V
2
CER-X5R
0201
MIN_NECK_WIDTH=0.0750
MIN_LINE_WIDTH=0.1400
VOLTAGE=3.3V
1
2
1
2
1
4UF
20%
6.3V
CER-X5R
0201
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.1400
MIN_NECK_WIDTH=0.0750
1
C2857_T
2.2UF
20%
6.3V
2
X5R-CERM
0201
2
CRITICAL
OMIT_TABLE
20UF
20%
2.5V
X6S-CERM
0402-1
4UF
20%
6.3V
CER-X5R
CRITICAL
OMIT_TABLE
1
20UF
20%
2.5V
2
X6S-CERM
0402-1
1
20%
6.3V
2
CER-X5R
02010201
CRITICAL
OMIT_TABLE
1
20UF
20%
2.5V
2
X6S-CERM
0402-1
PP0V9_TBT_SVR_T
1
C2852_T
4UF
20%
6.3V
2
CER-X5R
0201
PP0V9_TBT_LVR_T
PP3V3_TBT_LC_T
PP3V3_TBT_ANA_T
95C3
IO
PP0V9_TBT_T_LC
VOLTAGE=0.9V
MIN_NECK_WIDTH=0.0750
MIN_LINE_WIDTH=0.1400
1
C2858_T
2.2UF
20%
6.3V
2
X5R-CERM
0201
CRITICAL
OMIT_TABLE
1
C2862_TC2863_TC2864_TC2865_T
20UF
20%
2.5V
2
X6S-CERM
0402-1
1
C2853_TC2851_TC2850_TC2860_TC2861_T
4UF4UF
20%
6.3V
2
CER-X5R
0201
F6
G6
E9
G9
L6
M6
E5
L2
J3
F3
F5
G5
B1
B12
D1
D11
D12
D2
F1
F11
F12
F2
BURNSIDE-BRIDGE
VCC0P9_SVR_ANA
VCC0P9_SVR_PB_ANA
VCC0P9_LVR
VCC0P9_LVR_SENSE
VCC3P3_LC
VCC3P3_ANA
VCC0P9_LC
VSS
VSS_ANA
U2800_T
BGA
SYM 2 OF 2
CRITICAL
OMIT_TABLE
VCC3P3_SX
VCC3P3A
VCC3P3_SVR
VCC0P9_SVR
SVR_IND
SVR_VSS
VSS_ANA
VOLTAGE=3.3V
MIN_NECK_WIDTH=0.0750
MIN_LINE_WIDTH=0.1400
1
C2843_T
12PF
5%
25V
2
NP0-C0G
0201
E6
VOLTAGE=3.3V
J7
M4
M5
E3
G3
L1
M1
M2
M3
F7
F9
G7
H1
H11
H12
H2
J9
K1
K11
K12
K2
MIN_NECK_WIDTH=0.0750
MIN_LINE_WIDTH=0.1400
1
C2832_T
10UF
20%
6.3V
2
CERM-X5R
0402-4
BYPASS=U2800.M4:M3:3MM
1
C2838_T
12PF
5%
25V
2
NP0-C0G
0201
PP0V9_TBT_SVR_IND_T
VOLTAGE=3.3V
DIDT=TRUE
SWITCH_NODE=TRUE
XW2830_T
PLACE_NEAR=U2800_T.K11:2MM
NO_XNET_CONNECTION=1
SM
1 2
PP3V3_TBT_VCCA_T
1
C2830_T
2.2UF
20%
6.3V
2
X5R-CERM
0201
1
C2831_T
10UF
20%
6.3V
2
CERM-X5R
0402-4
1
C2871_T
3PF
+/-0.1PF
25V
2
C0G
0201
PP3V3_TBT_S0_SVR_T
1
C2833_T
10UF
20%
6.3V
2
CERM-X5R
0402-4
1
C2834_T
10UF
20%
6.3V
2
CERM-X5R
0402-4
1
C2835_T
10UF
20%
6.3V
2
CERM-X5R
0402-4
Layout: Place these CAPs close to M4, M5, J5
PP0V9_TBT_SVR_T
VOLTAGE=0.9V
1
C2839_T
4UF
20%
6.3V
2
CER-X5R
0201
1
C2841_T
4UF
20%
6.3V
2
CER-X5R
0201
CRITICAL
MIN_NECK_WIDTH=0.0750
MIN_LINE_WIDTH=0.1400
L2800_T
0.68UH-20%-4.3A-0.043OHM
1 2
0805
TBT_T_THERM_D_N
CONNECT TO GND PIN
CLOSEST TO THERMDA PIN
BOM_COST_GROUP=TBT
OUT
92D3
R2800_T
0
1 2
5%
402
1/16W
MF-LF
R2801_T
0
1 2
5%
402
MF-LF1/16W
XW2801_T
SM
1 2
NO_XNET_CONNECTION=1
Layout: Use a bigger XW
P0V9_TBT_SVR_PGND_T
NO_XNET_CONNECTION=1
PLACE_NEAR=C2832_T.2:2MM
1
C2840_T
47UF
20%
6.3V
2
CER-X5R
0603
PAGE TITLE
1
2
Apple Inc.
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
PP3V3_TBT_T_S0
XW2800_T
SM
1 2
95C3
IN
C2870_T
3PF
+/-0.1PF
25V
C0G
0201
BURNSIDE BRIDGE
DRAWING NUMBER
051-05198
REVISION
BRANCH
PAGE
SHEET
100 OF 109
SYNC_DATE=02/01/2018SYNC_MASTER=t290 icl yn
6.0.0
evt-3
1 OF 2
B
A
SIZE
D
8
67
35 4
2
1
Loading...