56 High Frequency Electronics
High Frequency Design
VCO CHARACTERIZATION
Improving VCO Phase Noise
Performance Through
Enhanced Characterization
By David Vye
Ansoft Corporation
M
inimizing phase
noise is a con-
cern of VCO
designers because of its
direct impact on system
performance. Reduction
of phase noise begins
with noise characteriza-
tion and continues through modeling and simulation of the design. Many factors affect the
accuracy of a phase noise simulation and measurement, and all can be accurately addressed
through the use of phase noise simulation
along with prudent passive component selection and resonator modeling. Optimum results
can best be achieved when the considerations
described in this article are followed. The
Ansoft Designer EDA tools will be used as the
reference in this discussion.
In order to ensure an acceptable level of
simulation accuracy for VCOs operating at RF
frequencies and above, every component of the
linear network including transmission lines
and discontinuities must be accurately characterized to several harmonics of the fundamental oscillation frequency. This is essential
because the accuracy of the oscillation signal
(which affects the noise analysis) and the noise
analysis itself greatly depend on the linear
network. As a result, any inaccuracies in the
linear network characterization will affect the
quality of the system’s phase noise simulation.
To obtain the best results, the simulation
should accurately reflect what will ultimately
be fabricated, including actual circuit board
dimensions and material properties as well as
valid component models of any parasitic
behavior. For surface mount components, engineers often rely on equivalent circuit models
or measured S-parameters to represent these
parts. While component vendors may be able
to manufacture and characterize their parts
through measurements, board designers need
an alternative method for determining circuit
performance before fabrication.
By equating physical attributes directly to
electrical performance, electromagnetic (EM)
simulation is ideal for board characterization.
As planar EM technology becomes faster and
more integrated into the design process, many
engineers are adapting its use for board modeling and design verification. Design environments such as Ansoft Designer, which support
the use of circuit components and planar EM
co-simulation, allow engineers to simulate
complete networks with surface mount component models and appropriately characterized
board designs. The designer can incorporate a
highly accurate electrical representation of
the traces that define the circuit without having to generate a set of S-parameters and
manually insert this data.
While the use of schematic-based distributed models (Figure 1) offers a quick
method for initial design and optimization,
planar EM simulation eliminates the problems associated with model validity caused by
range restrictions (such as ratios of width to
height) and arbitrary geometries that can be
difficult to model with discrete distributed
models. EM simulation directly models complex trace metals and all their associated parasitic effects such as interconnect coupling. If
the simulation tools support planar EM
parameterization along with circuit-planar
EM hierarchical design, the overall circuit
may be tuned and optimized through manipulation of the physical structure.
Improved EDA tools allow
engineers to easily test and
optimize their designs dur-
ing simulation, before the
expensive and time-con-
suming prototype phase
From January 2004 High Frequency Electronics
Copyright © Summit Technical Media, LLC