ANALOG DEVICES SSM2301 Service Manual

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Filterless High Efficiency Mono 1.4 W

Preliminary Technical Data

FEATURES

Filterless Class-D amplifier with built-in output stage

1.4 W into 8 Ω at 5.0 V supply with less than 1% THD
85% efficiency at 5.0 V, 1.4 W into 8 Ω speaker
Better than 98 dB SNR (signal-to-noise ratio)
Single-supply operation from 2.5 V to 5.0 V
20 nA ultralow shutdown current
Short-circuit and thermal protection
Available in 8-lead, 3 mm × 3 mm LFCSP
Pop-and-click suppression
Built-in resistors reduce board component count
Fixed and user-adjustable gain configurations

APPLICATIONS

Mobile phones
MP3 players
Portable gaming
Portable electronics
Educational toys

GENERAL DESCRIPTION

The SSM2301 is a fully integrated, high efficiency, Class-D audio
amplifier. It is designed to maximize performance for mobile
phone applications. The application circuit requires a minimum
of external components and operates from a single 2.5 V to 5.0 V
supply. It is capable of delivering 1.4 W of continuous output
power with less than 1% THD + N driving an 8 Ω load from a

5.0 V supply.

The SSM2301 features a high efficiency, low noise modulation
scheme that does not require any external LC output filters. The
modulation continues to provide high efficiency even at low

Class-D Audio Amplifier

SSM2301

output power. It operates with 85% efficiency at 1.4 W into 8 Ω
from a 5.0 V supply and has a signal-to-noise ratio (SNR) that is
better than 93 dB. Spread-spectrum modulation is used to
provide lower EMI-radiated emissions compared with other
Class-D architectures.

The SSM2301 has a micropower shutdown mode with a
maximum shutdown current of 30 nA. Shutdown is enabled by
applying a logic low to the

The device also includes pop-and-click suppression circuitry.
This minimizes voltage glitches at the output during turn-on
and turn-off, thus reducing audible noise on activation and
deactivation.

The fully differential input of the SSM2301 provides excellent
rejection of common-mode noise on the input. Input coupling
capacitors can be omitted if the dc input common-mode voltage
is approximately V

DD

/2.

The SSM2301 also has excellent rejection of power supply noise,
including noise caused by GSM transmission bursts and RF
rectification. PSRR is typically 63 dB at 217 Hz.

The gain can be set to 6 dB or 12 dB utilizing the gain control
select pin connected respectively to ground or V
also be adjusted externally by using an external resistor.

The SSM2301 is specified over the comercial temperature range
(−40°C to +85°C). It has built-in thermal shutdown and output
short-circuit protection. It is available in an 8-lead, 3 mm × 3 mm
lead-frame chip scale package (LFCSP).

SD

pin.

. Gain can

DD

FUNCTIONAL BLOCK DIAGRAM

SSM2301

1

0.01µF

AUDIO IN+

AUDIO IN–

SHUTDOWN

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

IN+

IN–

1

0.01µF
GAIN

SD

1

INPUT CAPS ARE OPTIONAL IF INPUT DC COMMON-MODE
VOLTAGE IS APPROXIMATELY V

GAIN

CONTROL

DD

10µF

BIAS

/2.

Figure 1.

0.1µF

VDD

MODULATOR

OSCILLAT OR

GND

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2006 Analog Devices, Inc. All rights reserved.

VBATT

2.5V TO 5. 0V

FET

DRIVER

POP/CLICK

SUPRESSION

OUT+

OUT–

06163-001

SSM2301 Preliminary Technical Data

TABLE OF CONTENTS

Features.............................................................................................. 1

Pop-and-Click Suppression ...................................................... 11

Applications....................................................................................... 1

General Description ......................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Absolute Maximum Ratings............................................................ 4

Thermal Resistance ...................................................................... 4

ESD Caution.................................................................................. 4

Pin Configuration and Function Descriptions............................. 5

Typical Performance Characteristics ............................................. 6

Typical Application Circuits............................................................ 9

Application Notes........................................................................... 11

Overview...................................................................................... 11

Gain Selection ............................................................................. 11

Layout .......................................................................................... 12

Input Capacitor Selection.......................................................... 12

Proper Power Supply Decoupling............................................ 12

Evaluation Board Information...................................................... 13

Introduction................................................................................ 13

Operation .................................................................................... 13

SSM2301 Application Board Schematic.................................. 14

SSM2301 Stereo Class-D Amplifier Evaluation Module

Component List.......................................................................... 15

SSM2301 Application Board Layout........................................ 16

Outline Dimensions....................................................................... 17

Ordering Guide .......................................................................... 17

REVISION HISTORY

7/06—Revision 0: Initial Version

Preliminary Technical Data SSM2301

SPECIFICATIONS

VDD = 5.0 V, TA = 25oC, RL = 8 Ω, unless otherwise noted

Table 1.

Parameter Symbol Conditions Min Typ Max Unit

DEVICE CHARACTERISTICS

Output Power P

O

R
R
R
R
R
Efficiency η P

Total Harmonic Distortion + Noise THD + N PO = 1 W into 8 Ω, f = 1 kHz, VDD = 5.0 V 0.1 %

P

Input Common-Mode Voltage Range VCM 1.0 VDD − 1 V
Common-Mode Rejection Ratio CMRR
Average Switching Frequency fSW 1.8 MHz
Differential Output Offset Voltage V

OOS

POWER SUPPLY

Supply Voltage Range V

DD

Power Supply Rejection Ratio PSRR VDD = 2.5 V to 5.0 V, 50 Hz, input floating/ground 70 85 dB
PSRR

Supply Current I

SY

V
V
Shutdown Current ISD

GAIN CONTROL

Closed-Loop Gain Av0 GAIN pin = 0 V 6 dB

Av1 GAIN pin = VDD 12 dB

Differential Input Impedance Z

IN

SHUTDOWN CONTROL

Input Voltage High V
Input Voltage Low V
Turn-On Time t

Turn-Off Time t
Output Impedance Z

IH

IL

WU

SD

OUT

NOISE PERFORMANCE

Output Voltage Noise en

Signal-to-Noise Ratio SNR P

RL = 8 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 5.0 V 1.4 W

= 8 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 3.6 V 0.615 W

L

= 8 Ω, THD = 1%, f = 1 kHz, 20 kHz BW, VDD = 2.5 V 0.275 W

L

= 8 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 5.0 V 1.53 W

L

= 8 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 3.6 V 0.77 W

L

= 8 Ω, THD = 10%, f = 1 kHz, 20 kHz BW, VDD = 2.5 V 0.35 W

L

=1.4 W, 8 Ω, VDD = 5.0 V 85 %

OUT

= 0.5 W into 8 Ω, f = 1 kHz, VDD = 3.6 V 0.04 %

O

GSM VCM

= 2.5 V ± 100 mV at 217 Hz 55 dB

G = 6 dB; G = 12 dB 2.0 mV

Guaranteed from PSRR test 2.5 5.0 V

GSM

V

= 100 mV at 217 Hz, inputs ac GND,

RIPPLE

= 0.01 μF, input referred

C

IN

63 dB

VIN = 0 V, no load, VDD = 5.0 V 5.5 mA

= 0 V, no load, VDD = 3.6 V 4.5 mA

IN

= 0 V, no load, VDD = 2.5 V 4.0 mA

IN

SD

= GND

SD

= VDD,

SD

= GND

20 nA

150 KΩ
210 KΩ

ISY ≥ 1 mA 1.2 V
ISY ≤ 300 nA 0.5 V
SD

rising edge from GND to VDD

SD

falling edge from VDD to GND

SD

= GND

= 2.5 V to 5.0 V, f = 20 Hz to 20 kHz, inputs are

V

DD

ac grounded, sine wave, A

= 1.4 W, RL = 8 Ω 98 dB

OUT

= 6 dB, A weighting

V

30 ms
5 μs
>100 KΩ

35 μV

SSM2301 Preliminary Technical Data

ABSOLUTE MAXIMUM RATINGS

Absolute maximum ratings apply at 25°C, unless otherwise noted.

Table 2.

Parameter Rating

Supply Voltage 6 V
Input Voltage V
Common-Mode Input Voltage V
Storage Temperature Range −65°C to +150°C
Operating Temperature Range −40°C to +85°C
Junction Temperature Range −65°C to +165°C
Lead Temperature Range

(Soldering, 60 sec)

DD

DD

300°C

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

THERMAL RESISTANCE

θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.

Table 3. Thermal Resistance

Package Type θJA θ

8-lead, 3 mm × 3 mm LFCSP 62 TBD °C/W

Unit

JC

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.

Preliminary Technical Data SSM2301

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

1

2GAIN

3IN+

(Not to Scale)

4IN–

PIN 1
INDICATO R

SSM2301

TOP VIEW

8OUT–

7GND

6VDD

5OUT+

06163-002

SD

Figure 2. SSM2301 LFCSP Pin Configuration

Table 4. Pin Function Descriptions

Pin No. Mnemonic Description

1

SD

Shutdown Input. Active low digital input.

2 GAIN Gain Selection. Digital input.
3 IN+ Noninverting Input.
4 INL− Inverting Input.
5 OUT+ Noninverting Output.
6 VDD Power Supply.
7 GND Ground.
8 OUT− Inverting Output.

SSM2301 Preliminary Technical Data

TYPICAL PERFORMANCE CHARACTERISTICS

100

RL = 8Ω, 33µH
GAIN = 12dB

10

1

THD + N (%)

0.1

0.01

0.000001 0.00010.00001 10

0.001 0.01 0.1 1

OUTPUT POWER (W)

Figure 3. THD + N vs. Output Power into 8 Ω, A

VDD = 2.5V

VDD = 3.6V

VDD = 5V

= 12 dB

V

06163-003

100

VDD = 3.6V

= 8Ω, 33µH

R

L

10

1

0.1

THD + N (%)

250mW

0.01

0.001

0.0001
10 100k

Figure 6. THD + N vs. Frequency, V

500mW

125mW

100 1k 10k

FREQUENCY (Hz)

= 3.6 V

DD

06163-006

100

RL = 8Ω, 33µH
GAIN = 6dB

10

1

THD + N (%)

0.1

0.01

0.000001 0.0001

0.0000001

0.00001 10

0.001

OUTPUT POWER (W)

Figure 4. THD + N vs. Output Power into 8 Ω, A

100

VDD = 5V

= 8Ω, 33µH

R

L

10

1

0.1

THD + N (%)

0.01

500mW

1W

250mW

VDD = 2.5V

VDD = 3.6V

0.01

0.1

VDD = 5V

1

= 6 dB

V

100

VDD = 2.5V
R

= 8Ω, 33µH

L

10

1

0.1

THD + N (%)

125mW

0.01

0.001

0.0001
10 100k

06163-004

Figure 7. THD + N vs. Frequency, V

250mW

750mW

100 1k 10k

FREQUENCY (Hz)

= 2.5 V

DD

06163-007

0.001

0.0001
10 100k

100 1k 10k

FREQUENCY (Hz)

Figure 5. THD + N vs. Frequency, V

= 5.0 V

DD

06163-005

Figure 8. Supply Current vs. Supply Voltage, No Load