Analog Devices OP295, OP495 Datasheet

Dual/Quad Rail-to-Rail
a
FEATURES Rail-to-Rail Output Swing Single-Supply Operation: +3 V to +36 V Low Offset Voltage: 300 mV Gain Bandwidth Product: 75 kHz High Open-Loop Gain: 1000 V/mV Unity-Gain Stable Low Supply Current/Per Amplifier: 150 mA max
APPLICATIONS Battery Operated Instrumentation Servo Amplifiers Actuator Drives Sensor Conditioners Power Supply Control
GENERAL DESCRIPTION
Rail-to-rail output swing combined with dc accuracy are the key features of the OP495 quad and OP295 dual CBCMOS opera­tional amplifiers. By using a bipolar front end, lower noise and higher accuracy than that of CMOS designs has been achieved. Both input and output ranges include the negative supply, pro­viding the user “zero-in/zero-out” capability. For users of 3.3 volt systems such as lithium batteries, the OP295/OP495 is specified for three volt operation.
Maximum offset voltage is specified at 300 µV for +5 volt opera- tion, and the open-loop gain is a minimum of 1000 V/mV. This yields performance that can be used to implement high accuracy systems, even in single supply designs.
The ability to swing rail-to-rail and supply +15 mA to the load makes the OP295/OP495 an ideal driver for power transistors and “H” bridges. This allows designs to achieve higher efficien­cies and to transfer more power to the load than previously pos­sible without the use of discrete components. For applications
Operational Amplifiers
OP295/OP495
PIN CONNECTIONS
8-Lead Narrow-Body SO 8-Lead Epoxy DIP
(S Suffix) (P Suffix)
OP495
8
V+
7
OUT B –IN B
6
+IN B
OUT D
14
–IN D
13
+IN D
12
11
V–
10
+IN C
9
–IN C
OUT C
8
OUT A
–IN A
+IN A
V–
OUT A
–IN A +IN A
V+ +IN B –IN B
OUT B
NC
OP295
OP495
5 6 7 89
NC = NO CONNECT
V+ OUT B
–IN B
+IN B
OUT D
16
–IN D
15 14
+IN D
V–
12
+IN C
11
–IN C
10
OUT C NC
OUT A
–IN A +IN A
OP295
V–
14-Lead Epoxy DIP 16-Lead SO (300 Mil)
(P Suffix) (S Suffix)
OUT A
–IN A +IN A
V+
5
+IN B
6
–IN B
OUT B
7
that require driving inductive loads, such as transformers, in­creases in efficiency are also possible. Stability while driving capacitive loads is another benefit of this design over CMOS rail-to-rail amplifiers. This is useful for driving coax cable or large FET transistors. The OP295/OP495 is stable with loads in excess of 300 pF.
The OP295 and OP495 are specified over the extended indus­trial (–40°C to +125°C) temperature range. OP295s are avail­able in 8-pin plastic and ceramic DIP plus SO-8 surface mount packages. OP495s are available in 14-pin plastic and SO-16 surface mount packages. Contact your local sales office for MIL-STD-883 data sheet.
REV. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
© Analog Devices, Inc., 1995
One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703
OP295/OP495–SPECIFICA TIONS
ELECTRICAL CHARACTERISTICS
Parameter Symbol Conditions Min Typ Max Units
INPUT CHARACTERISTICS
Offset Voltage V Input Bias Current I Input Offset Current I Input Voltage Range V
Common-Mode Rejection Ratio CMRR 0 V VCM 4.0 V, –40°C TA +125°C 90 110 dB Large Signal Voltage Gain A
Offset Voltage Drift VOS/T 15 µV/°C
OUTPUT CHARACTERISTICS
Output Voltage Swing High V
Output Voltage Swing Low V
Output Current I
POWER SUPPLY
Power Supply Rejection Ratio PSRR ±1.5 V VS ±15 V 90 110 dB
Supply Current Per Amplifier I
DYNAMIC PERFORMANCE
Skew Rate SR RL = 10 k 0.03 V/µs Gain Bandwidth Product GBP 75 kHz Phase Margin θ
NOISE PERFORMANCE
Voltage Noise en Voltage Noise Density e Current Noise Density i
Specifications subject to change without notice.
OS
B
OS
CM
VO
OH
OL
OUT
SY
O
p-p
n
n
(@ VS = +5.0 V, VCM = +2.5 V, TA = +258C unless otherwise noted)
–40°C TA +125°C 800 µV –40°C TA +125°C30nA –40°C TA +125°C ±5nA
0 +4.0 V
RL = 10 k, 0.005 V RL = 10 k, –40°C TA +125°C 500 V/mV
4.0 V 1000 10,000 V/mV
OUT
RL = 100 k to GND 4.98 5.0 V RL = 10 k to GND 4.90 4.94 V I
= 1 mA, –40°C TA +125°C 4.7 V
OUT
RL = 100 k to GND 0.7 2 mV RL = 10 k to GND 0.7 2 mV I
= 1 mA, –40°C TA +125°C90mV
OUT
± 11 ± 18 mA
±1.5 V ≤ VS ≤ ±15 V,
–40°C TA +125°C85dB V
= 2.5 V, RL = , –40°C TA +125°C 150 µA
OUT
0.1 Hz to 10 Hz 1.5 µV p-p f = 1 kHz 51 nV/Hz f = 1 kHz <0.1 pA/Hz
30 300 µV 820 nA ±1 ±3nA
86 Degrees
ELECTRICAL CHARACTERISTICS
(@ VS = +3.0 V, VCM = +1.5 V, TA = +258C unless otherwise noted)
Parameter Symbol Conditions Min Typ Max Units
INPUT CHARACTERISTICS
Offset Voltage V Input Bias Current I Input Offset Current I Input Voltage Range V Common-Mode Rejection Ratio CMRR 0 V VCM 2.0 V, –40°C TA +125°C 90 110 dB Large Voltage Gain A Offset Voltage Drift VOS/T 1 µV/°C
OS B OS
CM
VO
RL = 10 k 750 V/mV
0 +2.0 V
30 500 µV 820 nA ±1 ±3nA
OUTPUT CHARACTERISTICS
Output Voltage Swing High V Output Voltage Swing Low V
OH
OL
RL = 10 k to GND 2.9 V RL = 10 k to GND 0.7 2 mV
POWER SUPPLY
Power Supply Rejection Ratio PSRR ±1.5 V VS ±15 V 90 110 dB
±1.5 V VS ±15 V, –40°C TA +125°C85dB
Supply Current Per Amplifier I
SY
V
= 1.5 V, RL = , –40°C TA +125°C 150 µA
OUT
DYNAMIC PERFORMANCE
Slew Rate SR RL = 10 k 0.03 V/µs Gain Bandwidth Product GBP 75 kHz Phase Margin θ
O
85 Degrees
NOISE PERFORMANCE
Voltage Noise en Voltage Noise Density e Current Noise Density i
Specifications subject to change without notice.
p-p
n
n
0.1 Hz to 10 Hz 1.6 µV p-p f = 1 kHz 53 nV/Hz f = 1 kHz <0.1 pA/Hz
–2–
REV. B
OP295/OP495
ELECTRICAL CHARACTERISTICS
Parameter Symbol Conditions Min Typ Max Units
INPUT CHARACTERISTICS
Offset Voltage V Input Bias Current I Input Offset Current I Input Voltage Range V
Common-Mode Rejection Ratio CMRR –15.0 V VCM +13.5 V, –40°C TA +125°C 90 110 dB Large Signal Voltage Gain A Offset Voltage Drift VOS/T 1 µV/°C
OUTPUT CHARACTERISTICS
Output Voltage Swing High V Output Voltage Swing Low V Output Current I
POWER SUPPLY
Power Supply Rejection Ratio PSRR VS = ±1.5 V to ±15 V 90 110 dB Supply Current I Supply Voltage Range V
DYNAMIC PERFORMANCE
Slew Rate SR RL = 10 k 0.03 V/µs Gain Bandwidth Product GBP 85 kHz Phase Margin θ
NOISE PERFORMANCE
Voltage Noise e Voltage Noise Density e Current Noise Density i
Specifications subject to change without notice.
OS
B
OS
CM
VO
OH
OL
OUT
SY
S
O
n p-p n
n
(@ VS = ±15.0 V, TA = +258C unless otherwise noted)
–40°C TA +125°C 800 µV VCM = 0 V 7 20 nA VCM = 0 V, –40°C TA +125°C30nA VCM = 0 V ±1 ±3nA V
= 0 V, –40°C TA +125°C ±5nA
CM
RL = 10 k 1000 4000 V/mV
RL = 100 k to GND 14.95 V RL = 10 k to GND 14.80 V RL = 100 k to GND –14.95 V RL = 10 k to GND –14.85 V
VS = ±1.5 V to ±15 V, –40°C TA +125°C85 dB VO = 0 V, RL = , VS = ±18 V, –40°C TA +125°C 175 µA
0.1 Hz to 10 Hz 1.25 µV p-p f =1 kHz 45 nV/Hz f = 1 kHz <0.1 pA/Hz
–15 +13.5 V
± 15 ±25 mA
+3 (±1.5) +36 (±18) V
30 300 µV
83 Degrees
W AFER TEST LIMITS
(@ VS = +5.0 V, VCM = 2.5 V, TA = +258C unless otherwise noted)
Parameter Symbol Conditions Limit Units
Offset Voltage Vos 300 µV max Input Bias Current I Input Offset Current I Input Voltage Range
1
Common-Mode Rejection Ratio CMRR 0 V V Power Supply Rejection Ratio PSRR ±1.5 V V Large Signal Voltage Gain A Output Voltage Swing High V Supply Current Per Amplifier I
NOTES Electrical tests and wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing.
1
Guaranteed by CMRR test.
B OS
V
SY
CM
VO OH
RL = 10 k 1000 V/mV min RL = 10 k 4.9 V min V
OUT
4 V 90 dB min
CM
±15 V 90 µV/V
S
= 2.5 V, RL = 150 µA max
20 nA max ±2 nA max 0 to +4 V min
ORDERING GUIDE
Temperature Package Package
Model Range Description Option
OP295GP –40°C to +125°C 8-Pin Plastic DIP N-8 OP295GS –40°C to +125°C 8-Pin SOIC SO-8 OP295GBC +25°C DICE
Model Range Description Option
OP495GP –40°C to +125°C 14-Pin Plastic DIP N-14 OP495GS –40°C to +125°C 16-Pin SOL R-16 OP495GBC +25°C DICE
Temperature Package Package
REV. B
–3–
OP295/OP495
15.2
–15.2
100
–14.6
–15.0
–25
–14.8
–50
14.2
–14.4
14.4
14.6
14.8
15.0
7550250
TEMPERATURE – °C
– OUTPUT SWING – Volts
+ OUTPUT SWING – Volts
VS = ±15V
RL = 100k
RL = 2k
RL = 2k
RL = 100k
RL = 10k
RL = 10k
ABSOLUTE MAXIMUM RATINGS
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±18 V
Input Voltage Differential Input Voltage
2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±18 V
2
. . . . . . . . . . . . . . . . . . . . . . . +36 V
1
Output Short-Circuit Duration . . . . . . . . . . . . . . . . . Indefinite
Storage Temperature Range
P, S Package . . . . . . . . . . . . . . . . . . . . . . . .–65°C to +150°C
Operating Temperature Range
OP295G, OP495G . . . . . . . . . . . . . . . . . . .–40°C to +125°C
Junction Temperature Range
P, S Package . . . . . . . . . . . . . . . . . . . . . . . .–65°C to +150°C
Lead Temperature Range (Soldering, 60 Sec) . . . . . . . +300°C
Package Type u
3
JA
u
JC
Unit
8-Pin Plastic DIP (P) 103 43 °C/W 8-Pin SOIC (S) 158 43 °C/W 14-Pin Plastic DIP (P) 83 39 °C/W 16-Pin SO (S) 98 30 °C/W
NOTES
1
Absolute maximum ratings apply to both DICE and packaged parts, unless otherwise noted.
2
For supply voltages less than ±18 V, the absolute maximum input voltage is equal to the supply voltage.
3
θJA is specified for the worst case conditions, i.e., θJA is specified for device in socket
for cerdip, P-DIP, and LCC packages; θJA is specified for device soldered in circuit board for SOIC package.
DICE CHARACTERISTICS
OP295 Die Size 0.066 × 0.080 inch, 5,280 sq. mils. Substrate (Die Backside) Is Connected to V+. Transistor Count, 74.
Typical Characteristics
140
120
100
80
60
40
SUPPLY CURRENT PER AMPLIFIER – µA
20
–50
–25
Supply Current Per Amplifier vs. Temperature Output Voltage Swing vs. Temperature
TEMPERATURE – °C
VS = +36V
VS = +5V
VS = +3V
7550250
100
–4–
OP495 Die Size 0.113 × 0.083 inch, 9,380 sq. mils. Substrate (Die Backside) Is Connected to V+. Transistor Count, 196.
REV. B
Loading...
+ 8 hidden pages