Analog Devices OP275GP, OP275GSR, OP275GS, OP275GBC Datasheet

Dual Bipolar/JFET, Audio

OP275

OUT A

–IN A
+IN A

V–

OUT B
–IN B
+IN B

V+

1
2
3
4

5

6

7

8

1

2

3

4

8

7

6

5

OP275

OUT B
–IN B
+IN B

V+OUT A
–IN A
+IN A

V–

a

FEATURES
Excellent Sonic Characteristics

Low Noise: 6 nV/√Hz

Low Distortion: 0.0006%
High Slew Rate: 22 V/␮s
Wide Bandwidth: 9 MHz
Low Supply Current: 5 mA
Low Offset Voltage: 1 mV
Low Offset Current: 2 nA
Unity Gain Stable
SOIC-8 Package

APPLICATIONS
High Performance Audio
Active Filters
Fast Amplifiers
Integrators

GENERAL DESCRIPTION

The OP275 is the first amplifier to feature the Butler Amplifier
front-end. This new front-end design combines both bipolar
and JFET transistors to attain amplifiers with the accuracy and
low noise performance of bipolar transistors, and the speed and
sound quality of JFETs. Total Harmonic Distortion plus Noise
equals that of previous audio amplifiers, but at much lower sup­ply currents.

A very low l/f corner of below 6 Hz maintains a flat noise density
response. Whether noise is measured at either 30 Hz or 1 kHz,

it is only 6 nV/√

the OP275 its high slew rates to keep distortion low, even when

large output swings are required, and the 22 V/µs slew rate of

the OP275 is the fastest of any standard audio amplifier. Best of
all, this low noise and high speed are accomplished using less
than 5 mA of supply current, lower than any standard audio
amplifier.

Hz. The JFET portion of the input stage gives

Operational Amplifier

OP275*

PIN CONNECTIONS

8-Lead Narrow-Body SO 8-Lead Epoxy DIP

(S Suffix) (P Suffix)

Improved dc performance is also provided with bias and offset
currents greatly reduced over purely bipolar designs. Input off­set voltage is guaranteed at 1 mV and is typically less than

200 µV. This allows the OP275 to be used in many dc coupled

or summing applications without the need for special selections
or the added noise of additional offset adjustment circuitry.

The output is capable of driving 600 Ω loads to 10 V rms while

maintaining low distortion. THD + Noise at 3 V rms is a low

0.0006%.

The OP275 is specified over the extended industrial (–40°C to
+85°C) temperature range. OP275s are available in both plastic

DIP and SOIC-8 packages. SOIC-8 packages are available in
2500 piece reels. Many audio amplifiers are not offered in
SOIC-8 surface mount packages for a variety of reasons; how­ever, the OP275 was designed so that it would offer full perfor­mance in surface mount packaging.

*Protected by U.S. Patent No. 5,101,126.

REV. A

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A.
Tel: [phone] Fax: [phone]

© Analog Devices, Inc., 1995

OP275–SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

(@ VS = ⫾15.0 V, TA = +25ⴗC unless otherwise noted)

Parameter␣ Symbol Conditions Min Typ Max Units

AUDIO PERFORMANCE␣

THD + Noise V

Voltage Noise Density e

n

= 3 V rms,

IN

R

= 2 kΩ, f = 1 kHz 0.006 %

L

f = 30 Hz 7 nV/√Hz
f = 1 kHz 6 nV/√

Current Noise Density i

n

f = 1 kHz 1.5 pA/√Hz

Headroom THD + Noise ≤ 0.01%,

R

= 2 kΩ, VS = ±18 V >12.9 dBu

L

INPUT CHARACTERISTICS␣

Offset Voltage V

Input Bias Current I

Input Offset Current I

Input Voltage Range V

OS

B

OS

CM

Common-Mode Rejection Ratio CMRR V

Large Signal Voltage Gain A

VO

–40°C ≤ T

≤ +85°C 1.25 mV

A

VCM = 0 V 100 350 nA
V

= 0 V, –40°C ≤ TA ≤ +85°C 100 400 nA

CM

VCM = 0 V 2 50 nA

= 0 V, –40°C ≤ TA ≤ +85°C 2 100 nA

V

CM

–10.5 +10.5 V

= ±10.5 V,

CM

–40°C ≤ T

R

= 2 kΩ 250 V/mV

L

R

= 2 kΩ, –40°C ≤ TA ≤ +85°C 175 V/mV

L

= 600 Ω 200 V/mV

R

L

≤ +85°C 80 106 dB

A

1mV

Offset Voltage Drift ∆VOS/∆T2µV/°C

Hz

OUTPUT CHARACTERISTICS␣

R

Output Voltage Swing V

O

= 2 kΩ –13.5 ±13.9 +13.5 V

L

= 2 kΩ, –40°C ≤ TA ≤ +85°C –13 ±13.9 +13 V

R

L

R

= 600 Ω, VS = ±18 V +14, –16 V

L

POWER SUPPLY␣

Power Supply Rejection Ratio PSRR V

Supply Current I

Supply Voltage Range V

SY

S

= ±4.5 V to ±18 V 85 111 dB

S

V

= ±4.5 V to ±18 V,

S

–40°C ≤ T

V

= ±4.5 V to ±18 V, V

S

R

= ∞, –40°C ≤ TA ≤ +85°C45mA

L

= ±22 V, V

V

S

–40°C ≤ T

≤ +85°C80 dB

A

= 0 V, R

O

≤ +85°C 5.5 mA

A

= 0 V,

O

= ∞,

L

±4.5 ±22 V

DYNAMIC PERFORMANCE␣

Slew Rate SR R
Full-Power Bandwidth BW

P

= 2 kΩ 15 22 V/µs

L

Gain Bandwidth Product GBP 9 MHz
Phase Margin ø

m

Overshoot Factor V

Specifications subject to change without notice.

= 100 mV, AV = +1,

IN

R

= 600 Ω, C

L

= 100 pF 10 %

L

62 Degrees

kHz

–2–

REV. A

OP275

WARNING!

ESD SENSITIVE DEVICE

WAFER TEST LIMITS

(@ VS = ⴞ15.0 V, TA = +25ⴗC unless otherwise noted)

Parameter Symbol Conditions Limit Units

Offset Voltage V
Input Bias Current I
Input Offset Current I
Input Voltage Range

1

OS

B

OS

V

CM

Common-Mode Rejection Ratio CMRR V

VCM = 0 V 350 nA max
VCM = 0 V 50 nA max

= ±10.5 V 80 dB min

CM

1mV max

±10.5 V min

Power Supply Rejection Ratio PSRR V = ±4.5 V to ±18 V 85 dB min

R

Large Signal Voltage Gain A
Output Voltage Range V
Supply Current I

NOTES
Electrical tests and wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard
product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing.

1

Guaranteed by CMRR test.

Specifications subject to change without notice.

ABSOLUTE MAXIMUM RATINGS

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±22 V

Input Voltage
Differential Input Voltage

2

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±22 V

2

. . . . . . . . . . . . . . . . . . . . . . . ±7.5 V

Output Short-Circuit Duration to GND

VO

O

SY

1

3

. . . . . . . . . Indefinite

Storage Temperature Range

P, S Package . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C

Operating Temperature Range

= 2 kΩ 250 V/mV min

L

R

= 10 kΩ±13.5 V min

L

VO = 0 V, R

= ∞ 5 mA max

L

ORDERING GUIDE

Model Temperature Range Package Option

OP275GP –40°C to +85°C 8-Pin Plastic DIP
OP275GS –40°C to +85°C 8-Pin SOIC
OP275GSR –40°C to +85°C SO-8 Reel, 2500 pcs.
OP275GBC +25°C DICE

OP275G . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C

Junction Temperature Range

P, S Package . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C

DICE CHARACTERISTICS

Lead Temperature Range (Soldering, 60 sec) . . . . . . . +300°C

Package Type θ

4

JA

θ

JC

Units

8-Pin Plastic DIP (P) 103 43 °C/W
8-Pin SOIC (S) 158 43 °C/W

NOTES

1

Absolute maximum ratings apply to both DICE and packaged parts, unless
otherwise noted.

2

For supply voltages greater than ±22 V, the absolute maximum input voltage is
equal to the supply voltage.

3

Shorts to either supply may destroy the device. See data sheet for full details.

4

θJA is specified for the worst case conditions, i.e., θ

for cerdip, P-DIP, and LCC packages; θ
board for SOIC package.

JA

is specified for device in socket

JA

is specified for device soldered in circuit

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the OP275 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.

REV. A

Die Size 0.070 × 0.108 in. (7,560 sq. mils)
Substrate is connected to V–

–3–

OP275–Typical Performance Curves

FREQUENCY – Hz

1M 10M

10k 100k

PHASE – Degrees

180

135

–180

90
45
0

–45

–90

–135

40
30

–40

20
10

0
–10
–20
–30

GAIN – dB

VS = ±15V
T

A

= +25°C

FREQUENCY – Hz

100

80

–60

1k 10k 100M

100k 1M 10M

60

40

20

0

–20

–40

0

PHASE – Degrees

45

90

135

180

225

270

VS = ±15V
R

L

= 2kΩ

T

A

= +25°C

OPEN-LOOP GAIN – dB

GAIN

PHASE

Øm= 58°

25

TA = +25°C

20

R

= 2kΩ

L

15
10

5
0

–5
–10
–15

OUTPUT VOLTAGE SWING – V

–20
–25

0 ±5 ±25

±10 ±15 ±20

SUPPLY VOLTAGE – V

+VOM

–VOM

Output Voltage Swing vs. Supply
Voltage

MARKER 15 309.059Hz
MAG (A/H) 60.115dB

60

50

40

30

20

MARKER 15 309.058Hz
PHASE (A/R 90.606Deg

10

GAIN – dB

0
–10
–20

10k 100k

VS = ±15V
TA = +25°C

135

90
45

0
–45
–90

1M 10M

FREQUENCY – Hz

OPEN-LOOP GAIN – V/mV

Open-Loop Gain vs. Temperature

PHASE – Degrees

1500

VS = ±15V

= ±10V

V

O

1250

1000

750

+GAIN

= 600Ω

R

L

500

250

0

–50 –25 100

50

40

A

30

20

A

10

0

A

–10

CLOSED-LOOP GAIN – dB

–20

–30

1k 10k 100M

0255075

TEMPERATURE – °C

= +100

VCL

= +10

VCL

= +1

VCL

100k 1M 10M

FREQUENCY – Hz

–GAIN

= 600Ω

R

L

+GAIN
R

L

–GAIN

= 2kΩ

R

L

= 2kΩ

VS = ±15V

= +25°C

T

A

Closed-Loop Gain and Phase, AV = +1

60

VS = ±15V

50

= +25°C

T

A

40

30

20

IMPEDANCE – Ω

10

0
100 1k 10M

A

VCL

FREQUENCY – Hz

A

= +1

VCL

A

= +10

VCL

= +100

10k 100k 1M

Open-Loop Gain, Phase vs. Frequency

120

100

80

60

40

20

COMMON-MODE REJECTION – dB

0
100 1k 10M10k 100k 1M

FREQUENCY – Hz

VS = ±15V
T

Common-Mode Rejection vs.
Frequency

= +25°C

A

Closed-Loop Gain vs. Frequency

120

100

80

VS = ±15V

= +25°C

T

A

60

40

20

POWER SUPPLY REJECTION – dB

0

10 100 1M

1k 10k 100k

FREQUENCY – Hz

+PSRR

–PSRR

Power Supply Rejection vs.
Frequency

–4–

Closed-Loop Output Impedance vs.
Frequency

Open-Loop Gain, Phase vs. Frequency

REV. A