ANALOG DEVICES OP270 Service Manual
Dual Very Low Noise Precision
FEATURES
Very low noise density of 5 nV/√Hz at 1 kHz maximum
Excellent input offset voltage of 75 μV maximum
Low offset voltage drift of 1 μV/°C maximum
Very high gain of 1500 V/mV minimum
Outstanding CMR of 106 dB minimum
Slew rate of 2.4 V/μs typical
Gain bandwidth product of 5 MHz typical
Industry-standard 8-lead dual pinout
GENERAL DESCRIPTION
The OP270 is a high performance, monolithic, dual operational
amplifier with exceptionally low voltage noise density (5 nV/√Hz
maximum at 1 kHz). It offers comparable performance to the
industry-standard OP27 from Analog Devices, Inc.
The OP270 features an input offset voltage of less than 75 μV
and an offset drift of less than 1 μV/°C, guaranteed over the full
military temperature range. Open-loop gain of the OP270 is more
than 1,500,000 into a 10 kΩ load, ensuring excellent gain accuracy
and linearity, even in high gain applications. The input bias
current is less than 20 nA, which reduces errors due to signal
source resistance. With a common-mode rejection (CMR) of
greater than 106 dB and a power supply rejection ratio (PSRR)
of less than 3.2 μV/V, the OP270 significantly reduces errors
due to ground noise and power supply fluctuations. The power
consumption of the dual OP270 is one-third less than two OP27
Operational Amplifier
OP270
FUNCTIONAL BLOCK DIAGRAMS
1
–IN A
2
+IN A
NC
3
V–
4
OP270
5
NC
+IN B
6
–IN B
7
8
NC
NC = NO CONNECT
Figure 1. 16-Lead SOIC
(S-Suffix)
OUT A
1
AB
2
–IN A
3
+IN A
4
V–
OP270
Figure 2. 8-Lead PDIP (P-Suffix)
8-Lead CERDIP
(Z-Suffix)
devices, a significant advantage for power conscious applications.
The OP270 is unity-gain stable with a gain bandwidth product
of 5 MHz and a slew rate of 2.4 V/μs.
The OP270 offers excellent amplifier matching, which is
important for applications such as multiple gain blocks, low
noise instrumentation amplifiers, dual buffers, and low noise
active filters.
The OP270 conforms to the industry-standard 8-lead DIP
pinout. It is pin compatible with the MC1458, SE5532/A,
RM4558, and HA5102 dual op amps, and can be used to
upgrade systems using those devices.
For higher speed applications, the ADA4004-2 or the AD8676 are
recommended. For a quad op amp, see the OP470 data sheet.
16
15
14
13
12
11
10
9
8
7
6
5
OUT A
NC
NC
V+
NC
NC
OUT B
NC
V+
OUT B
–IN B
+IN B
00325-001
00325-002
Rev. E
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rights of third parties that may result from its use. Specifications subject to change without notice. No
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Fax: 781.461.3113 ©2001–2010 Analog Devices, Inc. All rights reserved.
OP270
TABLE OF CONTENTS
Features .............................................................................................. 1
Functional Block Diagrams ............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Electrical Specifications ............................................................... 4
Absolute Maximum Ratings ............................................................ 5
ESD Caution .................................................................................. 5
Typical Performance Characteristics ............................................. 6
Test Circuits ..................................................................................... 11
Applications Information .............................................................. 12
REVISION HISTORY
2/10—Rev. D to Rev. E
Change to General Description Section ........................................ 1
Change to Input Noise Current Density Parameter, Table 1 ...... 3
Change to Figure 18 ......................................................................... 8
Changes to Total Noise and Source Resistance Section ............ 13
Changes to Figure 41 ...................................................................... 16
2/09—Rev. C to Rev. D
Updated Format .................................................................. Universal
Reorganized Layout ............................................................ Universal
Changes to Figure 7 .......................................................................... 6
Changes to Figure 22 ........................................................................ 9
Deleted Applications Heading ...................................................... 11
Changes to Figure 44 ...................................................................... 17
Changes to Figure 46 ...................................................................... 18
Updated Outline Dimensions ....................................................... 19
Changes to Ordering Guide .......................................................... 20
Voltage and Current Noise ........................................................ 12
Total Noise and Source Resistance ........................................... 12
Noise Measurements .................................................................. 14
Capacitive Load Driving and Power Supply Considerations .. 15
Unity-Gain Buffer Applications ............................................... 15
Low Phase Error Amplifier ....................................................... 16
Five-Band, Low Noise, Stereo Graphic Equalizer .................. 16
Digital Panning Control ............................................................ 17
Dual Programmable Gain Amplifier ....................................... 17
Outline Dimensions ....................................................................... 19
Ordering Guide .......................................................................... 20
4/03—Rev. B to Rev. C
Deletion of OP270A model ............................................... Universal
Edits to Features ................................................................................. 1
Changes to Specifications ................................................................. 2
Deletion of Wafer Limits and Dice Characteristics ...................... 4
Changes to Absolute Maximum Ratings ........................................ 4
Changes to Ordering Guide ............................................................. 4
Changes to Equations in Noise Measurements section ............. 10
Change to Figure 10 ....................................................................... 11
Updated Outline Dimensions ....................................................... 14
11/02—Rev. A to Rev. B
Updated Ordering Guide .............................................................. 15
9/02—Rev. 0 to Rev. A
Edits to Absolute Maximum Ratings .............................................. 5
Edits to Ordering Guide ................................................................ 15
2/01—Revision 0: Initial Version
Rev. E | Page 2 of 20
OP270
SPECIFICATIONS
VS = ±15 V, TA = 25°C, unless otherwise noted.
Table 1.
OP270E OP270F OP270G
Parameter Symbol Test Conditions
Input Offset Voltage VOS 10 75 20 150 50 250 μV
Input Offset Current IOS V
Input Bias Current IB V
Input Noise Voltage1 e
p-p 0.1 Hz to 10 Hz 80 200 80 200 80 nV p-p
n
Input Noise Voltage Density2 en f
e
e
f
n
f
n
Input Noise Current Density in f
i
i
f
n
f
n
Large-Signal Voltage Gain AVO
= 0 V 1 10 3 15 5 20 nA
CM
= 0 V 5 20 10 40 15 60 nA
CM
= 10 Hz 3.6 6.5 3.6 6.5 3.6 nV/√Hz
O
= 100 Hz 3.2 5.5 3.2 5.5 3.2 nV/√Hz
O
= 1 kHz 3.2 5.0 3.2 5.0 3.2 nV/√Hz
O
= 10 Hz 1.1 1.1 1.1 pA/√Hz
O
= 100 Hz 0.7 0.7 0.7 pA/√Hz
O
= 1 kHz 0.6 0.6 0.6 pA/√Hz
O
= ±10 V,
V
O
= 10 kΩ
R
L
= ±10 V,
V
O
R
= 2 kΩ
L
1500 2300 1000 1700 750 1500 V/mV
750 1200 500 900 350 700 V/mV
Input Voltage Range3 IVR ±12 ±12.5 ±12 ±12.5 ±12 ±12.5 V
Output Voltage Swing VO R
≥ 2 kΩ ±12 ±13.5 ±12 ±13.5 ±12 ±13.5 V
L
Common-Mode Rejection CMR VCM = ±11 V 106 125 100 120 90 110 dB
Power Supply Rejection
Ratio
PSRR
= ±4.5 V
V
S
to ±18 V
0.56 3.2 1.0 5.6 1.5 5.6 μV/V
Slew Rate SR 1.7 2.4 1.7 2.4 1.7 2.4 V/μs
No load 4 6.5 4 6.5 4 6.5 mA
Supply Current
I
SY
(All Amplifiers)
Gain Bandwidth Product GBP 5 5 5 MHz
Channel Separation1 CS
= ±20 V p-p,
V
O
f
= 10 Hz
O
125 175 125 175 175 dB
Input Capacitance CIN 3 3 3 pF
Input Resistance
Differential Mode RIN 0.4 0.4 0.4 MΩ
Common Mode R
Settling Time tS
20 20 20 GΩ
INCM
= +1, 10 V,
A
V
5 5 5 μs
step to 0.01%
1
Guaranteed but not 100% tested.
2
Sample tested.
3
Guaranteed by CMR test.
Unit Min Typ Max Min Typ Max Min Typ Max
Rev. E | Page 3 of 20
OP270
ELECTRICAL SPECIFICATIONS
VS = ±15 V, −40°C ≤ TA ≤ 85°C, unless otherwise noted.
Table 2.
OP270E OP270F OP270G
Parameter Symbol Test Conditions
Input Offset Voltage VOS 25 150 45 275 100 400 μV
TCV
Average Input Offset
0.2 1 0.4 2 0.7 3 μV/°C
OS
Voltage Drift
Input Offset Current IOS V
Input Bias Voltage IB V
Large-Signal Voltage Gain AVO
A
Input Voltage Range
1
VO
IVR ±12 ±12.5 ±12 ±12.5 ±12 ±12.5 V
Output Voltage Swing VO R
= 0 V 1.5 30 5 40 15 50 nA
CM
= 0 V 6 60 15 70 19 80 nA
CM
= ±10 V,
V
O
= 10 kΩ
R
L
= ±10 V,
V
O
R
= 2 kΩ
L
≥ 2 kΩ ±12 ±13.5 ±12 ±13.5 ±12 ±13.5 V
L
1000 1800 600 1400 400 1250 V/mV
500 900 300 700 225 670 V/mV
Common-Mode Rejection CMR VCM = ±11 V 100 120 94 115 90 100 dB
Power Supply Rejection
PSRR V
= ±4.5 V to ±18 V 0.7 5.6 1.8 10 2.0 1.5 μV/V
S
Ratio
No load 4.4 7.2 4.4 7.2 4.4 7.2 mA
Supply Current
I
SY
(All Amplifiers)
1
Guaranteed by CMR test.
Unit Min Typ Max Min Typ Max Min Typ Max
Rev. E | Page 4 of 20
OP270
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Supply Voltage 18 V
Differential Input Voltage1 1.0 V
Differential Input Current1 ±25 mA
Input Voltage Supply voltage
Output Short-Circuit Duration Continuous
Storage Temperature Range −65°C to +150°C
Lead Temperature Range (Soldering, 60 sec) 300°C
Junction Temperature (TJ) −65°C to +150°C
Operating Temperature Range −40°C to +85°C
1
The OP270 inputs are protected by back-to-back diodes. To achieve low noise
performance, current-limiting resistors are not used. If the differential voltage
exceeds +10 V, the input current should be limited to ±25 mA.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
For military processed devices, refer to the Standard Microcircuit Drawing (SMD) available at the Defense Logistics
Agency website.
Table 4. Analog Devices Equivalent to SMD
SMD Part Number Analog Devices Equivalent
5962-8872101PA OP270AZMDA
ESD CAUTION
Rev. E | Page 5 of 20
OP270
TYPICAL PERFORMANCE CHARACTERISTICS
VOLTAGE NOISE DENSITY (nV/√Hz)
10
9
8
7
6
5
4
3
2
TA = 25°C
V
= ±15V
S
1/f CORNER = 5Hz
CURRENT NOISE DE NSITY (pA/ √Hz)
10
1
TA = 25°C
V
= ±15V
S
1/f CORNER = 200Hz
1
1 10 100 1k
FREQUENCY (Hz)
Figure 3. Voltage Noise Density vs. Frequency
5
TA = 25°C
4
AT 10kHz
3
2
VOLTAGE NOISE DENSITY (nV/√Hz)
1
0 ±5 ±10 ±15 ±20
SUPPLY VOLTAGE (V)
AT 1kHz
Figure 4. Voltage Noise Density vs. Supply Voltage
0.1Hz TO 10Hz NOISE
00352-004
0.1
10 100 1k 10k
FREQUENCY (Hz)
00352-007
Figure 6. Current Noise Density vs. Frequency
40
VS = ±15V
30
20
10
0
VOLTAGE (µV)
–10
–20
00352-005
–30
–75 –50 –25 25 50 75 100 1250
TEMPERATURE (° C)
00352-008
Figure 7. Input Offset Voltage vs. Temperature
5
TA = 25°C
V
= ±15V
S
4
NOISE VO LTAGE ( 100nV/DIV )
TA = 25°C
T
= ±15V
S
TIME (1 sec/DIV)
Figure 5. 0.1 Hz to 10 Hz Input Voltage Noise
00352-006
Rev. E | Page 6 of 20
3
2
1
CHANGE IN OFF SET VOL TAGE (µA)
0
02341
TIME (Minutes)
Figure 8. Warm-Up Offset Voltage Drift
00352-009
5
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