Analog Devices OP221EZ, OP221GS, OP221AZ, OP221GP Datasheet

Dual Low Power Operational Amplifier,

8

7

6

5

1

2

3

4

NC = NO CONNECT

+IN A

V–

+IN B

–IN A

OUT A

V+

OUT B–IN B

a

FEATURES
Excellent TCVos Match, 2 ␮V/ⴗC Max
Low Input Offset Voltage, 150 ␮V Max
Low Supply Current, 550 ␮A Max
Single Supply Operation, 5 V to 30 V
Low Input Offset Voltage Drift, 0.75 ␮V/ⴗC
High Open-Loop Gain, 1500 V/mV Min
High PSRR, 3 ␮V/V
Wide Common-Mode Voltage

Range, V– to within 1.5 V of V+
Pin Compatible with 1458, LM158, LM2904
Available in Die Form

GENERAL DESCRIPTION

The OP221 is a monolithic dual operational amplifier that can
be used either in single or dual supply operation. The wide
supply voltage range, wide input voltage range, and low supply
current drain of the OP221 make it well-suited for operation
from batteries or unregulated power supplies.

The excellent specifications of the individual amplifiers combined
with the tight matching and temperature tracking between channels

Single or Dual Supply

OP221

PIN CONNECTIONS

8-Lead SO

(S-Suffix)

OUT A

provide high performance in instrumentation amplifier designs.
The individual amplifiers feature very low input offset voltage,
low offset voltage drift, low noise voltage, and low bias current.
They are fully compensated and protected.

Matching between channels is provided on all critical parameters
including input offset voltage, tracking of offset voltage vs. tem­perature, non-inverting bias currents, and common-mode rejection.

8-Lead

HERMETIC DIP

(Z-Suffix)

1

2

–IN A

3

+IN A

V–

4

NC = NO CONNECT

8

7

6

5

V+

OUT B

–IN B

+IN B

SIMPLIFIED SCHEMATIC

Q3 Q4

–IN

+IN

Q1

Q5

*

NULL

*

ACCESSIBLE IN CHIP FORM ONLY

Q2

Q7

Q6

REV. A

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.

V+

Q11

Q12

Q26

Q9 Q10

Q4

Q13

Q33

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] © Analog Devices, Inc., 2002

Q28

OUTPUT

Q27

Q29

V–

OP221–SPECIFICATIONS

.

(Electrical Characteristics at Vs = ⴞ2.5 V to ⴞ15 V, TA = 25ⴗC, unless otherwise noted.)

OP221A/E OP221G

Parameter Symbol Conditions Min Typ Max Min Typ Max Unit

Input Offset Voltage V

OS

75 150 250 500 µV

Input Offset Current Ios VCM = 0 0.5 3 1.5 7 nA

Input Bias Current I

B

Input Voltage Range IVR V+ = 5 V, V– = 0 V (Note 2) 0/3.5 0/3.5

VCM = 0 55 100 70 120 nA

VS = ±15 V –15/13.5 –15/13.5

V

Common-Mode CMRR V+ = –5 V, V– = 0 V
Rejection Ratio 0 V ≤ V

= ±15 V dB

V

S

–15 V ≤ V

Power Supply PSRR VS = ±2.5 V to ± 15 V 3 10 32 100
Rejection Ratio V– = 0 V, V+ = 5 V to 30 V 6 18 57 180

≤ 3.5 V 90 100 75 85

CM

≤ 13.5 V 95 100 80 90

CM

µV/V

Large-Signal Avo VS = ±15 V, RL = 10 kΩ
Voltage Gain V

Output Voltage V

O

Swing R

= ±10 V 1500 800 V/mV

O

V+ = 5 V, V– = 0 V 0.7/4.1 0.8/4 V

= 10 kΩ

L

VS = 15 V, RL = 10 kΩ±13.8 ± 13.5

Slew Rate SR RL = 10 kΩ (Note 1) 0.2 0 3 0.2 0.3 V/µS

Bandwidth BW 600 600 kHz

Supply Current I

SY

(Both Amplifiers) VS = ±15 V, No Load 600 800 850 900

NOTES

1

Sample tested.

2

Guaranteed by CMRR test limits.

VS = ±2.5 V, No Load 450 550 550 650

µA

–2–

REV. A

OP221

(Electrical Characteristics at VS = ⴞ2.5 V to ⴞ15 V, –55ⴗC ≤ TA +125ⴗC for OP221A,

SPECIFICATIONS

.

Parameter Symbol Conditions Min Typ Max Min Typ Max Unit

Average Input TCV
Offset Voltage

–25ⴗC ≤ TA ≤ +85ⴗC for OP221E, –40ⴗC ≤ TA ≤ +85ⴗC for OP221G, unless otherwise noted.)

OP221A/E OP221G

OS

0.75 1.5 2 3 µV/°C

Input Offset Voltage V

Input Offset Current I

Input Bias Current I

OS

B

OS

VCM = 0 1 5 2 10 nA

VCM = 0 55 100 80 140 nA

Input Voltage Range IVR V+ = 5 V, V– = 0 V (Note 2) 0/3.2 0/3.2

V

= ±15 V –15/13.2 –15/13.2

S

150 300 400 700 µV

V

Common-Mode CMRR V+ = –5 V, V– = 0 V
Rejection Ratio 0 V ≤ V

V

= ±15 V dB

S

–15 V ≤ V

Power Supply PSRR VS = ±2.5 V to ± 15 V 6 18 57 180
Rejection Ratio V– = 0 V, V+ = 5 V to 30 V 10 32 100 320

Large-Signal A

VO

Voltage Gain V

Output Voltage V

O

Swing R

VS = ±15 V, RL = 10 kΩ

O

V+ = 5 V, V– = 0 V 0.8/3.8 0.9/3.7

= 10 kΩ V

L

≤ 3.5 V 85 90 70 80

CM

≤ 13.5 V 90 95 75 85

CM

= ±10 V 1000 600

µV/V

V/mV

VS = 15 V, RL = 10 kΩ±13.5 13.2

Supply Current I

SY

VS = ±2.5 V, No Load 500 650 600 750 µA

(Both Amplifiers) VS = ±15 V, No Load 700 900 950 1000

NOTES

1

Sample tested.

2

Guaranteed by CMRR test limits.

Matching Characteristics at Vs = ⴞ15 V, TA = 25ⴗC, unless otherwise noted.

.

OP221A/E OP221G

Parameter Symbol Conditions Min Typ Max Min Typ Max Unit

Input Offset
Voltage Match ∆V

OS

50 200 250 600 µV

Average Noninverting
Bias Current IB+ 80 120 nA

Noninverting Input I

+25410nA

OS

Offset Current

Common-Mode
Rejection Ratio ∆CMRR V

= –15 V to 13.5 V 92 72 dB

CM

Match (Note 1)

Power Supply
Rejection Ratio ∆PSRR V

= ±2.5 V to ± 15 V 14 140 µV/V

S

Match (Note 1)

REV. A

–3–

(Matching Characteristics at Vs = ⴞ15 V, –55ⴗC ≤ TA ≤ +125ⴗC for OP221A,

OP221–SPECIFICATIONS

–25ⴗC ≤ TA ≤ +85ⴗC for OP221E, –40ⴗC ≤ TA ≤ +85ⴗC for OP221G, unless otherwise noted.
Grades E and G are sample tested.)

.

OP221A/E OP221G

Parameter Symbol Conditions Min Typ Max Min Typ Max Unit

Input Offset
Voltage Match ∆V

Average Noninverting I

B

OS

+V

= 0 100 140 nA

CM

100 400 400 800 µV

Bias Current

Input Offset IC∆V

OS

12 3 5 µV°C

Voltage Tracking

Noninverting Input I

+VCM = 0 3 7 6 12 nA

OS

Offset Current

Common-Mode
Rejection Ratio ∆CMRR V

= –15 V to 13.2 V 87 90 72 80 dB

CM

Match (Note 1)

Power Supply
Rejection Ratio ∆PSRR 26 140 µV/V
Match (Note 1)

NOTES

1

∆CMRR is 20 log10 VCM/∆CME, where V

2

∆PSRR is: Input-Referred Differential Error

∆V

S

is the voltage applied to both noninverting inputs and ∆CME is the difference in common-mode input-referred error.

CM

Wafer Test Limits at Vs = ⴞ2.5 V to ⴞ15 V, TA = 25ⴗC, unless otherwise noted.

.

OP221N

Parameter Symbol Conditions Limit Unit

Input Offset Voltage V

Input Offset Current I

Input Bias Current I

OS

B

OS

VCM = 0 3.5 nA Max

VCM = 0 85 nA Max

200 µV Max

Input Voltage Range IVR V+ = 5 V, V– = 0 V 0/3.5 V Min/Max

VS= ± 15 V –15/13.5 V Min

Common-Mode CMRR V– = 0 V, V+ = 5 V, 88
Rejection Ratio 0 V ≤ V

V

= ±15 V dB Min

S

–15 V ≤ V

Power Supply PSRR VS = ±2.5 V to ± 15 V 12.5
Rejection Ratio V– = 0 V, V+ = 5 V to 30 V 22.5

Large-Signal Avo VS = ±15 V
Voltage Gain R

Output Voltage Swing V

Supply Current I

O

SY

= 10 kΩ

L

V+ = 5 V, V– = 0 V, RL= 10 kΩ 0.7/4.1 V Min/Max
V

= 15 V, RL = 10 kΩ±13.8 V Min

S

VS = ±2.5 V, No Load 560 µA Max

≤ 3.5 V

CM

≤ 13.5 V 93

CM

1500

V/mV Min

V/mV Max

(Both Amplifiers) VS = ±15 V, No Load 810

NOTE
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed
for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing.

–4–

REV. A