Analog Devices OP220 a Datasheet

OUT A

–IN A

+IN A

V–

V+
OUT B

–IN B

+IN B

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7

8

OP220

Dual Micropower

+IN A

V–

+IN B

–IN B

–IN A
OUT A

V+

OUT B

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a

FEATURES
Excellent TCV
Low Input Offset Voltage: 150 ␮V Max
Low Supply Current: 100 ␮A
Single-Supply Operation: 5 V to 30 V
Low Input Offset Voltage Drift: 0.75 ␮V/ⴗC Max
High Open-Loop Gain: 2,000 V/mV
High PSRR: 3 ␮V/V
Low Input Bias Current: 12 nA
Wide Common-Mode Voltage Range: V– to Within

1.5 V of V+
Pin Compatible with 1458, LM158, and LM2904
Available in Die Form

GENERAL DESCRIPTION

The OP220 is a monolithic dual operational amplifier that can
be used either in single or dual supply operation. The low offset
voltage and input offset voltage tracking as low as 1.0 mV/∞C,
make this the first micropower precision dual operational amplifier.

The excellent specifications of the individual amplifiers com­bined with the tight matching and temperature tracking between
channels provides high performance in instrumentation ampli­fier designs. The individual amplifiers feature extremely low
input offset voltage, low offset voltage drift, low noise voltage,
and low bias current. They are fully compensated and protected.

Matching between channels is provided on all critical parameters
including input offset voltage, tracking of offset voltage versus
temperature, noninverting bias currents, and common-mode
rejection ratios.

Match: 2 ␮V/ⴗC Max

OS

Operational Amplifier

PIN CONFIGURATIONS

8-Lead Hermatic Dip

(Z-Suffix)

8-Lead SOIC

(S-Suffix)

OP220

8-Lead Plastic Dip

(P-Suffix)

OUT A

1

OP220

–IN A

2

+IN A

3

V–

4

8-Lead TO-99

(J-Suffix)

8
7

6

5

V+
OUT B

–IN B

+IN B

V+

Q11

Q27

Q28

OUTPUT

Q29

V–

Q3 Q4

–IN

+IN

Q1

Q5

NULL*

*ACESSIBLE IN CHIP FORM ONLY

REV. A

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.

Q2

Q7

Q6

Figure 1. Simplified Schematic

Q12

Q26

Q9

Q10

Q8

Q13

Q33

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] © Analog Devices, Inc., 2002

OP220–SPECIFICA TIONS

ELECTRICAL CHARACTERISTICS

Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Unit

Input Offset Voltage V
Input Offset Current I
Input Bias Current I
Input Voltage Range IVR V+ = 5 V, V– = 0 V 0/3.5 0/3.5 0/3.5 V

Common-Mode CMRR V+ = 5 V, V– = 0 V 90 100 85 90 75 85 dB
Rejection Ratio 0 V £ VCM £ 3.5 V

Power Supply PSRR V
Rejection Ratio V– = 0 V, V+ = 5 V to 30 V 6 18 18 57 57 180 mV/V

Large-Signal A
Voltage Gain RL = 100 kW,

Output Voltage V
Swing RL = 10 kW

Slew Rate* SR RL =25 kW 0.05 0.05 0.05 V/ms
Bandwidth BW A
Supply Current I

(Both Amplifiers) VS = ± 15 V, No Load 140 170 150 190 205 220 mA

OS

OS

B

VO

O

SY

VS = ± 2.5 V to ± 15 V 120 150 250 300 500 750 mV
VCM = 0 0.15 1.5 0.2 2 0.2 3.5 nA
VCM = 0 12 201325 1430nA

VS = ± 15 V –15/+13.5 –15/+13.5 –15/+13.5 V

VS = ± 15 V 95 100 90 95 80 90 dB
–15 V £ VCM £ +13.5 V

= ± 2.5 V to ± 15 V, 3 10 10 32 32 100 mV/V

S

V+ = 5 V, V– = 0 V, 500 1,000 500 800 300 500 V/mV
1 V £ VO £ 3.5 V

VS = ± 15 V, RL = 25 kW 1,000 2,000 1,000 2,000 800 1,600 V/mV
VO = ± 10 V

V+ = 5 V, V– = 0 V 0.7/4 0.7/4 0.8/4 V
VS = ± 15 V, RL = 25 kW±14 ± 14 ± 14 V

= 1, RL =25 kW 200 200 200 kHz

VCL

VS = ± 2.5 V, No Load 100 115 115 125 125 135 mA

(@ VS = ⴞ2.5 V to ⴞ15 V, TA = 25ⴗC, unless otherwise noted.)

OP220A/E OP220F OP220C/G

*Sample tested.

(Vs = ⴞ2.5 V to ⴞ15 V, –55ⴗC £ TA £ +125ⴗC for OP220A/C, –25ⴗC £ TA £ +85ⴗC for OP220E/F,

ELECTRICAL CHARACTERISTICS

Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Unit

Input Offset Voltage TCV
Drift*

Input Offset Voltage V
Input Offset Current I
Input Bias Current I
Input Voltage Range IVR V+ = 5 V, V– = 0 V 0/3.2 0/3.2 0/3.2 V

Common-Mode CMRR V+ = 5 V, V– = 0 V 86 90 80 85 70 80 dB
Rejection Ratio 0 V £ VCM £ 3.2 V

Power Supply PSRR VS = ± 2.5 V to ± 15 V, 6 18 18 57 57 180 mV/V
Rejection Ratio V– = 0 V, V+ = 5 V to 30 V 10 32 32 100 100 320 mV/V

Large-Signal A
Voltage Gain VO = ± 10 V

Output Voltage V
Swing RL = 20 kW

Supply Current I
(Both Amplifiers) VS = ± 15 V, No Load 190 250 200 280 275 330 mA

OS

OS

B

VO

O

SY

VS = ± 15 V 0.75 1.5 1.2 2 2 3 mV/∞C

OS

VCM = 0 0.5 2 0.6 2.5 0.6 5 nA
VCM = 0 12 251330 1440nA

VS = ± 15 V –15/+13.2 –15/+13.2 –15/+13.2 V

VS = ± 15 V 90 958590 7585 dB
–15 V £ VCM £ +13.2 V

VS = ± 15 V, RL = 50 kW 500 1,000 500 800 400 500 V/mV

V+ = 5 V, V– = 0 V 0.9/3.8 0.9/3.8 1.0/3.8 V
VS = ± 15 V, RL = 50 kW±13.6 ± 13.6 ± 13.6 V

VS = ± 2.5 V, No Load 135 170 155 185 170 210 mA

–40ⴗC £ TA £ +85ⴗC for OP220G unless otherwise noted.)

OP220A/E OP220F OP220C/G

200 300 400 500 1,000 1,300 mV

*Sample tested.

–2–

REV. A

OP220

MATCHING CHARACTERISTICS

(@ VS = ⴞ15 V, TA = 25ⴗC, unless otherwise noted.)

OP220A/E OP220F OP220C/G

Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Unit

Input Offset Voltage DV

OS

150 300 250 500 300 800 mV

Match
Average Noninverting I

+V

B

= 0 10 2015252030nA

CM

Bias Current
Noninverting Offset I

+VCM = 0 0.7 1.5 1 2 1.4 2.5 nA

OS

Current
Common-Mode DCMRR VCM = –15 V to +13.5 V 92 100 87 95 72 85 dB

Rejection Ratio Match
Power Supply DPSRR VS = ± 2.5 V to ± 15 V, 6 14 18 44 57 140 mV/V

Rejection Ratio Match

NOTES

1

DCMRR is 20 log10 VCM/DCME, where VCM is the voltage applied to both noninverting inputs and D CME is the difference in common-mode input-referred error.

2

DPSRR is

3

Sample tested.

Input Referred Differential Error

DV

1

2

S

.

(Vs = ⴞ15 V, –55ⴗC £ TA £ +125ⴗC for OP220A/C, –25ⴗC £ TA £ +85ⴗC for OP220E/F,

MATCHING CHARACTERISTICS

Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Unit

Input Offset Voltage DV
Match

Input Offset Voltage TCDV

1

Tracking
Average Noninverting IB+V

Bias Current
Average Drift of TCIB+VCM = 0 15 2515303050pA/∞C

Noninverting
Bias Current

1

Noninverting Offset IOS+VCM = 0 0.7 2 1 2.5 2.5 5 nA
Current

Average Drift of TCIOS+VCM = 0 7 15 12 22.5 15 30 pA/∞C
Noninverting Offset

1

Current
Common-Mode DCMRR VCM = –15 V to +13 V 87 96 82 96 72 80 dB

Rejection Ratio Match
Power Supply DPSRR VS = ± 2.5 V to ± 15 V, 10 26 30 78 57 250 mV/V

Rejection Ratio Match

NOTES

1

Sample tested.

2

DCMRR is 20 log10 VCM/DCME, where VCM is the voltage applied to both noninverting inputs and D CME is the difference in common-mode input-referred error.

3

DPSRR is

Input Referred Differential Error

DV

OS

OS

= 0 10 2515302240nA

CM

2

3

S

.

–40ⴗC £ TA £ +85ⴗC for OP220G unless otherwise noted. Grades E, F are sample tested.)

OP220A/E OP220F OP220C/G

250 500 400 800 800 1,800 mV

12 1.5 3 1.5 5 mV/∞C

TYPICAL ELECTRICAL CHARACTERISTICS

(@ Vs = ⴞ15 V, TA = 25ⴗC, unless otherwise noted.)

OP220N

Parameter Symbol Conditions Typical Unit

Average Input Offset Voltage Drift TCV
Large-Signal Voltage Gain A

VO

REV. A

OS

RL = 25 kW 2000 V/mV

–3–

1.5 mV/∞C

OP220–SPECIFICA TIONS

ABSOLUTE MAXIMUM RATINGS*

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V

Differential Input Voltage . . . . . . . . . .30 V or Supply Voltage

Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . Supply Voltage

Output Short-Circuit Duration Indefinite

Storage Temperature Range . . . . . . . . . . . . –65∞C to +150∞C

Junction Temperature (T

) . . . . . . . . . . . . . –65∞C to +150∞C

i

Operating Temperature Range

OP220A/OP220C . . . . . . . . . . . . . . . . . . –55∞C to +125∞C

OP220E/OP220F . . . . . . . . . . . . . . . . . . . . –25∞C to +85∞C

OP220G . . . . . . . . . . . . . . . . . . . . . . . . . . . –40∞C to +85∞C

Lead Temperature Range (Soldering, 60 sec) . . . . . . . . 300∞C

NOTES
*Absolute Maximum Ratings apply to packaged parts, unless otherwise noted.

DIE CHARACTERISTICS

1. INVERTING INPUT (A)

2. NONINVERTING INPUT (A)

3. BALANCE (A)

4. V–

5. BALANCE (B)

6. NONINVERTING INPUT (B)

7. INVERTING INPUT (B)

8. BALANCE (B)

9. V+

10. OUT (B)

11. V+

12. OUT (A)

13. V+

DIE SIZE 0.097 INCH ⴛ 0.063 INCH, 6111 SQ. MILS

(2.464 mm ⴛ 1.600 mm, 3.94 SQ. mm)

NOTE : ALL V+ PADS ARE INTERNALL CONNECTED

14. BALANCE (A)

Package Type ␪

* ␪

JA

JC

Unit

8-Lead Hermetic DIP (Q) 148 16 ∞C/W
8-Lead Plastic DIP (N) 103 43 ∞C/W
8-Lead SOL (RN) 158 43 ∞C/W
TO-99 (H) 150 18 ∞C/W

*␪

is specified for worst-case mounting conditions, i.e., ␪JA is specified for device

JA

in socket for CERDIP and PDIP packages; ␪JA is specified for device soldered to
printed circuit board for SO packages.

ORDERING GUIDE

TA = 25∞C Package Options Operating

MAX Temperature

V

OS

(mV) CERDIP Plastic TO-99 Range

150 OP220AZ* MIL
150 OP220EZ* IND
300 OP220FZ* IND
750 OP220CJ* MIL
750 OP220GZ* OP220GP* XIND
750 OP220GS XIND

For military processed devices, please refer to the Mil Standard
Data Sheet
OP220AJ/883*.

*Not for new design. Obsolete April 2002.

WAFER TEST LIMITS

(@ VS = ⴞ2.5 V, to ⴞ15 V, TA = 25ⴗC, unless otherwise noted.)

OP220N

Parameter Symbol Conditions Limit Unit

Input Offset Voltage V
Input Offset Voltage Match ⌬V
Input Offset Current I
Input Bias Current I

OS

B

OS

OS

VCM = 0 2 nA Max
VCM = 0 25 nA Max

200 mV Max
300 mV Max

Input Voltage Range IVR VS = ± 15 V –15/13.5 V Min
Common-Mode CMRR V– = 0 V, V+ = 5 V, 0 V £ V

£ 3.5 V 88 dB Min

CM

Rejection Ratio –15 V £ VCM £ 13.5 V, VS = ± 15 V 93
Power Supply PSRR V

= ± 2.5 V to ± 15 V 12.5 mV/V Max

S

Rejection Ratio V– = 0 V, V+ = 5 V to 30 V 22.5
Large-Signal A

VO

RL = 25 kW, VS = ± 15 V 1000 V/mV Min

Voltage Gain VO = ± 10 V
Output Voltage Swing V

O

V+ = 5 V, V– = 0 V, RL = 10 kW 0.7/4 V Min
VS = ± 15 V, RL = 25 kW±14

Supply Current I

SY

VS = ± 2.5 V, No Load 125 mA Max

(Both Amplifiers) VS = ± 15 V, No Load 190

NOTE

Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packing is not guaranteed
for standard product dice. Consult factory to negotiate specifications based on die lot qualification through sample lot assembly and testing.

–4–

REV. A