Analog Devices AD670AD, AD670SD, AD670KN, AD670JP, AD670JN, AD670BD Datasheet
Specifications and Main Features
Frequently Asked Questions
User Manual
Low Cost Signal
a
FEATURES
Complete 8-Bit Signal Conditioning A/D Converter
Including Instrumentation Amp and Reference
Microprocessor Bus Interface
10 ms Conversion Speed
Flexible Input Stage: Instrumentation Amp Front End
Provides Differential Inputs and High Common-Mode
Rejection
No User Trims Required
No Missing Codes Over Temperature
Single +5 V Supply Operation
Convenient Input Ranges
20-Pin DIP or Surface-Mount Package
Low Cost Monolithic Construction
MIL-STD-883B Compliant Versions Available
GENERAL DESCRIPTION
The AD670 is a complete 8-bit signal conditioning analogto-digital converter. It consists of an instrumentation amplifier
front end along with a DAC, comparator, successive approximation register (SAR), precision voltage reference, and a threestate output buffer on a single monolithic chip. No external
components or user trims are required to interface, with full
accuracy, an analog system to an 8-bit data bus. The AD670
will operate on the +5 V system supply. The input stage provides differential inputs with excellent common-mode rejection
and allows direct interface to a variety of transducers.
The device is configured with input scaling resistors to permit
two input ranges: 0 mV to 255 mV (1 mV/LSB) and 0 to 2.55 V
(10 mV/LSB). The AD670 can be configured for both unipolar
and bipolar inputs over these ranges. The differential inputs and
common-mode rejection of this front end are useful in applications such as conversion of transducer signals superimposed on
common-mode voltages.
The AD670 incorporates advanced circuit design and proven
processing technology. The successive approximation function
is implemented with I
SiCr resistors provide the stability required to prevent missing
codes over the entire operating temperature range while laser
wafer trimming of the resistor ladder permits calibration of the
device to within ±1 LSB. Thus, no user trims for gain or offset
are required. Conversion time of the device is 10 µs.
The AD670 is available in four package types and five grades.
The J and K grades are specified over 0°C to +70°C and come
in 20-pin plastic DIP packages or 20-terminal PLCC packages.
The A and B grades (–40°C to +85°C) and the S grade (–55°C
to +125°C) come in 20-pin ceramic DIP packages.
2
L (integrated injection logic). Thin-film
Conditioning 8-Bit ADC
AD670
FUNCTIONAL BLOCK DIAGRAM
The S grade is also available with optional processing to
MIL-STD-883 in 20-pin ceramic DIP or 20-terminal LCC
packages. The Analog Devices Military Products Databook
should be consulted for detailed specifications.
PRODUCT HIGHLIGHTS
1. The AD670 is a complete 8-bit A/D including three-state
outputs and microprocessor control for direct connection to
8-bit data buses. No external components are required to
perform a conversion.
2. The flexible input stage features a differential instrumentation amp input with excellent common-mode rejection. This
allows direct interface to a variety of transducers without
preamplification.
3. No user trims are required for 8-bit accurate performance.
4. Operation from a single +5 V supply allows the AD670 to
run off of the microprocessor’s supply.
5. Four convenient input ranges (two unipolar and two bipolar)
are available through internal scaling resistors: 0 mV to
255 mV (1 mV/LSB) and 0 V to 2.55 V (10 mV/LSB).
6. Software control of the output mode is provided. The user
can easily select unipolar or bipolar inputs and binary or 2s
complement output codes.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700Fax: 617/326-8703
AD670–SPECIFICATIONS
(@ VCC = +5 V and
+258C,
unless otherwise noted)
ModelAD670JAD670K
MinTypMaxMinTypMaxUnits
OPERATING TEMPERATURE RANGE0+700+70°C
RESOLUTION88Bit
CONVERSION TIME1010µs
RELATIVE ACCURACY61/261/4LSB
T
to T
MIN
MAX
DIFFERENTIAL LINEARITY ERROR
T
to T
MIN
MAX
1
GUARANTEED NO MISSING CODES ALL GRADES
6l/261/2LSB
GAIN ACCURACY
@ +25°C61.560.75LSB
T
MIN
to T
MAX
62.061.0LSB
UNIPOLAR ZERO ERROR
@ +25°C61.560.75LSB
T
MIN
to T
MAX
62.061.0LSB
BIPOLAR ZERO ERROR
@ +25°C61.560.75LSB
T
MIN
to T
MAX
62.061.0LSB
ANALOG INPUT RANGES
DIFFERENTIAL (–VIN to +VIN)
Low Range0 to +2550 to +255mV
–128 to +127–128 to +127mV
High Range0 to +2.550 to +2.55V
–1.28 to +1.27–1.28 to +1.27V
ABSOLUTE (Inputs to Power GND)
Low Range T
High Range T
MIN
MIN
to T
to T
MAX
MAX
–0.150V
–1.50V
– 3.4–0.150V
CC
CC
–1.50V
– 3.4V
CC
CC
V
BIAS CURRENT (255 mV RANGE)
T
MIN
to T
MAX
200500200500nA
OFFSET CURRENT (255 mV RANGE)
T
MIN
to T
MAX
4020040200nA
2.55 V RANGE INPUT RESISTANCE8.012.08.012.0kΩ
2.55 V RANGE FULL-SCALE MATCH
+ AND – INPUT±1/2±1/2LSB
COMMON-MODE REJECTION
RATIO (255 mV RANGE)11LSB
COMMON-MODE REJECTION
RATIO (2.55 V RANGE)11LSB
POWER SUPPLY
Operating Range4.55.54.55.5V
Current I
CC
Rejection Ratio T
MIN
to T
MAX
30453045mA
0.0150.015% of FS/%
DIGITAL OUTPUTS
SINK CURRENT (V
T
to T
MIN
MAX
SOURCE CURRENT (V
T
to T
MIN
MAX
= 0.4 V)
OUT
= 2.4 V)
OUT
1.61.6mA
0.50.5mA
THREE-STATE LEAKAGE CURRENT640640µA
OUTPUT CAPACITANCE55pF
DIGITAL INPUT VOLTAGE
V
INL
V
INH
2.02.0V
0.80.8V
DIGITAL INPUT CURRENT
(0 ≤ VIN ≤ +5 V)
I
I
INL
INH
–100–100µA
+100+100µA
INPUT CAPACITANCE1010pF
NOTES
1
Tested at VCC = 4 5 V, 5.0 V and 5.5 V.
Specifications shown in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min and max specifications
are guaranteed although only those shown in boldface are tested on all production units.
Specifications subject to change without notice.
–2–
REV. A
AD670
ModelAD670AAD670BAD670S
MinTypMaxMinTypMaxMinTypMaxUnits
OPERATING TEMPERATURE RANGE–40+85–40+85–55+125°C
RESOLUTION888Bit
CONVERSION TIME101010µs
RELATIVE ACCURACY61/261/461/2LSB
T
to T
MIN
MAX
DIFFERENTIAL LINEARITY ERROR
T
to T
MIN
MAX
1
GAIN ACCURACY
@ +25°C61.560.7561.5LSB
T
to T
MIN
MAX
UNIPOLAR ZERO ERROR
@ +25°C61.060.561.0LSB
T
to T
MIN
MAX
BIPOLAR ZERO ERROR
@ +25°C61.060.561.0LSB
T
to T
MIN
MAX
ANALOG INPUT RANGES
DIFFERENTIAL ( –VIN to +VIN)
Low Range0 to +2550 to +2550 to +255mV
–128 to +127–128 to +127–128 to +127mV
High Range0 to +2.550 to +2.550 to +2.55V
–1.28 to +1.27–1.28 to +1.27–1.28 to +1.27V
ABSOLUTE (Inputs to Power GND)
Low Range T
High Range T
MIN
MIN
to T
to T
MAX
MAX
–0.150VCC – 3.5 –0.150V
–1.50V
BIAS CURRENT (255 mV RANGE)
T
MIN
to T
MAX
200500200500200750nA
OFFSET CURRENT (255 mV RANGE)
T
MIN
to T
MAX
402004020040200nA
2.55 V RANGE INPUT RESISTANCE8.012.08.012.08.012.0kΩ
2.55 V RANGE FULL-SCALE MATCH
+ AND – INPUT±1/2±1/2±1/2LSB
COMMON-MODE REJECTION
RATIO (255 mV RANGE)111LSB
COMMON-MODE REJECTION
RATIO (2.55 V RANGE)111LSB
POWER SUPPLY
Operating Range4.55.54.55.54.755.5V
Current I
CC
Rejection Ratio T
MIN
to T
MAX
304530453045mA
DIGITAL OUTPUTS
SINK CURRENT (V
T
to T
MIN
MAX
SOURCE CURRENT (V
T
to T
MIN
MAX
= 0.4 V)
OUT
= 2.4 V)
OUT
1.61.61.6mA
0.50.50.5mA
THREE-STATE LEAKAGE CURRENT640640640µA
OUTPUT CAPACITANCE555pF
DIGITAL INPUT VOLTAGE
V
INL
V
INH
2.02.02.0V
DIGITAL INPUT CURRENT
(0 ≤ VIN ≤ +5 V)
I
I
INL
INH
–100–100–100µA
INPUT CAPACITANCE101010pF
NOTES
1
Tested at VCC = 4.5 V, 5.0 V and 5.5 V for A, B grades; 4.75 V, 5.0 V and 5.5 V for S grade.
Specifications shown in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min and max specifications
are guaranteed, although only those shown in boldface are tested on all production units.
Specifications subject to change without notice.
61/261/261LSB
GUARANTEED NO MISSING CODES ALL GRADES
62.561.562.5LSB
62.061.062.0LSB
62.061.062.0LSB
CC
–1.50V
– 3.5 –0.150V
CC
CC
–1.50V
– 3.5 V
CC
CC
V
0.0150.0150.015% of FS/%
0.80.80.7V
+100+100+ 100µA
REV. A
–3–
AD670
Figure 1. AD670 Block Diagram and Terminal
Configuration (AII Packages)
ABSOLUTE MAXIMUM RATINGS*
VCC to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to +7.5 V
Digital Inputs (Pins 11–15) . . . . . . . . . . . –0.5 V to V
Digital Outputs (Pins 1–9) . Momentary Short to V
Analog Inputs (Pins 16–19) . . . . . . . . . . . . . . . –30 V to +30 V
Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . +300°C
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at them or any other conditions above those indicated in
the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
AD670JN0°C to +70°C±1/2 LSB±1.5 LSBPlastic DIP (N-20)
AD670JP0°C to +70°C±1/2 LSB±1.5 LSBPLCC (P-20A)
AD670KN0°C to +70°C±1/4 LSB±0.75 LSBPlastic DIP (N-20)
AD670KP0°C to +70°C±1/4 LSB±0.75 LSBPLCC (P-20A)
AD670AD–40°C to +85°C±1/2 LSB±1.5 LSBCeramic DIP (D-20)
AD670BD–40°C to +85°C±1/4 LSB±0.75 LSBCeramic DIP (D-20)
AD670SD–55°C to +125°C±1/2 LSB±1.5 LSBCeramic DIP (D-20)
NOTES
1
For details on grade and package offerings screened in accordance with MIL-STD-883 refer to the Analog Devices
Military Products Databook.
2
D = Ceramic DIP; N = Plastic DIP; P = Plastic Leaded Chip Carrier.
CIRCUIT OPERATION/FUNCTIONAL DESCRIPTION
The AD670 is a functionally complete 8-bit signal conditioning
A/D converter with microprocessor compatibility. The input
section uses an instrumentation amplifier to accomplish the
voltage to current conversion. This front end provides a high
impedance, low bias current differential amplifier. The common-mode range allows the user to directly interface the device
to a variety of transducers.
The AID conversions are controlled by R/
R/
W line directs the converter to read or start a conversion. A
minimum write/start pulse of 300 ns is required on either
W, CS, and CE. The
CE or
CS. The STATUS line goes high, indicating that a conversion is
in process. The conversion thus begun, the internal 8-bit DAC
is sequenced from MSB to LSB using a novel successive approximation technique. In conventional designs, the DAC is
stepped through the bits by a clock. This can be thought of as a
static design since the speed at which the DAC is sequenced is
determined solely by the clock. No clock is used in the AD670.
Instead, a “dynamic SAR” is created consisting of a string of inverters with taps along the delay line. Sections of the delay line
between taps act as one shots. The pulses are used to set and reset the DAC’s bits and strobe the comparator. When strobed,
the comparator then determines whether the addition of each
successively weighted bit current causes the DAC current sum
to be greater or less than the input current. If the sum is less,
the bit is turned off. After all bits are tested, the SAR holds an
8-bit code representing the input signal to within 1/2 LSB
2
accuracy. Ease of implementation and reduced dependence on
process related variables make this an attractive approach to a
successive approximation design.
The SAR provides an end-of-conversion signal to the control
logic which then brings the STATUS line low. Data outputs remain in a high impedance state until R/
W is brought high with
CE and CS low and allows the converter to be read. Bringing
CE or CS high during the valid data period ends the read cycle.
The output buffers cannot be enabled during a conversion. Any
convert start commands will be ignored until the conversion
cycle is completed; once a conversion cycle has been started it
cannot be stopped or restarted.
The AD670 provides the user with a great deal of flexibility by
offering two input spans and formats and a choice of output
codes. Input format and input range can each be selected. The
BPO/
UPO pin controls a switch which injects a bipolar offset
current of a value equal to the MSB less 1/2 LSB into the summing node of the comparator to offset the DAC output. Two
precision 10 to 1 attenuators are included on board to provide
input range selection of 0 V to 2.55 V or 0 mV to 255 mV. Additional ranges of –1.28 V to 1.27 V and –128 mV to 127 mV
are possible if the BPO/
UPO switch is high when the conversion
is started. Finally, output coding can be chosen using the FORMAT pin when the conversion is started. In the bipolar mode
and with a Logic 1 on FORMAT, the output is in two’s complement; with a Logic 0, the output is offset binary.
–4–
REV. A
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