Analog Devices AD6411 Datasheet

a

LNA

PA

RSSI

RX
DATA

TX
DATA

AD6411

PLL

DEMODULATOR

PLL

VCO

CONTROL

INTERFACE

PFD

DECT RF Transceiver

AD6411

FEATURES
Fully Compliant with DECT Specifications
Single IC DECT Radio
Integrated UHF VCO (External Resonator)
Integrated Synthesizer Supporting Extended Frequency

Allocation
Built-In Supply Regulation
Direct VCO Modulation for DECT Transmit Path
PLL-Based Demodulator
Use with Low Cost Plastic Packaged SAW Filters
Ultralow Power Design
Operates from +3.0 V to +5.5 V Battery
User-Selectable Power-Down Modes
Small 48-Lead LQFP Package

APPLICATIONS
DECT Cordless Telephones
DECT-Based Wireless Local Loop Systems
DECT-Based Wireless Data Systems

DESCRIPTION

The AD6411 provides the complete transmit and receive RF
signal processing necessary to implement a digital wireless
transceiver based on the Digital Enhanced Cordless Telecom­munications (DECT) standard.

The AD6411’s receive signal path consists of a mixer, IF ampli­fiers and PLL demodulator. The low noise, high intercept mixer
is a development of the doubly-balanced Gilbert-Cell type. It
has a nominal –16 dBm input-referred 1 dB compression point
and a –8 dBm input referred third-order intercept. The limiter
amplifier provides sufficient gain to drive the PLL demodulator,
which provides selectable analog or sliced outputs. The RSSI
output provides a voltage proportional to the receive signal
strength. It measures nearly 100 dB IF signal strength range
with 14 mV/dB gain scaling.

FUNCTIONAL BLOCK DIAGRAM

The transmit path accepts baseband data, which is filtered and
applied to the VCO directly. The VCO operates at half the RF
carrier frequency, and is doubled to avoid pulling due to leakage
from the output.

An on-chip PLL frequency synthesizer provides channel selec­tion. Operating modes are selected either through a serial bus or
asynchronous control pins. This allows compatibility with most
of the available DECT baseband controller ASICs.

The AD6411 is packaged in a 48-lead LQFP.

REV. 0

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] World Wide Web Site: http://www.analog.com
Fax: [phone] © Analog Devices, Inc., 1998

AD6411–SPECIFICATIONS

(TA = 25ⴗC, 3.0 V < V

< 5.5 V unless otherwise noted)

BAT

Parameter Conditions Min Typ Max Units

RECEIVE RF MIXER

RF Input Frequency 1880 to

1930 MHz

Power Gain Z
Input 1 dB Compression Point Z
Input Third-Order Intercept Z
SSB Noise Figure Z

SOURCE

SOURCE

SOURCE

SOURCE

= 50 Ω, Z
= 50 Ω, Z
= 50 Ω, Z
= 50 Ω, Z

= 200 Ω 15 19 21 dB

LOAD

= 200 Ω –21 –16 dBm

LOAD

= 200 Ω –8 dBm

LOAD

= 200 Ω 11 dB

LOAD

Output VSWR 100 MHz–120 MHz 1.5:1

Output Impedance 200 Ω
Input Impedance 50 Ω

RX IF AMPLIFIERS

Differential Input Impedance 200 Ω

Input VSWR Input Power < –11 dBm 1.5:1
IF Noise Figure Z

= 200 Ω Differential 6 dB

SOURCE

RSSI

RSSI Upper Limit Z
RSSI Lower Limit Z

= 200 Ω Differential –5 +3 dBm

SOURCE

= 200 Ω Differential –95 dBm

SOURCE

RSSI High Level Voltage Input Power = 0 dBm (at IF Input) 1.7 V
RSSI Low Level Voltage Input Power = –90 dBm (at IF Input) 0.3 V
RSSI Slope –90 dBm < Input Power < 0 dBm (at IF Input) 14 mV/dB
RSSI Output Impedance V

= 0.3 V 700 Ω

RSSI

RSSI Output Response Time Settling to 95% Value for a 40 dB Input Step,

20 pF External Load 2 µs

PLL DEMODULATOR

PLL Demodulator Phase Detector Gain @ 90 Degree Relative Phase 80 115 150 µA/rad

Leakage Current at COFF Charge Pump Disabled 100 pA
Recommended External VCO Gain 1.152 MHz/V
Demodulator Gain VCO Gain Set to 1.152 MHz/V 1.736 V/MHz
Demodulator Linearity THD for FM Tone @ 576 kHz,

Peak Deviation 288 kHz –30 dBc

VOLTAGE REFERENCE

Output Voltage 1.3 1.37 1.44 V

Output Current 100 µA

TRANSMIT SECTION

Output Power Z

= 50 Ω –3 +1 +4 dBm

L

Harmonically Related Spurii At 0.5 × DECT_Tx: (940 MHz–950 MHz) –10 dBc

At 1.5 × DECT_Tx: (2820 MHz–2850 MHz) –20 dBc

Other Spurii 100 MHz–3000 MHz, Outside DECT Band

1 MHz Measurement Bandwidth –73 dBc

Output Phase Noise With UHF Resonator Qu > 30

1.2 MHz –120 dBc/Hz

3.0 MHz –130 dBc/Hz
>4.7 MHz –135 dBc/Hz
VCO Operating Frequency Range With Suitable External Resonator 700 1200 MHz
Oscillator Push Using On-Chip Regulator, 250 mV V

BAT

Step Change with 5 µs Rise/Fall Time 6 kHz

Oscillator Pull ∆VSWR = 2:1 Any Phase 55 kHz

SYNTHESIZER

Reference Input Impedance >5 kΩ

Reference Input Level 100 1000 mV p-p
Reference Input Frequency 10 20 MHz
VCO Signal Input Range 700 1200 MHz
Charge Pump Current – “Up” Voltage On Loop Filter (Pin 38) = 1.4 V –1.30 1.0 –0.77 mA
Charge Pump Current – “Down” Voltage On Loop Filter (Pin 38) = 1.4 V 0.66 1.0 1.15 mA

Charge Pump Leakage Output Disabled <±1nA

BSW Output “High” Voltage at I

< = 2 mA 2.5 V

LOAD

–2– REV. 0

AD6411

Parameter Conditions Min Typ Max Units

VOLTAGE REGULATORS (VS1, VS2)

Regulated Voltage Output I
Dropout Voltage I

Load Regulation VS1: 10 mA < I

Line Transient Response I

Line Rejection I

Power Supply Rejection DC-1 MHz 35 dB

POWER CONSUMPTION

Supply Voltage V

All Off Mode <1 µA
Standby Mode 100 200 400 µA

Prior to TX Slot 52 60 mA
Active TX Slot 52 60 mA
Prior to RX Slot 15 20 25 mA
Active RX Slot (Synthesizer Dividers On, Charge Pump Off) 45 57 75 mA

OPERATING TEMPERATURE RANGE –25 +85 °C

= 60 mA max 2.675 2.725 2.825 V

LOAD

= 60 mA; BCW68F or

LOAD

Equivalent Pass Transistor 150 mV

< 60 mA

LOAD

VS2: 1 mA < I

= 10 mA , ∆V

LOAD

< 15 mA 20 mV

LOAD

= 250 mV,

BAT

Rise/Fall Time = 2 µs 1.5 mV

= 60 mA, ∆V

LOAD

= 250 mV,

BAT

Static Change 0.5 mV

BAT

3.0 5.5 V

ABSOLUTE MAXIMUM RATINGS

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5.5 V

Internal Power Dissipation

2

. . . . . . . . . . . . . . . . . . . . 600 mW

1

PIN CONFIGURATION

48-Lead LQFP (ST-48)

Operating Temperature Range . . . . . . . . . . . –25°C to +85°C

Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C

Lead Temperature, Soldering 60 sec . . . . . . . . . . . . . .+300°C

NOTES

1

Stresses above those listed under Absolute Maximum Ratings may cause perma-

nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended rating conditions for extended periods may affect device
reliability.

2

Thermal Characteristics: 48-lead LQFP package: θJA = +126°C/W.

ORDERING GUIDE

Temperature Package Package

Model Range Description Option

AD6411AST –25°C to +85°C 48-Lead Plastic LQFP ST-48

REF

TX

VCCDM

SFS

ENAB
COFF

DMR

IFLF

IFCP

IFVCO

VREF

GND

DEMOD DATA

1
2

3
4

5
6
7

8
9

10
11
12

EN

DATA

CLK

48 47 46 45 44 39 38 3743 42 41 40

PIN 1
IDENTIFIER

13 14 15 16 17 18 19 20 21 22 23 24

GND

RSSI

VCCIF2

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD6411 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.

BSW

VF2

VBAT1

AD6411

TOP VIEW

(Not to Scale)

IFIN

GND

IFINB

WARNING!

VCCVCO

VCO

VS1

VCCIF1

GND

VCCPD

VCOB

LF

36

GND

35

VCCTX

34

GND

33

GND

32

TXOP

31

GND

30

RX

29

GND

28

RFIN

27

GND

26

VCCRX

25

GND

VF1

ENAB

MXOP

VBAT2

SYN

ESD SENSITIVE DEVICE

ENAB

–3–REV. 0

AD6411

PIN FUNCTION DESCRIPTIONS

Pin No. Label Description Type Comments

1 REF DECT Reference Clock Input Input

2 SFS S-Field Sample Input HIGH = Sample; LOW = Hold

3 DEMOD_DATA Demodulator Output OR Sliced Demodulator Output Mode Controlled by DSD Bit in

Output Control Register

4 TX_ENAB Transmit Section Power Control Input Input Active-High or Active-Low Set by

TSB Bit in Setup Word

5 COFF Demodulator Offset Capacitor Output Connect to External Capacitor

6 DMR Input for IF PLL Loop Filter Voltage after Data Filter Input

7 IFLF Drive for IF PLL Active Loop Filter Output

8 IFCP Virtual Ground for IF PLL Active Loop Filter Input

9 IFVCO External Resonator for Demodulator VCO Input

10 VREF Voltage Reference Output Output 1.3 V; Can Be Used for A/D Converter

Reference in Soft-Decision Applications

11, 15, 18,
25, 27, 29,
31, 33, 34,
36, 39 GND Ground Power

12 VCCDM PLL Demodulator Supply Power Normally Connected to VS1

13 RSSI Receive Signal Strength Indicator Output Output

14 VCCIF2 IF Supply 2 Power Normally Connected to VS1

16 IFINB IF Input Input Balanced Input from IF SAW Filter

17 IFIN IF Input Input Balanced Input from IF SAW Filter

19 VCCIF1 IF Supply 1 Power Normally Connected to VS1

20 VS1 Regulator Sense Input Connect to Collector of VS1 Pass Device

21 VF1 Regulator Force Output Connect to Base of VS1 Pass Device

22 SYN_ENAB Synthesizer Section Power Control Input Input Active-High or Active-Low Set by

SSB Bit in Setup Word

23 VBAT2 Connect to Battery Power

24 MXOP Receive Mixer Output Output

26 VCCRX Receive RF Supply Power Normally Connected to VS1

28 RFIN Receive Mixer Input Input

30 RX_ENAB Receive Section Power Control Input Input Active-High or Active-Low Set by RSB

Bit in Setup Word

32 TXOP Transmit Output Output Open Collector Output

35 VCCTX Transmit Supply Power Normally Connected to VS1

37 VCCPD Phase Detector and Charge Pump Supply Power Normally Connected to VS1

38 LF Loop Filter (from Charge Pump Output) Output

40 VCOB UHF Oscillator Input VCO Tank Circuit

41 VCCVCO Supply for Second Regulator Sense Power Connect to Collector of VS2 Pass De vice

42 VCO UHF Oscillator Input VCO Tank Circuit

43 BSW Resonator Band Switch Output Output Controls Tank Circuit Band Segment

44 VF2 Regulator Force Output Connect to Base of VS2 Pass Device

45 VBAT1 Connect to Battery Power

46 EN 3-Wire Bus Enable Input

47 DATA 3-Wire Bus Data Input

48 CLK 3-Wire Bus Clock Input

–4– REV. 0