ALTERA Cyclone III Data sheet

July 2012 CIII52001-3.5
CIII52001-3.5
1. Cyclone III Device Datasheet
This chapter describes the electric characteristics, switching characteristics, and I/O timing for Cyclone

Electrical Characteristics

The following sections provide information about the absolute maximum ratings, recommended operating conditions, DC characteristics, and other specifications for Cyclone III devices.

Operating Conditions

When Cyclone III devices are implemented in a system, they are rated according to a set of defined parameters. To maintain the highest possible performance and reliability of Cyclone III devices, system designers must consider the operating requirements in this document. Cyclone III devices are offered in commercial, industrial, and automotive grades. Commercial devices are offered in –6 (fastest), –7, and –8 speed grades. Industrial and automotive devices are offered only in –7 speed grade.
1 In this chapter, a prefix associated with the operating temperature range is attached to
the speed grades; commercial with “C” prefix, industrial with “I” prefix, and automotive with “A” prefix. Commercial devices are therefore indicated as C6, C7, and C8 per respective speed grades. Industrial and automotive devices are indicated as I7 and A7, respectively.
®
III devices. A glossary is also included for your reference.

Absolute Maximum Ratings

Absolute maximum ratings define the maximum operating conditions for Cyclone III devices. The values are based on experiments conducted with the device and theoretical modeling of breakdown and damage mechanisms. The functional operation of the device is not implied at these conditions. Tabl e 1– 1 lists the absolute maximum ratings for Cyclone III devices.
© 2012 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as trademarks or service marks are the property of their respective holders as described at www.altera.com/common/legal.html. Altera warrants performance of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services.
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1–2 Chapter 1: Cyclone III Device Datasheet
Electrical Characteristics
1 Conditions beyond those listed in Table 1–1 cause permanent damage to the device.
Additionally, device operation at the absolute maximum ratings for extended periods of time has adverse effects on the device.
Table 1–1. Cyclone III Devices Absolute Maximum Ratings
(1)
Symbol Parameter Min Max Unit
V
CCINT
V
CCIO
V
CCA
V
CCD_PLL
V
I
I
OUT
V
ESDHBM
V
ESDCDM
T
STG
T
J
Note to Tab le 1– 1:
(1) Supply voltage specifications apply to voltage readings taken at the device pins with respect to ground, not at the
Supply voltage for internal logic –0.5 1.8 V
Supply voltage for output buffers –0.5 3.9 V
Supply voltage (analog) for phase-locked loop (PLL) regulator
–0.5 3.75 V
Supply voltage (digital) for PLL –0.5 1.8 V
DC input voltage –0.5 3.95 V
DC output current, per pin –25 40 mA
Electrostatic discharge voltage using the human body model
Electrostatic discharge voltage using the charged device model
±2000 V
±500 V
Storage temperature –65 150 °C
Operating junction temperature –40 125 °C
power supply.
Maximum Allowed Overshoot or Undershoot Voltage
During transitions, input signals may overshoot to the voltage listed in Ta ble 1 –2 and undershoot to –2.0 V for a magnitude of currents less than 100 mA and for periods shorter than 20 ns. Tab le 1– 2 lists the maximum allowed input overshoot voltage and the duration of the overshoot voltage as a percentage over the lifetime of the device. The maximum allowed overshoot duration is specified as percentage of high-time over the lifetime of the device.
Cyclone III Device Handbook July 2012 Altera Corporation Volume 2
Chapter 1: Cyclone III Device Datasheet 1–3
3.3 V
4.1 V
4.2 V
T
ΔT
Electrical Characteristics
1 A DC signal is equivalent to 100% duty cycle. For example, a signal that overshoots to
4.2 V can only be at 4.2 V for 10.74% over the lifetime of the device; for device lifetime of 10 years, this amounts to 10.74/10ths of a year.
Table 1–2. Cyclone III Devices Maximum Allowed Overshoot During Transitions over a 10-Year Time Frame
(1)
Symbol Parameter Condition Overshoot Duration as % of High Time Unit
= 3.95 V 100 %
V
I
V
= 4.0 V 95.67 %
I
V
= 4.05 V 55.24 %
I
V
= 4.10 V 31.97 %
I
V
= 4.15 V 18.52 %
I
V
= 4.20 V 10.74 %
I
V
= 4.25 V 6.23 %
V
i
AC Input
Voltage
Note to Tab le 1– 2:
(1) Figure 1–1 shows the methodology to determine the overshoot duration. In the example in Figure 1–1, overshoot
voltage is shown in red and is present on the input pin of the Cyclone III device at over 4.1 V but below 4.2 V. From
Table 1–1, for an overshoot of 4.1 V, the percentage of high time for the overshoot can be as high as 31.97% over
a 10-year period. Percentage of high time is calculated as ([delta T]/T) × 100. This 10-year period assumes the device is always turned on with 100% I/O toggle rate and 50% duty cycle signal. For lower I/O toggle rates and situations in which the device is in an idle state, lifetimes are increased.
I
V
= 4.30 V 3.62 %
I
V
= 4.35 V 2.1 %
I
V
= 4.40 V 1.22 %
I
V
= 4.45 V 0.71 %
I
V
= 4.50 V 0.41 %
I
V
= 4.60 V 0.14 %
I
V
= 4.70 V 0.047 %
I
Figure 1–1 shows the methodology to determine the overshoot duration.
Figure 1–1. Cyclone III Devices Overshoot Duration
July 2012 Altera Corporation Cyclone III Device Handbook
Volume 2
1–4 Chapter 1: Cyclone III Device Datasheet
Electrical Characteristics

Recommended Operating Conditions

This section lists the functional operation limits for AC and DC parameters for Cyclone III devices. The steady-state voltage and current values expected from Cyclone III devices are provided in Tab le 1 –3 . All supplies must be strictly monotonic without plateaus.
Table 1–3. Cyclone III Devices Recommended Operating Conditions
(1), (2)
Symbol Parameter Conditions Min Typ Max Unit
(3)
V
CCINT
V
CCIO
V
CCA
V
CCD_PLL
V
I
V
O
(3),
(3)
Supply voltage for internal logic 1.15 1.2 1.25 V
Supply voltage for output buffers, 3.3-V operation
Supply voltage for output buffers, 3.0-V operation
Supply voltage for output buffers, 2.5-V operation
(4)
Supply voltage for output buffers, 1.8-V operation
Supply voltage for output buffers, 1.5-V operation
Supply voltage for output buffers, 1.2-V operation
Supply (analog) voltage for PLL regulator
(3)
Supply (digital) voltage for PLL 1.15 1.2 1.25 V
3.135 3.3 3.465 V
2.85 3 3.15 V
2.375 2.5 2.625 V
1.71 1.8 1.89 V
1.425 1.5 1.575 V
1.14 1.2 1.26 V
2.375 2.5 2.625 V
Input voltage –0.5 3.6 V
Output voltage 0 V
CCIO
V
For commercial use 0 85 °C
T
J
Operating junction temperature
For industrial use –40 100 °C
For extended temperature –40 125 °C
For automotive use –40 125 °C
Standard power-on reset
(5)
t
RAMP
I
Diode
Notes to Table 1–3:
(1) V
CCIO
must be powered up and powered down at the same time.
(2) V
CCD_PLL
(3) The V (4) All input buffers are powered by the V (5) POR time for Standard POR ranges between 50–200 ms. Each individual power supply should reach the recommended operating range within
50 ms.
(6) POR time for Fast POR ranges between 3–9 ms. Each individual power supply should reach the recommended operating range within 3 ms.
Power supply ramp time
Magnitude of DC current across PCI-clamp diode when enabled
for all I/O banks must be powered up during device operation. All V
must always be connected to V
must rise monotonically.
CC
through a decoupling capacitor and ferrite bead.
CCINT
supply.
CCIO
(POR)
Fast POR
(6)
——10mA
pins must be powered to 2.5 V (even when PLLs are not used), and
CCA
50 µs 50 ms
50 µs 3 ms
Cyclone III Device Handbook July 2012 Altera Corporation Volume 2
Chapter 1: Cyclone III Device Datasheet 1–5
Electrical Characteristics

DC Characteristics

This section lists the I/O leakage current, pin capacitance, on-chip termination (OCT) tolerance, and bus hold specifications for Cyclone III devices.
Supply Current
Standby current is the current the device draws after the device is configured with no inputs or outputs toggling and no activity in the device. Use the Excel-based early power estimator (EPE) to get the supply current estimates for your design because these currents vary largely with the resources used. Tab le 1 –4 lists I/O pin leakage current for Cyclone III devices.
f For more information about power estimation tools, refer to the PowerPlay Early Power
Estimator User Guide and the PowerPlay Power Analysis chapter in the Quartus II
Handbook.
Table 1–4. Cyclone III Devices I/O Pin Leakage Current
Symbol Parameter Conditions Min Typ Max Unit
I
I
I
OZ
Notes to Table 1–4:
(1) This value is specified for normal device operation. The value varies during device power-up. This applies for all
(2) 10 A I/O leakage current limit is applicable when the internal clamping diode is off. A higher current can be the
Input pin leakage current VI = 0 V to V
Tristated I/O pin leakage current
V
settings (3.3, 3.0, 2.5, 1.8, 1.5, and 1.2 V).
CCIO
observed when the diode is on.
V
Bus Hold
Bus hold retains the last valid logic state after the source driving it either enters the high impedance state or is removed. Each I/O pin has an option to enable bus hold in user mode. Bus hold is always disabled in configuration mode.
Tab le 1– 5 lists bus hold specifications for Cyclone III devices.
Table 1–5. Cyclone III Devices Bus Hold Parameter (Part 1 of 2)
Parameter Condition
Min Max Min Max Min Max Min Max Min Max Min Max
Bus-hold low, sustaining
> V
V
IN
IL
(maximum)
8 — 12 — 30—50—70—70—A
current
Bus-hold high, sustaining
< V
V
IN
IL
(minimum)
–8 –12 –30 –50 –70 –70 A
current
= 0 V to V
O
(1)
V
CCIO
(1), (2)
CCIOMAX
CCIOMAX
(V)
–10 10 A
–10 10 A
Unit1.2 1.5 1.8 2.5 3.0 3.3
July 2012 Altera Corporation Cyclone III Device Handbook
Volume 2
1–6 Chapter 1: Cyclone III Device Datasheet
Electrical Characteristics
Table 1–5. Cyclone III Devices Bus Hold Parameter (Part 2 of 2)
(1)
V
CCIO
Parameter Condition
Min Max Min Max Min Max Min Max Min Max Min Max
Bus-hold low, overdrive
0 V < V
IN
< V
125 175 200 300 500 500 A
CCIO
current
Bus-hold high, overdrive
0 V < V
IN
< V
–125 –175 –200 –300 –500 –500 A
CCIO
current
Bus-hold trip point
Note to Table 1–5:
(1) The bus-hold trip points are based on calculated input voltages from the JEDEC standard.
0.3 0.9 0.375 1.125 0.68 1.07 0.7 1.7 0.8 2 0.8 2 V
OCT Specifications
Tab le 1– 6 lists the variation of OCT without calibration across process, temperature,
and voltage.
(V)
Unit1.2 1.5 1.8 2.5 3.0 3.3
Table 1–6. Cyclone III Devices Series OCT without Calibration Specifications
Resistance Tolerance
Description V
CCIO
(V)
Commercial
Max
Industrial and Automotive
Max
Unit
3.0 ±30 ±40 %
2.5 ±30 ±40 %
Series OCT without calibration
1.8 +40 ±50 %
1.5 +50 ±50 %
1.2 +50 ±50 %
OCT calibration is automatically performed at device power-up for OCT enabled I/Os.
Tab le 1– 7 lists the OCT calibration accuracy at device power-up.
Table 1–7. Cyclone III Devices Series OCT with Calibration at Device Power-Up Specifications
Calibration Accuracy
Description V
CCIO
(V)
Commercial Max
Industrial and Automotive
Max
Unit
3.0 ±10 ±10 %
Series OCT with calibration at device power-up
2.5 ±10 ±10 %
1.8 ±10 ±10 %
1.5 ±10 ±10 %
1.2 ±10 ±10 %
Cyclone III Device Handbook July 2012 Altera Corporation Volume 2
Chapter 1: Cyclone III Device Datasheet 1–7
Electrical Characteristics
The OCT resistance may vary with the variation of temperature and voltage after calibration at device power-up. Use Table 1–8 and Equation 1–1 to determine the final OCT resistance considering the variations after calibration at device power-up.
Tab le 1– 8 lists the change percentage of the OCT resistance with voltage and
temperature.
Table 1–8. Cyclone III Devices OCT Variation After Calibration at Device Power-Up
Nominal Voltage dR/dT (%/°C) dR/dV (%/mV)
3.0 0.262 –0.026
2.5 0.234 –0.039
1.8 0.219 –0.086
1.5 0.199 –0.136
1.2 0.161 –0.288
Equation 1–1.
(1), (2), (3), (4), (5), (6)
RV = (V2 – V1) × 1000 × dR/dV
RT = (T2 – T1) × dR/dT
For Rx < 0; MFx = 1/ (|Rx|/100 + 1)
For Rx > 0; MFx = Rx/100 + 1
× MF
(11)
T
(12)
MF = MFV × MF
R
= R
final
initial
(7)
(8)
(9)
(10)
Notes to Equation 1–1:
(1) T2 is the final temperature.
is the initial temperature.
(2) T
1
(3) MF is multiplication factor. (4) R (5) R (6) Subscript × refers to both (7) R (8) R (9) dR/dT is the change percentage of resistance with temperature after calibration at device power-up. (10) dR/dV is the change percentage of resistance with voltage after calibration at device power-up. (11) V (12) V
is final resistance.
final
is initial resistance.
initial
and T.
V
is variation of resistance with voltage.
V
is variation of resistance with temperature.
T
is final voltage.
2
is the initial voltage.
1
July 2012 Altera Corporation Cyclone III Device Handbook
Volume 2
1–8 Chapter 1: Cyclone III Device Datasheet
Electrical Characteristics
Example 1–1 shows you the example to calculate the change of 50 I/O impedance
from 25°C at 3.0 V to 85°C at 3.15 V:
Example 1–1.
R
= (3.15 – 3) × 1000 × –0.026 = –3.83
V
R
= (85 – 25) × 0.262 = 15.72
T
Because R
MF
Because R
MF
is negative,
V
= 1 / (3.83/100 + 1) = 0.963
V
is positive,
T
= 15.72/100 + 1 = 1.157
T
MF = 0.963 × 1.157 = 1.114
R
= 50 × 1.114 = 55.71
final
Pin Capacitance
Tab le 1– 9 lists the pin capacitance for Cyclone III devices.
Table 1–9. Cyclone III Devices Pin Capacitance
Symbol Parameter
C
IOTB
C
IOLR
C
LVD SLR
C
VREFLR
(1)
C
VREFTB
(1)
C
CLKTB
C
CLKLR
Notes to Table 1–9:
(1) When
(2) C
Input capacitance on top/bottom I/O pins 7 6 pF
Input capacitance on left/right I/O pins 7 5 pF
Input capacitance on left/right I/O pins with dedicated LVDS output
Input capacitance on left/right dual-purpose when used as V
or user I/O pin
REF
Input capacitance on top/bottom dual-purpose when used as V
or user I/O pin
REF
Input capacitance on top/bottom dedicated clock input pins
Input capacitance on left/right dedicated clock input pins 6 5 pF
VREF
higher pin capacitance.
VREFTB
pin is used as regular input or output, a reduced performance of toggle rate and t
for EP3C25 is 30 pF.
VREF
VREF
pin
pin
Typical –
QFP
Typical –
FBGA
Unit
87pF
21 21 pF
23
(2)
23
(2)
pF
76pF
is expected due to
CO
Cyclone III Device Handbook July 2012 Altera Corporation Volume 2
Chapter 1: Cyclone III Device Datasheet 1–9
Electrical Characteristics
Internal Weak Pull-Up and Weak Pull-Down Resistor
Tab le 1– 10 lists the weak pull-up and pull-down resistor values for Cyclone III
devices.
Table 1–10. Cyclone III Devices Internal Weak Pull-Up and Weak Pull-Down Resistor
(1)
Symbol Parameter Conditions Min Typ Max Unit
= 3.3 V ± 5%
V
CCIO
V
= 3.0 V ± 5%
Value of I/O pin pull-up resistor before
R
_PU
and during configuration, as well as user mode if the programmable pull-up resistor option is enabled
R
_PD
Value of I/O pin pull-down resistor before and during configuration
CCIO
V
= 2.5 V ± 5%
CCIO
V
= 1.8 V ± 5%
CCIO
V
= 1.5 V ± 5%
CCIO
V
= 1.2 V ± 5%
CCIO
V
= 3.3 V ± 5%
CCIO
V
= 3.0 V ± 5%
CCIO
V
= 2.5 V ± 5%
CCIO
V
= 1.8 V ± 5%
CCIO
V
= 1.5 V ± 5%
CCIO
Notes to Table 1–10:
(1) All I/O pins have an option to enable weak pull-up except configuration, test, and JTAG pin. Weak pull-down feature is only available for JTAG
TCK. (2) Pin pull-up resistance values may be lower if an external source drives the pin higher than V (3) R
(4) R
= (V
_PU
Minimum condition: –40°C; V
Typical condition: 25°C; V
Maximum condition: 125°C; V
= VI/I
_PD
Minimum condition: –40°C; V
Typical condition: 25°C; V
Maximum condition: 125°C; V
CCIO–VI
R_PD
)/I
R_PU
= V
CCIO
= VCC, VI = 0 V;
CCIO
CCIO
CCIO
= VCC, VI = VCC–5%;
CCIO
CCIO
+ 5%, VI = V
CC
= V
– 5%, VI = 0 V; in which VI refers to the input voltage at the I/O pin.
CC
= V
+ 5%, VI = 50 mV;
CC
= V
– 5%, VI = VCC– 5%; in which VI refers to the input voltage at the I/O pin.
CC
+ 5% – 50 mV;
CC
(2), (3)
(2), (3)
(2), (3)
(2), (3)
(2), (3)
(2), (3)
(4)
(4)
(4)
(4)
(4)
CCIO
72541k
72847k
83561k
10 57 108 k
13 82 163 k
19 143 351 k
61930k
62236k
62543k
73571k
850112k
.
Hot Socketing
Tab le 1– 11 lists the hot-socketing specifications for Cyclone III devices.
Table 1–11. Cyclone III Devices Hot-Socketing Specifications
Symbol Parameter Maximum
I
IOPIN(DC)
I
IOPIN(AC)
Note to Tab le 1– 11:
(1) The I/O ramp rate is 10 ns or more. For ramp rates faster than 10 ns, |IIOPIN| = C
dv/dt, in which C is I/O pin capacitance and dv/dt is the slew rate.
July 2012 Altera Corporation Cyclone III Device Handbook
DC current per I/O pin 300 A
AC current per I/O pin 8 mA
(1)
Volume 2
1–10 Chapter 1: Cyclone III Device Datasheet
Electrical Characteristics
Schmitt Trigger Input
Cyclone III devices support Schmitt trigger input on
nCE, CONF_DONE
, and
DCLK
pins. A Schmitt trigger feature introduces hysteresis to the
TDI, TMS, TCK, nSTATUS, nCONFIG
,
input signal for improved noise immunity, especially for signal with slow edge rate.
Tab le 1– 12 lists the hysteresis specifications across supported V
range for Schmitt
CCIO
trigger inputs in Cyclone III devices.
Table 1–12. Hysteresis Specifications for Schmitt Trigger Input in Cyclone III Devices
Symbol Parameter Conditions Minimum Typical Maximum Unit
= 3.3 V 200 mV
V
CCIO
V
= 2.5 V 200 mV
V
SCHMITT
Hysteresis for Schmitt trigger input
CCIO
V
= 1.8 V 140 mV
CCIO
V
= 1.5 V 110 mV
CCIO

I/O Standard Specifications

The following tables list input voltage sensitivities (VIH and VIL), output voltage (VOH and V supported by Cyclone III devices. Table 1–13 through Tab le 1– 18 provide the I/O standard specifications for Cyclone III devices.
), and current drive characteristics (IOH and IOL) for various I/O standards
OL
Table 1–13. Cyclone III Devices Single-Ended I/O Standard Specifications
I/O Standard
(V) V
V
CCIO
(V) V
IL
Min Typ Max Min Max Min Max Max Min
(3)
3.3-V LVTTL
3.3-V LVCMOS
3.0-V LVTTL
3.0-V LVCMOS
2.5-V LVTTL and LVCMOS
(3)
1.8-V LVTTL and LVCMOS
1.5-V LVCMOS 1.425 1.5 1.575 –0.3
1.2-V LVCMOS 1.14 1.2 1.26 –0.3
3.0-V PCI 2.85 3.0 3.15
3.0-V PCI-X 2.85 3.0 3.15
Notes to Table 1–13:
(1) For voltage referenced receiver input waveform and explanation of terms used in Tab le 1 –1 3, refer to “Single-ended Voltage referenced I/O Standard”
in “Glossary” on page 1–27. (2) AC load CL = 10 pF. (3) For more detail about interfacing Cyclone III devices with 3.3/3.0/2.5-V LVTTL/LVCMOS I/O standards, refer to AN 447: Interfacing Cyclone III
Devices with 3.3/3.0/2.5-V LVTTL and LVCMOS I/O Systems.
3.135 3.3 3.465 0.8 1.7 3.6 0.45 2.4 4 –4
(3)
3.135 3.3 3.465 0.8 1.7 3.6 0.2 V
(3)
2.85 3.0 3.15 –0.3 0.8 1.7 V
(3)
2.85 3.0 3.15 –0.3 0.8 1.7 V
2.375 2.5 2.625 –0.3 0.7 1.7 3.6 0.4 2.0 1 –1
1.71 1.8 1.89 –0.3
0.35 * V
0.35 * V
0.35 * V
0.3 * V
0.35* V
CCIO
CCIO
CCIO
CCIO
CCIO
0.65 * V
CCIO
0.65 * V
CCIO
0.65 * V
CCIO
0.5 * V
CCIO
0.5 * V
CCIO
(1), (2)
(V) V
IH
+ 0.3 0.45 2.4 4 –4
CCIO
+ 0.3 0.2 V
CCIO
2.25 0.45
V
+ 0.3
CCIO
V
+ 0.3
CCIO
V
+ 0.3 0.1 * V
CCIO
V
+ 0.3 0.1 * V
CCIO
(V) V
OL
0.25 * V
CCIO
0.25 * V
CCIO
CCIO
CCIO
(V)
OH
– 0.2 2 –2
CCIO
– 0.2 0.1 –0.1
CCIO
V
CCIO
0.45
0.75 * V
CCIO
0.75 * V
CCIO
0.9 * V
CCIO
0.9 * V
CCIO
I
(mA)
I
OL
(mA)
2–2
2–2
2–2
1.5 –0.5
1.5 –0.5
OH
Cyclone III Device Handbook July 2012 Altera Corporation Volume 2
Chapter 1: Cyclone III Device Datasheet 1–11
Electrical Characteristics
Table 1–14. Cyclone III Devices Single-Ended SSTL and HSTL I/O Reference Voltage Specifications
V
(V) V
I/O
Standard
SSTL-2 Class I, II
SSTL-18 Class I, II
HSTL-18 Class I, II
HSTL-15 Class I, II
HSTL-12 Class I, II
Notes to Table 1–14:
(1) For an explanation of terms used in Table 1–14, refer to “Glossary” on page 1–27.
of transmitting device must track V
(2) V
TT
(3) Value shown refers to DC input reference voltage, V (4) Value shown refers to AC input reference voltage, V
CCIO
Min Typ Max Min Typ Max Min Typ Max
2.375 2.5 2.625 1.19 1.25 1.31
1.7 1.8 1.9 0.833 0.9 0.969
1.71 1.8 1.89 0.85 0.9 0.95 0.85 0.9 0.95
1.425 1.5 1.575 0.71 0.75 0.79 0.71 0.75 0.79
1.14 1.2 1.26
0.48 * V
0.47 * V
of the receiving device.
REF
CCIO
CCIO
REF(DC)
REF(AC)
(3)
0.5 * V
(4)
0.5 * V
. .
(V) V
REF
V
REF
0.04
V
REF
0.04
CCIO
CCIO
(3)
0.52 * V
(4)
0.53 * V
CCIO
CCIO
(3)
(4)
Table 1–15. Cyclone III Devices Single-Ended SSTL and HSTL I/O Standards Signal Specifications
(1)
TT
0.5 * V
CCIO
V
V
(V)
REF
REF
(2)
V
+
REF
0.04
V
+
REF
0.04
I/O
Standard
SSTL-2 Class I
SSTL-2 Class II
SSTL-18 Class I
SSTL-18 Class II
HSTL-18 Class I
HSTL-18 Class II
HSTL-15 Class I
HSTL-15 Class II
HSTL-12 Class I
HSTL-12 Class II
(V) V
V
IL(DC)
(V) V
IH(DC)
(V) V
IL(AC)
(V) V
IH(AC)
(V) V
OL
OH
Min Max Min Max Min Max Min Max Max Min
V
–0.15
–0.15
V
REF
0.18
V
REF
0.18
V
REF
0.125
V
REF
0.125
V
REF
0.1
V
REF
0.1
V
REF
0.1
V
REF
0.1
V
REF
0.08
V
REF
0.08
+
REF
0.18
V
+
REF
0.18
V
+
REF
0.125
V
+
REF
0.125
V
+
REF
0.1
V
+
REF
0.1
V
+
REF
0.1
V
+
REF
0.1
V
+
REF
0.08
V
+
REF
0.08
——
——
——
——
——
——
——
——
V
+ 0.15 –0.24
CCIO
V
+ 0.15 –0.24
CCIO
V
REF
0.35
V
REF
0.35
V
REF
0.25
V
REF
0.25
V
REF
0.2
V
REF
0.2
V
REF
0.2
V
REF
0.2
V
REF
0.15
V
REF
0.15
V
0.35
V
0.35
V
0.25
V
0.25
V
V
V
V
V
0.15
V
0.15
REF
REF
REF
REF
REF
0.2
REF
0.2
REF
0.2
REF
0.2
REF
REF
+
+
+
+
+
+
+
+
—0.28
—0.4
—0.4
—0.4
—0.4
+
V
+
CCIO
0.24
+
V
+
CCIO
0.24
VTT –
0.57
VTT –
0.76
VTT –
0.475
0.25 × V
CCIO
0.25 × V
CCIO
VTT +
0.57
V
0.76
VTT +
0.475
V
CCIO
0.28
V
CCIO
V
CCIO
V
CCIO
V
CCIO
0.75 × V
0.75 × V
TT
0.4
0.4
0.4
0.4
CCIO
CCIO
(V)
+
I
I
OL
(mA)
OH
(mA)
8.1 –8.1
16.4 –16.4
6.7 –6.7
13.4 –13.4
8–8
16 –16
8–8
16 –16
8–8
14 –14
July 2012 Altera Corporation Cyclone III Device Handbook
Volume 2
+ 23 hidden pages