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Avalon Tri-State Conduit Components User Guide
Avalon Tri-State Conduit Components
User Guide
101 Innovation Drive
San Jose, CA 95134
www.altera.com
UG-01100-1.0
Document last updated for Altera Complete Design Suite version:
Document publication date:
11.0
May 2011
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© 2011 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX are Reg. U.S. Pat.
& Tm. Off. and/or trademarks of Altera Corporation in the U.S. and other countries. All other trademarks and service marks are the property of their respective
holders as described at www.altera.com/common/legal.html. Altera warrants performance of its semiconductor products to current specifications in accordance
with Altera’s standard warranty, but reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or
liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Altera. Altera
customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or
services.
Avalon Tri-State Conduit Components User Guide May 2011 Altera Corporation
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Contents
Chapter 1. Avalon Tri-State Conduit Components
Chapter 2. Generic Tri-State Controller
Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–2
Example Read and Write Using Setup, Hold and Wait Times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–5
Chapter 3. Tri-State Conduit Pin Sharer
Signal Naming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–1
Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–2
Signal Behavior During Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–2
Arbitration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–3
Hierarchical Pin Sharing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–4
Additional Information
Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Info–1
How to Contact Altera . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Info–1
Typographic Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Info–1
May 2011 Altera Corporation Avalon Tri-State Conduit Components User Guide
Preliminary
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iv Contents
Avalon Tri-State Conduit Components User Guide May 2011 Altera Corporation
Preliminary
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1. Avalon Tri-State Conduit Components
Altera FPGA
TCM
Tristate Conduit
Pin Sharer
addr_out[20:0]
data_outen
data_out[31:0]
data_in[31:0]
read_out
write_out
request
grant
grant
request
addr_out[22:0]
data_outen
data_out[15:0]
data_in[15:0]
read_out
write_out
TCS
Tristate Conduit
Bridge
S
Generic Tristate
Controller
Customized
for 2 MByte
x32 SSRAM
CS
A[20:0]
D_EN
D[31:0]
DI[31:0]
Rd
Wr
Request
Grant
TCM
S
Grant
Req
A[22:0]
D_EN
D[15:0]
DI[15:0]
Rd
Wr
TCM
chipselect_out
chipselect_out
irq_in
Generic Tristate
Controller
Customized
for 8 MByte
x16 Flash
addr_out<n>
data_out<n>
data_in<n>
data_outen<n>
chipselect_out
request
grant
irq_in
chipselect_out
write_out
read_out
clock
Note (1)
Avalon-MM
Master
TCS
TCS
CS
IRQ
Arb
Avalon-MM Slave
S
TCM
Tristate Conduit Master
Tristate Conduit Slave
TCS
The Avalon® Tri-State Conduit components available in the Qsys component library
allow you to create on-chip controllers that connect to off-chip devices: The Generic
Tri-State Conduit Controller includes parameters that you can specify to control the
connected off-chip device, frequently a memory device. The Tri-State Conduit Pin
Sharer arbitrates between multiple connected tri-state controllers. It drives signals
from the selected controller to the Tri-State Conduit Bridge. The Tri-State Conduit
Bridge converts an on-chip encoding of tri-state signals into true bidirectional signals
on the PCB. Figure 1–1 illustrates the use of these three Qsys components in an
®
Altera
Figure 1–1. Qsys System Using the Generic Tri-State Controller, Tri-State Conduit Pin Sharer and Bridge
FPGA.
Note to Figure 1–1:
(1) Refer to Figure 3–3 on page 3–2 for details of the logic that controls
May 2011 Altera Corporation Avalon Tri-State Conduit Components User Guide
read_out
and
write_out
.
Preliminary
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1–2 Chapter 1: Avalon Tri-State Conduit Components
In Figure 1–1 two instances of the Generic Tri-State Controller are customized to
control off-chip SSRAM and flash memories. The Avalon Tri-state Conduit
(Avalon-TC) master interfaces of these components connect to separate Avalon-TC
slave interfaces of the Tri-State Conduit Pin Sharer. The Tri-State Conduit Pin Sharer
arbitrates between the connected masters and drives signals from the selected master
on its Avalon-TC interface which connects to the Avalon-TC slave interface of the
Tri-State Conduit Bridge. Finally, the Tri-State Conduit Bridge converts the on-chip
representation of the signals to bidirectional signals. It drives the bidirectional signals
over its Avalon Conduit Interface to SSRAM and flash devices on the PCB. Figure 1–2
shows this system in Qsys with the addition of a Nios II processor that drives the
Avalon-MM slave interfaces of the customized controllers.
Figure 1–2. Qsys Tri-State Conduit System
This user guide explains how to use the Generic Tri-State Controller and Tri-State
Conduit Pin Sharer to create systems that interface to off-chip devices. It does not
include a separate chapter for the Tri-State Conduit Bridge because the sole purpose
of this device is to convert between the on-chip and off-chip representation of
connected signals. After reading this user guide, you should be able to define
controllers that interface with off-chip devices and identify signals that can be shared
between interfaces to reduce the total pin count of your FPGA. This document
includes the following chapters:
■ Generic Tri-State Controller
■ Tri-State Conduit Pin Sharer
Avalon Tri-State Conduit Components User Guide May 2011 Altera Corporation
Preliminary