5.4 SWPS PROGAMMABLE SHUNT RE
GULATOR (FAIRCHILD TL 431)
5.5 LINE FILTER(2 x 6.8mH)
6. FAULT TRACING FLOW CHART
6.1 POWER SUPPLY
6.2 FRONT PANEL
6.3 MPEG BOARD
7. COMPONENT LIST
20
22
23
24
24
25
26
27
1
Page 3
DVD Service Manual
2. BLOCK DIAGRAM (CABLE CONNECTIONS)
2
Page 4
B
8
2
12345
JP
C
5
1234567
JP
D
A
1/1
4321
F+
V
CE3
10 0u/ 16
2
D4
FR 10
T1
V
F-
-2 4
k
R1 5
10
V
D9
6. 8
7
R1 4
4.
V
22 0u/ 35
CE6
2
FR 10
D5
-1 2V
V
F-
F+
5V
-2 1
V
CE9
V
0
D6
22 0UF/ 16
12
R1 3
27
V
V
-1 2
+1 2
1/ 4W
R3 4
1K
V
H
CE1 0
47 0u/ 16
L6
20 u
7
D7
FR 15
0
D8
SB 36
CA1
V
V
V
D5
-1 2V
D5 V
7
1N 400
D10
CE1 4
2
10
3. 3
+1 2
3. 3V
V
4
C2 4
10
V
V
47 0u/ 10
CE1 3
10 00u /10
22 0u/ 10
CE1 6
7
1N 400
D11
K
R1 7
10
0
47
R3 3
C2 2
K
R2 1
10
V
K
10 4/5 0
R2 2
20 0
C
TL4 31
IC3
SAV
0
52CA/A
1
IC
E
HGND
1345
1T
SUF
2
678
2
VIPE R2
R6
1
2
1N
SW 1
21
0
K
2R
30
1
Vk1/
5C
2
IN4 007
BR1
BR
IN4 007
74
P0
F
4C
D
7
D1
FR 15
CE2
/u74
V004
4EC
4
BR3
IN4 007
BR
IN4 007
34
74
P0
F
L1
3C
2
D2
FR 10
V
22 u/3 5
4
C2 3
10
HGND
v
0. 1/27 5
12
C1
C
IC2
7
81
0
22
V
50/ 60HZ
AC 120- 220
C
B
HGND
A
1234
Page 5
4. FUNCTIONAL DESCRIPTIONS
4.1 DVD MPEG board
4M FLASH
SERIAL
EPROM
CVBS
R
G
B
64M
SDRAM
SPCA8202
AUD2
AUD1
AUD0
5.1CHANNEL
AUDIO
Cntr/LFE
Rear L/R
Rear L/R
CODEC
DVD-DSP
I/F
CD-DSP
I/F
SPDIF
This board implements the back-end circuitry of a DVD player. It is composed of the following
subsystems:
* Microcontroller which does main control to all other sub-blocks of the system including user
interface, driver interface, audio/video output.
* Vaddis A/V Decoder IC decodes the bitstream coming from the DVD front-end drive, and
Optionally performs audio and video effects.
* Audio Codec
Audio Format:
ML,MC=00=> RJ 24 bit
ML,MC=01=> RJ 20 bit
ML,MC=10=> I2S 16 bit
ML,MC=11=> I2S 24 bit
BB
AU_D1
AU_D0
AU_BCK
AU_LRCK
AU_XCK
+5AVAA
+5AVAA
P+5V
GND
Audio Format:
ML,MC=00=> RJ 24 bit
ML,MC=11=> I2S 24 bit
8
DVDD
9
DGND
11
DIF1
12
DIF0
13
M1
15
M2
14
VLC
10
RST
1
VLS
2
DIN1
3
DIN2
4
DIN3
5
SCLK
6
LRCK
7
MCLK
AUDIO_MUTE
AU_XCK
AU_BCK
AU_LRCK
AU_D1
AU_D2
AU_D3
U10
AVDD
AGND
MUTE1
MUTE2
MUTE3
OUT1L
OUT1R
OUT2L
OUT2R
OUT3L
OUT3R
FILT+
VQ
CS4360
U11
1
AVDD1
DVDD
AVDD2
11
DGND
10
AGND1
LRCIN2
AGND2
14
13
12
GR0
MD/DM
GR1
MC/IWL
ML/12S
GR2
8
MODE
9
MUTE
OUT0R
2
SCKI
OUT0L
3
BCKIN
OUT1R
4
LRCIN
OUT1L
5
DIN0
OUT2R
6
DIN1
OUT2L
716
DIN2CAP
WM8746/DA1196
AU_BCK
AU_LRCK
AU_XCK
22
21
28
25
18
27
26
24
23
20
19
A_CAP
16
17
EC32
BC47
10UF16V
0.1UF
AGND
+5AVAA
15
28
20
24
26
22
18
27
25
23
21
19
17
+
U9
1
SDATA
2
DEM/SCLK
3
LRCK
45
MCLK AOUTR
CS4334
+
EC29
10U16V
AOUTL
AGND
C_CAU_RST
SW
SL
SRAU_D2
F_L
F_R
F_R
F_L
SR
SL
SW
C_C
AGND
VA
+5AVAA
AGND
EC33
+
10UF16V
F_R8
F_L8
SR8
SL8
SW8
C_C8
BC54
0.1U
8
7
6
BC42
0.1UF
AGND
F_LAU_D0
F_R
BC54
0.1UF
+5AVAA
AGND
SW
10UF16V
C_C
F_R
10UF16V
F_L
10UF16V
EC19
+
10UF16V
EC30
+
EC27
+
20K
R73
20K
R142
20K
R127
20K
R98
EC20
+
CS4334 I2S format only
Replace GND
with VGND For
Himage
mechanism
ASW
AC_C
AFR
AFL
ASR
ASL
AA
AU_D0
AU_D1
AU_D2
AU_LRCK
AU_BCK
AU_XCK
ASW1
AC_C1
AFR1
AFL1
ASR1
ASL1
AU_D02
AU_D12
AU_D22
AU_LRCK 2
AU_BCK2
AU_XCK2
5
DVCC
BC1
0.1UF
VGND
DVCCOPTI_VDD
L4FB
CS4360 Format
DIF1
0LJ 24 bits
1
C4
0.1UF
VGND
DIF0
0
10
0
11
AUDIO INTERFACE
I2S
RJ 16bits
RJ 24 bits
R533
R10
200
R11
100
VGND
C960.1UF
C5
10PF
4
OPTI_O
COAX
OPTI_O1SPDIF_OUT2
COAX1
EC26
R120
+
SR
10UF16V
SL
10UF16V
EC22
20K
R106
+
20K
Page 12
DVD Service Manual
4.2 Front Panel
The front panel I/O is controlled by the PIC508 and PT 6312 (Optional) driver.
A.
D
654321
K24
K23
K22
K21
K20
K18
K17
K16
K15
K14
K13
K12
K11
32VFD
K10
K9
K8
K7
K6
K5
K4
K3
F1F2
23
K11
24
K12
25
K13
26
K14
27
-21V
28
K15
29
K16
30
K17
31
K18
32
33
K20
C
S5
12S412
1N4148
D1
D2
K10
16312
3435363738394041424344
K21
K22
K23
K24
1N4148
K3K4K5K6K7K8K9
12S112S212
1213141516171819202122
B
S3
R8
10K
R7
10K
R6
10K
R5
10K
11
10
9
8
7
6
5
4
3
2
1
DATA
C3
100
C2
100
C1
100
R4
10K
STB
R3
10K
CLK
R2
10K
R1
47K
A
NumberRevisionSize
B
Title
Date: 26-Jun-2004Sheetof
File:DrawnBy:
5V
E1
220U/10V
5V
GND
R
NetLabel25
NetLabel26
-21V
123
4
D
C
REMOTE
REM
B
5V
REM
CLK
65432
STB
DATA
1
123456
A
14
Page 13
4.2.1 Front Panel Interface
6 Pin, Data Connector Pin Assignments
DVD Service Manual
PIN
1
2
3
4
5
6
NAME
REM
DATA
CLK
STB
GND
VCC
I/O
I
I
O
O
O
DESCRIPTION
Front Panel Data input
IR sensor interrupt
Front Panel chip select
Front Panel clock
Front Panel Data output
6 Pin, Power Connector Pin Assignments
PIN
1
2
3
4
5
6
There are 3 different devices operated by the PIC508 and Pt6312 (Optional):
* Vacuum Fluorescent Display (VFD)
* Push-buttons
* LEDs
There is an option for a tray lamp and a joystick which is not currently assembled. The VFD display is custom made,
implemented in a 6 grids by 16 segment matrix.
The VFD needs special voltage supply for operation:
* Vkk which is -21V needed to drive the segments and grids of the VFD.
* Vf1, Vf2 which powers the exectron cloud filament (cathode) with a differential voltage of 3.5V. This is a floating
voltage difference generated by the power supply, and is biased to -21V in the ront panel board by a Zener circuit
from the -21V (Vkk) supply. Moving the bias towards a more positive number will reduce the segment brightness.
Vf1 & Vf2 provide a DC supply to the cathode. To overcome the voltage difference between one end and the other
of the cathode, it is geometrically titled so that the segments observe the same potential and have all the same
brightness. Other way to overcome the problem is to employ an AC supply to power the Vf1 and Vf2.
NAME
VFD 1
VFD 2
-21V
STBY
GND
+5V
FROM
SMPS
SMPS
SMPS
SMPS
SMPS
SMPS
DESCRIPTION
Segment and grid Voltage of the VFD
Provide a DC supply to the cathode. To vercome
the voltage difference between one and the other
of the cathode.
Supplies IR and Front IC
4.3 SMPS
The mains power(220VAC) fed from N1 is filtered through C1, L1, C2 and L2 then rectified by D1, D2, D3 and D4
and generates an output at 300VDC. This 300VDC fed to T1 (pin2, pin4) which connects to 5L0380R(pin2), then
5L0380R will automatically generate a 50KHz square waveform, this 50KHz square waveform controls the ON/OFF
between 5L0380R pin2 and the ground. In normal condition, T1 primary (between pin2 and pin4) will create a
50KHz square waveform which is controlled by 5L0380R, this signal then fed to T1 and generates 2 different
potential voltages of 12V and 5V between pin17, pin14 and pin16, pin14 respectively. The 12VDC and 5VDC then
rectified by D7, D8, D9 and then filtered by L3, L4, L5, C9, C10 and C11. The feedback voltage is controlled by Ic3
TL431 and IC2 PC817. When the output voltage is higher than 5V, the voltage at TL431(2.5V) is compared with
R10 and send out a signal to 5L0380R, the output square waveform then will change to adjust the output voltage,
this acts as a voltage stabilizer.
15
Page 14
4.4.1 Adopt small l ens: can adopt
Thomson act lens
ndard DVD lens testing frock
ndard DVD testing dish
16
Page 15
Page 16
DVD Service Manual
5. DESCRIPTION OF THE INTEGRATED CIRCUITS
5.1 SMPS TRANSFORMER
1. GENERAL INFORMATION
Main Voltage Operations:
Main Drop-out Voltage:
Mains STart-up Voltage:
Operating Frequency:
2. ELECTRICAL CHARACTERISTICS
2.1 STATIC CHARACTERISTICS
WINDING
Primary Inductance
1. Primary Leakage inductance (Pin 2-4) L1.5mH
2.2 WITHSTANDING VOLTAGE
The transformer shall sithstanding a voltage of 4 Kvms for 1 minute and 1 mA between
primary and seconday winding and also 2 Kvms for 1 minute and 1 mA between primary
winding with core and secondary winding with core.
PIN. NO
2-4
90Vac - 265 Vac
Max. 90 Vac
Max. 90 Vac
60 KHz
INDUCTANCE
1.5mH 10%6
DESCRIPTION
<0.50W
2.3 INSULATION RESISTANCE
The insulation resistance shall be ore than 500M between primary and seconday
windings when the applied voltage 300 Vdc for 1 minute
2.4 ELECTRICAL CHARACTERISTICS
1. Before taking measurement Pp01 will be to give 5.0Vdc on 5.0Vdc line at Minimum
setting of controls and a mains voltage 220 Vac.
2. Before taking a measurement, DVD set should be working at least 5 minutes on
Normal condition
18
Page 17
5.2 FRONT PANEL DRIVER IC FOR VIR (PT6312)
5.2.1 General Description
Operating Supply Voltage Range (TA=25, VSS=0V)℃
DVD Service Manual
Parameter
Operating Supply Voltage range 1
Operating Supply Voltage range 2
Absolute maximum ratings (Ta=25, VSS=0 V,0)℃
Parameter
Applied voltage 1
Applied boltage 1
Input Voltage
Power dissipation
Operating Temperature
Storage Temperature
Pin Description
Pin
VDD
OSC
VSS
SI
SO
SCK
CS
S1~S11
VEE
G1~G6
Name
Power supply pin 1
Oscillation pin
GND pin
Serial data input
Serial data output
Serial Clock input
Serial Chip select
High with standing
voltage output pin
for segment
Power supply pin 2
High with standing
voltage output pin
for grid
Pin No .I/O
14, 38I
44
7, 43
6
5
8
9
15~25
27
37~32
Symbol
VDD
VEE
SymbolLimits
VDD
VEE
VIN
PD
TOPR
TSTG
Function
Connected to the power supply of the system
I/O
I
I
I
I
O
I
O
Connected to the oscillation capacitor
Connected to the ground of the system
Serial data input starting from MSB
Serial data output starting from MSB
Serial data read at rising edge
Serial initialization at "L", effective at "H"
Output pin for segment
Output: Pch open drain + pull - down resistance
Pull - down resistance connection for FLP driver
Output pin for grid
Output: Pch open drain + pull - down resistance
Typ.Max.Min.
5.05.54.5
VEE - 30VEE - 0VEE - 32
-0.3 ~ 7.0
VDD+0.3 ~ VDD -35
-0.3 ~ VDD +0.3
850*1
-25 ~ 75
-55 ~ 125
Unit
V
V
Unit
V
V
V
MV
℃
℃
S12/G11
~S16/G7
L1~L4
K1~K4
SW1~SW4
High with standing
voltage output pin
for segment / grid
Output pin for LED
Key data input pin
General - purpose
input pin
26,
28~31
42~39
10~13
1~4
O
O
I
I
Segment / grid output selectable pin
Output: Pch open drain + pull - down resistance
Output pin for LED; output is CMOS output
Data input pin for key scanning
General - purpose input pin
* Programmable output voltage to 36volts
* Low dynamic output impedance 0.20 typical
* Sink current capability of 1.0 to 100mA
* Equivalent full-range temperature
coefficient
of 50 ppm ℃ typical
* Temperature compensated for operation
over full rated operating temperature range
* Low output noise voltage
* Fast turn-on response
TO-92
1
1. Ref 2. Arode 3. Cathode
REFERENCE
Description
The TL 431/TL 431A are three-terminal
adjustable regulator series with a guaranteed
thermal stability over applicable temperature
ranges. The output voltage may be set to any
value between VREF (approximately 2.5
volts) and 36 volts with two external resistors.
These devices have a gypical dynamic
output impedanceof 2.0W Active oupput
circuity provides a very sharp turn-on
characteristic making these devices excel
lent replacement for zener diodes in many
applications
CATHODE
REFERENCE(R)
Absolute maximum ratings
Parameter
Cathode voltage
Cathode current Range (Continuous)
Reference Input Current Range
Power dissipation
D,Z Sffix Package
N Suffix Package
Operating Temperature Range
Storage Temperature Range
Recommended Operating conditions
Parameter
Cathode voltage
Cathode Current
2.5 Vref
Symbol
VKA
IKA
IREF
PD
TOPR
TSTG
Symbol
VKA
IKA
ANODE
CATHODE(K)
ANODE(A)
Value
37
-100 ~ +150
0.05 ~ +10
770
1000
-25 ~ +85
-65 ~ +150
ValueValueValue
-36VREF
-1001.0
Unit
V
MAI
MA
MW
MW
℃
℃
Unit
V
MA
22
Page 21
5.5 LINE FILTER (2 X 60mH)
ELECTRICAL DATA
Inductance: L1-2=L3-4-30mH - 15% - +20%
Resistance: R 1-2 = R 3-4 = 1.5 ohm (max)
Rated current: Irms = 0.50 A
(F= 1 Khz V= 1 Vms)