ZILOG Z86C95 Datasheet

GENERAL DESCRIPTION

C

USTOMER PROCUREMENT SPECIFICATION

Z86C95

CMOS Z8® DIGITAL
SIGNAL PROCESSOR (DSP)

Z86C95 DSP

CPS DC-4067-13

The Z86C95 MCU (Microcontroller Unit ) introduces a new
level of sophistication to Superintegration™ ICs. The
Z86C95 is a member of the Z8® single-chip microcontroller
family incorporating a CMOS ROMless Z8 microcontroller
with an embedded DSP processor for digital servo control.
The DSP slave processor can perform 16-bit x 16-bit
multiplicates and accumulates in one clock cycle. Addi­tionally, the Z86C95 is further enhanced with a hardwired
16-bitx16-bit multiplier and a 32-bit/16-bit divider, three
16-bit counter timers with capture and compare registers,
a half flash 8-channel 8-bit A/D converter with a 2 µsec
conversion time, an 8-bit DAC with 1/4 programmable gain
stage, UART, serial peripheral interface, and a PWM
output channel (Functional Block Diagram). It is fabricated
using CMOS technology and offered in an 80-pin QFP, 84­pin PLCC, or 100-pin VQFP package.

The Z86C95 provides up to 16 output address lines thus
permitting an address space of up to 64 Kbytes of data and
program memory each. Eight address outputs (AD7-AD0)
are provided by a multiplexed, 8-bit, Address/Data bus.
The remaining 8 bits are provided via output address bits
A15-A8.

There are 256 registers located on chip and organized as
236 general-purpose registers, 16 control and status reg­isters, and four I/O port registers. The register file can be
divided into sixteen groups of 16 working registers each.
Configuration of the registers in this manner allows the use
of short format instructions; in addition, any of the indi­vidual registers can be accessed directly. Also, the Z86C95
contains 512 bytes of DSP Program RAM and 128 words
of DSP data RAM.

Notes:
All Signals with a preceding front slash, "/", are active Low, e.g.:
B//W (WORD is active Low); /B/W (BYTE is active Low, only).

Power connections follow conventional descriptions below:

Connection Circuit Device

Power V

Ground GND V

CC

V

DD

SS

OPERATING ERRATA

This notice only applies to devices top marked "Z86C9524
ASC/FSC/VSC" with a date code of 9237 or later.

1. A DSP load to the DAC Register fails below approxi­mately VCC = 4.7V.

2. Clipping occurs in the linearity of the DAC with a 100K
load at about 3.3V output (VDHI = 3.5V).

3. ICC1 at HALT Mode will show a current of 17-18 mA,
then will jump to 40-70 mA, and will settle between 17­24 mA. Settling time is about 10-15 seconds.

4. ICC2 at STOP Mode and DSP Pause will show a current
of 1-2 mA, then will jump to 5-7 mA, and will settle at 3­4 mA. Settling time is about 10-15 seconds.

DC-4067-13 (5-17-94)

The following operating errata only applies to devices
topmarked with "Z86C95 ASC/FSC/VSC."

1. ICC1 at HALT Mode will show a current of 17-18 mA,
then will jump to 40-70 mA, and will settle between 17­24 mA. Settling time is about 10-15 seconds.

2. ICC2 at STOP Mode and DSP Pause will show a
current of 1-2 mA, then will jump to 5-7 mA, and will
settle at 3-4 mA. Settling time is about 10-15 seconds.

The following operating errata only applies to devices
topmarked with "Z86C9540 ASC/FSC/VSC or SL 1636."

1. ICC1 at HALT Mode will show a current of 17-18 mA,
then will jump to 40-70 mA, and will settle between 17­24 mA. Settling time is about 10-15 seconds.

1

GENERAL DESCRIPTION (Continued)

Z86C95 DSP

CPS DC-4067-13

2. ICC2 at STOP Mode and DSP Pause will show a
current of 1-2 mA, then will jump to 5-7 mA, and will
settle at 3-4 mA. Settling time is about 10-15 seconds.

/AS /DS

Output Input

Port 3

SPI

UART

Three 16-Bit

Counter/

Timers

32 ÷ 16

Divider

16 x 16

Multiplier

Interrupt

Control

Vcc GND

ALU

Flags

Register

Pointer

Register File

256 x 8-Bit

XTAL

Machine Timing and

Instruction Control

Program

Counter

3. The zero error for the ADC at 25°C is about 180 mV.

R//W /RESET

/WAIT

Digital Signal Processor

DSP RAM

Bank 1

DSP RAM

Bank 2

Program

RAM

Port 2

I/O

(Bit Programmable)

Address
A15-A0*

* In multiplexed mode,
A7-A0 reflects the DSP
address bus for emulation.

Functional Block Diagram

AD7-AD0

8

Address/Data

ADC

8 Channel

Analog In

DAC

Analog

Out

PWM

PWM

2

PIN DESCRIPTION

P2(0)

P2(1)

P2(2)

P2(3)

P2(5)

P2(6)

P2(7)

VSS

ANGND

AVCC

VAHI

VALO

ANA(0)

ANA(1)

ANA(2)

A3

A2A1A0

AD0

VSS

AD1

AD2

AD3

AD4

AD5

AD6

AD7

R/W

/DS

/AS

P2(4)

C

1

24

25

40

41

64

65

80

/WAIT

C01

DSP_SSN

C02

DSP_RW

DSP_SYN

SLAVESELSKDI

DO

VDD

A15

A14

VSS

Z86C95

80-Lead QFP

A13

A12

A11

A10A9A8

A7

A6

A5

Z86C95 DSP

CPS DC-4067-13

A4

DAC

VDD

VDHI

P3(7)

P3(6)

P3(5)

P3(3)

P3(2)

P3(0)

ANA(3)

ANA(4)

ANA(5)

ANA(6)

ANA(7)

VDLO

P3(1)

XTAL1

XTAL2

PWM

/RESET

SCLK

SYNC

IACK

P3(4)

80-Lead QFP Pin Assignments

3

PIN DESCRIPTION (Continued)

1

84

3

424332535411127574

ANA4

ANA5

ANA6

ANA7

DAC

VDHI

VDD

P37

P36

P35

P33

P32

P31

P30

XTAL1

XTAL2

PWM

/RESET

SCLK

SYNC

C01

C02

DSP_SYNC

DSP_RW

SLAVESEL

SKD1D0

VDD

VSS

A15

A14

A13

A12

A11

A10A9A8A7A6

A5

VDLO

ANA3

ANA2

N/C

ANA1

ANA0

VALO

VAHI

ANGND

AVCC

84-Lead PLCC

VSS

P27

Z86C95

P26

P25

P24

P23

P22

P21

P20

/WAIT

N/C

Z86C95 DSP

CPS DC-4067-13

DSP_SSN

3

N/C

IACK

P34

/AS

/DS

R//W

AD7

AD6

AD5

AD4

AD3

AD2

84-Lead PLCC Pin Assignments

AD1

VSS

AD0

A0

A1

A2

A3

A4

DSP-A8

4

NC

SYNC

SCLKNCRESET

PWM

XTAL2

XTAL1

P30

P31

P32

P33

P35

P36

P37

VDD

VDHI

DAC

VDLO

ANA7

ANA6

ANA5

ANA4NCNC

A4A5A6A7A8A9A10

A11

A12

A13

A14

A15

VSS

VDDNCD0D1SK

SLAVESEL

DSP_RW

DSP_SYNC

C02

C01

DSP_SSN

/WAIT

8

506065707555251510512080859095454035

30

PIN DESCRIPTION (Continued)

Z86C95 DSP

CPS DC-4067-13

NCNCNC

DSP_A

A3

A2A1A0

AD0

AD1

AD2

VSS

Z86C95

100-Lead VQFP

AD3

AD4

AD5

AD6

AD7

R//W

/DS

/AS

IACKNCNC

P34

NC

NC

NC

P20

P21

P22

P23

P24

P25

P26

P27

VSS

NCNCNC

100-Pin VQFP Pin Assignments

AVCC

ANGND

AVHI

AVLO

ANA0

ANA1

ANA2

ANA3

NCNCNC

5

PIN FUNCTIONS

t

Z86C95 DSP

CPS DC-4067-13

Address
A15-A0

A7-A0

(DSP Emulator

Support)

A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7

+5V

GND

P20

Clock

XTAL1

P21

XTAL2

P22

Emulation Pins

IACK

SCLK

P23

P24

P25

/SYNC

P26

DSP

Single

Step

DSP-A8

P27

DSP
Read
Write

DSP_SSN

Z86C95

P30

P31

DSP
Sync

Timing and Control

/DS

/AS

P36

/RESET

P37

DSP_RW

P32

DSP_SYNC

P33

P34

P35

Analog Power

R//W

VAHI

ANVCC

ANGND

AN7
AN6
AN5
AN4
AN3
AN2
AN1

AN0

VDLO

VDHI

DAC

PWM

SLAVESEL

/WAIT

VALO

C01
C02

SK

DO

Analog
Inputs
To A/D

D/A Ref
Voltage

DAC Output
PWM Output

Compare
Outputs

SPI Slave Selec

SPI Clock

DI

SPI Data

Asynchronous
WAIT States

Port 2

(Bit Programmable I/O)

Port 3

A/D

Ref Voltage

6