1
PRELIMINARY
Z86C60/65
CP96Z8X0400
FEATURES
ROM RAM* Speed 28-pin
Part (KB) (Bytes) I/O (MHz) DIP
Z86C60 16 256 22 1 6 X
Z86C65 32 256 22 1 6 X
■ Low EMI Mode Option
■ Auto Latches
■ Two Programmable 8-Bit Counter/Timers Each with 6-
Bit Programmable Prescaler
■ Three Vectored, Priority Interrupts from Three Different
Sources
■ On-Chip Oscillator that Accepts a Crystal Ceramic
Resonator, LC, or External Clock Source
■ ROM Mask Options:
– ROM Protect
– RAM Protect
*General-Purpose
■ 28-Pin DIP Package
■ 3.0V to 5.5V Operating Range
■ Low-Power Consumption: 200 mW
■ Fast Instruction Pointer: 0.75 µs @ 16 MHz
■ Two Standby Modes: STOP and HALT
P
RELIMINARY
C
USTOMER PROCUREMENT SPECIFICATION
Z86C60/65
CMOS Z8
®
32K ROM MICROCONTROLLER
The Z86C60/65 microcontrollers introduce a new level of
sophistication to single-chip architecture. The Z86C65 is a
member of the Z8 single-chip microcontroller family with
32 Kbytes of ROM and 256 bytes of RAM. The Z86C60 is
identical, except that it only has 16 Kbytes of ROM.
The Z86C60/65 are housed in a 28-pin DIP package, and
manufactured in CMOS technology. The Z86C96 ROMless
Z8 will support the Z86C60/65.
Zilog’s CMOS microcontroller offers fast execution, more
efficient use of memory, more sophisticated interrupts,
input/output bit manipulation capabilities, and easy hardware/software system expansion along with low cost and
low power consumption.
The Z86C60/65 architecture is characterized by Zilog’s
8-bit microcontroller core. The device offers a flexible I/O
scheme, an efficient register and address space structure,
multiplexed capabilities between address/data, I/O, and a
number of ancillary features that are useful in many industrial and advanced scientific applications.
For applications which demand powerful I/O capabilities,
the Z86C60/65 fulfills this with 22 pins dedicated to input
and output. These lines are grouped into four ports. Each
port is configurable under software control to provide
timing, status signals, serial or parallel I/O with or without
handshake, and an address/data bus for interfacing external memory.
There are three basic address spaces available to support
this wide range of configurations: Program Memory, Data
Memory, and 236 General-Purpose Registers.
To unburden the program from coping with the real-time
problems such as counting/timing and serial data communication, the Z86C60/65 offers two on-chip counter/timers
with a large number of user selectable modes.
Notes:
All Signals with a preceding front slash, "/", are active Low, e.g.,
B//W (WORD is active Low); /B/W (BYTE is active Low, only).
Power connections follow conventional descriptions below:
Connection Circuit Device
Power V
CC
V
DD
Ground GND V
SS
CP96Z8X0400 (5/96)
GENERAL DESCRIPTION
2
PRELIMINARY
Z86C60/65
CP96Z8X0400
GENERAL DESCRIPTION
Figure 1. Z86C60/65 Functional Block Diagram
Port 3
Counter/
Timers
(2)
Interrupt
Control
Port 2
I/O
(Bit Programmable)
ALU
FLAGS
Register
Pointer
Register File
Machine T iming and
Instruction Control
Prg. Memory
Program
Counter
Vcc GND
XTAL
24
Port 0
Output Input
Address or I/O
(Nibble Programmable)
Port 1
8
Address/Data or I/O
(Byte Programmable)
/DS /RESET
3
PRELIMINARY
Z86C60/65
CP96Z8X0400
Z86C60/65 28-Pin DIP Pin Identification
Pin # Symbol Function Direction
1VCCPower Supply Input
2 XTAL2 Crystal, Oscillator Clock Output
3 XTAL1 Crystal, Oscillator Clock Input
4 /RESET Reset Input
5 /DS Data Strobe Output
6 P 3 5 Port 3, Pin 5 Output
7 GND Ground Input
8-13 P05-P00 Port 0, Pins 0,1,2,3,4,5 In/Output
14-21 P17-P10 Port 1, Pins 0,1,2,3,4,5,6,7In/Output
22-26 P25-P21 Port 2, Pins 1,2,3,4,5 In/Output
2 7 P 3 1 Port 3, Pin 1 Input
2 8 P 3 6 Port 3, Pin 6 Output
PIN DESCRIPTION
Figure 2. Z86C60/65 28-Pin DIP
Pin Assignments
1
2
9
3
4
5
6
7
8
28
27
26
25
24
23
22
21
20
P36
P31
P16
P25
P24
P23
P22
P21
P17
VCC
XTAL2
RESET
/DS
P35
GND
P00
19
18
17
16
1514
10
11
12
13
XTAL1
P03
P04
P05
P10
P15
P14
P13
P12
P11
P01
P02