Winbond Electronics W51300 Datasheet

W51300

FLASH VR CONTROLLER

GENERAL DESCRIPTION

The W51300 is a voice recorder IC which contains A/D and D/A converters to digitize and reproduce
voice signals. An anti-alias/smoothing filter, AGC circuit, MIC preamplifier, and speaker power
amplifier are used to smooth the input voice and set the output voice to a certain volume while
minimizing the number of extra components needed. The recording time depends on the size of the
external memory.

The external memory is a nonvolatile flash EPROM that stores the voice data while power is switched
off. This external memory provides a great advantage in cartridge or greeting card applications. A
maximum of 16 Mbit of memory can be cascaded. In addition, the W51300's flexible segmentation,
selective recording/erasing, forward and backward move functions, and MCU interface provide
flexibility to meet the needs of a wide variety of applications.

FEATURES

• Modified ADM algorithm with 24 KHz sampling frequency when ROSC = 620 KΩ

• Operates with Winbond serial flash EPROM

• Built-in A/D, D/A, MIC preamplifier, AGC circuit, anti-alias/smoothing filter, speaker power amplifier,

and LED indicator

• 8 input trigger pins (L_REC, E_PLAY, L_PLAY, FWD, BWD, STOP, ERASE, RESET) debounced

to ensure noise-free operations

• Single/multi-voice segment operation, normal/CPU mode selected by pin option (SMODE, CPU)

• Cascadable for longer duration by directly cascading serial flash EPROMs (maximum 16 Mbits)

• Maximum 63 voice segments available in multi-segment operation

• Provides selective record, erase, and playback functions

• Provides low power detection circuit at 3.0V

• Provides both speaker direct drive and speaker current output (5 mA)

• Low power consumption:

− Operating: 15 mA (typ.)

− Standby: 0.01 µA (typ.)

Publication Release Date: April 1997

- 1 - Revision A2

PIN CONFIGURATION

W51300

BWD

STOP

EOP

CLK

ADDR

DATA

CTRL

MODE

BUSY

LED
VSSD
VSSA

SPK-

SPK+

VCCA

AUD

1

10
11

12
13

2
3
4
5
6
7
8
9

14
15

16

32

31
30

29
28
27
26
25
24
23
22
21
20

19
18
17

FWD

ERASE

E_PLAY
L_PLAY
L_REC

RESET
EXTCLK
TEST
SMODE
CPU
VCCD
AGC
MIC
MICREF

OSC

VCCA

PIN DESCRIPTION

NO. PIN I/O DESCRIPTION

1 BWD I/O Message backward control pin in normal mode

Output clock signal (to MCU) in CPU mode

2 STOP I Stop playback control pin in normal mode

Input clock signal (from MCU) in CPU mode
3 EOP I End of page process signal (from flash EPROM)
4 CLK O Data clock pin for flash EPROM
5 ADDR O Address clock pin for flash EPROM
6 DATA I/O Bidirectional data pin for flash EPROM
7 CTRL O Control signal for flash EPROM
8 MODE O Mode control pin for flash EPROM

- 2 -

Pin Description, continued

NO. PIN I/O DESCRIPTION

9 BUSY O Output busy signal, HIGH during playback

10 LED O Blink (Flash (volume-controlled) during playback

Flash Blink (3 Hz) when during low battery is low, segment full, or
memory full

ON during recording, erasing, and memory formatting
11 VSSD - Digital negative power supply
12 VSSA - Analog negative power supply
13 SPK- O Speaker voltage output ­14 SPK+ O Speaker voltage output +
15 VCCA - Analog positive power supply
16 AUD O Speaker current output (maximum 5 mA when VCC = 4.5V)
17 VCCA - Analog positive power supply +
18 OSC I Oscillation frequency control pin

W51300

19 MICREF I Microphone reference
20 MIC I Microphone input
21 AGC
22 VCCD - Digital positive power supply
23 CPU I Normal/CPU mode select pin: low for normal, high for CPU
24 SMODE I Multi/single segment select pin: low for multi, high for single
25 TEST I External test pin for testing
26 EXTCLK I External clock pin for testing
27 RESET I Reset control pin
28 L_REC I Level record control pin
29 L_PLAY I Level playback control pin
30 E_PLAY I Edge playback control pin
31 ERASE I Message erase control pin in normal mode

32 FWD I/O Message forward control pin in normal mode

I

Automatic gain control input

Input level signal (from MCU) in CPU mode

Output level signal (to MCU) in CPU mode

Publication Release Date: April 1997

- 3 - Revision A2

BLOCK DIAGRAM

W51300

MIC

MICREF

AGC

SMODE

CPU

EXTCLK

TEST

Amp

VCCD

Anti-alias/
Smoothing
Filter

AGC

ADM

Modulator

Logic/Timing Controller

MCU Interface

VSSD

VCCA

VSSA

ERASE

STOP

FWD

BWD

RESET

L_REC

Power
Amp

AUD
Amp

Flash EEPROM

Interface

L_PLAY

E_PLAY

BUSY

LEDOSC

SPK+

SPK-

AUD

CLK
DATA
ADDR
MODE
CTRL
EOP

FUNCTIONAL DESCRIPTION

1. Single/Multi-segment Operation

The W51300 is typically used for either single or multi-segment operations. Single or multi-segment
operating mode is selected by pin option.

Single Segment

The SMODE pin should be connected to VCC. In this mode, only one voice segment can be recorded.
The storage duration can be extended by cascading serial flash EPROMs; up to 16 Mbits of memory
can be cascaded.

Multi-segment

The SMODE pin should be connected to VSS or left floating. In this mode, a maximum of 63 voice
segments can be recorded into flash EPROMs; up to 16 Mbits of memory can be cascaded.
Messages can easily be accessed by using the FWD, BWD, and PLAY pins.

2. Selective Record

When the system is operated in multi-segment mode, voice segments can be recorded selectively.
Users can insert a voice segment between any two existing voice segments. For instance, suppose
there are already five voice segments, 1, 2, 3, 4, and 5, and the CAP (current address/message
pointer) is at 3. Then a newly recorded voice segment will be assigned the number 4, and the original
segments 4 and 5 will be changed to 5 and 6, respectively. If the maximum number of voice
segments (63) or the end of memory space has been reached, a press of L_REC will be invalid and
the LED will flash at 3 Hz for 2 seconds to indicate the invalid action.

- 4 -

W51300

3. Selective Erase

When the system is operated in multi-segment mode, voice segments can be erased selectively
instead of sequentially. Users can play the voice segments one by one until they reach the segment
to be erased, and then stop playing and press the ERASE key. The current voice segment will be
erased and the CAP value will be changed to the previous voice segment. The LED will light during
the erasing procedure to indicate that the system is busy, and all input triggers will be disabled except
for RESET.

4. Chip Erase

Pressing and holding the RESET key for more than two seconds will clear all data in the flash
EPROM.

5. Function Keys

In normal mode, eight input trigger pins with built-in debounce circuitry are used to operate the
W51300. These eight pins are described below.

L_REC

L_REC is an active-high, level-triggered recording pin with an internal 500 KΩ pull-low resistor. When
this pin goes high, the device starts recording and continues until this pin is released or the end of the
memory space is reached. When the memory or segment is full, this pin is invalid.

E_PLAY

E_PLAY is an active-high, edge-triggered playback pin with an internal 500 KΩ pull-low resistor. In
single segment operation, the toggle stop function is enabled. This means a debounced rising edge
on E_PLAY during voice playing will stop the ongoing playback operation immediately. In multi­segment operation, the toggle skip function is enabled. This means a debounced rising edge on
E_PLAY during voice playing will cause the device to skip to the next voice segment. A rising edge
on this pin while the last voice segment is being played will cause the device to skip to the first voice
segment. This function is useful for fast scanning through a series of messages.

L_ PLAY

L_PLAY is an active-high, level-triggered playback pin with an internal 500 KΩ pull-low resistor. The
current voice segment will be played back when this pin is pressed. A concatenated loop playing
function is enabled to link all messages in a row and loop back to the first message when the last
message is reached.

STOP

This is an active-high, edge-triggered stop pin with an internal 500 KΩ pull-low resistor. Pressing this
pin immediately stops playback of the ongoing message. This pin is enabled only while a voice is
playing.

ERASE

ERASE is an active-high, edge-triggered erase pin with an internal 500 KΩ pull-low resistor. Pressing
this pin erases the current voice segment without affecting the content of the other segments.

FWD

This is an active-high, edge-triggered forward pin with an internal 500 KΩ pull-low resistor. Pressing
this pin for less than 1 second moves the CAP from the current voice segment to the next one.
Pressing this pin for more than 1 second moves the CAP from the current voice segment to the last
one.

Publication Release Date: April 1997

- 5 - Revision A2

W51300

BWD

This is an active-high, edge-triggered backward pin with an internal 500 KΩ pull-low resistor. Pressing
this pin for less than 1 second moves the CAP from the current voice segment to the previous one.
Pressing this pin for more than 1 second moves the CAP from the current voice segment to the first
one.

RESET

This is an active-high, edge-triggered reset pin with an internal 500 KΩ pull-low resistor. Pressing this
pin for less than 2 seconds causes the system power-on initialization procedure to be executed and
resets the message pointer to 1. Pressing this pin for more than 2 seconds executes the chip erase
procedure, so that all of the recorded messages are cleared.

6. Low Battery Warning

A low battery warning function is provided to protect the recorded voice messages from being lost
due to loss of power. Before a recording, erasing, or reset operation, the battery voltage will be
checked. If the voltage falls to 3 volts or below, all operations except the LED stop, and the LED
flashes at 3 Hz for 2 seconds to indicate that the battery is low.

7. Speaker Output

The W51300 provides two types of speaker drivers, direct drive and current output. The direct drive is
a voltage output from the built-in power amplifier. This output can be used to drive a speaker directly
without any extra components, such as resistors or transistors. The maximum driving current is 56
mA (rms) when the output is connected to a 16Ω speaker. The current output is the same as that of
the standard speaker driver used in most Winbond PowerSpeechTM chips. The maximum driving
current is 5 mA when VCC = 4.5V.

8. Sampling Frequency Adjustment

The external ROSC can be adjusted to change the system clock (FOSC) and sampling frequency (Fs).
The relationship between FOSC and Fs is Fs = FOSC/32. The relationship between Fs and ROSC is
shown is the figure below.

35

30

25

20

15

Fs (KHz)

10

5

0

0 200 400 600 800 1,000 1,200 1,400 1,600 1,800 2,000 2,200 2,400 2,600 2,800 3,000 3,200

Rosc (KOhm)

- 6 -

W51300

9. MCU Interface

In CPU mode, five pins can be used as an MCU interface to communicate with external micro­controllers by the counter method. RESET, ERASE, STOP are configured as input pins, while FWD
and BWD are configured as output pins. The application diagram is shown below.

Pin 0

Pin 1
Pin 2
Pin 3
Pin 4

Microcontroller W51300

RESET

ERASE
STOP
FWD
BWD

The W51300 offers 10 operating modes that can be controlled by a microcontroller. The rising edge
of pin 1 informs the W51300 to begin to count the pulses generated on pin 2, and the falling edge of
pin 1 informs the W51300 to latch the pulse number. Then the number of pulses is decoded to
instruct the W51300 to perform various operations. The operating modes and the corresponding
waveforms are shown below.

Pin 1

. . .

Pin 2

T T1

Note: T is 5 µS minimum at FOSC = 768 KHz.

T1 is 10 µS minimum at FOSC = 768 KHz.

ITEM MODE NAME NUMBER OF PULSES ON PIN 2

1

Record

2

Play

3

Erase

4

Stop (for record and play)

5

Memory Reset

6

System Reset

7

Read CAP (Current Address Pointer)

1
2
3
4
5
6
7

Publication Release Date: April 1997

- 7 - Revision A2

W51300

Continued

ITEM MODE NAME NUMBER OF PULSES ON PIN 2

8

Read ASN (Available Segment Number)

9

Store 4 Bytes Data to Flash EPROM

10

Read 4 Bytes Data from Flash EPROM

After receiving a command from the microcontroller, the W51300 will send back a corresponding
response, as shown below.

Pin 3

. . .

Pin 4

T1 T1 T1

Note: T1 is 5 msec at FOSC = 768 KHz.

8
9

10

ITEM MODE NAME NUMBER OF PULSES GENERATED ON PIN 4

1

Accept

2

Error: Low Battery

3

Error: Memory Full

4

Error: Out of Segments

5

Error: Wrong CAP

6

Unknown Mode

7

Unknown Error

0
1
2
3
4
5
6

When pin 3 is low and pin 4 is high, the W51300 is busy.

ABSOLUTE MAXIMUM RATINGS

PARAMETER SYMBOL CONDITION RATED VALUE UNIT

Operating Temp. TOPR - 0 to +70
Storage Temp. TSTG - -55 to +150
Power Supply VCC−VSS - -0.3 to +7.0 V
Input DC Voltage VIN All pins VSS -0.3 to VCC +0.3 V

Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability

of the device.

°C
°C

- 8 -

W51300

DC CHARACTERISTICS

(VCC = 5V, VCC = 0V, TA = 25° C)

PARAMETER SYM. CONDITIONS LIMITS UNIT

MIN. TYP. MAX.

Operating Voltage VCC - 3.0 4.5 5.5 V
Standby Current ISB All inputs =

GND

Data = 5V
Operating Current IOP No load - 15 25 mA
Input Voltage

Input Low Current IIL VIN = 0V 0 - 1
Input High Current

Output Low Current

Output High Current

Oscillation Frequency FOSC

High
Low

Digital pins
Analog

pins, MIC
SMODE,

CPU
TEST,

EXTCLK
ADDR,

CLK,
MODE,
CTRL,
DATA

LED, BUSY
ADDR,

CLK,
MODE,
CTRL,
DATA

LED, BUSY

VIH All input pins 2.0 - - V

VIL - - 0.8 V

IIH1 VIN = 5V 5 8 12
IIH2 VIN = 5V 0.8 1 1.2 mA

IIH3 VIN = 5V - - 1

IIH4 VIN = 5V 50 75 100

IOL1 VOut = 0.5V 0.5 1.5 3 mA

IOL2 VOut = 0.5V 6 10 15 mA

IOH1 VOut = 4.5V -0.5 -1.5 -3 mA

IOH2 VOut = 4.5V -2.5 -4.5 -6.5 mA

ROSC = 620 KΩ

0 0.01 1

610 768 920 KHz

µA

µA
µA

µA

µA

Publication Release Date: April 1997

- 9 - Revision A2

W51300

AC CHARACTERISTICS

(VCC = 5V, VCCS = 0V, TA = 25° C)

PARAMETER SYM. CONDITIONS LIMITS UNIT

MIN. TYP. MAX

.

Input Debounce
Time

CLK Duty Cycle Write TCLK1 - - 50 -

CLK Frequency Write FCLK1 FOSC = 768 KHz - 384 - KHz

ADDR Duty Cycle TADDR - - 50 ­ADDR Frequency FADDR FOSC = 768 KHz - 384 - KHz
Input Clock Duty Cycle of Erase Pin TIN CPU mode 40 - 60
Input Clock Frequency of Erase Pin FIN CPU mode - - 100 KHz
Output Clock Duty Cycle of BWD

Pin
Output Clock Frequency of BWD Pin FOUT CPU mode,

Normal
mode

CPU mode TDEB2 1.27 1.9 2.54

Read TCLK2 - - 75 -

Read FCLK2 - 192 - KHz

TDEB1 FOSC = 768 KHz 21 32 42.7 mS

TOUT CPU mode - 50 -

- 100 Hz

FOSC = 768 KHz

µS

%
%

%

%

%

ANALOG CIRCUIT CHARACTERISTICS

(VCC = 5V, VSS = 0V, TA = 25° C)

PARAMETER SYM. CONDITIONS LIMITS UNIT

MIN. TYP. MAX.

MIC Input Voltage VMIC Peak to Peak - - 20 mV
MIC Input Resistance RMIC - - 10 ­Passband of LPF BW FOSC = 768 KHz - 3.5 - KHz
Speaker Output Power POUT
Speaker Voltage Output VOUT
Speaker Current Output IAUD VCC = 4.5V,

Speaker Resistance RSP - 8 16 -

REXT = 16Ω, rms
REXT = 600Ω

RL = 100Ω

- 10 -

- - 50 mW

- - 1.2 VP-P

-4.0 -5.0 -6.0 mA

KΩ

Ω

TYPICAL APPLICATION CIRCUIT (for reference only)

µ

V

DD

W51300

R2 R3

C2

R5

C3

MIC

8/16

Ω

SPEAKER

Rosc

Cd

C1

C4

R1

OSC
VCCD
VCCA

MIC
MICREF

AGC
VSSD
VSSA
SPK+
SPK-

W51300

L_REC

E_PLAY

L_PLAY

RESET

FWD
BWD
STOP

ERASE

SMODE

CPU

LED

ADDR

DATA

CLK

MODE

CTRL

EOP

R4

ADDR
DATA
CLK
MODE
CTRL
EOP

W55Fxx

Vcc

V

Cd

SS

Component List:

R1 = 470 K R3 = 8.2 K

R2 = 1 K

Ω

Ω

R4 = 220

Ω

Ω

Rosc = 620 K
C1 = 4.7 F

µ

Ω

C2 = 2.2 F

µ

C3 = C4 = 0.22 F

R5 = 5.1 K
Cd = 0.1 F

µ

Ω

Notes:

1. R1 and C1 can be adjusted for different AGC attack time and release time.

2. Set C3 = C4 to reduce ground noise.

Publication Release Date: April 1997

- 11 - Revision A2

W51300

Headquarters

No. 4, Creation Rd. III,
Science-Based Industrial Park,
Hsinchu, Taiwan
TEL: [phone]
FAX: [phone]
http://www.winbond.com.tw/
Voice & Fax-on-demand: 886-2-7197006

Winbond Electronics (H.K.) Ltd.

Rm. 803, World Trade Square, Tower II,
123 Hoi Bun Rd., Kwun Tong,
Kowloon, Hong Kong
TEL: [phone]
FAX: [phone]

Taipei Office

11F, No. 115, Sec. 3, Min-Sheng East Rd.,
Taipei, Taiwan
TEL: [phone]
FAX: [phone]

Note: All data and specifications are subject to change without notice.

- 12 -

Winbond Electronics North America Corp.
Winbond Memory Lab.
Winbond Microelectronics Corp.
Winbond Systems Lab.

2730 Orchard Parkway, San Jose,
CA 95134, U.S.A.
TEL: [phone]

FAX: [phone]