White Electronic Designs |
EDI8L24129V |
128Kx24 SRAM 3.3 Volt
FEATURES
128Kx24 bit CMOS Static Random Access Memory Array
<Fast Access Times: 10, 12, and 15ns
<Master Output Enable and Write Control
<TTL Compatible Inputs and Outputs
<Fully Static, No Clocks
Surface Mount Package
<119 Lead BGA (JEDEC MO-163), No. 391
<Small Footprint, 14mm x 22mm
<Multiple Ground Pins for Maximum Noise Immunity
Single +3.3V (±5%) Supply Operation DSP Memory Solution
<Motorola DSP5630xTM
<Analog Devices SHARCTM
The EDI8L24129VxxBC is a 3.3V, three megabit SRAM constructed with three 128Kx8 die mounted on a multilayer laminate substrate. With 10 to 15ns access times, x24 width and a 3.3V operating voltage, the EDI8L24129V is ideal for creating a single chip memory solution for the Motorola DSP5630x (Figure 3) or a two chip solution for the Analog Devices SHARCTM DSP (Figure 4).
The single or dual chip memory solutions offer improved system performance by reducing the length of board traces and the number of board connections compared to using multiple monolithic devices. For example, the capacitance load on the data lines for the BGA package is 58% less than a monolithic SOJ solution.
The JEDEC Standard 119 lead BGA provides a 44% space savings over using 128Kx8, 300mil wide SOJs and the BGA package has a maximum height of 100 mils compared to 148 mils for the SOJ packages. The BGA package also allows the use of the same manufacturing and inspection techniques as the Motorola DSP, which is also in a BGA package.
PIN CONFIGURATION |
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Pin Symbols |
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Pin Names |
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AØ-A16 |
Address Inputs |
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1 |
2 |
3 |
4 |
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5 |
6 |
7 |
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E |
Chip Enable |
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A |
NC |
AO |
A1 |
A2 |
A3 |
A4 |
NC |
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W |
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Master Write Enable |
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G |
Master Output Enable |
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B |
NC |
A5 |
A6 |
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E |
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A7 |
A8 |
NC |
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C |
I/012 |
NC |
NC |
NC |
NC |
NC |
I/00 |
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DQØ-DQ23 |
Common Data Input/Output |
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D |
I/013 |
VCC |
GND |
GND |
GND |
VCC |
I/01 |
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VCC |
Power (3.3V±5%) |
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E |
I/014 |
GND |
VCC |
GND |
VCC |
GND |
I/02 |
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GND |
Ground |
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F |
I/015 |
VCC |
GND |
GND |
GND |
VCC |
I/03 |
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NC |
No Connection |
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G |
I/016 |
GND |
VCC |
GND |
VCC |
GND |
I/04 |
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H |
I/017 |
VCC |
GND |
GND |
GND |
VCC |
I/05 |
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I |
NC |
GND |
VCC |
GND |
VCC |
GND |
NC |
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J |
I/018 |
VCC |
GND |
GND |
GND |
VCC |
I/06 |
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K |
I/019 |
GND |
VCC |
GND |
VCC |
GND |
I/07 |
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L |
I/020 |
VCC |
GND |
GND |
GND |
VCC |
I/08 |
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M |
I/021 |
GND |
VCC |
GND |
VCC |
GND |
I/09 |
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N |
I/022 |
VCC |
GND |
GND |
GND |
VCC |
I/010 |
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O |
I/023 |
NC |
NC |
NC |
NC |
NC |
I/011 |
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P |
NC |
A9 |
A10 |
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W |
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A11 |
A12 |
NC |
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Q |
NC |
A13 |
A14 |
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G |
A15 |
A16 |
NC |
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July 2002 Rev 3 |
1 |
White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com |
ECO #14690 |
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White Electronic Designs |
EDI8L24129V |
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BLOCK DIAGRAM |
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A0-A16 |
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17 |
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G |
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128K x 24 |
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W |
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Memory |
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E |
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Array |
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DQ0-DQ7
DQ8-DQ15
DQ16-DQ23
ABSOLUTE MAXIMUM RATINGS
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Voltage on any pin relative to VSS |
-0.5V to 4.6V |
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Operating Temperature TA (Ambient) |
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Commercial |
0°C to + 70°C |
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Industrial |
-40°C to +85°C |
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Storage Temperature |
-55°C to +125°C |
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Power Dissipation |
1.5 Watts |
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Output Current. |
50 mA |
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Junction Temperature, TJ |
175°C |
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*Stress greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions greater than those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
TRUTH TABLE
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G |
E |
W |
Mode |
Output |
Power |
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X |
H |
X |
Standby |
High Z |
ICC2,ICC3 |
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H |
L |
H |
Output Deselect |
High Z |
ICC1 |
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L |
L |
H |
Read |
DOUT |
ICC1 |
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X |
L |
L |
Write |
DIN |
ICC1 |
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RECOMMENDED OPERATING CONDITIONS
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Parameter |
Sym |
Min |
Typ |
Max |
Units |
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Supply Voltage |
VCC |
3.135 |
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3.3 |
3.465 |
V |
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Supply Voltage |
VSS |
0 |
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0 |
0 |
V |
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Input High Voltage |
VIH |
2.2 |
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– |
VCC+0.3 |
V |
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Input Low Voltage |
VIL |
-0.3 |
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– |
0.8 |
V |
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CAPACITANCE |
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(f=1.0MHz, VIN=VCC or VSS) |
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Parameter |
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Sym |
Max |
Unit |
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Address Lines |
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CA |
8 |
pF |
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Data Lines |
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CD/Q |
10 |
pF |
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Write & Output Enable Lines |
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8 |
pF |
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W, |
G |
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Chip Enable Lines |
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8 |
pF |
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EØ-E2 |
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These parameters are sampled, not 100% tested.
White Electronic Designs Corporation • Westborough MA • (508) 366-5151 |
2 |
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White Electronic Designs |
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EDI8L24129V |
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DC ELECTRICAL CHARACTERISTICS |
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Parameter |
Sym |
Conditions |
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Min |
Max |
Units |
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10ns 12-15ns |
ns |
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Operating Power Supply Current |
ICC1 |
W= VIL, II/O = 0mA, |
420 |
360 |
mA |
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Min Cycle |
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Standby (TTL) Supply Current |
ICC2 |
E > VIH, VIN < VIL or |
90 |
75 |
mA |
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VIN > VIH, f=ØMHz |
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Full Standby CMOS |
ICC3 |
E > VCC-0.2V |
10 |
10 |
mA |
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Supply Current |
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VIN > VCC-0.2V |
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VIN < 0.2V |
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Input Leakage Current |
ILI |
VIN = 0V to VCC |
±10 |
±10 |
µA |
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Output Leakage Current |
ILO |
V I/O = 0V to VCC |
±10 |
±10 |
µA |
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Output High Volltage |
VOH |
IOH = -4.0mA |
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2.4 |
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V |
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Output Low Voltage |
VOL |
IOL = 8.0mA |
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0.4 |
0.4 |
V |
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AC TEST CIRCUIT |
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AC TEST CONDITIONS |
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Input Pulse Levels |
VSS to 3.0V |
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FIG. 1 |
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Input Rise and Fall Times |
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5ns |
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Input and Output Timing Levels |
1.5V |
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RL= 50 |
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Output Load |
Figure 1 |
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DOUT |
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Z0= 50 |
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30pf |
VL=1.5V |
(NOTE: For TEHQZ,TGHQZ and TWLQZ, Figure 2) |
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FIG. 2
+3.3V
319
DOUT
353 5pf
3White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com