This user's guide describes the specifications, board connection description, characteristics, operation,
and use of the combined, two board TPS92518 Evaluation Module (EVM). A complete schematic diagram,
printed circuit board layouts, and bill of materials are included in this document.
4TPS92518EVM-878 Bill of Materials..................................................................................... 14
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1Description
The complete two-board TPS92518EVM solution provides a dual-channel, high-brightness LED current
regulator which is configurable via a graphical user interface (GUI). It is designed to operate with an input
voltage in the range of 6.5–65 V. The EVM is setup for default output currents of 538 mA per channel,
easily adjustable to different currents up to 1.65 A, for an LED stack between approximately 3 V to nearly
65 V. The TPS92518 provides high efficiency, high bandwidth, fast PWM dimming, SPI dimming, and
adjustable on-time.
1.1Typical Applications
This manual outlines the operation and implementation of the TPS92518 as a dual-channel LED current
regulator with the specifications listed in Table 1. For applications with a different input voltage range or
different output voltage range, refer to the TPS92518 data sheet (SLUSCR7). The TPS92518EVM-878
evaluation board is designed to be controlled by a TI microcontroller board, part number
LEDSPIMCUEVM-879, available separately, although it can be controlled by any SPI-capable control
system. Note that the TPS92518x supports a means to enable the part without SPI communication. By
applying a voltage above the second threshold level, 23.6 V typical, on the ENABLE pin, the state of the
LEDxEN register is bypassed. This allows a TPS92518 to be powered and operated using the default
register values (for details, refer to the TPS92518 data sheet (SLUSCR7)).
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1.2Connector Description
Table 1 describes the connectors and Table 2 lists the test points on the EVM and how to properly
connect, set up, and use the TPS92518EVM-878.
Table 1. Connector Descriptions
ConnectorLabelDescription
J1 connects power to channel 1 of the board, and J18 connects power to channel 2.
J1 and J18VIN, GND
J2 and J3LED+, LED– and GND
J4SPI control header
J10 and J11
J12 and J14
SPI control from an
LEDSPIMCUEVM-879
controller board
SPI MISO pullup resistor
jumpers
The evaluation board is set up with both channel supplies connected through R15,
so power connection can be to either J1 or J18 to power both channels from a
single supply. The board silkscreen identifies power (one pin) and ground (two pins)
connections on each connector.
J2 connects the channel 1 output to the LED load, and J3 connects the channel 2
output to a separate LED load. The leads to the LED load should be twisted and
kept short to minimize voltage drop, inductance, and EMI. The board silkscreen
identifies LED+ and LED– and GND.
J4 allows attachment of a header cable for SPI control of the chip. The board
silkscreen identifies GND, MISO, MOSI, SCK, and SSN.
J10 and J11 allow daisy-chaining TPS92518EVM-878 boards to each other with one
LEDSPIMCUEVM-879 control board attached to the left-hand side of the left-most
evaluation board for controlling the TPS92518. This interface allows control of the
chip hardware enable line, PWM inputs to both channels, SPI lines, and hardware
address lines for multiple SSN settings for systems that have multiple
TPS92518EVM-878 boards controlled by a single LEDSPIMCUEVM-879 controller
interface board.
J12 and J14 provide for two different values of pullup resistor to the MISO line, 2.2
kΩ and 4.7 kΩ provided on the evaluation board.
J13 and J15 are jumpers provided to allow for PWM signals to the two channels to
J13 and J15PWM jumpers
J9
J8MISO
J7SPI DI out
J10Control connector
SSN configuration
jumper
be generated from an LEDSPIMCUEVM-879 (when populated) or applied from an
external source (when jumper is removed and the signal is connected to pin 1 one
of the connector). J13 provides PWM to channel 1 of the chip, while J15 provides
PWM to channel 2.
J9 allows configuration of the SSN chip select line for use with multiple chips on the
same SPI bus.
This jumper enables configurations: shorting pins 5–6 sets the SPI communication
architecture up for a single TPS92518 or the end point of a daisy chain of them,
shorting 1–2 and 5–6 sets up for a TPS92518 in the middle of a daisy-chain, and
shorting 3–4 and 5–6 provides for a star architecture.
If this jumper is closed, it allows multiple TPS92518 devices to be connected in a
star configuration.
This connector allows the TPS92518 board to attach to a microcontroller, such as
the LEDSPIMCUEVM-879.
Table 2. Test Points
Test PointDescription
Metal turretsAll metal turrets are grounds.
PWM1 and PWM2The test points labeled PWM1 and PWM2 allow for external signal sources to control the TPS92518
ENABLEThe test point labeled ENABLE near J10 allows for an external enable signal to control switching of
VDIGIThe VDIGI test point allows for external application of power to the MISO pull-up resistors or
SW1 and SW2The SW1 and SW2 test points provide locations to monitor the switch nodes of the two channels.
VINThe VIN test point allows for external application of power to the digital system of the chip
hardware PWM dimming.
the TPS92518.
monitoring of the pull-up voltage.
independent of the analog power supplies to either channel 1 or 2. On the evaluation board this is
shorted to the analog supply by R16, so separate application of power is neither necessary nor useful
without removal of R16.
2Performance Specifications
Table 3. TPS92518 EVM Performance Specifications
ParameterTest ConditionsMinTypMaxUnits
Input Characteristics
Voltage6.51465V
Maximum Input
Current
Output Characteristics
Output Voltage,
V
LED
Output Current,
I
LED
Dimming Methods
AnalogLEDx_PKTH_DAC register = 0 to 255yes
PWMUse PWMx pin inputyes
Shunt FET
SLUUBM0–May 2017
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Output/LED Voltage (absolute maximum)065
Output/LED Voltage (practical limit)60
Output current01.65
Default Output Current (Registers = 127/255)0.538
Use external FET, program LEDx_MAXOFF_DAC register as per
datasheet outline
Shunt FET dimming is simple with the TPS92518. Short leads between the evaluation board and the LED
load boards are important to prevent V
board also helps to reduce V
overshoot. Adding an appropriately rated diode from the LED+ line that
LED
overshoot. Locating the shunt FET on or near the LED load
LED
conducts back to the positive VINinput will clamp voltage overshoot.
NOTE:There is no provision for mounting such a diode on the board: it must be soldered into the
wiring used to connect the shunt FET into the circuit.
Similarly, repopulating R17 and C21 with different values will also protect the V
pin from overshoots.
LED
Figure 12 illustrates the circuitry modifications for shunt FET dimming: increasing the size of R17, adding
a diode to VIN, and adding an appropriately-rated FET with a gate pulldown resistor. Either adding a diode
or increasing R17 should be adequate. While the modified schematic shows both output capacitors
removed, replacing one with a 220-pF capacitor rather than just removing both may give better V
overshoot performance.