Texas Instruments TPS73001DBVR, TPS73018DBVR, TPS73018YZQR, TPS73025DBVR, TPS73025YZQR Schematic [ru]
...
10 100 1 k 10 k
10
40
80
100 k 1 M 10 M
Ripple Rejection (dB)
Frequency (Hz)
I
OUT
= 10 mA
50
0
VIN= 3.8 V
C
OUT
= 10 Fm
CNR= 0.01 Fm
I
OUT
= 200 mA
20
30
60
70
90
100
TPS730xx
GNDEN NR
IN OUT
V
IN
V
OUT
V
IN
V
OUT
2.2µF
0.01µF
(1)
0.1µF
NOTE: (1) This capacitor isoptional.
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SBVS054J –NOVEMBER 2004–REVISED APRIL 2015
TPS730 Low-Noise, High PSRR, RF, 200-mA Low-Dropout Linear Regulators
1 Features 3 Description
1
• 200-mA RF Low-Dropout Regulator
With Enable
• Available in Fixed Voltages from 1.8 V to 3.3 V
and Adjustable Voltages (1.22 V to 5.5 V)
• High PSRR (68 dB at 100 Hz)
• Low Noise (33 μV
, TPS73018)
RMS
• Fast Start-Up Time (50 μs)
• Stable With a 2.2-μF Ceramic Capacitor
• Excellent Load/Line Transient Response
• Very Low Dropout Voltage (120 mV at 200 mA)
• 5- and 6-Pin SOT-23 (DBV), and Wafer Chip
Scale (YZQ) Packages
2 Applications
• RF: VCOs, Receivers, ADCs
• Audio
• Cellular and Cordless Telephones
• Bluetooth®, Wireless LAN
• Handheld Organizers, PDAs
The TPS730 family of low-dropout (LDO) low-power
linear voltage regulators features high power-supply
rejection ratio (PSRR), low noise, fast start-up, and
excellent line and load transient responses in a small
SOT-23 package. NanoStar™ packaging gives an
ultrasmall footprint as well as an ultralow profile and
package weight, making it ideal for portable
applications such as handsets and PDAs. Each
device in the family is stable, with a small, 2.2-μF
ceramic capacitor on the output. The TPS730 family
uses an advanced, proprietary BiCMOS fabrication
process to yield low dropout voltages (for example,
120 mV at 200 mA, TPS73030). Each device
achieves fast start-up times (approximately 50 μs with
a 0.001-μF bypass capacitor) while consuming low
quiescent current (170 μA typical). Moreover, when
the device is placed in standby mode, the supply
current is reduced to less than 1 μA. The TPS73018
exhibits approximately 33 μV
noise at 1.8 V output with a 0.01-μF bypass
capacitor. Applications with analog components that
are noise-sensitive, such as portable RF electronics,
benefit from the high PSRR and low-noise features
as well as the fast response time.
of output voltage
RMS
TPS730
Device Information
(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
SOT-23 (5) 2.90 mm × 1.60 mm
TPS730 SOT-23 (6) 2.90 mm × 1.60 mm
DSBGA (5) 1.35 mm × 1.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Simplified Schematic Ripple Rejection vs Frequency
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS730
SBVS054J –NOVEMBER 2004–REVISED APRIL 2015
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Table of Contents
1 Features.................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions......................... 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings ............................................................ 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information.................................................. 4
6.5 Electrical Characteristics .......................................... 5
6.6 Typical Characteristics.............................................. 6
7 Detailed Description.............................................. 9
7.1 Overview ................................................................... 9
7.2 Functional Block Diagrams ....................................... 9
7.3 Feature Description................................................. 10
7.4 Device Functional Modes........................................ 10
8 Application and Implementation ........................ 11
8.1 Application Information............................................ 11
8.2 Typical Application .................................................. 13
8.3 Do's and Don'ts....................................................... 14
9 Power Supply Recommendations...................... 15
10 Layout................................................................... 15
10.1 Layout Guidelines ................................................. 15
10.2 Layout Example .................................................... 15
10.3 Thermal Considerations........................................ 16
10.4 Power Dissipation ................................................. 16
11 Device and Documentation Support................. 18
11.1 Device Support...................................................... 18
11.2 Documentation Support ........................................ 18
11.3 Trademarks ........................................................... 18
11.4 Electrostatic Discharge Caution............................ 18
11.5 Glossary ................................................................ 18
12 Mechanical, Packaging, and Orderable
Information........................................................... 18
12.1 TPS730YZQ Nanostar™ Wafer Chip Scale
Information............................................................... 19
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision I (February, 2011) to Revision J Page
• Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section ................................................................................................. 1
• Changed fourth bullet of Features list to low noise ............................................................................................................... 1
• Changed front-page figure ..................................................................................................................................................... 1
• Added Pin Configuration and Functions section .................................................................................................................... 3
• Changed "free-air temperature" to "junction temperature" in Absolute Maximum Ratings condition statement ................... 4
• Deleted Dissipation Ratings table; added Thermal Information table ................................................................................... 4
• Added condition statement to Typical Characteristics ........................................................................................................... 6
• Moved Ordering Information to Device Nomenclature section ............................................................................................ 18
Changes from Revision H (October, 2007) to Revision I Page
• Corrected units in y-axis of Figure 5....................................................................................................................................... 6
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A3 A1
C3 C1
B2
IN
OUT
GND
NR
EN
3
2
4
5
6
1
GND
OUT
NR
FB
EN
IN
Adjustable Voltage Version
3
2
4
5
1
GND
OUT
NREN
IN
Fixed Voltage Versions
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5 Pin Configuration and Functions
TPS730
SBVS054J –NOVEMBER 2004–REVISED APRIL 2015
DBV Package
5-Pin SOT-23
Top View
DBV Package
6-Pin SOT-23
Top View
YZQ Package
5-Pin DSBGA
Top View
Pin Functions
PIN
NAME
EN 3 A3 I
FB 5 N/A I
GND 2 A1 — Regulator ground.
IN 1 C3 I Input to the device.
OUT 6 C1 O Output of the regulator.
NR 4 B2 — the internal bandgap. This configuration improves power-supply rejection and reduces output
NO. I/O DESCRIPTION
SOT-23 DSBGA
Enable pin. Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts
the regulator into shutdown mode. EN can be connected to IN if not used.
Feedback pin. This terminal is the feedback input pin for the adjustable device. Fixed-voltage
versions in the DBV package do not have this pin.
Noise Reduction pin. Connecting an external capacitor to this pin filters noise generated by
noise.
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TPS730
SBVS054J –NOVEMBER 2004–REVISED APRIL 2015
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6 Specifications
6.1 Absolute Maximum Ratings
over operating junction temperature range (unless otherwise noted)
Input range, V
Voltage Enable range, V
Output range, V
Current Peak output, I
Continuous total power dissipation See Thermal Information
Temperature YZQ package –40 125 °C
Junction, T
Storage, T
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
IN
EN
OUT
OUT(max)
DBV package –40 150
J
stg
6.2 ESD Ratings
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
Electrostatic discharge V
(ESD)
Charged device model (CDM), per JEDEC specification JESD22-C101,
(2)
all pins
(1)
MIN MAX UNIT
–0.3 6
–0.3 6 V
–0.3 6
Internally limited
–65 150
VALUE UNIT
(1)
±2000
±500
6.3 Recommended Operating Conditions
over operating junction temperature range (unless otherwise noted).
MIN NOM MAX UNIT
V
IN
V
EN
V
OUT
I
OUT
T
J
C
IN
C
OUT
C
NR
C
FF
R
2
(1) If CFFis not used or V
Input supply voltage 2.7 5.5 V
Enable supply voltage 0 V
Output voltage V
FB
IN
5 V
V
Output current 0 200 mA
Operating junction temperature –40 125 °C
Input capacitor 0.1 1 µF
Output capacitor 2.2
(1)
10 µF
Noise reduction capacitor 0 10 nF
Feed-forward capacitor 15 pF
Lower feedback resistor 30.1 kΩ
OUT(nom)
< 1.8 V, the minimum recommended C
OUT
= 4.7 µF.
6.4 Thermal Information
TPS73001
THERMAL METRIC
R
θJA
R
θJC(top)
R
θJB
ψ
JT
ψ
JB
Junction-to-ambient thermal resistance 225.1 178.5
Junction-to-case (top) thermal resistance 78.4 1.4
Junction-to-board thermal resistance 54.7 62.1 °C/W
Junction-to-top characterization parameter 3.3 0.9
Junction-to-board characterization parameter 53.8 62.1
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(1)
DBV (SOT-23) YZQ (DSBGA) UNIT
6 PINS 5 PINS
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SBVS054J –NOVEMBER 2004–REVISED APRIL 2015
6.5 Electrical Characteristics
Over recommended operating temperature range TJ= –40 to +125°C, VEN= VIN, VIN= V
10 μF, CNR= 0.01 μF (unless otherwise noted). Typical values are at 25°C.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
I
OUT
V
IN
FB
Input voltage range
Continuous output current 0 200 mA
Internal reference (TPS73001) 1.201 1.225 1.25 V
Output voltage
V
OUT
range
Output voltage accuracy 0 µA ≤ I
ΔV
OUT(ΔVIN)
ΔV
OUT(ΔIOUT)
V
DO
I
CL
I
GND
I
SHUTDOWN
I
FB
PSRR TPS73028 f = 100 Hz, I
V
n
t
STR
V
EN(high)
V
EN(low)
I
EN
Line regulation
Load regulation 0 µA ≤ I
Dropout voltage
(VIN= V
OUT(nom)
Output current limit V
Ground pin current 0 µA < I
Shutdown current
FB pin current VFB= 1.8 V 1 μA
Power-supply
rejection ratio
Output noise BW = 200 Hz to 100 kHz, I
voltage CNR= 0.01 μF
Start-up time TPS73018 RL= 14 Ω, C
High-level enable input voltage 2.7 V ≤ VIN≤ 5.5 V 1.7 V
Low-level enable input voltage 2.7 V ≤ VIN≤ 5.5 V 0 0.7 V
EN pin current VEN= 0 V –1 1 μA
UVLO
(1) Minimum VINis 2.7 V or V
(2) Dropout is not measured for the TPS73018 and TPS73025 since minimum VIN= 2.7 V.
(3) For adjustable versions, this applies only after VINis applied; then VENtransitions high to low.
(1)
TPS73001 V
≤ 200 mA, 2.75 V ≤ VIN≤ 5.5 V –2% V
(1)
(2)
– 0.1 V)
(3)
TPS73018 33 μV
OUT
V
+ 1 V ≤ VIN≤ 5.5 V 0.05 %/V
OUT
≤ 200 mA, TJ= 25°C 5 mV
OUT
I
= 200 mA 120 210 mV
OUT
= 0 V 285 600 mA
OUT
< 200 mA 170 250 μA
OUT
VEN= 0 V, 2.7 V ≤ VIN≤ 5.5 V 0.07 1 μA
= 200 mA, TJ= 25°C 68 dB
OUT
= 200 mA,
OUT
= 1 µF, CNR= 0.001 μF 50 μs
OUT
Threshold, VCCrising 2.25 2.65 V
Hysteresis 100 mV
+ VDO, whichever is greater.
OUT
(1)
+ 1 V
OUT(nom)
, I
OUT
2.7 5.5 V
FB
5.5 – V
OUT(nom)
TPS730
= 1 mA, C
DO
2% V
IN
OUT
V
V
=
RMS
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0
20
40
60
80
100
120
140
160
180
−40 −25−10 5 20 35 50 65 80 95 110 125
I
OUT
= 200 mA
I
OUT
= 10 mA
VIN= 2.7 V
C
OUT
= 10 Fm
TJ(°C)
V
DO
(mV)
60
50
40
30
20
10
0
RMS Output Noise ( V )m
RMS
0.001 0.01 0.1
C ( F)m
NR
BW = 100 Hz to 100 kHz
V = 2.8 V
I = 200 mA
C = 10 F
OUT
OUT
OUT
m
0
50
100
150
200
250
−40 −25−10 5 20 35 50 65 80 95 110 125
TJ(°C)
I
OUT
= 1 mA
VIN= 3.8 V
C
OUT
= 10 Fm
I
OUT
= 200 mA
I
GND
(mA)
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
100 1 k 10 k 100 k
Frequency (Hz)
VIN= 3.8 V
I
OUT
= 200 mA
C
OUT
= 10 Fm
CNR= 0.1 Fm
CNR= 0.001 Fm
CNR= 0.0047 Fm
CNR= 0.01 Fm
Output Spectral Noise Density (
mV/ Hz√
)
2.795
2.796
2.797
2.798
2.799
2.800
2.801
2.802
2.803
2.804
2.805
0 50 100 150 200
I
OUT
(mA)
VIN= 3.8 V
C
OUT
= 10 Fm
TJ= 25 C°
V
OUT
(V)
2.775
2.780
2.785
2.790
2.795
2.800
2.805
−40 −25−10 5 20 35 50 65 80 95 110 125
TJ(°C)
I
OUT
= 200 mA
I
OUT
= 1 mA
VIN= 3.8 V
C
OUT
= 10 Fm
V
OUT
(V)
TPS730
SBVS054J –NOVEMBER 2004–REVISED APRIL 2015
6.6 Typical Characteristics
Over recommended operating temperature range TJ= –40°C to +125°C, VEN= VIN, VIN= V
10 μF, CNR= 0.01 μF, V
Figure 1. TPS73028 Output Voltage vs Output Current Figure 2. TPS73028 Output Voltage vs Junction
OUT(nom)
= 2.8 V (unless otherwise noted). Typical values are at TJ= 25°C.
OUT(nom)
+ 1 V, I
Temperature
= 1 mA, C
OUT
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OUT
=
Figure 3. TPS73028 Ground Current vs Junction Figure 4. TPS73028 Output Spectral Noise Density vs
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Figure 5. Root Mean Square Output Noise vs C
Temperature Frequency
NR
Figure 6. TPS73028 Dropout Voltage vs Junction
Temperature
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100
50
0 20 40 60 80 100 120
150
200
250
140 160 180 200
0
I
OUT
(mA)
TJ= 125 C°
TJ= 25 C°
TJ= −55 C°
V
DO
(mV)
500 mV/div
1s/div
V
IN
V
OUT
V
OUT
= 3 V
RL= 15 W
Time (ms)
0 302010 40 50 7060 80 90 100
I
OUT
= 200 mA
C
OUT
= 2.2 Fm
CNR= 0.01 Fm
0
-20
3.8
dv
dt
0.4 V
ms
20
4.8
V
IN
(mV)
V
OUT
(mV)
=
Time (ms)
0
0 15010050 200 250 350300 400 450
20
0
−20
100
500
VIN= 3.8 V
C
OUT
= 10 Fm
−40
200
300
di
dt
0.02A
ms
1mA
I
OUT
(mA)
DV
OUT
(mV)
=
10 100 1 k 10 k
10
40
80
100 k 1 M 10 M
Ripple Rejection (dB)
Frequency (Hz)
I
OUT
= 10 mA
50
0
VIN= 3.8 V
C
OUT
= 10 Fm
CNR= 0.01 Fm
I
OUT
= 200 mA
20
30
60
70
90
100
3
Time (ms)
0 604020 80 100 140120 160 180 200
VIN= 3.8 V
V
OUT
= 2.8 V
I
OUT
= 200 mA
C
OUT
= 2.2 Fm
TJ= 25 C°
1
2
0
0
2
CNR= 0.0047 Fm
CNR= 0.01 Fm
4
CNR= 0.001 Fm
V
EN
(V)
V
OUT
(V)
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Typical Characteristics (continued)
TPS730
SBVS054J –NOVEMBER 2004–REVISED APRIL 2015
Over recommended operating temperature range TJ= –40°C to +125°C, VEN= VIN, VIN= V
10 μF, CNR= 0.01 μF, V
Figure 7. TPS73028 Ripple Rejection vs Frequency Figure 8. TPS73028 Output Voltage, Enable Voltage vs Time
OUT(nom)
= 2.8 V (unless otherwise noted). Typical values are at TJ= 25°C.
OUT(nom)
(Start-Up)
+ 1 V, I
= 1 mA, C
OUT
OUT
=
Figure 9. TPS73028 Line Transient Response
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Figure 11. Power Up and Power Down
Figure 10. TPS73028 Load Transient Response
Figure 12. Dropout Voltage vs Output Current
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0.01
0.1
10
100
0 0.02 0.04 0.06 0.08 0.20
I
OUT
(A)
1
Region of Instability
Region of Stability
C
OUT
= 2.2 µF
VIN = 5.5 V, V
OUT
≥ 1.5 V
TJ = −40°C to 125°C
ESR, Equivalent Series Resistance (Ω)
0.01
0.1
10
100
0 0.02 0.04 0.06 0.08
0.20
I
OUT
(A)
1
Region of Instability
Region of Stability
C
OUT
= 10 µF
VIN = 5.5 V
TJ = −40°C to 125°C
ESR, Equivalent Series Resistance (Ω)
TPS730
SBVS054J –NOVEMBER 2004–REVISED APRIL 2015
Typical Characteristics (continued)
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Over recommended operating temperature range TJ= –40°C to +125°C, VEN= VIN, VIN= V
10 μF, CNR= 0.01 μF, V
OUT(nom)
= 2.8 V (unless otherwise noted). Typical values are at TJ= 25°C.
OUT(nom)
+ 1 V, I
OUT
Figure 13. Typical Regions of Stability Equivalent Series Figure 14. Typical Regions of Stability Equivalent Series
Resistance (ESR) vs Output Current Resistance (ESR) vs Output Current
= 1 mA, C
OUT
=
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_
+
Thermal
Shutdown
Current
Sense
R1
R2
GND
EN
SHUTDOWN
V
ref
UVLO
ILIM
250 kW
NR
QuickStart
Bandgap
Reference
1.22V
UVLO
2.45V
R2 = 40 kW
IN
IN OUT
_
+
Thermal
Shutdown
Bandgap
Reference
1.22V
Current
Sense
R2
GND
EN
SHUTDOWN
V
ref
UVLO
ILIM
External to
the Device
R1
UVLO
2.45V
250 kW
NR
FB
59 k
QuickStart
OUTIN
IN
TPS730
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SBVS054J –NOVEMBER 2004–REVISED APRIL 2015
7 Detailed Description
7.1 Overview
The TPS730 family of low-dropout (LDO) regulators has been optimized for use in noise-sensitive, batteryoperated equipment. The device features extremely low dropout voltages, high PSRR, ultra-low output noise, low
quiescent current (170 μA typically), and enable-input to reduce supply currents to less than 1 μA when the
regulator is turned off.
7.2 Functional Block Diagrams
Figure 15. TPS730 Block Diagram (Adjustable-Voltage Version)
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Figure 16. TPS730 Block Diagram (Fixed-Voltage Versions)
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SBVS054J –NOVEMBER 2004–REVISED APRIL 2015
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7.3 Feature Description
7.3.1 Undervoltage Lockout (UVLO)
The TPS730 uses an undervoltage lockout (UVLO) circuit that disables the output until the input voltage is
greater than the rising UVLO voltage. This circuit ensures that the device does not exhibit any unpredictable
behavior when the supply voltage is lower than the operational range of the internal circuitry, V
IN(min)
.
7.3.2 Shutdown
The enable pin (EN) is active high. Enable the device by forcing the EN pin to exceed V
(1.7 V, minimum).
EN(high)
Turn off the device by forcing the EN pin to drop below 0.7 V. If shutdown capability is not required, connect EN
to IN.
7.3.3 Foldback Current Limit
The TPS730 features internal current limiting and thermal protection. During normal operation, the TPS730 limits
output current to approximately 400 mA. When current limiting engages, the output voltage scales back linearly
until the overcurrent condition ends. While current limiting is designed to prevent gross device failure, do not
exceed the power dissipation ratings of the package or the absolute maximum voltage ratings of the device.
7.4 Device Functional Modes
7.4.1 Normal Operation
The device regulates to the nominal output voltage under the following conditions:
• The input voltage is at least as high as V
• The input voltage is greater than the nominal output voltage added to the dropout voltage.
• The enable voltage is greater than V
EN(min)
• The output current is less than the current limit.
• The device junction temperature is less than the maximum specified junction temperature.
IN(min)
.
.
7.4.2 Dropout Operation
If the input voltage is lower than the nominal output voltage plus the specified dropout voltage, but all other
conditions are met for normal operation, the device operates in dropout mode. In this mode of operation, the
output voltage is the same as the input voltage minus the dropout voltage. The transient performance of the
device is significantly degraded because the pass device is in the linear region and no longer controls the current
through the LDO. Line or load transients in dropout can result in large output voltage deviations.
7.4.3 Disabled
The device is disabled under the following conditions:
• The enable voltage is less than the enable falling threshold voltage or has not yet exceeded the enable rising
threshold.
• The device junction temperature is greater than the thermal shutdown temperature.
• The input voltage is less than UVLO
falling
.
Table 1 shows the conditions that lead to the different modes of operation.
Table 1. Device Functional Mode Comparison
OPERATING MODE
Normal mode VEN> V
Dropout mode V
Disabled mode
(any true condition disables the VIN< UVLO
device)
(1) Approximate value for thermal shutdown.
VIN> V
IN(min)
V
OUT(nom)
VIN> V
< VIN< V
IN
+ VDOand
IN(min)
OUT(nom)
falling
+ V
DO
V
VEN> V
VEN< V
PARAMETER
EN
EN(high)
EN(high)
EN(low)
I
OUT
I
< I
OUT
LIM
— TJ< 125°C
— TJ> 165°C
TJ< 125°C
T
J
(1)
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