TEXAS INSTRUMENTS TPS7201Q, TPS7225Q, TPS7230Q, TPS7233Q, TPS7248Q Technical data

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TPS7201Q, TPS7225Q, TPS7230Q

TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY

MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS

SLVS102G – MARCH 1995 – REVISED JUNE 2000

Available in 5-V, 4.85-V, 3.3-V, 3.0-V, and

2.5-V Fixed-Output and Adjustable Versions

Dropout Voltage <85 mV Max at IO = 100 mA (TPS7250)

Low Quiescent Current, Independent of Load, 180 µA Typ

8-Pin SOIC and 8-Pin TSSOP Package

Output Regulated to ±2% Over Full Operating Range for Fixed-Output Versions

Extremely Low Sleep-State Current,

SENSE†/FB

RESET/PG

†

SENSE – Fixed voltage options only (TPS7225, TPS7230, TPS7233, TPS7248, and TPS7250)

‡

FB – Adjustable version only (TPS7201)

D, P, OR PW PACKAGE

(TOP VIEW)

‡

GND

1 2 3 4

8 7 6 5

OUT OUT IN IN

0.5 µA Max

Power-Good (PG) Status Output

description

600

TA = 25°C

500

The TPS72xx family of low-dropout (LDO) voltage regulators offers the benefits of low-dropout voltage, micropower operation, and miniaturized

400

TPS7225

TPS7230

packaging. These regulators feature extremely low dropout voltages and quiescent currents

300

compared to conventional LDO regulators. Offered in small-outline integrated-circuit (SOIC) packages and 8-terminal thin shrink small-outline (TSSOP), the TPS72xx series devices are ideal for cost-sensitive designs and for designs where board space is at a premium.

200

– Dropout Voltage – mV

100

TPS7250

TPS7248

A combination of new circuit design and process innovation has enabled the usual pnp pass transistor to be replaced by a PMOS device.

0 50 100 150

IO – Output Current – mA

Because the PMOS pass element behaves as a low-value resistor, the dropout voltage is very low – maximum of 85 mV at 100 mA of load current

Figure 1. Typical Dropout Voltage Versus

Output Current

(TPS7250) – and is directly proportional to the load current (see Figure 1). Since the PMOS pass element is a voltage-driven device, the quiescent current is very low (300 µA maximum) and is stable over the entire range of output load current (0 mA to 250 mA). Intended for use in portable systems such as laptops and cellular phones, the low-dropout voltage and micropower operation result in a significant increase in system battery operating life.

TPS7233

200 250

The TPS72xx also features a logic-enabled sleep mode to shut down the regulator, reducing quiescent current to 0.5 µA maximum at T

= 25°C. Other features include a power-good function that reports low output voltage

and may be used to implement a power-on reset or a low-battery indicator. The TPS72xx is offered in 2.5-V , 3-V , 3.3-V , 4.85-V, and 5-V fixed-voltage versions and in an adjustable version

(programmable over the range of 1.2 V to 9.75 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges (3% for adjustable version).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS7201Q, TPS7225Q, TPS7230Q

TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS

SLVS102G – MARCH 1995 – REVISED JUNE 2000

AVAILABLE OPTIONS

OUTPUT VOLTAGE

–55°C to 150°C

The D package is available taped and reeled. Add R suffix to device type (e.g., TPS7250QDR). The PW package is only available left-end taped and reeled. The TPS7201Q is programmable using an external resistor divider (see application information). The chip form is tested at 25°C.

(V)

MIN TYP MAX

4.9 5 5.1 TPS7250QD TPS7250QP TPS7250QPWR TPS7250Y

4.75 4.85 4.95 TPS7248QD TPS7248QP TPS7248QPWR TPS7248Y

3.23 3.3 3.37 TPS7233QD TPS7233QP TPS7233QPWR TPS7233Y

2.94 3 3.06 TPS7230QD TPS7230QP TPS7230QPWR TPS7230Y

2.45 2.5 2.55 TPS7225QD TPS7225QP TPS7225QPWR TPS7225Y Adjustable

1.2 V to 9.75 V

SMALL OUTLINE

(D)

TPS7201QD TPS7201QP TPS7201QPWR TPS7201Y

PACKAGED DEVICES

TPS72xx

‡

PDIP

(P)

TSSOP

(PW)

CHIP FORM

(Y)

0.1 µF

‡

TPS7225Q, TPS7230Q, TPS7233Q, TPS7248Q, TPS7250Q (fixed-voltage options)

NOTE A: Capacitor selection is nontrivial. See application information section

for details.

SENSE

GND

OUT OUT

2 1 7 8

250 kΩ

(see Note A)

10 µF

CSR = 1 Ω

Figure 2. Typical Application Configuration

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS7201Q, TPS7225Q, TPS7230Q

TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY

MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS

SLVS102G – MARCH 1995 – REVISED JUNE 2000

TPS72xx chip information

These chips, when properly assembled, display characteristics similar to the TPS72xxQ. Thermal compression or ultrasonic bonding may be used on the doped aluminum bonding pads. The chips may be mounted with conductive epoxy or a gold-silicon preform.

BONDING PAD ASSIGNMENTS

(7)

(1)

(2)

(6)

functional block diagram

(5) 5

(4)

(5)

(3)

(2)

CHIP THICKNESS: 15 MILS TYPICAL BONDING PADS: 4 × 4 MILS MINIMUM TJmax = 150°C TOLERANCES ARE ±10%. ALL DIMENSIONS ARE IN MILS.

†

Fixed-voltage options only (TPS7225, TPS7230,

(3)

TPS7233, TPS7248, and TPS7250)

‡

Adjustable version only (TPS7201)

NOTE A. For most applications, OUT and SENSE should

be tied together as close as possible to the device; for other implementations, refer to the SENSE-pin connection discussion in the application information section of this data sheet.

TPS72xx

(1)

GND

(6) (4) (7)

SENSE

FB OUT PG

_ +

1.12 V

GND

low (active).

+ _

= 1.188 V

ref

Switch positions are shown with EN

For most applications, SENSE should be externally connected to OUT as close as possible to the device. For other implementations, refer to the SENSE-pin connection discussion in application information section.

§§

OUT

SENSE¶/FB

RESISTOR DIVIDER OPTIONS

DEVICE

TPS7201 TPS7225 TPS7230 TPS7233 TPS7248 TPS7250

NOTE A: Resistors are nominal values only.

0 257 357 420 726 756

COMPONENT COUNT

MOS transistors Bilpolar transistors Diodes Capacitors Resistors

∞

233 233 233 233 233

UNITR1 R2

Ω

kΩ kΩ kΩ kΩ kΩ

108

4 15 75

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS7201Q, TPS7225Q, TPS7230Q

PACKAGE

PPW1175 mW

8.74 mW/°C

782 mW

650 mW

301 mW

PACKAGE

PPW2738 mW

20.49 mW/°C

1816 mW

1508 mW

689 mW

TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS

SLVS102G – MARCH 1995 – REVISED JUNE 2000

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Input voltage rangeĕ, VI, PG, SENSE, EN –0.3 V to 11 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output current, IO 1.5 A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous total power dissipation See Dissipation Rating Tables 1 and 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating virtual junction temperature range, T Storage temperature range, T

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

stg

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

‡

All voltage values are with respect to network ground terminal.

DISSIPATION RATING TABLE 1 – FREE-AIR TEMPERA TURE (see Note 1 and Figure 3)

≤ 25°C DERATING FACTOR T

POWER RATING ABOVE TA = 25°CAPOWER RATINGAPOWER RATINGAPOWER RATING

NOTE 1: Dissipation rating tables and figures are provided for maintenance of junction temperature at or below absolute

maximum of 150°C. For guidelines on maintaining junction temperature within the recommended operating range, see application information section.

725 mW

525 mW

DISSIPATION RATING TABLE 2 – CASE TEMPERA TURE (see Note 1 and Figure 4)

≤ 25°C DERATING FACTOR T

POWER RATING ABOVE TC = 25°CCPOWER RATINGCPOWER RATINGCPOWER RATING

2063 mW

2900 mW

5.8 mW/°C

4.2 mW/°C

16.5 mW/°C

23.2 mW/°C

–55°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

= 70°C T

464 mW

336 mW

= 70°C T

1320 mW

1856 mW

= 85°C T

377 mW

273 mW

= 85°C T

1073 mW

1508 mW

= 125°C

145 mW

105 mW

= 125°C

413 mW

580 mW

MAXIMUM CONTINUOUS DISSIPATION

FREE-AIR TEMPERATURE

1200

1100

1000

900 800 700 600 500 400 300 200

– Maximum Continuous Dissipation – mW

100

25 50 75 100

P Package R

= 114.4°C/W

θJA

D Package R

PW Package

= 238°C/W

θJA

TA – Free-Air Temperature – °C

θJA

Figure 3

= 172°C/W

125 150

MAXIMUM CONTINUOUS DISSIPATION

CASE TEMPERATURE

3000

2500

2000

1500

1000

500

– Maximum Continuous Dissipation – mW

25 50 75 100

P Package R

= 48.8°C/W

θJC

PW Package R

= 43.1°C/W

θJC

D Package

= 60.6°C/W

θJC

TC – Case Temperature – °C

Figure 4

125 150

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Input voltage, V

†

TPS7201Q, TPS7225Q, TPS7230Q

TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY

MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS

SLVS102G – MARCH 1995 – REVISED JUNE 2000

recommended operating conditions

MIN MAX UNIT

TPS7201Q 3 10 TPS7225Q 3.65 10

High-level input voltage at EN, V Low-level input voltage at EN, V Output current, I Operating virtual junction temperature, T

†

Minimum input voltage defined in the recommended operating conditions is the maximum specified output voltage plus dropout voltage at the maximum specified load range. Since dropout voltage is a function of output current, calculate the minimum input voltage for the maximum load current used in a given application, use the following equation:

Because the TPS7201 is programmable, r calculating VDO from r lower limit for the recommended input-voltage range for the TPS7201.

I(min)

O(max)

DS(on)

)

DO(max load)

is given in Note 3 under the TPS7201 electrical characteristics table. The minimum value of 3 V is the absolute

DS(on)

TPS7230Q 3.96 10 TPS7233Q 3.98 10 TPS7248Q 5.24 10 TPS7250Q 5.41 10

2 V

0.5 V

0 250 mA

–40 125 °C

the usable range can be extended for lighter loads

should be used to calculate VDO before applying the above equation. The equation for

. To

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS7201Q, TPS7225Q, TPS7230Q

PARAMETER

TEST CONDITIONS

‡

UNIT

Ground current (active mode)

EN ≤ 0.5 V,

Input current (standby mode)

3 V ≤ V

Output current limit threshold

0 V

10 V

3 V ≤ V

≤ 10 V

PG leak

Normal operation

EN logic high (standb

)

40°C to 125°C

EN logic l

)

3 V ≤ V

EN i

0 V ≤ V

≤ 10 V

Minimum V

for active pass element

Minimum V

for valid PG

300 µA

TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS

SLVS102G – MARCH 1995 – REVISED JUNE 2000

electrical characteristics, IO = 10 mA, EN = 0 V , CO = 4.7 µF (CSR† = 1 Ω), SENSE/FB shorted to OUT (unless otherwise noted)

EN ≤ 0.5 V 0 mA ≤ IO ≤ 250 mA

Pass-element leakage current in standby mode

age curren

Output voltage temperature coefficient –40°C to 125°C 31 75 ppm/°C Thermal shutdown junction temperature 165 °C

y mode

ow (active mode

EN hysteresis voltage 25°C 50 mV

nput curren

†

CSR(compensation series resistance) refers to the total series resistance, including the equivalent series resistance (ESR) of the capacitor, any series resistance added externally, and PWB trace resistance to CO.

‡

Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must be taken into account separately.

= 10 V,

3 V ≤ VI ≤ 6 V 6 V ≤ VI ≤ 10 V

≤ 10

= V

+ 1 V

+ 1

≤ 10

25°C 180 225

–40°C to 125°C 325

25°C 0.5

–40°C to 125°C 1

25°C 0.6 1

–40°C to 125°C 1.5

25°C 0.5

–40°C to 125°C 1

25°C 0.5

–40°C to 125°C 0.5

–

–40°C to 125°C 0.5

–40°C to 125°C –0.5 0.5

–40°C to 125°C 2.5

–40°C to 125°C 1.9

25°C 0.5

25°C –0.5 0.5

25°C 1.9 2.5

25°C 1.1 1.5

TPS72xxQ

MIN TYP MAX

2.7

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PARAMETER

TEST CONDITIONS

‡

UNIT

2.9 V

50 µA ≤ I

≤ 250 mA

Ω

Input regulation

Output regulation

µ ,

Ripple rejection

120 H

†

CSR

†

Ω

400 µA

FB input current

TPS7201Q, TPS7225Q, TPS7230Q

TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY

MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS

SLVS102G – MARCH 1995 – REVISED JUNE 2000

TPS7201Q electrical characteristics, IO = 10 mA, V

= 3.5 V, EN = 0 V, CO = 4.7 µF (CSR† = 1 Ω), FB

shorted to OUT at device leads (unless otherwise noted)

Reference voltage (measured at FB with OUT connected to FB)

Reference voltage temperature coefficient

Pass-element series resistance (see Note 3)

Output noise spectral density f = 120 Hz 25°C 2

Output noise voltage

PG trip-threshold voltage PG hysteresis voltage

output low voltage

†

CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance to CO.

‡

Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must be taken into account separately.

This voltage is not recommended.

Output voltage programmed to 2.5 V with closed-loop configuration (see application information).

NOTES: 2. When VI < 2.9 V and IO > 100 mA simultaneously, pass element r

dropout voltage prevents the regulator from maintaining the specified tolerance range.

3. To calculate dropout voltage, use equation:

DS(on)

5.9 V , which corresponds to dropout conditions for programmed output voltages of 2.5 V, 3 V , 4 V, and 6 V, respectively. For other programmed values, refer to Figures 10 and 11.

VDO = IO

is a function of both output current and input voltage. The parametric table lists r

VI = 3.5 V, IO = 10 mA 25°C 1.188 V 3 V ≤ VI ≤ 10 V,

See Note 2

VI = 2.4 V, VI = 2.4 V,

VI = 3.9 V, 50 µA ≤ IO ≤ 250 mA 25°C 1 VI = 5.9 V, 50 µA ≤ IO ≤ 250 mA 25°C 0.8

V See Note 2

I See Note 2

10 Hz ≤ f ≤ 100 kHz,

VFB voltage decreasing from above V Measured at V

⋅ r

DS(on)

= 3 V to 10 V, 50 µA ≤ I

= 5 mA to 250 mA, 3 V ≤ V

= 50 µA to 250 mA, 3 V ≤ V

= 1

5 mA ≤ IO ≤ 250 mA,

50 µA ≤ IO ≤ 100 mA 25°C 2.1 100 mA ≤ IO ≤ 200 mA 25°C 2.9

≤ 250 mA,

≤ 10 V,

= 50 µ

= 250 mA,

See Note 2

CO = 4.7 µF 25°C 235 CO = 10 µF 25°C 190 CO = 100 µF 25°C 125

= 2.13

–40°C to 125°C 1.152 1.224 V

–40°C to 125°C 31 75 ppm/°C

25°C 1.6 2.7

–40°C to 125°C 4.5

25°C 23

–40°C to 125°C 36

25°C 15 25

–40°C to 125°C 36

25°C 17 27

–40°C to 125°C 43

25°C 49 60

–40°C to 125°C 32

25°C 45 50

–40°C to 125°C 30

–40°C to 125°C

25°C 12 mV 25°C 0.1 0.4

–40°C to 125°C 0.4

25°C –10 0.1 10

–40°C to 125°C –20 20

increases (see Figure 10) to a point such that the resulting

DS(on)

TPS7201Q

MIN TYP MAX

0.95 ×

FB(nom)

for VI = 2.4 V, 2.9 V, 3.9 V, and

DS(on)

µV/√Hz

µVrms

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS7201Q, TPS7225Q, TPS7230Q

PARAMETER

TEST CONDITIONS

‡

UNIT

Output voltage

250 mA

Pass-element series resistance

(

O)O

Ω

Input regulation

3.5 V to 10 V

50 µA ≤ I

≤ 250 mA

250 mA

Output regulation

50 µA to 250 mA

≤ 10 V

50 µA

Ripple rejection

120 H

250 mA

CSR

†

Ω

PG output low voltage

TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS

SLVS102G – MARCH 1995 – REVISED JUNE 2000

TPS7225Q electrical characteristics, IO = 10 mA, V

= 3.5 V , EN = 0 V , CO = 4.7 µF (CSR† = 1 Ω), SENSE

shorted to OUT (unless otherwise noted)

ropout voltage

Output noise spectral density f = 120 Hz 25°C 2

Output noise voltage

PG trip-threshold voltage PG hysteresis voltage

†

CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance to CO.

‡

Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must be taken into account separately.

VI = 3.5 V, IO = 10 mA 25°C 2.5

3.5 V ≤ VI ≤ 10 V, 5 mA ≤ IO ≤ 250 mA –40°C to 125°C 2.45 2.55

(2.97 V – V IO = 250 mA

= 5 mA to

10 Hz ≤ f ≤ 100 kHz,

VO voltage decreasing from above V

= 1.2 mA,

†

= 1

)/I

, V

= 2.97

= 2.97 V,

,3.5 V ≤

CO = 4.7 µF CO = 10 µF CO = 100 µF

= 2.13

≤ 10

25°C 560 850 mV

–40°C to 125°C 1.1 V

25°C 2.24 3.4

–40°C to 125°C 3.84

25°C 9 27

–40°C to 125°C 33

25°C 28 36

–40°C to 125°C 60

25°C 24 41

–40°C to 125°C 73

25°C 47 58

–40°C to 125°C 45

25°C 40 46

–40°C to 125°C 38

25°C 248 25°C 200 25°C 130

–40°C to 125°C

25°C 50 mV 25°C 0.3 0.44

–40°C to 125°C 0.5

TPS7225Q

MIN TYP MAX

0.95 ×

O(nom)

µV/√Hz

µVrms

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PARAMETER

TEST CONDITIONS

‡

UNIT

Output voltage

100 mA

250 mA

2.97 V

Pass-element series resistance

(

O)O

Ω

Input regulation

50 µA ≤ I

250 mA

5 mA to 250 mA

≤ 10 V

Output regulation

50 µA to 250 mA

≤ 10 V

Ripple rejection

120 H

250 mA

CSR

†

Ω

PG output low voltage

1.2 mA

2.55 V

TPS7201Q, TPS7225Q, TPS7230Q

TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY

MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS

SLVS102G – MARCH 1995 – REVISED JUNE 2000

TPS7230Q electrical characteristics, IO = 10 mA, V

= 4 V , EN = 0 V , CO = 4.7 µF (CSR† = 1 Ω), SENSE

shorted to OUT (unless otherwise noted)

ropout voltage

Output noise spectral density f = 120 Hz 25°C 2 µV/√Hz

Output noise voltage

PG trip-threshold voltage PG hysteresis voltage

†

CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance to CO.

‡

Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must be taken into account separately.

VI = 4 V, IO = 10 mA 25°C 3 4 V ≤VI ≤ 10 V, 5 mA ≤ IO ≤ 250 mA –40°C to 125°C 2.94 3.06

(2.97 V – V IO = 250 mA

= 4 V to 10 V,

10 Hz ≤ f ≤ 100 kHz,

VO voltage decreasing from above V

†

= 1

)/I

, V

,4 V ≤

= 2.97

= 2.97 V,

= 50 µ

CO = 4.7 µF CO = 10 µF CO = 100 µF

≤

25°C 145 185

–40°C to 125°C 270

25°C 390 502

–40°C to 125°C 900

25°C 1.56 2.01

–40°C to 125°C 3.6

25°C 9 27

–40°C to 125°C 33

25°C 34 45

–40°C to 125°C 74

25°C 42 60

–40°C to 125°C 98

25°C 45 56

–40°C to 125°C 44

25°C 40 45

–40°C to 125°C 38

25°C 256 25°C 206 25°C 132

–40°C to 125°C

25°C 50 mV 25°C 0.25 0.44

–40°C to 125°C 0.44

TPS7230Q

MIN TYP MAX

0.95 ×

O(nom)

µVrms

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS7201Q, TPS7225Q, TPS7230Q

PARAMETER

TEST CONDITIONS

‡

UNIT

Output voltage

100 mA

3.23 V

250 mA

3.23 V

Pass-element series resistance

(

O)O

Ω

Input regulation

4.3 V to 10 V

50 µA ≤ I

≤ 250 mA

5 mA to 250 mA

≤ 10 V

Output regulation

250 mA

Ripple rejection

120 H

250 mA

CSR

†

Ω

PG output low voltage

TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS

SLVS102G – MARCH 1995 – REVISED JUNE 2000

TPS7233Q electrical characteristics, IO = 10 mA, V

= 4.3 V , EN = 0 V , CO = 4.7 µF (CSR† = 1 Ω), SENSE

shorted to OUT (unless otherwise noted)

ropout voltage

Output noise spectral density f = 120 Hz 25°C 2

Output noise voltage

PG trip-threshold voltage PG hysteresis voltage

†

CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance to CO.

‡

Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must be taken into account separately.

VI = 4.3 V, IO = 10 mA 25°C 3.3

4.3 V ≤ VI ≤ 10 V, 5 mA ≤ IO ≤ 250 mA –40°C to 125°C 3.23 3.37

= 10 mA,

†

= 1

)/I

, V

(3.23 V – V IO = 250 mA

= 50 µA to

10 Hz ≤ f ≤ 100 kHz,

VO voltage decreasing from above V

= 1.2 mA,

= 3.23

= 3.23 V,

,4.3 V ≤

= 50 µ

CO = 4.7 µF CO = 10 µF CO = 100 µF

= 2.8

≤ 10

25°C 14 20

–40°C to 125°C 30

25°C 140 180

–40°C to 125°C 232

25°C 360 460

–40°C to 125°C 610

25°C 1.5 1.84

–40°C to 125°C 2.5

25°C 8 25

–40°C to 125°C 33

25°C 32 42

–40°C to 125°C 71

25°C 41 55

–40°C to 125°C 98

25°C 40 52

–40°C to 125°C 38

25°C 35 44

–40°C to 125°C 33

25°C 265 25°C 212 25°C 135

–40°C to 125°C

25°C 32 mV 25°C 0.22 0.4

–40°C to 125°C 0.4

TPS7233Q

MIN TYP MAX

0.95 ×

O(nom)

µV/√Hz

µVrms

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PARAMETER

TEST CONDITIONS

‡

UNIT

Output voltage

100 mA

4.75 V

250 mA

4.75 V

Pass-element series resistance

(

O)O

Ω

Input regulation

5.85 V to 10 V

50 µA ≤ I

≤ 250 mA

5 mA to 250 mA

≤ 10 V

Output regulation

250 mA

Ripple rejection

120 H

250 mA

CSR

†

Ω

PG output low voltage

TPS7201Q, TPS7225Q, TPS7230Q

TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY

MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS

SLVS102G – MARCH 1995 – REVISED JUNE 2000

TPS7248Q electrical characteristics, IO = 10 mA, V

= 5.85 V, EN = 0 V, CO = 4.7 µF (CSR† = 1 Ω),

SENSE shorted to OUT (unless otherwise noted)

ropout voltage

Output noise spectral density f = 120 Hz 25°C 2 µV/√Hz

Output noise voltage

PG trip-threshold voltage PG hysteresis voltage

†

CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance to CO.

‡

Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must be taken into account separately.

VI = 5.85 V, IO = 10 mA 25°C 4.85

5.85 V ≤VI ≤ 10 V, 5 mA ≤ IO ≤ 250 mA –40°C to 125°C 4.75 4.95

= 10 mA,

†

= 1

)/I

, V

(4.75 V – V IO = 250 mA

= 50 µA to

10 Hz ≤ f ≤ 100 kHz,

VO voltage decreasing from above V

= 1.2 mA,

= 4.75

= 4.75 V,

,5.85 V ≤

= 50 µ

CO = 4.7 µF CO = 10 µF CO = 100 µF

= 4.12

≤ 10

25°C 10 19

–40°C to 125°C 30

25°C 90 100

–40°C to 125°C 150

25°C 216 250

–40°C to 125°C 285

25°C 0.8 1

–40°C to 125°C 1.4

25°C 34

–40°C to 125°C 50

25°C 43 55

–40°C to 125°C 95

25°C 55 75

–40°C to 125°C 135

25°C 42 53

–40°C to 125°C 36

25°C 36 46

–40°C to 125°C 34

25°C 370 25°C 290 25°C 168

–40°C to 125°C

25°C 50 mV 25°C 0.2 0.4

–40°C to 125°C 0.4

TPS7248Q

MIN TYP MAX

0.95 ×

O(nom)

µVrms

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS7201Q, TPS7225Q, TPS7230Q

PARAMETER

TEST CONDITIONS

‡

UNIT

Output voltage

100 mA

4.88 V

250 mA

4.88 V

Pass-element series resistance

(

O)O

Ω

Input regulation

6 V to 10 V

50 µA ≤ I

≤ 250 mA

5 mA to 250 mA

≤ 10 V

Output regulation

250 mA

Ripple rejection

120 H

250 mA

CSR

†

Ω

PG output low voltage

TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS

SLVS102G – MARCH 1995 – REVISED JUNE 2000

TPS7250Q electrical characteristics, IO = 10 mA, V

= 6 V , EN = 0 V , CO = 4.7 µF (CSR† = 1 Ω), SENSE

shorted to OUT (unless otherwise noted)

ropout voltage

Output noise spectral density f = 120 Hz 25°C 2

Output noise voltage

PG trip-threshold voltage PG hysteresis voltage

†

CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally , and PWB trace resistance to CO.

‡

Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must be taken into account separately.

VI = 6 V, IO = 10 mA 25°C 5 6 V ≤VI ≤ 10 V, 5 mA ≤ IO ≤ 250 mA –40°C to 125°C 4.9 5.1

= 10 mA,

†

= 1

)/I

, V

(4.88 V – V IO = 250 mA

= 50 µA to

10 Hz ≤ f ≤ 100 kHz,

VO voltage decreasing from above V

= 1.2 mA,

= 4.88

= 4.88 V,

,6 V ≤

= 50 µ

CO = 4.7 µF CO = 10 µF CO = 100 µF

= 4.25

≤ 10

25°C 8 12

–40°C to 125°C 30

25°C 76 85

–40°C to 125°C 136

25°C 190 206

–40°C to 125°C 312

25°C 0.76 0.825

–40°C to 125°C 1.25

25°C 28

–40°C to 125°C 35

25°C 46 61

–40°C to 125°C 100

25°C 59 79

–40°C to 125°C 150

25°C 41 52

–40°C to 125°C 37

25°C 36 46

–40°C to 125°C 32

25°C 390 25°C 300 25°C 175

–40°C to 125°C

25°C 50 mV 25°C 0.19 0.4

–40°C to 125°C 0.4

TPS7250Q

MIN TYP MAX

0.95 ×

O(nom)

µV/√Hz

µVrms

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PARAMETER

TEST CONDITIONS

‡

UNIT

PARAMETER

TEST CONDITIONS

‡

UNIT

Output regulation

V V

TPS7201Q, TPS7225Q, TPS7230Q

TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY

MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS

SLVS102G – MARCH 1995 – REVISED JUNE 2000

electrical characteristics, IO = 10 mA, EN = 0 V, CO = 4.7 µF (CSR† = 1 Ω), TJ = 25°C, SENSE/FB shorted to OUT (unless otherwise noted)

TPS72xxY

MIN TYP MAX

Ground current (active mode) Output current limit threshold VO = 0 V, VI = 10 V 0.6 A

Thermal shutdown junction temperature 165 °C EN hysteresis voltage 50 mV Minimum VI for active pass element 1.9 V Minimum VI for valid PG IPG = 300 µA 1.1 V

EN ≤ 0.5 V, 0 mA ≤ IO ≤ 250 mA

electrical characteristics, IO = 10 mA, EN = 0 V, CO = 4.7 µF (CSR† = 1 Ω), TJ = 25°C, FB shorted to OUT at device leads (unless otherwise noted)

Reference voltage (measured at FB with OUT connected to FB)

Pass-element series resistance (see Note 3)

Ripple rejection

Output noise spectral density VI = 3.5 V, f = 120 Hz 2

Output noise voltage

PG hysteresis voltage PG output low voltage FB input current

†

CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance to CO.

‡

Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must be taken into account separately.

This voltage is not recommended.

Output voltage programmed to 2.5 V with closed-loop configuration (see application information).

NOTES: 2 When VI < 2.9 V and IO > 100 mA simultaneously, pass element r

dropout voltage prevents the regulator from maintaining the specified tolerance range.

3 To calculate dropout voltage, use equation:

5.9 V , which corresponds to dropout conditions for programmed output voltages of 2.5 V, 3 V , 4 V, and 6 V, respectively. For other programmed values, refer to Figures 10 and 11.

¶ ¶

VDO = IO

DS(on)

⋅ r

is a function of both output current and input voltage. The parametric table lists r

DS(on)

VI = 3.5 V, IO = 10 mA 1.188 V

= 3.5 V,

DS(on)

VI = 2.4 V, VI = 2.4 V, VI = 2.9 V, 50 µA ≤ IO ≤ 250 mA 1.6 VI = 3.9 V, 50 µA ≤ IO ≤ 250 mA 1 VI = 5.9 V, 50 µA ≤ IO ≤ 250 mA 0.8 3 V ≤ VI ≤ 10 V,

See Note 2 3 V ≤ VI ≤ 10 V,

See Note 2

f = 120 Hz

10 Hz ≤ f ≤ 100 kHz, CSR† = 1 Ω

VI = 3.5 V, Measured at V VI = 2.13 V, IPG = 400 µA 0.1 V VI = 3.5 V

VI = VO + 1 V,

MIN TYP MAX

50 µA ≤ IO ≤ 100 mA 2.1 100 mA ≤ IO ≤ 200 mA 2.9

IO = 5 mA to 250 mA,

IO = 50 µA to 250 mA,

IO = 50 µA 60 IO = 250 mA,

See Note 2

CO = 4.7 µF 235 CO = 10 µF 190 CO = 100 µF 125

increases (see Figure 10) to a point such that the resulting

DS(on)

180 µA

TPS7201Y

µV/√Hz

12 mV

0.1 nA

for VI = 2.4 V, 2.9 V, 3.9 V, and

Ω

µVrms

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS7201Q, TPS7225Q, TPS7230Q

PARAMETER

TEST CONDITIONS

‡

UNIT

Output regulation

Ripple rejection

TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS

SLVS102G – MARCH 1995 – REVISED JUNE 2000

electrical characteristics, IO = 10 mA, EN = 0 V, CO = 4.7 µF (CSR† = 1 Ω), TJ = 25°C, FB shorted to OUT at device leads (unless otherwise noted)

TPS7225Y

MIN TYP MAX

Output voltage VI = 3.5 V, IO = 10 mA 2.5 V Dropout voltage

Pass-element series resistance Input regulation VI = 3.5 V to 10 V, 50 µA ≤ IO ≤ 250 mA 9 mV

Output noise spectral density VI = 3.5 V, f = 120 Hz 2 µV/√Hz

Output noise voltage

PG hysteresis voltage VI = 3.5 V PG output low voltage

†

CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance to CO.

‡

Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must be taken into account separately.

VI = 2.97 V, IO = 250 mA 560 mV (2.97 V – VO)/IO,

IO = 250 mA

3.5 V ≤ VI ≤ 10 V IO = 5 mA to 250 mA 28

3.5 V ≤ VI ≤ 10 V IO = 50 µA to 250 mA 24 V

= 3.5 V,

f = 120 Hz

= 3.5 V, 10 Hz ≤ f ≤ 100 kHz, CSR† = 1 Ω

VI = 2.13 V IPG = 1.2 mA 0.3 V

VI = 2.97 V,

IO = 50 µA 58 IO = 250 mA 46

CO = 4.7 µF CO = 10 µF CO = 100 µF

2.24 Ω

248 200 130

50 mV

µVrms

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PARAMETER

TEST CONDITIONS

‡

UNIT

Output regulation

Ripple rejection

PARAMETER

TEST CONDITIONS

‡

UNIT

Output regulation

Ripple rejection

TPS7201Q, TPS7225Q, TPS7230Q

TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY

MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS

SLVS102G – MARCH 1995 – REVISED JUNE 2000

electrical characteristics, IO = 10 mA, EN = 0 V , CO = 4.7 µF (CSR† = 1 Ω), TJ = 25°C, SENSE shorted to OUT (unless otherwise noted)

TPS7230Y

MIN TYP MAX

Output voltage VI = 4 V, IO = 10 mA 3 V

ropout voltage

Pass-element series resistance Input regulation VI = 4 V to 10 V, 50 µA ≤ IO ≤ 250 mA 9 mV

Output noise spectral density VI = 4 V, f = 120 Hz 2 µV/√Hz

Output noise voltage

PG hysteresis voltage VI = 4 V PG output low voltage

†

CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance to CO.

‡

Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must be taken into account separately.

Output voltage VI = 4.3 V, IO = 10 mA 3.3 V

Dropout voltage

Pass-element series resistance Input regulation VI = 4.3 V to 10 V, 50 µA ≤ IO ≤ 250 mA 8 mV

Output noise spectral density VI = 4.3 V, f = 120 Hz 2

Output noise voltage

PG hysteresis voltage VI = 4.3 V PG output low voltage

†

CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance to CO.

‡

Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must be taken into account separately.

VI = 2.97 V, IO = 100 mA 145 VI = 2.97 V, IO = 250 mA 390 (2.97 V – VO)/IO,

IO = 250 mA

4 V ≤ VI ≤ 10 V IO = 5 mA to 250 mA 34 4 V ≤ VI ≤ 10 V IO = 50 µA to 250 mA 41

= 4 V,

f = 120 Hz

= 4 V, 10 Hz ≤ f ≤ 100 kHz, CSR† = 1 Ω

VI = 2.55 V IPG = 1.2 mA 0.25 V

VI = 3.23 V, IO = 10 mA 14 VI = 3.23 V, IO = 100 mA 140 VI = 3.23 V, IO = 250 mA 360 (3.23 V – VO)/IO,

IO = 250 mA

4.3 V ≤ VI ≤ 10 V, IO = 5 mA to 250 mA 32

4.3 V ≤ VI ≤ 10 V, IO = 50 µA to 250 mA 41 V

= 4.3 V,

f = 120 Hz

= 4.3 V, 10 Hz ≤ f ≤ 100 kHz, CSR† = 1 Ω

VI = 2.8 V, IPG = 1.2 mA 0.22 V

VI = 2.97 V,

IO = 50 µA 56 IO = 250 mA 45

CO = 4.7 µF CO = 10 µF CO = 100 µF

VI = 3.23 V,

IO = 50 µA 52 IO = 250 mA 44

CO = 4.7 µF CO = 10 µF CO = 100 µF

1.56 Ω

256 206 132

50 mV

TPS7233Y

MIN TYP MAX

1.5 Ω

265 212 135

32 mV

µVrms

µV/√Hz

µVrms

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS7201Q, TPS7225Q, TPS7230Q

PARAMETER

TEST CONDITIONS

‡

UNIT

Output regulation

Ripple rejection

PARAMETER

TEST CONDITIONS

‡

UNIT

Output regulation

Ripple rejection

TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS

SLVS102G – MARCH 1995 – REVISED JUNE 2000

electrical characteristics, IO = 10 mA, EN = 0 V , CO = 4.7 µF (CSR† = 1 Ω), TJ = 25°C, SENSE shorted to OUT (unless otherwise noted) (continued)

TPS7248Y

MIN TYP MAX

Output voltage VI = 5.85 V, IO = 10 mA 4.85 V

VI = 4.75 V, IO = 10 mA 10

Dropout voltage

Pass-element series resistance

Output noise spectral density VI = 5.85 V, f = 120 Hz 2 µV/√Hz

Output noise voltage

PG hysteresis voltage VI = 5.85 V PG output low voltage

†

CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance to CO.

‡

Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must be taken into account separately.

Output voltage VI = 6 V, IO = 10 mA 5 V

Dropout voltage

Pass-element series resistance Input regulation VI = 6 V to 10 V, 50 µA ≤ IO ≤ 250 mA mV

Output noise spectral density VI = 6 V, f = 120 Hz 2

Output noise voltage

PG hysteresis voltage VI = 6 V PG output low voltage

†

CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally , and PWB trace resistance to CO.

‡

Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must be taken into account separately.

VI = 4.75 V, IO = 100 mA 90 VI = 4.75 V, IO = 250 mA 216 (4.75 V – VO)/IO,

IO = 250 mA

5.85 V ≤ VI ≤ 10 V IO = 5 mA to 250 mA 43

5.85 V ≤ VI ≤ 10 V IO = 50 µA to 250 mA 55 V

= 5.85 V,

f = 120 Hz

= 5.85 V, 10 Hz ≤ f ≤ 100 kHz, CSR† = 1 Ω

VI = 4.12 V IPG = 1.2 mA 0.2 V

VI = 4.88 V IO = 10 mA 8 VI = 4.88 V IO = 100 mA 76 VI = 4.88 V, IO = 250 mA 190 (4.88 V – VO)/IO,

IO = 250 mA

6 V ≤ VI ≤ 10 V, IO = 5 mA to 250 mA 46 6 V ≤ VI ≤ 10 V, IO = 50 µA to 250 mA 59

= 6 V, f = 120 Hz

= 6 V, 10 Hz ≤ f ≤ 100 kHz, CSR† = 1 Ω

VI = 4.25 V, IPG = 1.2 mA 0.19 V

VI = 4.75 V,

IO = 50 µA 53 IO = 250 mA 46

CO = 4.7 µF CO = 10 µF CO = 100 µF

MIN TYP MAX

VI = 4.88 V,

IO = 50 µA 52 IO = 250 mA 46

CO = 4.7 µF CO = 10 µF CO = 100 µF

0.8 Ω

370 290 168

50 mV

TPS7250Y

0.76 Ω

390 300 175

50 mV

µVrms

µV/√Hz

µVrms

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

IQQuiescent current

Compensation series resistance (CSR)

TPS7201Q, TPS7225Q, TPS7230Q

TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY

MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS

SLVS102G – MARCH 1995 – REVISED JUNE 2000

TYPICAL CHARACTERISTICS

Table of Graphs

FIGURE

vs Output current 5 vs Input voltage 6

†

∆I

∆V

DS(on)

∆V

O(PG)

DS(on)PG

†

This symbol is not currently listed within EIA or JEDEC standards for semiconductor symbology.

Change in quiescent current vs Free-air temperature 7 Dropout voltage vs Output current 8 Change in dropout voltage vs Free-air temperature 9 Dropout voltage (TPS7201 only) vs Output current 10 Pass-element series resistance vs Input voltage 11 Change in output voltage vs Free-air temperature 12 Output voltage vs Input voltage 13 Line regulation

(TPS7201, TPS7233, TPS7248, TPS7250) Load regulation

(TPS7225, TPS7233, TPS7248, TPS7250) Power-good (PG) voltage vs Output voltage 16 Power-good (PG) on-resistance vs Input voltage 17 Minimum input voltage for valid PG vs Free-air temperature 18 Output voltage response from enable (EN) 19 Load transient response (TPS7201/TPS7233) 20 Load transient response (TPS7248/TPS7250) 21 Line transient response (TPS7201) 22 Line transient response (TPS7233) 23 Line transient response (TPS7248/TPS7250) 24 Ripple rejection vs Frequency 25 Output Spectral Noise Density vs Frequency 26

vs Output current (CO = 4.7 µF) 27

vs Added ceramic capacitance (CO = 4.7 µF) 28 vs Output current (CO = 10 µF) 29 vs Added ceramic capacitance (CO = 10 µF) 30

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS7201Q, TPS7225Q, TPS7230Q TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS

SLVS102G – MARCH 1995 – REVISED JUNE 2000

TYPICAL CHARACTERISTICS

QUIESCENT CURRENT

OUTPUT CURRENT

230

TA = 25°C

220

Aµ

210

200

190

180

– Quiescent Current –

170

160

150

0 50 100 150

IO – Output Current – mA

Figure 5

TPS7248 VI = 10 V

TPS7233 VI = 10 V

TPS7250 VI = 10 V

TPS7248 VI = 5.85 V

TPS7250 VI = 6.0 V

TPS7233 VI = 4.3 V

200 250

QUIESCENT CURRENT

INPUT VOLTAGE

250

TA 25°C IO = 250 mA

200

Aµ

150

100

– Quiescent Current –

0123456

TPS7250

VI – Input Voltage – V

Figure 6

TPS7248

TPS7233

TPS7201 With VO Programmed to 2.5 V

78910

CHANGE IN QUIESCENT CURRENT

FREE-AIR TEMPERATURE

IO = 10 mA VI = VO + 1 V

Aµ

–10

–20

– Change in Quiescent Current –

–30

∆I

– 40

– 40 – 20 0 20 40 60 80 100 120 140

TA – Free-Air Temperature – °C

Figure 7

DROPOUT VOLTAGE

OUTPUT CURRENT

600

TA = 25°C

500

400

300

200

– Dropout Voltage – mV

100

0 50 100 150

IO – Output Current – mA

TPS7225

TPS7230

TPS7233

TPS7248

TPS7250

200 250

Figure 8

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS7201Q, TPS7225Q, TPS7230Q

TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY

MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS

SLVS102G – MARCH 1995 – REVISED JUNE 2000

TYPICAL CHARACTERISTICS

TPS7201

DROPOUT VOLTAGE

OUTPUT CURRENT

VI = 2.4 V

†

0.05

0.04

CHANGE IN DROPOUT VOLTAGE

FREE-AIR TEMPERATURE

TPS7230

1.6

1.4

0.03

0.02

0.01

–0.01

– Change in Dropout Voltage – V∆V

–0.02

–0.03

–0.04

–40 –20 0 20 40 60 80 100 120

TA – Free-Air Temperature – °C

TPS7233

TPS7248/TPS7250

Figure 9

PASS ELEMENT SERIES RESISTANCE

INPUT VOLTAGE

Ω

IO = 250 mA

TA = 25°C VFB = 1.12 V

140

1.2 VI = 2.9 V

0.8

0.6

– Dropout Voltage – VV

0.4

0.2

0 50 100 150 200 250

†

This voltage is not recommended.

VI = 3.2 V VI = 3.9 V

VI = 5.9 V

VI = 9.65 V

IO – Output Current – mA

Figure 10

CHANGE IN OUTPUT VOLTAGE

FREE-AIR TEMPERATURE

–5

VI = 2.6 V

IO = 10 mA VI = VO + 1 V

†

– Pass Element Series Resistance –

IO = 100 mA

DS(on)

234567

VI – Input Voltage – V

Figure 11

–10

–15

– Change in Output Voltage – mV∆V

–20

8910

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

–25

–40 –20 0 20 40 60 80 100 120 140

TA – Free-Air Temperature – °C

Figure 12

TPS7201Q, TPS7225Q, TPS7230Q TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS

SLVS102G – MARCH 1995 – REVISED JUNE 2000

TYPICAL CHARACTERISTICS

OUTPUT VOLTAGE

INPUT VOLTAGE

5.5 TA = 25°C

IO = 250 mA

4.5

3.5

2.5

– Output Voltage – V

1.5

∆

0.5

0123456

VI – Input Voltage – V

TPS7250

TPS7248

TPS7233

TPS7201 With VO Programmed to 2.5 V

78910

TA = 25°C

IO = 250 mA 15 10

TPS7233

–5

–10

– Change in Output Voltage – mV∆V

–15

–20 –25

4 4.5 5 6 6.5 7 7.5

LINE REGULATION

TPS7201 With

VO Programmed to 2.5 V

TPS7248

TPS7250

8 8.5 9.5 105.5 9

VI – Input Voltage – V

Figure 13

LOAD REGULATION

TA = 25°C

30 20 10

0 –10 –20

– Change in Output Voltage – mV∆V

–30

–40 –50

0 50 100 150 200 250

TPS7225

TPS7248

TPS7250

IO – Output Current – mA

Figure 15

TPS7233

POWER-GOOD (PG) VOLTAGE

TA = 25°C PG Pulled Up to VI With 5 kΩ Resistor

– Power-Good (PG) Voltage – V

GND

O(PG)

92 93 94 95

VO – Output Voltage – %

†

VO as a percent of VOnom.

Figure 14

OUTPUT VOLTAGE

96 98

Figure 16

†

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS7201Q, TPS7225Q, TPS7230Q

TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY

MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS

SLVS102G – MARCH 1995 – REVISED JUNE 2000

TYPICAL CHARACTERISTICS

POWER-GOOD (PG) ON-RESISTANCE

INPUT VOLTAGE

100

Ω

– Power-Good (PG) On-Resistance – k

DS(on)

TA = 25°C

1 1.5 2 2.5 3 3.5 4

VI – Input Voltage – V

Figure 17

MINIMUM INPUT VOLTAGE FOR VALID PG

1.3

1.125

1.12

1.115

1.11

1.105

– Minimum Input Voltage for Valid PG

1.1

1.095

4.5 5

–40 – 20 0 20 40 60 80 100 120 140

OUTPUT VOLTAGE RESPONSE FROM

ENABLE (EN)

TA = 25°C CI = 0 CO = 4.7 µF (CSR = 1 Ω)

FREE-AIR TEMPERATURE

TA – Free-Air Temperature – °C

Figure 18

– EN Voltage – V

VO nom

(Values Vary With

– Output Voltage – V

Selection of Device)

0 50 100 150

t – Time – µs

Figure 19

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

I(EN)

TPS7201Q, TPS7225Q, TPS7230Q TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS

SLVS102G – MARCH 1995 – REVISED JUNE 2000

TYPICAL CHARACTERISTICS

TPS7201 (WITH VO PROGRAMMED TO 2.5 V), TPS7233

LOAD TRANSIENT RESPONSE

200

100

– Change in Output Voltage – mV∆V

–100

–200

200

100

–100

–200

TA = 25°C VI = 6 V CI = 0 CO = 4.7 µF (CSR = 1 Ω)

105

– Output Current – mA

0 100 200 300 400 500

t – Time – µs

Figure 20

TPS7248/TPS7250

LOAD TRANSIENT RESPONSE

TA = 25°C VI = 6 V CI = 0 CO = 4.7 µF (CSR = 1 Ω)

105

0 100 200 300 400 500

t – Time – µs

Figure 21

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

– Output Current – mA

TPS7201Q, TPS7225Q, TPS7230Q

TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY

MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS

SLVS102G – MARCH 1995 – REVISED JUNE 2000

TYPICAL CHARACTERISTICS

TPS7201 WITH VO PROGRAMMED TO 2.5 V

LINE TRANSIENT RESPONSE

100

– Change in Output Voltage – mV∆V

–50

–100

200

100

–50

–100

TA = 25°C CI = 0 CO = 4.7 µF (CSR = 1 Ω)

LINE TRANSIENT RESPONSE

0 100 200 300 400

t – Time – µs

Figure 22

TPS7233

TA = 25°C CI = 0 CO = 4.7 µF (CSR = 1 Ω)

6.5

6.25

6.5

– Input Voltage – V

0 100 200 300 400 500

t – Time – µs

Figure 23

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

6.25

5.75

– Input Voltage – V

TPS7201Q, TPS7225Q, TPS7230Q TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS

SLVS102G – MARCH 1995 – REVISED JUNE 2000

TYPICAL CHARACTERISTICS

TPS7248/TPS7250

LINE TRANSIENT RESPONSE

100

–50

TA = 25°C CI = 0 CO = 4.7 µF (CSR = 1 Ω)

t – Time – µs

– Change in Output Voltage – mV∆V

–100

0 100 200 300 400 500

6.5

6.25

– Input Voltage – V

RIPPLE REJECTION

FREQUENCY

TPS7233

TPS7248/

TPS7250

Ripple Rejection – dB

10 100 1 K 10 K 100 K 1 M 10 M

TA = 25°C No Input Capacitance Added VI = VO + 1 V IO = 100 mA CO = 4.7 µF (CSR = 1 Ω)

TPS7201 With VO Programmed to 2.5 V

f – Frequency – Hz

Figure 25

Figure 24

OUTPUT SPECTRAL NOISE DENSITY

FREQUENCY

Hzµ V/

0.1

Output Spectral Noise Density –

CO = 100 µF (CSR = 1 Ω)

0.01 10 100 1 k 10 k 100 k

TA = 25°C No Input Capacitance Added VI = VO + 1 V

CO = 4.7 µF (CSR = 1 Ω)

CO = 10 µF (CSR = 1 Ω)

f – Frequency – Hz

Figure 26

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS7201Q, TPS7225Q, TPS7230Q

TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY

MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS

SLVS102G – MARCH 1995 – REVISED JUNE 2000

TYPICAL CHARACTERISTICS

TYPICAL REGIONS OF STABILITY

COMPENSATION SERIES RESISTANCE (CSR)

OUTPUT CURRENT

100

Region of Instability

TA = 25°C

0.1

CSR – Compensation Series Resistance – Ω

0.01

Region of Instability

0 50 100 150 200 250

VI = VO + 1 V CO = 4.7 µF No Added Ceramic Capacitance No Input Capacitance Added

IO – Output Current – mA

Figure 27

†

COMPENSATION SERIES RESISTANCE (CSR)

TYPICAL REGIONS OF STABILITY

†

ADDED CERAMIC CAPACITANCE

100

Region of

Instability

0.1

CSR – Compensation Series Resistance – Ω

0.01 0 0.1 0.2 0.3 0.4 0.5

Added Ceramic Capacitance – µF

TA = 25°C VI = VO + 1 V IO = 250 mA CO = 4.7 µF No Input Capacitor Added

Region of Instability

0.6 0.7 0.8 0.9 1

Figure 28

TYPICAL REGIONS OF STABILITY

COMPENSATION SERIES RESISTANCE (CSR)

†

COMPENSATION SERIES RESISTANCE (CSR)

OUTPUT CURRENT

100

Region of Instability

TA = 25°C

0.1

CSR – Compensation Series Resistance – Ω

0.01 0 50 100 150 200 250

VI = VO + 1 V CO = 10 µF No Added Ceramic Capacitance No Input Capacitor Added

Region of Instability

IO – Output Current – mA

100

0.1

CSR – Compensation Series Resistance – Ω

0.01

Figure 29

†

CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally , and PWB trace resistance to CO.

TYPICAL REGIONS OF STABILITY

ADDED CERAMIC CAPACITANCE

Region of Instability

0 0.1 0.2 0.3 0.4 0.5

Added Ceramic Capacitance – µF

TA = 25°C VI = VO + 1 V IO = 250 mA CO = 10 µF No Input Capacitor Added

Region of Instability

0.6 0.7 0.8 0.9 1

Figure 30

†

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS7201Q, TPS7225Q, TPS7230Q TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS

SLVS102G – MARCH 1995 – REVISED JUNE 2000

APPLICATION INFORMATION

The design of the TPS72xx family of low-dropout (LDO) regulators is based on the higher-current TPS71xx family . These new families of regulators have been optimized for use in battery-operated equipment and feature extremely low dropout voltages, low supply currents that remain constant over the full-output-current range of the device, and an enable input to reduce supply currents to less than 0.5 µA when the regulator is turned off.

device operation

The TPS72xx uses a PMOS pass element to dramatically reduce both dropout voltage and supply current over more conventional PNP-pass-element LDO designs. The PMOS transistor is a voltage-controlled device that, unlike a PNP transistor, does not require increased drive current as output current increases. Supply current in the TPS72xx is essentially constant from no-load to maximum.

Current limiting and thermal protection prevent damage by excessive output current and/or power dissipation. The device switches into a constant-current mode at approximately 1 A; further load increases reduce the output voltage instead of increasing the output current. The thermal protection shuts the regulator off if the junction temperature rises above 165°C. Recovery is automatic when the junction temperature drops approximately 5°C below the high temperature trip point. The PMOS pass element includes a back diode that safely conducts reverse current when the input voltage level drops below the output voltage level.

A logic high on the enable input, EN EN should be grounded in applications where the shutdown feature is not used.

Power good (PG) is an open-drain output signal used to indicate output-voltage status. A comparator circuit continuously monitors the output voltage. When the output drops to approximately 95% of its nominal regulated value, the comparator turns on and pulls PG low.

Transient loads or line pulses can also cause activation of PG if proper care is not taken in selecting the input and output capacitors. Load transients that are faster than 5 µs can cause a signal on PG if high-ESR output capacitors (greater than approximately 7 Ω) are used. A 1-µs transient causes a PG signal when using an output capacitor with greater than 3.5 Ω of ESR. It is interesting to note that the output-voltage spike during the transient can drop well below the reset threshold and still not trip if the transient duration is short. A 1-µs transient must drop at least 500 mV below the threshold before tripping the PG circuit. A 2-µs transient trips PG at just 400 mV below the threshold. Lower-ESR output capacitors help by reducing the drop in output voltage during a transient and should be used when fast transients are expected.

A typical application circuit is shown in Figure 31.

, shuts off the output and reduces the supply current to less than 0.5 µA.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS7201Q, TPS7225Q, TPS7230Q

TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY

MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS

SLVS102G – MARCH 1995 – REVISED JUNE 2000

APPLICATION INFORMATION

TPS72xx

(see Note A)

0.1 µF

NOTE A: TPS7225, TPS7230, TPS7233, TPS7248, TPS7250

(fixed-voltage options).

SENSE

GND

OUT OUT

2 1 7 8

250 kΩ

10 µF

CSR = 1 Ω

Figure 31. Typical Application Circuit

external capacitor requirements

Although not required, a 0.047-µF to 0.1-µF ceramic bypass input capacitor , connected between IN and GND and located close to the TPS72xx, is recommended to improve transient response and noise rejection. A higher-value electrolytic input capacitor may be necessary if large, fast-rise-time load transients are anticipated and the device is located several inches from the power source.

An output capacitor is required to stabilize the internal feedback loop. For most applications, a 10-µF to 15-µF solid-tantalum capacitor with a 0.5-Ω resistor (see capacitor selection table) in series is sufficient. The maximum capacitor ESR should be limited to 1.3 Ω to allow for ESR doubling at cold temperatures. Figure 32 shows the transient response of a 5-mA to 85-mA load using a 10-µF output capacitor with a total ESR of 1.7 Ω.

A 4.7-µF solid-tantalum capacitor in series with a 1-Ω resistor may also be used (see Figures 27 and 28) provided the ESR of the capacitor does not exceed 1 Ω at room temperature and 2 Ω over the full operating temperature range.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS7201Q, TPS7225Q, TPS7230Q TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS

SLVS102G – MARCH 1995 – REVISED JUNE 2000

APPLICATION INFORMATION

VI = VO + 1 V

1→

IO = 85 mA

2→

Ch1 50 mV 50 mA 100 µs/div

Ch 2

IO = 5 mA

Figure 32. Load Transient Response (CSR total = 1.7 Ω), TPS7248Q

A partial listing of surface-mount capacitors usable with the TPS72xx family is provided below. This information (along with the stability graphs, Figures 27 through 30) is included to assist the designer in selecting suitable capacitors.

CAP ACITOR SELECTION

PART NO. MFR. VALUE MAX ESR

†

SIZE (H × L × W)

592D156X0020R2T Sprague 15 µF, 20 V 1.1 1.2 × 7.2 × 6 595D156X0025C2T Sprague 15 µF, 25 V 1 2.5 × 7.1 × 3.2 595D106X0025C2T Sprague 10 µF, 25 V 1.2 2.5 × 7.1 × 3.2 695D106X0035G2T Sprague 10 µF, 35 V 1.3 2.5 × 7.6 × 2.5

†

Size is in mm. ESR is maximum resistance in ohms at 100 kHz and TA = 25°C. Listings are sorted by height.

sense-pin connection

SENSE must be connected to OUT for proper operation of the regulator. Normally this connection should be as short as possible; however, remote sense may be implemented in critical applications when proper care of the circuit path is exercised. SENSE internally connects to a high-impedance wide-bandwidth amplifier through a resistor-divider network, and any noise pickup on the PCB trace will feed through to the regulator output. SENSE must be routed to minimize noise pickup. Filtering SENSE using an RC network is not recommended because of the possibility of inducing regulator instability.

†

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS7201Q, TPS7225Q, TPS7230Q

TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY

MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS

SLVS102G – MARCH 1995 – REVISED JUNE 2000

APPLICATION INFORMATION

output voltage programming

The output voltage of the TPS7201 adjustable regulator is programmed using an external resistor divider as shown in Figure 33. The output voltage is calculated using:

VO+

@ǒ1

ref

Where:

= 1.188 V typ (the internal reference voltage)

ref

Resistors R1 and R2 should be chosen for approximately 7-µA divider current. Lower value resistors can be used but offer no inherent advantage and waste more power. Higher values should be avoided as leakage currents at FB increase the output voltage error. The recommended design procedure is to choose R2 = 169 kΩ to set the divider current at 7 µA and then calculate R1 using:

+ ǒ

ref

)

1Ǔ@R2

(1)

(2)

OUTPUT VOLTAGE

PROGRAMMING GUIDE

OUTPUT

VOLTAGE

(V)

2.5

3.3

3.6

6.4

†

1% values shown.

DIVIDER RESISTANCE

4 5

TPS7201

†

(kΩ)

R1 R2

191 309 348 402 549 750

169 169 169 169 169 169

>2.7 V

0.1 µF

<0.4 V

OUT OUT

2 8

GND

Figure 33. TPS7201 Adjustable LDO Regulator Programming

Power-Good Indicator

250 kΩ

10 µF CSR = 1 Ω

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS7201Q, TPS7225Q, TPS7230Q TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS

SLVS102G – MARCH 1995 – REVISED JUNE 2000

APPLICATION INFORMATION

power dissipation and junction temperature

Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature allowable to avoid damaging the device is 150°C. These restrictions limit the power dissipation that the regulator can handle in any given application. To ensure the junction temperature is within acceptable limits, calculate the maximum allowable dissipation, P to P

The maximum-power-dissipation limit is determined using the following equation:

D(max)

, and the actual dissipation, PD, which must be less than or equal

D(max)

Where:

TJmax is the maximum allowable junction temperature, i.e.,150°C absolute maximum and 125°C recommended operating temperature.

θJA

SOIC and 238°C/W for the 8-terminal TSSOP. T

is the ambient temperature.

The regulator dissipation is calculated using:

PD+

Power dissipation resulting from quiescent current is negligible.

TJmax*T

is the thermal resistance junction-to-ambient for the package, i.e., 172°C/W for the 8-terminal

VI*

regulator protection

The TPS72xx PMOS-pass transistor has a built-in back diode that safely conducts reverse currents when the input voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the input and is not internally limited. If extended reverse voltage is anticipated, external limiting might be appropriate.

The TPS72xx also features internal current limiting and thermal protection. During normal operation, the TPS72xx limits output current to approximately 1 A. When current limiting engages, the output voltage scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure, care should be taken not to exceed the power dissipation ratings of the package. If the temperature of the device exceeds 165°C, thermal-protection circuitry shuts it down. Once the device has cooled, regulator operation resumes.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS7201Q, TPS7225Q, TPS7230Q

TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY

MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS

SLVS102G – MARCH 1995 – REVISED JUNE 2000

MECHANICAL DATA

D (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE

14 PIN SHOWN

0.050 (1,27)

0.069 (1,75) MAX

0.020 (0,51)

0.014 (0,35)

0.010 (0,25)

0.004 (0,10)

DIM

PINS **

0.010 (0,25)

0.157 (4,00)

0.150 (3,81)

0.244 (6,20)

0.228 (5,80)

Seating Plane

0.004 (0,10)

0.008 (0,20) NOM

0°–8°

Gage Plane

0.010 (0,25)

0.044 (1,12)

0.016 (0,40)

A MAX

A MIN

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15). D. Falls within JEDEC MS-012

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

0.197

(5,00)

0.189

(4,80)

0.344

(8,75)

0.337

(8,55)

0.394

(10,00)

0.386

(9,80)

4040047/D 10/96

TPS7201Q, TPS7225Q, TPS7230Q TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS

SLVS102G – MARCH 1995 – REVISED JUNE 2000

MECHANICAL DATA

P (R-PDIP-T8) PLASTIC DUAL-IN-LINE PACKAGE

0.400 (10,60)

0.355 (9,02)

0.260 (6,60)

0.240 (6,10)

0.070 (1,78) MAX

0.020 (0,51) MIN

0.200 (5,08) MAX

0.125 (3,18) MIN

0.100 (2,54)

0.021 (0,53)

0.015 (0,38)

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.

C. Falls within JEDEC MS-001

0.010 (0,25)

0.310 (7,87)

0.290 (7,37)

Seating Plane

0°–15°

0.010 (0,25) NOM

4040082/B 03/95

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS7201Q, TPS7225Q, TPS7230Q

TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY

MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS

SLVS102G – MARCH 1995 – REVISED JUNE 2000

MECHANICAL DATA

PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE

14 PIN SHOWN

0,65

1,20 MAX

0,30 0,19

4,50 4,30

0,15 0,05

6,60 6,20

0,10

Seating Plane

0,10

0,15 NOM

Gage Plane

0,25

0°–8°

0,75 0,50

PINS **

DIM

A MAX

A MIN

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-153

3,10

2,90

5,10

4,90

5,10

6,60

6,404,90

7,90

7,70

9,80

9,60

4040064/E 08/96

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PACKAGE OPTION ADDENDUM

www.ti.com

PACKAGING INFORMATION

Orderable Device Status

TPS7201QD ACTIVE SOIC D 8 75 Green (RoHS &

TPS7201QDR ACTIVE SOIC D 8 2500 Green (RoHS &

TPS7201QDRG4 ACTIVE SOIC D 8 2500 Green (RoHS &

TPS7201QP ACTIVE PDIP P 8 50 Pb-Free

TPS7201QPE4 ACTIVE PDIP P 8 50 Pb-Free

TPS7201QPW ACTIVE TSSOP PW 8 150 Green (RoHS &

TPS7201QPWLE OBSOLETE TSSOP PW 8 TBD Call TI Call TI

TPS7201QPWR ACTIVE TSSOP PW 8 2000 Green (RoHS &

TPS7225QD ACTIVE SOIC D 8 75 Green (RoHS &

TPS7225QDR ACTIVE SOIC D 8 2500 Green (RoHS &

TPS7225QDRG4 ACTIVE SOIC D 8 2500 Green (RoHS &

TPS7225QP ACTIVE PDIP P 8 50 Pb-Free

TPS7225QPE4 ACTIVE PDIP P 8 50 Pb-Free

TPS7225QPWR ACTIVE TSSOP PW 8 2000 Green (RoHS &

TPS7230QD ACTIVE SOIC D 8 75 Green (RoHS &

TPS7230QDR ACTIVE SOIC D 8 2500 Green (RoHS &

TPS7230QDRG4 ACTIVE SOIC D 8 2500 Green (RoHS &

TPS7230QP ACTIVE PDIP P 8 50 Pb-Free

TPS7230QPE4 ACTIVE PDIP P 8 50 Pb-Free

TPS7230QPWR ACTIVE TSSOP PW 8 2000 Green (RoHS &

TPS7230QPWRG4 ACTIVE TSSOP PW 8 2000 Green (RoHS &

TPS7233QD ACTIVE SOIC D 8 75 Green (RoHS &

TPS7233QDR ACTIVE SOIC D 8 2500 Green (RoHS &

TPS7233QDRG4 ACTIVE SOIC D 8 2500 Green (RoHS &

TPS7233QP ACTIVE PDIP P 8 50 Pb-Free

(1)

Package

Type

Package Drawing

Pins Package

Qty

Eco Plan

no Sb/Br)

(RoHS)

(2)

Lead/Ball Finish MSL Peak Temp

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-NC-NC-NC

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-NC-NC-NC

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-NC-NC-NC

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-NC-NC-NC

13-Sep-2005

(3)

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

Orderable Device Status

(1)

Package

Type

Package Drawing

Pins Package

Qty

Eco Plan

TPS7233QPE4 ACTIVE PDIP P 8 50 Pb-Free

(2)

Lead/Ball Finish MSL Peak Temp

CU NIPDAU Level-NC-NC-NC

13-Sep-2005

(3)

(RoHS)

TPS7233QPW ACTIVE TSSOP PW 8 150 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS7233QPWG4 ACTIVE TSSOP PW 8 150 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS7233QPWLE OBSOLETE TSSOP PW 8 TBD Call TI Call TI

TPS7233QPWR ACTIVE TSSOP PW 8 2000 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS7233QPWRG4 ACTIVE TSSOP PW 8 2000 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS7248QD ACTIVE SOIC D 8 75 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS7248QDR ACTIVE SOIC D 8 2500 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS7248QDRG4 ACTIVE SOIC D 8 2500 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS7248QP ACTIVE PDIP P 8 50 Pb-Free

CU NIPDAU Level-NC-NC-NC

(RoHS)

TPS7248QPE4 ACTIVE PDIP P 8 50 Pb-Free

CU NIPDAU Level-NC-NC-NC

(RoHS)

TPS7248QPW ACTIVE TSSOP PW 8 150 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS7248QPWG4 ACTIVE TSSOP PW 8 150 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS7248QPWLE OBSOLETE TSSOP PW 8 TBD Call TI Call TI

TPS7248QPWR ACTIVE TSSOP PW 8 2000 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS7248QPWRG4 ACTIVE TSSOP PW 8 2000 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS7250QD ACTIVE SOIC D 8 75 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS7250QDG4 ACTIVE SOIC D 8 75 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS7250QDR ACTIVE SOIC D 8 2500 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS7250QP ACTIVE PDIP P 8 50 Pb-Free

CU NIPDAU Level-NC-NC-NC

(RoHS)

TPS7250QPE4 ACTIVE PDIP P 8 50 Pb-Free

CU NIPDAU Level-NC-NC-NC

(RoHS)

TPS7250QPWLE OBSOLETE TSSOP PW 8 TBD Call TI Call TI

TPS7250QPWR ACTIVE TSSOP PW 8 2000 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS7250QPWRG4 ACTIVE TSSOP PW 8 2000 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

(1)

The marketing status values aredefined as follows:

ACTIVE: Product device recommended fornew designs. LIFEBUY: TI has announced thatthe device will be discontinued, and a lifetime-buy period isin effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design. PREVIEW: Device has been announcedbut is not in production. Samples may or may notbe available.

Addendum-Page 2

PACKAGE OPTION ADDENDUM

www.ti.com

OBSOLETE: TI has discontinued theproduction of the device.

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availabilityinformation and additional product content details.

TBD: The Pb-Free/Green conversion planhas not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Freeproducts are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb donot exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be availablefor release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annualbasis.

13-Sep-2005

Addendum-Page 3

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.

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TEXAS INSTRUMENTS TPS7201Q, TPS7225Q, TPS7230Q, TPS7233Q, TPS7248Q Technical data

Specifications and Main Features

Frequently Asked Questions

User Manual