Texas Instruments TNETEL1400PT Datasheet

D

Single-Chip EtherLoop Transceiver

D

Programmable Transmit (TX) and Receive
(RX) Gain Via Digital Interface

D

Low Overall Power Consumption

D

Power-Down Mode Minimizes Server
Modem Power Consumption in Multiplexed
Applications

D

Low Noise

D

Low Distortion

V

EE

VEEV

CC

D

D
D

D

PT PACKAGE

(TOP VIEW)

NUNURXOUT

RXGAIN2

RX_TERM

TNETEL1400

EtherLoop TRANSCEIVER

SPHS004A – FEBRUARY 1999 – REVISED MARCH 1999

All Terminals Protected to Survive, Without
Damage, a Simulated Static Discharge of
1 kV From a 100-pF Capacitor Applied
Through a 1.5-kΩ Resistor With Respect to
Chip Ground (VEE)

Single-Rail 5-V Power Supply
Operating Temperature –40°C to 85°C

Ambient
– Allows Operation in Central Office and

Distributed-Server Modem Applications

48-Pin Thin Plastic Quad Flatpack

RXGAIN0

EE

RXGAIN1

TX_EN

V

V

37

EE

NU

38

RXIP
RXIN

V

REMN

TXOP
TXON

REMP

NU – Not used

V

V

NU

EE

CC

EE

39
40
41
42
43
44
45
46
47
48

3635343332313029282726

123

EE

V

CBIAS1

REMREF

45678

IP_INT

IN_INT

OP_INT

ON_INT

9

NU

TXINP

101112

NU

V

TXINN

25

24
23
22
21
20
19
18
17
16
15
14
13

EE

V

EE

TXGAIN3
TXGAIN2
TXGAIN1
TXGAIN0
ANG
REFP
RXBIAS
TXBIAS
V

CC

V

EE

V

EE

description

The TNETEL1400 is an Etherloop transceiver. EtherLoop technology enables simultaneous voice and Ethernet
communication over local-loop plain old telephone service (POTS) wiring. The TNETEL1400 supports data
rates of up to 6 Mbit/s and POTS wire lengths of up to 21,000 feet. Figure 1 shows a typical system with an
EtherLoop modem located at each end of the POTS line. Each EtherLoop modem has a 10Base-T Ethernet
interface and is responsible for buffering Ethernet data before sending it over the POTS wire. The server-end
(SE) EtherLoop modem is located in a central switching office and can communicate with several client-end
(CE) EtherLoop modems, based on a round-robin arbitration scheme. The CE EtherLoop modem typically is
located at a remote site.

PRODUCT PREVIEW

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EtherLoop is a trademark of Elastic Networks.

PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Copyright  1999, Texas Instruments Incorporated

1

TNETEL1400

g

EtherLoop TRANSCEIVER

SPHS004A – FEBRUARY 1999 – REVISED MARCH 1999

description (continued)

POTS Phone

☎

POTS

Line

Ethernet

Network

SE Modem

Central Office

See Note A

POTS

Line

POTS Phone

☎

NOTE A: Flexible multiplexin

Figure 2 shows a block diagram of a typical CE EtherLoop modem. Ethernet data destined for the POTS wire
is received via 10Base-T interface and presented to the EtherLoop processor. The EtherLoop processor
performs Ethernet frame processing and buffer management. The EtherLoop processor sends buffered
Ethernet frames to the TNETEL1200 EtherLoop modem. The TNETEL1200 performs data modulation before
passing the modulated digital data to a digital-to-analog (DAC) converter. The resulting analog signal passes
to the TNETEL1400 transceiver, which acts as the line interface. The modem uses a half-duplex communication
protocol over the POTS wire, and data received from the POTS wire follows the reverse path back to the
Ethernet framer.

scheme allows one SE modem to interface with many CE modems.

Figure 1. Typical EtherLoop System

CE Modem

Remote Location

CE Modem

Remote Location

Ethernet
Network

Ethernet
Network

ROM

FLASH

PRODUCT PREVIEW

Ethernet

Network

Figure 3 shows a block diagram of a typical SE EtherLoop modem. Data flow follows the same path as in the
CE EtherLoop modem. In the SE application, the EtherLoop processor also performs round-robin arbitration
between each of the attached TNETEL1400 devices.

Ethernet
Interface

EtherLoop
Processor

SDRAM

Figure 2. Typical CE EtherLoop Modem

SRAM

TNETEL1200

EtherLoop

Modem

DAC

ADC

TNETEL1400

EtherLoop

Transceiver

Voice
Band
Filter

☎

POTS
Line

POTS
Phone

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TNETEL1400

EtherLoop TRANSCEIVER

SPHS004A – FEBRUARY 1999 – REVISED MARCH 1999

Ethernet

Network

Ethernet
Interface

ROM

FLASH

EtherLoop

Processor

SDRAM

SRAM

TNETEL1200

EtherLoop

Modem

Figure 3. Typical SE EtherLoop Modem

summary of TNETEL1400 EtherLoop transceiver

D

Drives POTS line with signal generated by DAC

D

Interfaces signal received from POTS line to ADC

functional block diagram

DAC

ADC

MUX

TNETEL1400

EtherLoop

Transceiver

TNETEL1400

EtherLoop

Transceiver

TNETEL1400

EtherLoop

Transceiver

POTS
Line

POTS
Line

POTS
Line

IP_INT

OP_INT

IN_INT

ON_INT

TXINN
TXINP

TX

REMP

TX_EN

REMREF

TXGAIN3–TXGAIN0

REMN

TXOP

TXON

CBIAS1

RXIP

Bias

TXBIAS

RX_TERM

REFP

RXIN

ANG

RXBIAS

RX

RXGAIN2–RXGAIN0

PRODUCT PREVIEW

RXOUT

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

3

TNETEL1400

T

EtherLoop TRANSCEIVER

SPHS004A – FEBRUARY 1999 – REVISED MARCH 1999

TX_IN

0.1 µF

0.1 µF

0.22 µF

TXINN

IP_INT
OP_INT

IN_INT
ON_INT

APPLICATION INFORMATION

5 V

RX_MODE

2.2 µF

2.2 µF

TXOP

TXON

RXIP

RXTERM

†

RXIN

0.22 µF

RX_OU

TXINP

0.22 µF

10 K

REMREF

PRODUCT PREVIEW

TX_EN

13 Ω

1%

TXGAIN

REMP

5 Ω

REMN

5 Ω

CBIAS1

4.99 kΩ 4.99 kΩ

100 nF

Bias

TXBIAS

RFEP

100 nF

RXBIAS

100 nF

ANG

34

RXGAIN

Figure 4. EtherLoop Front-End Application (CE)

†

All bias resistors should be 1% tolerance. The resistors on REMP, REMN, and REMREF also should be 1% and placed as close as possible
to their respective pins.

4

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

I/O

†

DESCRIPTION

EtherLoop TRANSCEIVER

SPHS004A – FEBRUARY 1999 – REVISED MARCH 1999

Terminal Functions

transmit (TX)

TERMINAL

NAME NO.

CBIAS1 2 I/O Transmit voltage bias decoupling
IN_INT 6 I Transmit interstage ac coupling pin 1 (negative side)
IP_INT 4 I Transmit interstage ac coupling pin 2 (positive side)
ON_INT 7 O Transmit interstage ac coupling pin 2 (negative side)
OP_INT 5 O Transmit interstage ac coupling pin 1 (positive side)
REMREF 3 O Transmit temperature-compensating bias reference

Transmit enable

TX_EN 26 I

TXBIAS 16 I Transmit current bias

TXGAIN3
TXGAIN2
TXGAIN1
TXGAIN0

TXINN 10 I Transmit input negative. TXINN can be coupled to ground for SE input).
TXINP 9 I Transmit input positive. TXINP can be coupled to ground for SE input).
TXON 46 O Transmitter output negative
TXOP 45 O Transmitter output positive

†

I = input, O = output

23 (MSB)

22
21

20 (LSB)

I

1 = Transmitter enabled
0 = Transmitter disabled

Transmit preattenuation select (0 to –30 dB in –3-dB steps)

0000 = 0 dB
0001 = – 3 dB

•

•

•

1010 = –30 dB
1011 = TX OFF

•

•

•

1110 = TX OFF
1111 = TX OFF

TNETEL1400

PRODUCT PREVIEW

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

5