Texas Instruments TLV2354IPW, TLV2354IN, TLV2354IDR, TLV2354ID, TLV2354MJB Datasheet

TLV2354, TLV2354Y

LinCMOS QUADRUPLE LOW-VOLTAGE DIFFERENTIAL COMPARATORS

SLCS012B – MAY 1992 – REVISED MARCH 1999

1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D

Wide Range of Supply Voltages

2 V to 8 V

D

Fully Characterized at 3 V and 5 V

D

Very-Low Supply-Current Drain

240 µA Typ at 3 V

D

Common-Mode Input Voltage Range
Includes Ground

D

High Input Impedance ...1012 Ω Typ

D

Fast Response Time . . . 200 ns Typ for
TTL-Level Input Step

D

Extremely Low Input Bias Current

5 pA Typ

D

Output Compatible With TTL, MOS, and
CMOS

D

Built-In ESD Protection

description

The TLV2354 consists of four independent,
low-power comparators specifically designed for
single power-supply applications and operateS
with power-supply rails as low as 2 V. When
powered from a 3-V supply, the typical supply
current is only 240 µA.

The TLV2354 is designed using the Texas Instruments LinCMOS technology and, therefore, features an
extremely high input impedance (typically greater than 10

12

Ω), which allows direct interfacing with
high-impedance sources. The outputs are N-channel open-drain configurations that require an external pullup
resistor to provide a positive output voltage swing, and they can be connected to achieve positive-logic
wired-AND relationships. The TL V2354I is fully characterized for operation from – 40°C to 85°C. The TLV2354M
is fully characterized for operation from – 55°C to 125°C.

The TLV2354 has internal electrostatic-discharge (ESD)-protection circuits and has been classified with a
1000-V ESD rating using Human Body Model testing. However, care should be exercised in handling this device
as exposure to ESD may result in degradation of the device parametric performance.

AVAILABLE OPTIONS

PACKAGED DEVICES

T

A

VIOmax

at 25°C

SMALL

OUTLINE

(D)

†

CHIP

CARRIER

(FK)

CERAMIC

DIP

(J)

PLASTIC

DIP

(N)

TSSOP

(PW)

‡

CERAMIC

FLATPACK

(W)

CHIP

FORM

(Y)

–40°C to

85°C

5 mV TLV2354ID — — TLV2354IN TLV2354IPWLE —

–55°C to

125°C

5 mV — TLV2354MFK TLV2354MJ — — TLV2354MW

TLV2354Y

†

The D package is available taped and reeled. Add the suffix R to the device type (e.g., TL V2352IDR).

‡

The PW packages are only available left-ended taped and reeled (e.g., TLV2354IPWLE).

These devices have limited built-in protection. The leads should be shorted together or the device placed in conductive foam during
storage or handling to prevent electrostatic damage to the MOS gates.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Copyright  1999, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

LINCMOS is a trademark of Texas Instruments Incorporated.

OUT

symbol (each comparator)

IN+

IN–

On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.

TLV2354, TLV2354Y
LinCMOS QUADRUPLE LOW-VOLTAGE DIFFERENTIAL COMPARATORS

SLCS012B – MAY 1992 – REVISED MARCH 1999

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

1
2
3
4
5
6
7

14
13
12
11
10

9
8

TLV2354M

J OR W PACKAGE

(TOP VIEW)

NC – No internal connection

3 2 1 20 19

910111213

4
5
6
7
8

18
17
16
15
14

V

DD–

/GND
NC
4IN+
NC
4IN–

V

DD+

NC

2IN–

NC

2IN+

2OUT

1OUT

NC

3IN–

3IN +

3OUT

4OUT

1IN–

1IN+

NC

(TOP VIEW)

1
2
3
4
5
6
7

14
13
12
11
10

9
8

1OUT
2OUT

V

DD

+
2IN–
2IN+
1IN–
1IN+

3OUT
4OUT
V

DD–

/GND
4IN+
4IN–
3IN+
3IN–

TLV2354I

D OR N PACKAGE

(TOP VIEW)

1
2
3
4
5
6
7

14
13
12
11
10

9
8

1OUT
2OUT

V

DD+

2IN–
2IN+
1IN–
1IN+

3OUT
4OUT
V

DD–

/GND
4IN+
4IN–
3IN+
3IN–

TLV2354I

PW PACKAGE

(TOP VIEW)

TLV2354AM, TLV2354M

FK PACKAGE

3OUT
4OUT
V

DD–

/GND
4IN+
4IN–
3IN+
3IN–

1OUT
2OUT

V

DD

+

2IN–
2IN+
1IN–
1IN+

TLV2254, TLV2254Y

SLCS012B – MAY 1992 – REVISED MARCH 1999

QUADRUPLE LOW-VOLTAGE DIFFERENTIAL COMPARATORSLinCMOS

POST OFFICE BOX 655303 DALLAS, TEXAS 75265

• 3

equivalent schematic

Common to All Channels

V

DD

GND

OUT

IN+

IN–

TLV2354, TLV2354Y
LinCMOS QUADRUPLE LOW-VOLTAGE DIFFERENTIAL COMPARATORS

SLCS012B – MAY 1992 – REVISED MARCH 1999

4

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2354Y chip information

This chip, when properly assembled, displays characteristics similar to the TL V2354. Thermal compression or
ultrasonic bonding may be used on the doped-aluminum bonding pads. This chip may be mounted with
conductive epoxy or a gold-silicon preform.

CHIP THICKNESS: 15 MILS TYPICAL
BONDING PADS: 4 × 4 MILS MINIMUM
TJmax = 150°C
TOLERANCES ARE ±10%.
ALL DIMENSIONS ARE IN MILS.
PIN (11) INTERNALLY CONNECTED

TO BACKSIDE OF CHIP.

+

–

OUT

IN+

IN–

V

DD

GND

(10)

(7)

(6)

(11)

(1)

–

+

(13)

IN+

IN–

OUT

(12)

(4)

(5)

–

+

(2)

+

–

(9)

(8)

(14)

OUT

IN+

IN–

OUT

IN+

IN–

(3)

BONDING PAD ASSIGNMENTS

65

90

(13)

(1)

(3)

(4)

(5)

(6)

(7)

(8)

(9)(10)

(11)

(12)

(14)

(2)

TLV2354, TLV2354Y

LinCMOS QUADRUPLE LOW-VOLTAGE DIFFERENTIAL COMPARATORS

SLCS012B – MAY 1992 – REVISED MARCH 1999

5

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

†

Supply voltage, VDD (see Note 1) 8 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Differential input voltage, VID (see Note 2) ±8 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage range, V

I

–0.3 to 8 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output voltage, VO 8 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input current, II ±5 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output current, IO 20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Duration of output short-circuit current to GND (see Note 3) unlimited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating free-air temperature range, T

A

: TLV2354I –40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

TLV2354M –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, N, or PW package 260°C. . . . . . . . . . . .

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: FK, J, or W package 300°C. . . . . . . . . . . .

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. All voltage values, except differential voltages, are with respect to network ground.

2. Differential voltages are at the noninverting input terminal with respect to the inverting input terminal.

3. Short circuits from outputs to VDD can cause excessive heating and eventual device destruction.

DISSIPATION RATING TABLE

PACKAGE

TA ≤ 25°C

POWER RATING

DERATING

FACTOR

TA = 85°C

POWER RATING

TA = 125°C

POWER RATING

D

FK

J

N

PW

W

950 mW
1375 mW
1375 mW
1150 mW

700 mW

700 mW

7.6 mW/°C

11.0 mW/°C

11.0 mW/°C

9.2 mW/°C

5.6 mW/°C

5.5 mW/°C

494 mW
715 mW
715 mW
598 mW
364 mW
370 mW

—
275 mW
275 mW

—

—
150 mW

recommended operating conditions

MIN MAX UNIT

Supply voltage, V

DD

2 8 V

p

VDD = 3 V 0 1.75

Common-mode input voltage, V

IC

VDD = 5 V 0 3.75

V

p

p

TLV2354I –40 85

°

O erating free-air tem erature, T

A

TLV2354M –55 125

°C

TLV2354, TLV2354Y
LinCMOS QUADRUPLE LOW-VOLTAGE DIFFERENTIAL COMPARATORS

SLCS012B – MAY 1992 – REVISED MARCH 1999

6

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

electrical characteristics at specified free-air temperature

†

TLV2354I

PARAMETER TEST CONDITIONS

T

A

‡

VDD = 3 V VDD = 5 V

UNIT

A

MIN TYP MAX MIN TYP MAX

p

25°C

1 5 1 5

VIOInput offset voltage

V

IC

=

V

ICR

min

,

See Note 4

Full range

7 7

mV

p

25°C

1 1

pA

IIOInput offset current

85°C

1 1

nA

p

25°C

5 5

pA

IIBInput bias current

85°C

2 2

nA

p

25°C 0 to 2 0 to 4

V

ICR

Common-mode input

voltage range

Full range

0 to

1.75

0 to

3.75

V

High-level output

25°C

0.1 0.1

nA

I

OH

g

current

V

ID

= 1

V

Full range

1 1

µA

Low-level output

25°C

115 300 150 400

V

OL

voltage

V

ID

= –1 V,

I

OL

= 2

mA

Full range

600 700

mA

I

OL

Low-level output
current

VID = –1 V, VOL = 1.5 V 25°C 6 16 6 16 mA

pp

25°C

240 500 290 600

IDDSupply current

V

ID

= 1 V,

No load

Full range

700 800

µ

A

†

All characteristics are measured with zero common-mode input voltage unless otherwise noted.

‡

Full range is –40°C to 85°C. IMPORTANT: See Parameter Measurement Information.

NOTE 4: The offset voltage limits given are the maximum values required to drive the output above 4 V with VDD = 5 V , 2 V with VDD = 3 V , or

below 400 mV with a 10-kΩ resistor between the output and VDD. They can be verified by applying the limit value to the input and
checking for the appropriate output state.

switching characteristics, V

DD

= 3 V, T

A

= 25°C

TLV2354I

PARAMETER

TEST CONDITIONS

MIN TYP MAX

UNIT

p

RL = 5.1 kΩ,

CL = 15 pF§,

p

p

Response time

See Note 5

L

100-mV input step with 5-mV overdrive

640

ns

§

CL includes probe and jig capacitance.

NOTE 5: The response time specified is the interval between the input step function and the instant when the output crosses VO = 1 V with

VDD = 3 V or when the output crosses VO = 1.4 with VDD = 5 V.

switching characteristics, VDD = 5 V, TA = 25°C

TLV2354I

PARAMETER

TEST CONDITIONS

MIN TYP MAX

UNIT

p

RL = 5.1 kΩ,

C

= 15 pF§,

100-mV input step with 5-mV overdrive 650

Response time

L

See Note 5

L

,

TTL-level input step 200

ns

§

CL includes probe and jig capacitance.

NOTE 5: The response time specified is the interval between the input step function and the instant when the output crosses VO = 1 V with

VDD = 3 V or when the output crosses VO = 1.4 with VDD = 5 V.