TEXAS INSTRUMENTS TLV2352, TLV2352Y Technical data

CHIP
TLV2352Y
查询5962-9688101Q2A供应商
D
2 V to 8 V
D
Fully Characterized at 3 V and 5 V
D
Very-Low Supply-Current Drain
120 µA Typ at 3 V
D
Output Compatible With TTL, MOS, and CMOS
D
Fast Response Time . . . 200 ns Typ for TTL-Level Input Step
description
TLV2352, TLV2352Y
LinCMOS DUAL LOW-VOLTAGE DIFFERENTIAL COMPARATORS
SLCS01 1B – MAY 1992 – REVISED MARCH 1999
D
High Input Impedance ...1012 Typ
D
Extremely Low Input Bias Current
5 pA Typ
D
Common-Mode Input Voltage Range Includes Ground
D
Built-In ESD Protection
symbol (each comparator)
The TLV2352 consists of two independent, low-power comparators specifically designed for single power-supply applications and operates
IN+
OUT
IN–
with power-supply rails as low as 2 V. When powered from a 3-V supply, the typical supply current is only 120 µA.
The TLV2352 is designed using the Texas Instruments LinCMOS technology and therefore features an extremely high input impedance (typically greater than 1012 ), which allows direct interfacing with high-impedance sources. The outputs are N-channel open-drain configurations that require an external pullup resistor to provide a positive output voltage swing, and they can be connected to achieve positive-logic wired-AND relationships. The TL V2352I is fully characterized at 3 V and 5 V for operation from – 40°C to 85°C. The TLV2352M is fully characterized at 3 V and 5 V for operation from – 55°C to 125°C.
The TLV2352 has internal electrostatic-discharge (ESD)-protection circuits and has been classified with a 1000-V ESD rating using Human Body Model testing. However, care should be exercised in handling this device as exposure to ESD may result in degradation of the device parametric performance.
AVAILABLE OPTIONS
PACKAGED DEVICES
T
A
–40°C to
85°C
–55°C to
125°C
The D package is available taped and reeled. Add the suffix R to the device type (e.g., TL V2352IDR).
The PW packages are only available left-ended taped and reeled (e.g., TLV2352IPWLE)
VIO max
at 25°C
5 mV TLV2352ID TLV2352IP TLV2352IPWLE
5 mV TLV2352MFK TLV2352MJG TLV2352MU
SMALL
OUTLINE
(D)
CHIP
CARRIER
(FK)
CERAMIC
DIP
(JG)
PLASTIC
DIP
(P)
TSSOP
(PW)
PLASTIC
DIP
(U)
FORM
(Y)
These devices have limited built-in protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
LinCMOS is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright 1999, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
1
TLV2352, TLV2352Y LinCMOS DUAL LOW-VOLTAGE DIFFERENTIAL COMPARATORS
SLCS01 1B – MAY 1992 – REVISED MARCH 1999
TLV2352I...D OR P PACKAGE
TLV2352M. . . JG PACKAGE
(TOP VIEW)
V
DD–
1OUT
1IN– 1IN+
/GND
1 2 3 4
8 7 6 5
V
DD+
2OUT 2IN– 2IN+
V
DD–
NC
1IN–
NC
1IN+
NC
TLV2254M
U PACKAGE
(TOP VIEW)
1
NC
1OUT
1IN– 1IN+
/GND
2 3 4 5
TLV2352M
FK PACKAGE
(TOP VIEW)
NC
1OUT
3212019
4 5 6 7 8
910111213
NC
10
9 8 7 6
DD+
V
NC
18 17 16 15 14
NC V
DD+
2OUT 2IN– 2IN+
NC 2OUT NC 2IN– NC
TLV2352I. . . PW PACKAGE
(TOP VIEW)
1OUT
1IN– 1IN+
V
/GND
DD–
NC – No internal connection
1 2 3 4
8 7 6 5
V
DD+
2OUT 2IN– 2IN+
NC
NC
/GND
DD –
V
2IN+
NC
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
LinCMOS
OUT
TLV2352, TLV2352Y
DUAL LOW-VOLTAGE DIFFERENTIAL COMPARATORS
SLCS01 1B – MAY 1992 – REVISED MARCH 1999
Common to All Channels
IN–
IN+
DD
equivalent schematic
V
GND
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
3
TLV2352, TLV2352Y LinCMOS DUAL LOW-VOLTAGE DIFFERENTIAL COMPARATORS
SLCS01 1B – MAY 1992 – REVISED MARCH 1999
TLV2352Y chip information
These chips, when properly assembled, display characteristics similar to the TL V2352. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. This chip can be mounted with conductive epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
57
(7)
(8)
57
(6)
(3)(2)(1)
(5)
(4)
V
DD
+
GND
(8)
(4)
(1)
(5)
+
(6)
(3)
IN+
(2)
IN–
(7)
OUT
CHIP THICKNESS: 15 MILS TYPICAL BONDING PADS: 4 × 4 MILS MINIMUM TJmax = 150°C TOLERANCES ARE ±10%. ALL DIMENSIONS ARE IN MILS. PIN (4) INTERNALLY CONNECTED
TO BACKSIDE OF CHIP.
OUT
IN+
IN–
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TLV2352, TLV2352Y
Common-mode input voltage, V
V
O erating free-air tem erature, T
A
°C
LinCMOS DUAL LOW-VOLTAGE DIFFERENTIAL COMPARATORS
SLCS01 1B – MAY 1992 – REVISED MARCH 1999
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VDD (see Note 1) 8 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Differential input voltage, VID (see Note 2) ±8 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
Output voltage, VO 8 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input current, II ±5 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output current, IO 20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Duration of output short-circuit current to GND (see Note 3) unlimited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T Storage temperature range, T
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, P, and PW Packages 260°C. . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: FK, JG, and U Packages 300°C. . . . . . . .
Stress beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to network ground.
2. Differential voltages are at IN+ with respect to IN–.
3. Short circuits from outputs to VDD can cause excessive heating and eventual device destruction.
PACKAGE
–0.3 to 8 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
: TLV2352I –40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A
TLV2352M –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
DISSIPATION RATING TABLE
D FK JG
P
PW
U
TA 25°C
POWER RATING
725 mW 1375 mW 1050 mW 1000 mW
525 mW
700 mW
DERATING
FACTOR
5.8 mW/°C
11.0 mW/°C
8.4 mW/°C
8.0 mW/°C
4.2 mW/°C
5.5 mW/°C
TA = 85°C
POWER RATING
377 mW 715 mW 546 mW 520 mW 273 mW 370 mW
TA = 125°C
POWER RATING
275 mW 210 mW
150 mW
— —
recommended operating conditions
Supply voltage, V
p
DD
p
IC
p
VDD = 3 V 0 1.75 VDD = 5 V 0 3.75 TLV2352I –40 85 TLV2352M –55 125
MIN MAX UNIT
2 8 V
°
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5
TLV2352, TLV2352Y
VIOInput offset voltage
V
V
min
See Note 4
mV
IIOInput offset current
IIBInput bias current
Common-mode input I
g
V
V
V
V
1 V
I
2 mA
mV
IDDSupply current
V
No load
A
PARAMETER
TEST CONDITIONS
UNIT
PARAMETER
TEST CONDITIONS
UNIT
Response time
R
C
F
§
See Note 5
ns
LinCMOS DUAL LOW-VOLTAGE DIFFERENTIAL COMPARATORS
SLCS01 1B – MAY 1992 – REVISED MARCH 1999
electrical characteristics at specified free-air temperature
PARAMETER TEST CONDITIONS
p
p
p
V
ICR
voltage range
High-level output
OH
current Low-level output
OL
voltage Low-level output
I
OL
current
pp
All characteristics are measured with zero common-mode input voltages unless otherwise noted.
Full range is –40°C to 85°C. IMPORTANT: See
NOTE 4: The offset voltage limits given are the maximum values required to drive the output above 4 V with VDD = 5 V , 2 V with VDD = 3 V , or
below 400 mV with a 10-k resistor between the output and VDD. They can be verified by applying the limit value to the input and checking for the appropriate output state.
p
=
IC
= 1
ID
= –
ID
VID = –1 V, VOL = 1.5 V 25°C 6 16 6 16 mA
= 1 V,
ID
,
ICR
,
=
OL
Parameter Measurement Information
T
A
25°C 1 5 1 5
Full range 7 7
25°C 1 1 85°C 1 1 25°C 5 5 85°C 2 2 25°C 0 to 2 0 to 4
Full range
25°C 0.1 0.1
Full range 1 1
25°C 115 300 150 400
Full range 600 700
25°C 120 250 140 300
Full range 350 400
TLV2352I
VDD = 3 V VDD = 5 V
MIN TYP MAX MIN TYP MAX
0 to
1.75
.
0 to
3.75
UNIT
pA nA pA nA
V
nA
µA
µ
switching characteristics, V
Response time RL = 5.1 kΩ, CL = 15 pF§, See Note 5 100-mV input step with 5-mV overdrive 640 ns
§
CL includes probe and jig capacitance.
NOTE 5: The response time specified is the interval between the input step function and the instant when the output crosses VO = 1 V with
VDD = 3 V or VO = 1.4 V with VDD = 5 V.
= 3 V, T
DD
= 25°C
A
TLV2352I
MIN TYP MAX
switching characteristics, VDD = 5 V, TA = 25°C
TLV2352I
MIN TYP MAX
p
§
CL includes probe and jig capacitance.
NOTE 5: The response time specified is the interval between the input step function and the instant when the output crosses VO = 1 V with
VDD = 3 V or VO = 1.4 V with VDD = 5 V.
= 5.1 k,
L
= 15 p
L
p
,
100-mV input step with 5-mV overdrive 650 TTL-level input step 200
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TLV2352, TLV2352Y
VIOInput offset voltage
V
V
min
See Note 4
mV
IIOInput offset current
IIBInput bias current
Common-mode input I
g
V
V
V
V
I
mA
mV
IDDSupply current
V
No load
A
PARAMETER
TEST CONDITIONS
UNIT
PARAMETER
TEST CONDITIONS
UNIT
Response time
R
C
100 pF
§
See Note 5
ns
LinCMOS DUAL LOW-VOLTAGE DIFFERENTIAL COMPARATORS
SLCS01 1B – MAY 1992 – REVISED MARCH 1999
electrical characteristics at specified free-air temperature
PARAMETER TEST CONDITIONS
p
p
p
V
ICR
voltage range
High-level output
OH
current Low-level output
OL
voltage Low-level output
I
OL
current
pp
All characteristics are measured with zero common-mode input voltages unless otherwise noted.
Full range is –55°C to 125°C. IMPORTANT: See
NOTE 4: The offset voltage limits given are the maximum values required to drive the output above 4 V with VDD = 5 V , 2 V with VDD = 3 V , or
below 400 mV with a 10-k resistor between the output and VDD. They can be verified by applying the limit value to the input and checking for the appropriate output state.
p
=
IC
= 1
ID
= –1 V,
ID
VID = –1 V, VOL = 1.5 V 25°C 6 16 6 16 mA
= 1 V,
ID
,
ICR
= 2
OL
Parameter Measurement Information
T
A
25°C 1 5 1 5
Full range 10 10
25°C 1 1
125°C 10 10
25°C 5 5
125°C 20 20
25°C 0 to 2 0 to 4
Full range
25°C 0.1 0.1
Full range 1 1
25°C 115 300 150 400
Full range 600 700
25°C 120 250 140 300
Full range 350 400
TLV2352M
VDD = 3 V VDD = 5 V
MIN TYP MAX MIN TYP MAX
0 to
1.75
.
0 to
3.75
UNIT
pA nA pA nA
V
nA
µA
µ
switching characteristics, V
Response time RL = 5.1 kΩ, CL = 100 pF§, See Note 5 100-mV input step with 5-mV overdrive 1400 ns
§
CL includes probe and jig capacitance.
NOTE 5: The response time specified is the interval between the input step function and the instant when the output crosses VO = 1 V with
VDD = 3 V or VO = 1.4 V with VDD = 5 V.
= 3 V, T
DD
= 25°C
A
TLV2352M
MIN TYP MAX
switching characteristics, VDD = 5 V, TA = 25°C
TLV2352M
MIN TYP MAX
p
§
CL includes probe and jig capacitance.
NOTE 5: The response time specified is the interval between the input step function and the instant when the output crosses VO = 1 V with
VDD = 3 V or VO = 1.4 V with VDD = 5 V.
= 5.1 k,
L
p
=
L
,
100-mV input step with 5-mV overdrive 1300 TTL-level input step 900
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7
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