DComplete PWM Power Control
D3.6-V to 40-V Operation
DInternal Undervoltage-Lockout Circuit
DOscillator Frequency . . . 20 kHz to 500 kHz
DVariable Dead Time Provides Control Over
Total Range
OUT
V
COMP
INV
DIdeal Controller for DDR Memory
Application
DUncommitted Error Amplifier Inputs
description
The TL5002 incorporates on a single monolithic chip all the functions required for a pulse-width-modulation
(PWM) control circuit. Designed primarily for power-supply control, the TL5002 contains an error amplifier, a
regulator, an oscillator, a PWM comparator with a dead-time-control input, undervoltage lockout (UVLO), and
an open-collector output transistor.
The error-amplifier input common-mode voltage ranges from 0.9 V to 1.5 V. Dead-time control (DTC) can be
set to provide 0% to 100% dead time by connecting an external resistor between DTC and GND. The oscillator
frequency is set by terminating RT with an external resistor to GND. During low V
turns the output off until V
recovers to its normal operating range.
CC
The TL5002 is characterized for operation from –40°C to 85°C.
AVAILABLE OPTIONS
T
A
–20°C to 85°CTL5002CD
–40°C to 85°CTL5002ID
The D package is available taped and reeled. Add the suffix R
to the device type (e.g., TL5002CDR).
SMALL OUTLINE
(D)
conditions, the UVLO circuit
CC
functional block diagram
V
Reference
Error
Amplifier
5
NI
INV
COMP
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
+
4
–
3
Voltage
CC
2
UVLO
2.5 V
RT
OSC
I
DT
DTC
67
PWM/DTC
Comparator
Copyright 2002, Texas Instruments Incorporated
OUT
GND
1
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
1
TL5002
PULSE-WIDTH-MODULATION CONTROL CIRCUIT
SLVS304A – SEPTEMBER 2000 – REVISED AUGUST 2002
detailed description
voltage reference
A 2.5-V regulator operating from V
is used to power the internal circuitry of the TL5002.
CC
error amplifier
The error amplifier compares a sample of the dc-to-dc converter output voltage to an external reference voltage
and generates an error signal for the PWM comparator. The dc-to-dc converter output voltage is set by selecting
the error-amplifier gain (see Figure 1), using the following expression:
= (1 + R1/R2) (1 V)
V
O
TL5002
–
+
To PWM
Comparator
Compensation
V
I(FB)
Network
R1
R2
3
COMP
4
INV
5
ref
NI
GND8
V
Figure 1. Error-Amplifier Gain Setting
The error-amplifier output is brought out as COMP for use in compensating the dc-to-dc converter control loop
for stability . Because the amplifier can only source 45 µA, the total dc load resistance should be 100 kΩ or more.
oscillator/PWM
The oscillator frequency (f
) can be set between 20 kHz and 500 kHz by connecting a resistor between RT
osc
and GND. Acceptable resistor values range from 15 kΩ to 250 kΩ. The oscillator frequency can be determined
by using the graph shown in Figure 5.
The oscillator output is a triangular wave with a minimum value of approximately 0.7 V and a maximum value
of approximately 1.3 V. The PWM comparator compares the error-amplifier output voltage and the DTC input
voltage to the triangular wave and turns the output transistor off whenever the triangular wave is greater than
the lesser of the two inputs.
dead-time control (DTC)
DTC provides a means of limiting the output-switch duty cycle to a value less than 100%, which is critical for
boost and flyback converters. A current source generates a reference current (I
) at DTC that is nominally
DT
equal to the current at the oscillator timing terminal, RT . Connecting a resistor between DTC and GND generates
a dead-time reference voltage (V
as described in the previous section. Nominally , the maximum duty cycle is 0% when V
100% when V
is 1.3 V or greater. Because the triangle wave amplitude is a function of frequency and the
DT
source impedance of RT is relatively high (1250 Ω), choosing R
), which the PWM/DTC comparator compares to the oscillator triangle wave
DT
for a specific maximum duty cycle, D, is
DT
is 0.7 V or less and
DT
accomplished using the following equation and the voltage limits for the frequency in question as found in
Figure 11 (V
max and V
osc
min are the maximum and minimum oscillator levels):
osc
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
dead-time control (DTC) (continued)
TL5002
PULSE-WIDTH-MODULATION CONTROL CIRCUIT
SLVS304A – SEPTEMBER 2000 – REVISED AUGUST 2002
ǒ
Ǔ
–e
1
ƪ
DǒV
ǒ
–tńRDTC
C
max – V
osc
DT
DT
Figure 2. Soft-Start Circuit
osc
Ǔ
Ǔ
R
6
DT
minǓ) V
DTC
osc
TL5002
R
Where
R
DT
Soft start can be implemented by paralleling the DTC resistor with a capacitor (C
soft start, the voltage at DTC is derived by the following equation:
VDT[ IDTR
If the dc-to-dc converter must be in regulation within a specified period of time, the time constant, R
should be t
every time UVLO becomes active.
undervoltage-lockout (UVLO) protection
ǒ
+
DT
Rt) 1250
and Rt are in ohms, D in decimal
DT
/3 to t0/5. The TL5002 remains off until VDT ≈ 0.7 V, the minimum ramp value. CDT is discharged
0
min
ƫ
) as shown in Figure 2. During
DT
DTCDT
,
The undervoltage-lockout circuit turns the output transistor off whenever the supply voltage drops too low
(approximately 3 V at 25°C) for proper operation. A hysteresis voltage of 200 mV eliminates false triggering on
noise and chattering.
output transistor
The output of the TL5002 is an open-collector transistor with a maximum collector current rating of 21 mA and
a voltage rating of 51 V. The output is turned on under the following conditions: the oscillator triangle wave is
lower than both the DTC voltage and the error-amplifier output voltage, and the UVLO circuit is inactive.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
TL5002
PULSE-WIDTH-MODULATION CONTROL CIRCUIT
SLVS304A – SEPTEMBER 2000 – REVISED AUGUST 2002
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
Amplifier input voltage, V
Output voltage, V
Output current, I
Output peak current, I
Operating ambient temperature range, T
Storage temperature range, T
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values are with respect to network ground terminal.
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
D. Falls within JEDEC MS-012
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
0.197
(5,00)
0.189
(4,80)
0.344
(8,75)
0.337
(8,55)
0.394
(10,00)
0.386
(9,80)
4040047/D 10/96
13
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enhancements, improvements, and other changes to its products and services at any time and to discontinue
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Texas Instruments
Post Office Box 655303
Dallas, Texas 75265
Copyright 2002, Texas Instruments Incorporated
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