VCCBIAS Pin Minimizes Signal Distortion
During Live Insertion
D
Internal Pullup Resistor on OE Keeps
Outputs in High-Impedance State During
Power Up or Power Down
D
Distributed VCC and GND Pin Configuration
Minimizes High-Speed Switching Noise
D
Equivalent 25-Ω Series Damping Resistor
on B Port
D
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
D
Package Options Include Plastic Shrink
Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages and 380-Mil
Fine-Pitch Ceramic Flat (WD) Packages
Using 25-mil Center-to-Center Spacings
SN54ABTE16245 . . . WD P ACKAGE
SN74ABTE16245 . . . DGG OR DL PACKAGE
1DIR
1B1
2B1
GND
1B2
2B2
V
CC
1B3
2B3
GND
1B4
2B4
1B5
2B5
GND
1B6
2B6
V
CC
1B7
2B7
GND
1B8
2B8
2DIR
(TOP VIEW)
1
48
2
47
3
46
4
45
5
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31
19
30
20
29
21
28
22
27
23
26
24
25
V
CC
1A1
2A1
GND
1A2
2A2
V
CC
1A3
2A3
GND
1A4
2A4
1A5
2A5
GND
1A6
2A6
V
CC
1A7
2A7
GND
1A8
2A8
OE
BIAS
description
The ’ABTE16245 devices are 16-bit (dual-octal) noninverting 3-state transceivers designed for synchronous
two-way communication between data buses. The control-function implementation minimizes external timing
requirements. These devices can be used as two 8-bit transceivers or one 16-bit transceiver. They allow data
transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the
direction-control (DIR) input. The output-enable (OE
are effectively isolated. When OE is low , the device is active.
The B port has an equivalent 25-Ω series output resistor to reduce ringing. Active bus-hold inputs are also on
the B port to hold unused or floating inputs at a valid logic level.
The A port provides for the precharging of the outputs via VCCBIAS, which establishes a voltage between 1.3 V
and 1.7 V when VCC is not connected.
The SN54ABTE16245 is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74ABTE16245 is characterized for operation from –40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus and EPIC-ΙΙB are trademarks of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
) input can be used to disable the device so that the buses
Copyright 1999, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
1
SN54ABTE16245, SN74ABTE16245
OPERATION
16-BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS226G – JULY 1993 – REVISED JUNE 1999
FUNCTION TABLE
(each 8-bit section)
INPUTS
DIR
OE
LLA data to B bus
LHB data to A bus
HXIsolation
logic diagram (positive logic)
1DIR
OE
1B1
1
25
2
To Seven Other Channels
47
1A1
2DIR
2B1
24
3
To Seven Other Channels
46
2A1
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
Input voltage range, VI (except I/O ports) (see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high state or power-off state, VO –0.5 V to 5.5 V. . . . . . . . . . . . . .
Current into any output in the low state, I
Input clamp current, I
Output clamp current, I
Package thermal impedance, θ
Storage temperature range, T
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51.
live-insertion specifications over recommended operating free-air temperature range
SN54ABTE16245SN74ABTE16245
MIN TYP†MAXMIN TYP†MAX
VCC = 0 to 4.5 V, VCCBIAS = 4.5 V to 5.5 V,
I
= 0
CC
p
p
†
All typical values are at VCC = 5 V, TA = 25°C.
‡
VCC – 0.5 V < VCCBIAS
O(DC)
VCC = 4.5 V to 5.5 V‡, VCCBIAS = 4.5 V to 5.5 V,
I
= 0
O(DC)
CC
CC
=
=
VCCBIAS = 4.5 V to 5.5 V1.11.51.91.11.51.9
VCCBIAS = 4.75 V to 5.25 V1.31.51.71.31.51.7
VO = 0,VCCBIAS = 4.5 V–20–100–20–100
VO = 3 V,VCCBIAS = 4.5 V2010020100
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, C
extended output characteristics over recommended ranges of supply voltage and operating
free-air temperature, C
FROMTO
(INPUT)(OUTPUT)
sk(temp)
t
sk(load)
AB
BA
BB
= 50 pF (see Figures 1 and 2)
L
V
= constant,
∆TA = 20°C
VCC = constant,
Temperature = constant
SN54ABTE16245SN74ABTE16245
MINMAXMINMAX
32.5
RX = 56 Ω4.54
RX = 13, 26,
or 56 Ω
4.54ns
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ABTE16245, SN74ABTE16245
16-BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS226G – JULY 1993 – REVISED JUNE 1999
PARAMETER MEASUREMENT INFORMATION
Device 1
A
Y1
B
Device
1 – Y1
t
PLH1
Device
1 – Yn
t
PLH2
Device
n – Yn
NOTES: A. Pulse skew, t
operating conditions.
B. Output skew, t
direction (e.g., |t
C. Temperature skew, t
temperature differences of 20°C.
D. Load skew, t
A
t
PHL1
, is defined as the difference in propagation delay times t
sk(p)
, is defined as the difference in propagation delay of any two outputs of the same device switching in the same
sk(o)
– t
PLH1
sk(temp)
, is measured with RX in Figure 2 at 13 W for one unit and 56 W for the other unit.
sk(load)
|).
PLH2
, is the output skew of two devices, both having the same value of VCC ± 1% and with package
In
Device n
B
PLH1
and t
on the same terminal at identical
PHL1
Y2
Yn
t
sk(load)
t
sk(temp)
Y1
Y2
Yn
t
Figure 1. Voltage Waveforms for Extended Characteristics
sk(o)
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
7
SN54ABTE16245, SN74ABTE16245
16-BIT INCIDENT-WAVE SWITCHING BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS226G – JULY 1993 – REVISED JUNE 1999
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
CL = 50 pF
(see Note A)
†
RX = 13, 26, or 56 Ω
Input
t
PLH
Output
500 Ω
500 Ω
7 V
Open
†
R
X
S2
S1
LOAD CIRCUIT FOR OUTPUTS
1.5 V1.5 V
1.5 V1.5 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
3.65 V
t
PHL
94 Ω
2 nF
3 V
0 V
V
V
OH
OL
t
Output
Control
(low-level
enabling)
Output
Waveform 1
S2 at 7 V
(see Note B)
Output
Waveform 2
S2 at Open
(see Note B)
SWITCHING TABLE
LOADS
PLH/tPHL
t
PLH/tPHL/tsk
t
PLH/tPHL/tsk
tt (A port) (see Note E)
tt (B port) (see Note F)
(A and B port)
t
PLZ/tPZL
t
PHZ/tPZH
EXTENDED
SWITCHING TABLE
LOADS
(A port)
(B port)
1.5 V1.5 V
t
PZL
1.5 V
t
PZH
1.5 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
S1S2
Up
Up
Up
S1
Down
Up
Down
Up
VOL + 0.3 V
t
VOH – 0.3 V
Open
Open
Open
Open
t
PLZ
PHZ
7 V
S2
X
X
3 V
0 V
3.5 V
V
OL
V
OH
≈ 0 V
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. tt is measured between 1 V and 2 V of the output waveform.
F. tt is measured between 10% and 90% of the output waveform.Figure 1
Figure 2. Load Circuit and Voltage Waveforms
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
T exas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICA TIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERST OOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1999, Texas Instruments Incorporated
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