Texas Instruments JM38510-65711BRA, SN54HC541J, SN74HC541DW, SN74HC541DWR, SN74HC541N Datasheet
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SN54HC541, SN74HC541
OCTAL BUFFERS AND LINE DRIVERS
WITH 3-STATE OUTPUTS
SCLS305A – JANUARY 1996 – REVISED MA Y 1997
D
High-Current 3-State Outputs Drive Bus
Lines Directly or up to 15 LSTTL Loads
D
Data Flow-Through Pinout (All Inputs on
Opposite Side From Outputs)
D
Package Options Include Plastic
Small-Outline (DW), Thin Shrink
Small-Outline (PW), and Ceramic Flat (W)
Packages, Ceramic Chip Carriers (FK), and
Standard Plastic (N) and Ceramic (J)
300-mil DIPs
description
These octal buffers and line drivers feature the
performance of the ’HC240 and a pinout with
inputs and outputs on opposite sides of the
package. This arrangement greatly enhances
printed circuit board layout.
The 3-state control gate is a 2-input NOR. If either
output-enable (OE1
outputs are in the high-impedance state. The
’HC541 provide true data at the outputs.
The SN54HC541 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74HC541 is characterized for
operation from –40°C to 85°C.
or OE2) input is high, all eight
SN54HC541 ...J OR W PACKAGE
SN74HC541 ...DW, N, OR PW PACKAGE
SN54HC541 . . . FK PACKAGE
A3
A4
A5
A6
A7
(TOP VIEW)
OE1
1
A1
2
A2
3
A3
4
A4
5
A5
6
A6
7
A7
8
A8
9
GND
10
(TOP VIEW)
A2A1OE1
3212019
4
5
6
7
8
910111213
A8
Y8
20
19
18
17
16
15
14
13
12
11
CC
V
Y7
V
CC
OE2
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
OE2
18
17
16
15
14
Y6
Y1
Y2
Y3
Y4
Y5
GND
FUNCTION TABLE
(each buffer/driver)
INPUTS
OE1 OE2 A
L L L L
L LH H
H XX Z
X H X Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
OUTPUT
Y
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1997, Texas Instruments Incorporated
1
SN54HC541, SN74HC541
OCTAL BUFFERS AND LINE DRIVERS
WITH 3-STATE OUTPUTS
SCLS305A – JANUARY 1996 – REVISED MA Y 1997
logic symbol
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
†
OE1
OE2
A1
A2
A3
A4
A5
A6
A7
A8
1
19
2
3
4
5
6
7
8
9
&
EN
logic diagram (positive logic)
OE1
OE2
1
19
218
A1
Y1
18
17
16
15
14
13
12
11
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
To Seven Other Channels
absolute maximum ratings over operating free-air temperature range
‡
Supply voltage range, VCC –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO (VO = 0 to VCC) ±35 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through V
Package thermal impedance, θ
or GND ±70 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
(see Note 2): DW package 97°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
JA
N package 67°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package 128°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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