Texas Instruments JM38510-65708BFA, JM38510-65708BEA, SN54HC367J, SN74HC367D, SN74HC367DR Datasheet
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SN54HC367, SN74HC367
HEX BUFFERS AND LINE DRIVERS
WITH 3-STATE OUTPUTS
SCLS309B – JANUARY 1996 – REVISED MA Y 1997
D
High-Current 3-State Outputs Drive Bus
Lines, Buffer Memory Address Registers,
or Drive up to 15 LSTTL Loads
D
True Outputs
D
Package Options Include Plastic
Small-Outline (D) and Ceramic Flat (W)
Packages, Ceramic Chip Carriers (FK), and
Standard Plastic (N) and Ceramic (J)
300-mil DIPs
description
These hex buffers and line drivers are designed
specifically to improve both the performance and
density of 3-state memory address drivers, clock
drivers, and bus-oriented receivers and
transmitters. The ’HC367 are organized as dual
4-line and 2-line buffers/drivers with active-low
output-enable (1OE
low, the device passes noninverted data from the
A inputs to the Y outputs. When OE is high, the
outputs are in the high-impedance state.
The SN54HC367 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74HC367 is characterized for
operation from –40°C to 85°C.
and 2OE) inputs. When OE is
SN54HC367 ...J OR W PACKAGE
SN74HC367 . . . D OR N PACKAGE
SN54HC367 . . . FK PACKAGE
1Y1
1A2
NC
1Y2
1A3
NC – No internal connection
(TOP VIEW)
1OE
1
1A1
2
1Y1
3
1A2
4
5
1Y2
6
1A3
7
1Y3
GND
8
(TOP VIEW)
1A1
3212019
4
5
6
7
8
910111213
1Y3
1OE
GND
NC
NC
16
15
14
13
12
11
10
9
CC
V
1Y4
V
CC
2OE
2A2
2Y2
2A1
2Y1
1A4
1Y4
2OE
18
17
16
15
14
1A4
2A2
2Y2
NC
2A1
2Y1
FUNCTION TABLE
(each buffer/driver)
INPUTS
OE A
H X Z
L HH
L L L
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
OUTPUT
Y
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1997, Texas Instruments Incorporated
1
SN54HC367, SN74HC367
HEX BUFFERS AND LINE DRIVERS
WITH 3-STATE OUTPUTS
SCLS309B – JANUARY 1996 – REVISED MA Y 1997
logic symbol
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, J, N, and W packages.
†
1OE
1A1
1A2
1A3
1A4
2OE
2A1
2A2
1
2
4
6
10
15
12
14
EN
EN
logic diagram (positive logic)
1OE
1
2OE
15
11
13
3
1Y1
5
1Y2
7
1Y3
9
1Y4
2Y1
2Y2
23
1A1
To Three Other Channels
Pin numbers shown are for the D, J, N, and W packages.
1Y1
absolute maximum ratings over operating free-air temperature range
12 11
2A1
To One Other Channel
2Y1
‡
Supply voltage range, VCC –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, I
(VO = 0 to VCC) ±35 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
O
Continuous current through VCC or GND ±70 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θ
(see Note 2): D package 113°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
JA
N package 78°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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