Texas Instruments CD74FCT574SM, CD74FCT574M96, CD74FCT574M, CD74FCT574E, CD74FCT564M Datasheet
...
8-1
Data sheet acquired from Harris Semiconductor
SCHS259
Features
• Buffered Inputs
• Typical Propagation Delay: 5.6ns at V
CC
= 5V,
T
A
= 25oC
• Positive Edge Triggered
• CD74FCT564
- Inverting
• CD74FCT574
- Noninverting
• SCR Latchup Resistant BiCMOS Process and
Circuit Design
• Speed of Bipolar FAST™/AS/S
• 48mA Output Sink Current
• Output Voltage Swing Limited to 3.7V at V
CC
= 5V
• Controlled Output Edge Rates
• Input/Output Isolation to V
CC
• BiCMOS Technology with Low Quiescent Power
Description
The CD74FCT564 and CD74FCT574 are octal D-Type,
three-state, positive edge triggered flip-flops which use a
small geometry BiCMOS technology. The output stage is a
combination of bipolar and CMOS transistors that limits the
output HIGH level totwo diode drops below V
CC
. This resultant lowering of output swing (0V to 3.7V) reduces power bus
ringing (a source of EMI) and minimizes V
CC
bounce and
ground bounce and their effects during simultaneous output
switching. The output configuration also enhances switching
speed and is capable of sinking 48 milliamperes.
The eight flip-flops enter data into their registers on the LOW
to HIGH transition of the clock (CP). The Output Enable (
OE)
controls the three state outputs and is independent of the
register operation. When the Output Enable (
OE) is HIGH,
the outputs are in the high impedance state. The
CD74FCT564 and CD74FCT574 share the same configurations; the CD74FCT564, however, has inverted outputs and
the CD74FCT574 has noninverted outputs.
Pinouts
Ordering Information
PART NUMBER
TEMP.
RANGE (oC) PACKAGE
PKG.
NO.
CD74FCT564E 0 to 70 20 Ld PDIP E20.3
CD74FCT574E 0 to 70 20 Ld PDIP E20.3
CD74FCT564M 0 to 70 20 Ld SOIC M20.3
CD74FCT574M 0 to 70 20 Ld SOIC M20.3
CD74FCT574SM 0 to 70 20 Ld SSOP M20.209
NOTE: Whenordering the suffix M and SM packages, use the entire
part number.Addthesuffix96to obtain the variant in the tape and reel.
CD74FCT564
(PDIP, SOIC, SSOP)
TOP VIEW
CD74FCT574
(PDIP, SOIC, SSOP)
TOP VIEW
11
12
13
14
15
16
17
18
20
19
10
9
8
7
6
5
4
3
2
1
OE
D0
D1
D2
D3
D4
D6
D5
D7
GND
V
CC
Q1
Q2
Q3
Q4
Q5
Q6
Q7
CP
Q0
11
12
13
14
15
16
17
18
20
19
10
9
8
7
6
5
4
3
2
1
OE
D0
D1
D2
D3
D4
D6
D5
D7
GND
V
CC
Q1
Q2
Q3
Q4
Q5
Q6
Q7
CP
Q0
January 1997
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
FAST™ is a trademark of Fairchild Semiconductor.
Copyright
© Harris Corporation 1997
CD74FCT564,
CD74FCT574
BiCMOS FCT Interface Logic,
Octal D-Type Flip-Flops, Three-State
File Number 2295.2
NOT RECOMMENDED
FOR NEW DESIGNS
Use CMOS Technology
8-2
Functional Diagram
IEC Logic Symbols
2
3
4
5
6
7
8
9
19
18
17
16
15
14
13
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
D0
D1
D2
D3
D4
D5
D6
D7
1
GND = PIN 10
V
CC
= PIN 20
11
OE
CP
12
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
CD74FCT574 CD74FCT564
TRUTH TABLE (NOTE 1)
INPUTS
OUTPUTS
CD74FCT564 CD74FCT574
OE CP DN QN QN
L ↑ HL H
L↑LH L
LLX Qo Qo
HXX Z Z
NOTE:
1. H = High Level (Steady State)
L = Low Level (Steady State)
X = Don't Care
↑ = Transition from low to high level
Qo = The level of Q before the indicated steady state input
conditions were established.
Z = HIGH Impedance
CD74FCT564 CD74FCT574
19
18
17
16
EN
1
2
3
4
5
15
14
13
12
6
7
8
9
>C1
11
1D
19
18
17
16
EN
1
2
3
4
5
15
14
13
12
6
7
8
9
>C1
11
1D
CD74FCT564, CD74FCT574
8-3
Absolute Maximum Ratings Thermal Information
DC Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 6V
DC Diode Current, IIK (For VI < -0.5V). . . . . . . . . . . . . . . . . . -20mA
DC Output Diode Current, IOK (for VO < -0.5V) . . . . . . . . . . . -50mA
DC Output Sink Current per Output Pin, IO . . . . . . . . . . . . . . .70mA
DC Output Source Current per Output Pin, IO. . . . . . . . . . . . -30mA
DC VCC Current (ICC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .140mA
DC Ground Current (I
GND
). . . . . . . . . . . . . . . . . . . . . . . . . . .400mA
Operating Conditions
Operating Temperature Range, TA. . . . . . . . . . . . . . . . .0oC to 70oC
Supply Voltage Range, VCC. . . . . . . . . . . . . . . . . . . .4.75V to 5.25V
DC Input Voltage, VI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to V
CC
DC Output Voltage, VO. . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to ≤ V
CC
Input Rise and Fall Slew Rate, dt/dv. . . . . . . . . . . . . . . . 0 to 10ns/V
Thermal Resistance (Typical, Note 2) θJA (oC/W)
PDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135
SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
SSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
Maximum Junction Temperature. . . . . . . . . . . . . . . . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . . 300oC
(SOIC and SSOP-Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
2. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications Temperature Range 0
o
C to 70oC, VCC Max = 5.25V, VCC Min = 4.75V
PARAMETER SYMBOL
TEST CONDITIONS
V
CC
(V)
AMBIENT TEMPERATURE (TA)
UNITS
25oC0
o
C TO 70oC
VI (V) IO (mA) MIN MAX MIN MAX
High Level Input Voltage V
IH
4.5 to 5.5 2-2-V
Low Level Input Voltage V
IL
4.5 to 5.5 - 0.8 - 0.8 V
High Level Output Voltage V
OH
VIH or
V
IL
-15 Min 2.4 - 2.4 - V
Low Level Output Voltage V
OL
VIH or
V
IL
48 Min - 0.55 - 0.55 V
High Level Input Current I
IH
V
CC
Max - 0.1 - 1 µA
Low Level Input Current I
IL
GND Max - -0.1 - -1 µA
Three-State Leakage Current I
OZH
V
CC
Max - 0.5 - 10 µA
I
OZL
GND Max - -0.5 - -10 µA
Input Clamp Voltage V
IK
VCC or
GND
-18 Min - -1.2 - -1.2 V
Short Circuit Output Current
(Note 3)
I
OS
VCC=0
VCC or
GND
Max -60 - -60 - mA
Quiescent Supply Current, MSI I
CC
VCC or
GND
0 Max - 8 - 80 µA
Additional Quiescent Supply
Current per Input Pin
TTL Inputs High, 1 Unit Load
∆I
CC
3.4V
(Note 4)
MAX - 1.6 - 1.6 mA
NOTES:
3. Not more than one output should be shorted at one time. Test duration should not exceed 100ms.
4. Inputs that are not measured are at VCC or GND.
5. FCT Input Loading: All inputs are 1 unit load. Unit load is ∆ICC limit specified in Static Characteristics Chart, e.g., 1.6mA Max at 70oC.
CD74FCT564, CD74FCT574
8-4
Switching Specifications Over Operating Range t
r
, tf = 2.5ns, CL = 50pF, RL - See Figure 4
PARAMETER SYMBOL V
CC
(V)
AMBIENT TEMPERATURE (TA)
UNITS
25oC0
o
C TO 70oC
TYP MIN MAX
Propagation Delays
Clock to Q CD74FCT574 t
PLH
, t
PHL
5 6.6 2 10 ns
Clock to Q CD74FCT564 t
PLH
, t
PHL
5 6.6 1.5 10 ns
Output Disable to Q CD74FCT574 t
PLZ
, t
PHZ
5 6 1.5 8 ns
Output Enable to Q CD74FCT574 t
PZL
, t
PZH
5 9 1.5 12.5 ns
Output Disable to Q CD74FCT564 t
PLZ
, t
PHZ
5 6 1.5 8 ns
Output Enable to Q CD74FCT564 t
PZL
, t
PZH
5 9 1.5 12.5 ns
Power Dissipation Capacitance C
PD
(Note 6)
- 34 Typical pF
Minimum (Valley) V
OHV
During Switching of
Other Outputs (Output Under Test Not Switching)
V
OHV
(Figure 1)
5 0.5 - - V
Maximum (Peak) V
OLP
During Switching of
Other Outputs (Output Under Test Not Switching)
V
OLP
(Figure 1)
51- -V
Input Capacitance C
I
---10pF
Three State Output Capacitance C
O
---15pF
NOTE:
6. CPD, measured per flip-flop, is used to determine the dynamic power consumption.
PD (per package) = VCC ICC + Σ(V
CC
2
fI CPD + V
O
2
to CL + VCC∆ICC D) where:
VCC = supply voltage
∆ICC = flow through current x unit load
CL = output load capacitance
D = duty cycle of input high
fO = output frequency
fI = input frequency
Prerequisite For Switching
PARAMETER SYMBOL VCC (V)
AMBIENT TEMPERATURE (TA)
UNITS
25oC0
o
C TO 70oC
TYP MIN MAX
Clock Pulse Width
CD74FCT574 t
W
5 (Note 7) 7 - ns
CD74FCT564 t
W
57-ns
Setup Time Data to Clock t
SU
52-ns
Data to Clock Hold Time
CD74FCT574 t
H
52-ns
CD74FCT564 t
H
52-ns
Maximum Clock Frequency f
MAX
5 70 - MHz
NOTE:
7. 5V: minimum is at 4.5V.
5V: minimum is at 4.75V for 0oC to 70oC.
Typical is at 5V.
CD74FCT564, CD74FCT574
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