Texas Instruments 74ACT11257PWR, 74ACT11257N, 74ACT11257DWR, 74ACT11257DW, 74ACT11257DBR Datasheet
74ACT11257
QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER
WITH 3-STATE OUTPUTS
SCAS053B – JANUARY 1989 – REVISED APRIL 1996
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Inputs Are TTL-Voltage Compatible
D
3-State Outputs Interface Directly With
System Bus
D
Flow-Through Architecture Optimizes
PCB Layout
D
Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
D
EPIC
t
(Enhanced-Performance Implanted
CMOS) 1-mm Process
D
500-mA Typical Latch-Up Immunity at
125°C
D
Provides Bus Interface From Multiple
Sources in High-Performance Systems
D
Package Options Include Plastic
Small-Outline (DW) and Shrink
Small-Outline (DB) Packages, and Standard
Plastic 300-mil DIPs (N)
description
The 74ACT11257 is designed to multiplex signals from 4-bit data sources to four output data lines in
bus-organized systems. The 3-state outputs do not load the data lines when the output-enable (OE
) input is at
a high logic level.
The 74ACT11257 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
INPUTS
SELECT
DATA
OUTPUT
OE
A/B
A B
Y
H X X X Z
L L L XL
L L H XH
L H X LL
L H X H H
Copyright 1996, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
A/B
1Y
2Y
GND
GND
GND
GND
3Y
4Y
OE
1A
1B
2A
2B
V
CC
V
CC
3A
3B
4A
4B
DB, DW, OR N PACKAGE
(TOP VIEW)
74ACT11257
QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER
WITH 3-STATE OUTPUTS
SCAS053B – JANUARY 1989 – REVISED APRIL 1996
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic symbol
†
4B
4A
3B
3A
2B
2A
1B
1A
A
/B
OE
11
12
13
14
17
18
19
20
1
10
G1
EN
1
1
4Y
3Y
2Y
1Y
9
8
3
2
MUX
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
4B
4A
3B
3A
2B
2A
1B
1A
A/B
OE
11
12
13
14
17
18
19
20
1
10
4Y
3Y
2Y
1Y
9
8
3
2
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