Texas Instruments 74ACT11245PWR, 74ACT11245PWLE, 74ACT11245NT, 74ACT11245DWR, 74ACT11245DW Datasheet
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74ACT11245
OCTAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS031C – JULY 1987 – REVISED APRIL 1996
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
3-State Outputs Drive Bus Lines Directly
D
Inputs Are TTL-Voltage Compatible
D
Flow-Through Architecture Optimizes
PCB Layout
D
Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
D
EPIC
t
(Enhanced-Performance Implanted
CMOS) 1-mm Process
D
500-mA Typical Latch-Up Immunity at
125°C
D
Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, and Standard Plastic 300-mil
DIPs (NT)
description
The octal bus transceiver is designed for asynchronous two-way communication between data buses. The
control-function implementation minimizes external timing requirements.
The device allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on
the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the
device so that the buses are effectively isolated.
The 74ACT11245 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
OUTPUT
ENABLE
OE
DIRECTION
CONTROL
DIR
OUTPUT
L L B data to A bus
L H A data to B bus
H X Isolation
Copyright 1996, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
A1
A2
A3
A4
GND
GND
GND
GND
A5
A6
A7
A8
DIR
B1
B2
B3
B4
V
CC
V
CC
B5
B6
B7
B8
OE
DB, DW, NT, OR PW PACKAGE
(TOP VIEW)
74ACT11245
OCTAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS031C – JULY 1987 – REVISED APRIL 1996
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic symbol
†
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
B8
B7
B6
B5
B4
B3
B2
B1
14
15
16
17
20
21
22
23
A8
A7
A6
A5
A4
A3
A2
A1
DIR
OE
12
11
10
9
4
3
2
1
24
13
2
1
3 EN2 [AB]
3 EN1 [BA]
G3
logic diagram (positive logic)
A8
A7
A6
A5
A4
A3
A2
A1
DIR
B8
B7
B6
B5
B4
B3
B2
B1
OE
14
15
16
17
20
21
22
23
13
12
11
10
9
4
3
2
1
24
74ACT11245
OCTAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS031C – JULY 1987 – REVISED APRIL 1996
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
†
Supply voltage range, V
CC
–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1) –0.5 V to V
CC
+ 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, VO (see Note 1) –0.5 V to V
CC
+ 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
IK
(V
I
< 0 or VI > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, I
OK
(V
O
< 0 or VO > VCC) ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, I
O
(V
O
= 0 to VCC) ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND ±200 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum power dissipation at TA = 55°C (in still air) (see Note 2):DB package 0.65 W. . . . . . . . . . . . . . . . . .
DW package 1.7 W. . . . . . . . . . . . . . . . . .
NT package 1.3 W. . . . . . . . . . . . . . . . . . .
PW package 0.7 W. . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The maximum package power dissipation is calculated using a junction temperature of 150_C and a board trace length of 750 mils,
except for the NT package, which has a trace length of zero.
recommended operating conditions
MIN MAX UNIT
V
CC
Supply voltage 4.5 5.5 V
V
IH
High-level input voltage 2 V
V
IL
Low-level input voltage 0.8 V
V
I
Input voltage 0 V
CC
V
V
O
Output voltage 0 V
CC
V
I
OH
High-level output current –24 mA
I
OL
Low-level output current 24 mA
Dt/D
v Input transition rise or fall rate 0 10 ns/V
T
A
Operating free-air temperature –40 85 °C
74ACT11245
OCTAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS031C – JULY 1987 – REVISED APRIL 1996
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
TA = 25°C
PARAMETER
TEST CONDITIONS
V
CC
MIN TYP MAX
MIN
MAX
UNIT
4.5 V 4.4 4.4
I
OH
= –50
m
A
5.5 V 5.4 5.4
V
OH
4.5 V 3.94 3.8
V
OH
I
OH
= –24
mA
5.5 V 4.94 4.8
IOH = –75 mA
{
5.5 V 3.85
4.5 V 0.1 0.1
I
OL
= 50
m
A
5.5 V 0.1 0.1
V
OL
4.5 V 0.36 0.44
V
OL
I
OL
=
24 mA
5.5 V 0.36 0.44
IOL = 75 mA
{
5.5 V 1.65
I
OZ
A or B ports‡VO = VCC or GND 5.5 V ±0.5 ±5
m
A
I
I
OE or DIR VI = VCC or GND 5.5 V ±0.1 ±1
m
A
I
CC
VI = VCC or GND, IO = 0 5.5 V 8 80
m
A
D
I
CC
§
One input at 3.4 V , Other inputs at GND or V
CC
5.5 V 0.9 1 mA
C
i
VI = VCC or GND 5 V 4 pF
C
o
VO = VCC or GND 5 V 12 pF
†
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
‡
For I/O ports, the parameter IOZ includes the input leakage current.
§
This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC.
switching characteristics over recomended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
FROM TO
TA = 25°C
PARAMETER
(INPUT) (OUTPUT)
MIN TYP MAX
MIN
MAX
UNIT
t
PLH
1.5 6.2 9.2 1.5 10
t
PHL
A or B
B or A
1.5 5.4 8.6 1.5 9.1
ns
t
PZH
1.5 8.1 12 1.5 13.2
t
PZL
OE
A or B
1.5 8.2 11.7 1.5 12.9
ns
t
PHZ
1.5 9.3 11.8 1.5 12.9
t
PLZ
OE
A or B
1.5 9.8 12.9 1.5 13.9
ns
operating characteristics, V
CC
= 5 V, T
A
= 25°C
PARAMETER TEST CONDITIONS TYP UNIT
p
p
p
Outputs enabled
p
66
p
CpdPower dissipation capacitance per transceiver
Outputs disabled
C
L
=
50 pF
,
f
= 1 MHz
19
pF
74ACT11245
OCTAL BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS031C – JULY 1987 – REVISED APRIL 1996
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT
S1
2 × V
CC
500 Ω
500 Ω
t
PLH
t
PHL
Output
Control
(low-level
enabling)
Output
Waveform 1
S1 at 2 × V
CC
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
V
OL
V
OH
t
PZL
t
PZH
t
PLZ
t
PHZ
1.5 V
1.5 V
1.5 V 1.5 V
[
V
CC
3 V
0 V
50% V
CC
50% V
CC
V
OH
V
OL
0 V
50% V
CC
20% V
CC
50% V
CC
80% V
CC
[
0 V
3 V
GND
Open
Input
Output
VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS
t
PLH/tPHL
t
PLZ/tPZL
t
PHZ/tPZH
Open
2 × V
CC
GND
TEST S1
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 3 ns, tf = 3 ns.
D. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
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Copyright 1998, Texas Instruments Incorporated
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