Supermicro X11SPW-TF operation manual

X11SPW-CTF

X11SPW-TF

USER'S MANUAL

Revision 1.0

The information in this user’s manual has been carefully reviewed and is believed to be accurate. The manufacturer
assumes no responsibility for any inaccuracies that may be contained in this document, and makes no commitment
to update or to keep current the information in this manual, or to notify any person or organization of the updates.

Please Note: For the most up-to-date version of this manual, please see our website at www.supermicro.com.

Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product described in this manual
at any time and without notice. This product, including software and documentation, is the property of Supermicro and/
or its licensors, and is supplied only under a license. Any use or reproduction of this product is not allowed, except
as expressly permitted by the terms of said license.

IN NO EVENT WILL Super Micro Computer, Inc. BE LIABLE FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL,
SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USE THIS PRODUCT
OR DOCUMENTATION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, SUPER
MICRO COMPUTER, INC. SHALL NOT HAVE LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA STORED
OR USED WITH THE PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, INTEGRATING,
INSTALLING OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA.

Any disputes arising between manufacturer and customer shall be governed by the laws of Santa Clara County in the
State of California, USA. The State of California, County of Santa Clara shall be the exclusive venue for the resolution
of any such disputes. Supermicro's total liability for all claims will not exceed the price paid for the hardware product.

FCC Statement: This equipment has been tested and found to comply with the limits for a Class A digital device
pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful
interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can
radiate radio frequency energy and, if not installed and used in accordance with the manufacturer’s instruction manual,
may cause harmful interference with radio communications. Operation of this equipment in a residential area is likely
to cause harmful interference, in which case you will be required to correct the interference at your own expense.

California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate warning applies only
to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate Material-special handling may apply.
See www.dtsc.ca.gov/hazardouswaste/perchlorate”.

WARNING: Handling of lead solder materials used in this product may expose you to lead, a
chemical known to the State of California to cause birth defects and other reproductive harm.

The products sold by Supermicro are not intended for and will not be used in life support systems, medical equipment,
nuclear facilities or systems, aircraft, aircraft devices, aircraft/emergency communication devices or other critical

systems whose failure to perform be reasonably expected to result in signicant injury or loss of life or catastrophic

property damage. Accordingly, Supermicro disclaims any and all liability, and should buyer use or sell such products
for use in such ultra-hazardous applications, it does so entirely at its own risk. Furthermore, buyer agrees to fully
indemnify, defend and hold Supermicro harmless for and against any and all claims, demands, actions, litigation, and
proceedings of any kind arising out of or related to such ultra-hazardous use or sale.

Manual Revision 1.0

Release Date: July 12, 2017

Unless you request and receive written permission from Super Micro Computer, Inc., you may not copy any part of this

document. Information in this document is subject to change without notice. Other products and companies referred

to herein are trademarks or registered trademarks of their respective companies or mark holders.

Copyright © 2017 by Super Micro Computer, Inc.
All rights reserved.

Printed in the United States of America

Preface

Preface

About This Manual

This manual is written for system integrators, IT technicians and knowledgeable end users.
It provides information for the installation and use of the X11SPW-CTF/-TF motherboard.

About This Motherboard

The Supermicro X11SPW-CTF/-TF supports an Intel® Xeon 81xx/61xx/51xx/41xx/31xx
series (Socket P0-LGA 3647) processor with a thermal design power (TDP) of up to 205W.
Built with the Intel PCH C622 chipset, this motherboard offers such features as four SAS

3.0 ports (available on X11SPW-CTF), dual 10GbE ports, two SuperDOM connectors, the
Intel Node Manager, and the Trusted Platform Module (TPM) header. The X11SPW-CTF/-TF
supports 6-DIMM DDR4 ECC RDIMM/LRDIMM memory with speeds of up to 2666MHz. This
motherboard provides great performance and is ideal for cost-effective, general purpose
server platforms. Please note that this motherboard is intended to be installed and serviced
by professional technicians only. For processor/memory updates, please refer to our website
at http://www.supermicro.com/products/.

Conventions Used in the Manual

Special attention should be given to the following symbols for proper installation and to prevent

damage done to the components or injury to yourself:

Warning! Indicates important information given to prevent equipment/property damage

or personal injury.

Warning! Indicates high voltage may be encountered while performing a procedure.

Important: Important information given to ensure proper system installation or to

relay safety precautions.

Note: Additional Information given to differentiate various models or provides infor­mation for proper system setup.

3

X11SPW-CTF/-TF User's Manual

Contacting Supermicro

Headquarters

Address: Super Micro Computer, Inc.

980 Rock Ave.

San Jose, CA 95131 U.S.A.

Tel: [phone]

Fax: [phone]

Email: [e-mail] (General Information)

[e-mail] (Technical Support)

Website: www.supermicro.com

Europe

Address: Super Micro Computer B.V.

Het Sterrenbeeld 28, 5215 ML

's-Hertogenbosch, The Netherlands

Tel: [phone]

Fax: [phone]

Email: [e-mail] (General Information)

[e-mail] (Technical Support)

[e-mail] (Customer Support)

Website: www.supermicro.nl

Asia-Pacic

Address: Super Micro Computer, Inc.

3F, No. 150, Jian 1st Rd.

Zhonghe Dist., New Taipei City 235

Taiwan (R.O.C)

Tel: [phone]

Fax: [phone]

Email: [e-mail]

Website: www.supermicro.com.tw

4

Preface

Table of Contents

Chapter 1 Introduction

1.1 Checklist ...............................................................................................................................8

Quick Reference ...............................................................................................................12

Quick Reference Table ......................................................................................................13

Motherboard Features .......................................................................................................15

1.2 Processor and Chipset Overview .......................................................................................19

1.3 Special Features ................................................................................................................19

Recovery from AC Power Loss .........................................................................................19

1.4 System Health Monitoring ..................................................................................................20

Onboard Voltage Monitors ................................................................................................20

Fan Status Monitor with Firmware Control .......................................................................20

Environmental Temperature Control .................................................................................20

System Resource Alert......................................................................................................20

1.5 ACPI Features ....................................................................................................................20

1.6 Power Supply .....................................................................................................................21

1.7 Serial Port ...........................................................................................................................21

Chapter 2 Installation

2.1 Static-Sensitive Devices .....................................................................................................22

Precautions .......................................................................................................................22

Unpacking .........................................................................................................................22

2.2 Processor and Heatsink Installation ...................................................................................23

The Intel® Xeon 81xx/61xx/51xx/41xx/31xx Series Processor .......................................23

Overview of the Processor Socket Assembly ...................................................................24

Overview of the Processor Heatsink Module (PHM) ........................................................25

Attaching the Non-F Model Processor to the Processor Clip to Create the Processor

Carrier Assembly ...............................................................................................................26

Attaching the Non-F Model Processor Carrier Assembly to the Heatsink to Form the

Processor Heatsink Module (PHM) ...................................................................................27

Preparing the CPU Socket for Installation ........................................................................28

Removing the Dust Cover from the CPU Socket .............................................................28

Installing the Processor Heatsink Module (PHM) ............................................................29

Removing the Processor Heatsink Module (PHM) from the Motherboard .......................30

5

X11SPW-CTF/-TF User's Manual

2.3 Motherboard Installation .....................................................................................................31

Tools Needed ....................................................................................................................31

Location of Mounting Holes ..............................................................................................31

Installing the Motherboard.................................................................................................32

2.4 Memory Support and Installation .......................................................................................33

Memory Support ................................................................................................................33

DIMM Module Population Sequence ................................................................................34

DIMM Installation ..............................................................................................................35

DIMM Removal .................................................................................................................35

2.5 Rear I/O Ports ....................................................................................................................36

2.6 Front Control Panel ............................................................................................................41

2.7 Connectors .........................................................................................................................45

Power Connections ...........................................................................................................45

Headers .............................................................................................................................47

2.8 Jumper Settings .................................................................................................................56

How Jumpers Work ...........................................................................................................56

2.9 LED Indicators ....................................................................................................................61

Chapter 3 Troubleshooting

3.1 Troubleshooting Procedures ..............................................................................................65

Before Power On ..............................................................................................................65

No Power ..........................................................................................................................65

No Video ...........................................................................................................................66

System Boot Failure .......................................................................................................66

Memory Errors ..................................................................................................................66

Losing the System's Setup Conguration .........................................................................67

When the System Becomes Unstable ..............................................................................67

3.2 Technical Support Procedures ...........................................................................................69

3.3 Frequently Asked Questions ..............................................................................................70

3.4 Battery Removal and Installation .......................................................................................71

Battery Removal ................................................................................................................71

Proper Battery Disposal ....................................................................................................71

Battery Installation .............................................................................................................71

3.5 Returning Merchandise for Service ....................................................................................72

6

Preface

Chapter 4 BIOS

4.1 Introduction .........................................................................................................................73

4.2 Main Setup .........................................................................................................................74

4.3 Advanced Setup Congurations .........................................................................................76

4.4 Event Logs .......................................................................................................................101

4.5 IPMI ..................................................................................................................................103

4.6 Security .............................................................................................................................106

4.7 Boot ..................................................................................................................................110

4.8 Save & Exit .......................................................................................................................113

Appendix A BIOS Codes

Appendix B Software Installation

B.1 Installing Software Programs ...........................................................................................11 7

B.2 SuperDoctor® 5 .................................................................................................................118

Appendix C Standardized Warning Statements

Battery Handling ..............................................................................................................119

Product Disposal .............................................................................................................121

Appendix D UEFI BIOS Recovery

7

X11SPW-CTF/-TF User's Manual

Chapter 1

Introduction

Congratulations on purchasing your computer motherboard from an industry leader.
Supermicro motherboards are designed to provide you with the highest standards in quality
and performance.

In additon to the motherboard, several important parts that are included in the retail box are
listed below. If anything listed is damaged or missing, please contact your retailer.

1.1 Checklist

Main Parts List

Description Part Number Quantity

Supermicro Motherboard X11SPW-CTF/-TF 1

SATA Cables CBL-0044L 6

Quick Reference Guide MNL-1916-QRG 1

Important Links

For your system to work properly, please follow the links below to download all necessary
drivers/utilities and the user’s manual for your server.

• Supermicro product manuals: http://www.supermicro.com/support/manuals/

• Product drivers and utilities: ftp://ftp.supermicro.com

• Product safety info: http://www.supermicro.com/about/policies/safety_information.cfm

• If you have any questions, please contact our support team at: [e-mail]

This manual may be periodically updated without notice. Please check the Supermicro website
for possible updates to the manual revision level.

8

Figure 1-1. X11SPW-CTF Motherboard Image

Chapter 1: Introduction

Note: All graphics shown in this manual were based upon the latest PCB revision
available at the time of publication of the manual. The motherboard you received may
or may not look exactly the same as the graphics shown in this manual.

9

X11SPW-CTF/-TF User's Manual

Figure 1-2. X11SPW-TF Motherboard Image

10

Chapter 1: Introduction

SAN MAC

SXB1A

SAS CODE

SXB1B

IPMI CODE

MAC CODE

I-SATA2

I-SATA3

USB10/11(3.0)

S-SATA1

Figure 1-3. X11SPW-CTF/-TF Motherboard Layout

(not drawn to scale)

LE1

JUIDB1

I-SATA0

SXB1C

USB6

S-SATA0

SXB2

BT1

+

I-SATA 4-7

I-SATA1

X11SPW-CTF/-TF

REV: 1.02
DESIGNED IN USA

Intel

X557

JPME2

JPTG1

VGA

JWD1

Intel

C622

LAN2

LEDM1

JBT1

CPU

USB7/8(3.0)

LAN1

MH10

MH11

M.2 PCI-E 3.0 X4

IPMI_LAN

ASpeed

AST2500

LEDS1

LE3

USB0/1

BAR CODE

(-CTF only)

LSI3008

COM1

L-SAS0-3

JNVI2C1

JOH1

JIPMB1

JPSAS1

JPS1

PRESS FIT

USB4/5

JP1

JTPM1

JSTBY1

JPG1

COM2

JP4

USB9(3.0)

USB2/3

JP3

JF1

LE2

JPI2C1

JP2

JD1

ON

LEDLED12LEDFAIL

NMIXPWRHDDNICNICUIDPSRSTPWR

JSD2

JSD1

JL1

S-SGPIO1

I-SGPIO2

I-SGPIO1

FAN7

JRK1

JPWR3

FAN6

FAN5

FAN4

DIMMF1

DIMME1

DIMMD1

BIOS LICENSE

FAN3

DIMMA1

FAN2

SP1

DIMMB1

DIMMC1

JPWR1

JPWR2

FAN1

Notes:

• The image above combines both X11SPW-CTF and X11SPW-TF models. See pages 9-10

for a more accurate representation of each motherboard.

• X11SPW-CTF Only: SAS 3.0 Connections (LSI3008)

• Components not documented are for internal testing only.

11

X11SPW-CTF/-TF User's Manual

Quick Reference

JPME2

JPTG1

BT1

SXB1B

JBT1

I-SATA4-7

I-SATA1
I-SATA0
I-SATA2

I-SATA3

SXB1C

USB10/11 (3.0)

USB6

S-SATA1
S-SATA0

JSD1
JSD2

DIMMD1
DIMME1

DIMMF1

JL1

JRK1

S-SGPIO1

I-SGPIO2

JPWR3

I-SGPIO1

SXB2

SXB1A

SAN MAC

SXB1A

SAS CODE

SXB1B

IPMI CODE

MAC CODE

I-SATA2

I-SATA3

USB10/11(3.0)

S-SATA1

JSD2

JSD1

JL1

S-SGPIO1

I-SGPIO2

JRK1

I-SGPIO1

JPWR3

FAN7

JUIDB1

JUIDB1

SXB2

I-SATA0

SXB1C

USB6

S-SATA0

FAN6

VGA

LE1

LE1

VGA

Intel
X557

JPME2

JPTG1

JWD1

BT1

+

I-SATA 4-7

I-SATA1

X11SPW-CTF/-TF

REV: 1.02
DESIGNED IN USA

DIMMF1

DIMME1

DIMMD1

FAN4

FAN5

JWD1

Intel

C622

LAN2

LAN2

CPU

USB7/8 (3.0)

LAN1

LAN1

MH10

MH11

LEDM1

JBT1

M.2 PCI-E 3.0 X4

IPMI_LAN

USB7/8(3.0)

ASpeed

AST2500

LEDS1

LE3

BIOS LICENSE

USB0/1

IPMI_LAN

USB0/1

BAR CODE

LSI3008

(-CTF only)

FAN3

COM1

COM1

L-SAS0-3

JNVI2C1

JOH1

DIMMA1

FAN2

JPSAS1

JPS1

JPG1

JIPMB1

JPSAS1

JPG1

JPS1

COM2

PRESS FIT

JP4

USB9(3.0)

USB2/3

USB4/5

JP3

JP1

JTPM1

JSTBY1

JF1

LE2

JPI2C1

JPWR1

SP1

JPWR2

DIMMB1

DIMMC1

FAN1

JP2

JD1

ON

LEDLED12LEDFAIL

NMIXPWRHDDNICNICUIDPSRSTPWR

JIMPB1

COM2
MH10

L-SAS0-3
MH11

LEDM1

LEDS1

USB9 (3.0)

USB2/3

USB4/5
M.2

LE3

JNVI2C1

JTPM1
JOH1

JSTBY1
JD1

JF1

LE2

JPI2C1

JPWR1

CPU

SP1

JPWR2

DIMMA1

DIMMB1

DIMMC1

FAN7

FAN5 FAN4

FAN6

FAN3

FAN2 FAN1

Notes:

• See Chapter 2 for detailed information on jumpers, I/O ports, and JF1 front panel connec-

tions. Jumpers/LED indicators not indicated are used for testing only.

• " " indicates the location of Pin 1.

• Use only the correct type of onboard CMOS battery as specied by the manufacturer. Do

not install the onboard battery upside down to avoid possible explosion.

12

Chapter 1: Introduction

Quick Reference Table

Jumper Description Default Setting

JBT1 CMOS Clear Open (Normal)

JPG1 VGA Enable/Disable Pins 1-2 (Enabled)

JPME2 ME Manufacturing Mode Pins 1-2 (Normal)

JPS1 SAS 3.0 Enable/Disable Pins 1-2 (Enabled)

JPSAS1 SAS HDD Enable/Disable Pins 1-2 (Enabled)

JPTG1 LAN Enable/Disable Pins 1-2 (Enabled)

JWD1 Watch Dog Timer Pins 1-2 (Reset)

LED Description Status

LE1 Unit Identier (UID) LED Solid Blue: Unit Identied

LE2 Onboard Power LED Solid Green: Power On

LE3 M.2 LED Blinking Green: Device Working

LEDM1 BMC Heartbeat LED Blinking Green: BMC Normal

LEDS1 SAS Activity LED

Blinking Green: SAS Active

Solid Red: SAS Error

Connector Description

BT1 Onboard Battery

COM1, COM2 COM Port, COM Header

FAN1 ~ FAN7 System Fan Headers

IPMI_LAN Dedicated IPMI LAN Port

I-SATA0~7 Intel® PCH SATA 3.0 Ports (with RAID 0, 1, 5, 10)

I-SGPIO1, I-SGPIO2, S-SGPIO1 Serial Link General Purpose I/O Headers

JD1 Speaker/Power LED Indicator (Pins 1-3: Power LED, Pins 4-7: Speaker)

JF1 Front Control Panel Header

JIPMB1 4-pin BMC External I2C Header (for an IPMI card)

JL1 Chassis Intrusion Header

JNVI2C1 NVMe I2C Header

JOH1 Overheat LED Header

JPI2C1 Power System Management Bus (SMB) I2C Header

JPWR1 8-pin 12V DC Power Connector for CPU (Required)

JPWR2 24-pin ATX Power Connector

JPWR3 4-pin 12V Power Connector for GPU Card (Requires an extra 12V power at up to 75W)

JRK1 Intel RAID Key Header

JSD1, JSD2 SATA DOM Power Connectors

JSTBY1 Standby Power Header

Note: Table is continued on the next page.

13

X11SPW-CTF/-TF User's Manual

Connector Description

JTPM1 Trusted Platform Module (TPM)/Port 80 Connector

JUIDB1 Unit Identier (UID) Switch

LAN1, LAN2 10GbE LAN Ports

L-SAS0~3 Four SAS 3.0 Ports (with RAID 0, 1, 10) (X11SPW-CTF only)

M.2 M.2 PCI-E 3.0 x4 or SATA 3.0 Slot

MH10, MH11 M.2 Mounting Holes

SP1 Internal Speaker/Buzzer

S-SATA0~1 SATA 3.0 Ports with SATA DOM Power

SXB1A, SXB1B, SXB1C Supermicro Proprietary WIO Left Add-on Card Slots

SXB2 Supermicro Proprietary WIO Right Add-on Card Slot

USB0/1 Back Panel Universal Serial Bus (USB) 2.0 Ports

USB2/3, USB4/5 Front Accessible USB 2.0 Headers

USB6 USB 2.0 Header (Not customized for the front panel)

USB7/8 Back Panel USB 3.0 Ports

USB9 USB 3.0 Type-A Header

USB10/11 Front Accessible USB 3.0 Header

VGA VGA Port

14

Chapter 1: Introduction

Motherboard Features

Motherboard Features

CPU

• Supports an Intel® Xeon 81xx/61xx/51xx/41xx/31xx series (Socket P0-LGA3647) processor with up to 28 cores and a

thermal design power (TDP) of up to 205W

Note: The X11SPW-CTF/-TF motherboard does not support FPGA or Fabric processors.

Memory

• Up to 192GB of RDIMM, 384GB of LRDIMM, and 768GB of 3DS LRDIMM DDR4 (288-pin) ECC memory with speeds of

up to 2666MHz in six memory slots

Note: Memory speed support depends on the processors used in the system.

DIMM Size

• Up to 128GB at 1.2V

Note: For the latest CPU/memory updates, please refer to our website at http://www.supermicro.com/products/

motherboard.

Chipset

• Intel PCH C622

Expansion Slots

• One (1) PCI-Express 3.0 WIO Left x32 Slot

• One (1) PCI-Express 3.0 WIO Right x8 Slot

Network

• Intel X557 10G PHY

• Intel Ethernet Controller X722 for 10G BASE-T Ports

• One (1) Dedicated IPMI LAN located on the rear I/O panel

Baseboard Management Controller (BMC)

• ASpeed AST 2500 BMC

Graphics

• Graphics controller via ASpeed 2500 BMC

Note: The table above is continued on the next page.

15

X11SPW-CTF/-TF User's Manual

Motherboard Features

I/O Devices

• Serial (COM) Port

• SATA 3.0 • Ten (10) SATA 3.0 ports (I-SATA0~7, S-SATA0~1) supported by C622

• One (1) serial port on the rear I/O panel (COM1)

• One (1) front accessible serial port header (COM2)

• RAID (PCH) • RAID 0, 1, 5, 10

• SAS 3.0 (X11SPW-CTF only) • Four (4) SAS 3.0 connections via LSI3008 with one mini-SAS HD (SAS0-3)

• RAID (LSI3008) • RAID 0, 1, 10

Peripheral Devices

• Two (2) USB 2.0 ports on the rear I/O panel (USB0/1)

• Two (2) USB 3.0 ports on the rear I/O panel (USB7/8)

• Three (3) front accessible USB 2.0 headers with two (2) USB connections (USB2/3, USB4/5, USB6)

• One (1) front accessible USB 3.0 header with two (2) USB connections (USB10/11)

• One (1) USB 3.0 Type-A header (USB9)

BIOS

• 256 Mb SPI AMI BIOS

• ACPI 6.0, SMBIOS 3.0 or later, BIOS rescue hot-key, Plug-and-Play (PnP), SPI dual/quad speed support, riser card auto

detection support, real time clock (RTC) wakeup

®

SM Flash UEFI BIOS

Power Management

• ACPI Power Mangement

• Power button override mechanism

• Power-on mode for AC power recovery

• Wake-on-LAN

• Power supply monitoring

System Health Monitoring

• Onboard voltage monitoring for +1.05V, +1.2V, +1.8V, +3.3V, +3.3V standby, +5V, +5V standby, +12V, VBAT, memory,

PCH temperature, system temperature, memory temperature

• 5 CPU switch phase voltage regulator

• CPU thermal trip support

• PECI (Platform Environment Control Interface) 2.0 support

Fan Control

• Fan status monitoring via IPMI connections

• Single cooling zone

• Low-noise fan speed control

• Seven (7) 4-pin fan headers

Note: The table above is continued on the next page.

16

System Management

• Trusted Platform Module (TPM) support

• UID (Unit Identication)/Remote UID

• System resource alert via SuperDoctor® 5

• SuperDoctor® 5

• Chassis intrusion header and detection

LED Indicators

• CPU/System Overheating

• Power/M.2/SAS3008 (CTF)/BMC state Indicator

• UID/Remote UID

• HDD activity

• LAN activity

Dimensions

Chapter 1: Introduction

Motherboard Features

• 8" (W) x 13" (L) (203.2 mm x 330.2 mm)

Note 1: The CPU maximum thermal design power (TDP) is subject to chassis and

heatsink cooling restrictions. For proper thermal management, please check the chas-

sis and heatsink specications for proper CPU TDP sizing.

Note 2: For IPMI conguration instructions, please refer to the Embedded IPMI Con­guration User's Guide available at http://www.supermicro.com/support/manuals/.

Note 3: It is strongly recommended that you change BMC login information upon initial
system power-on. The manufacture default username is ADMIN and the password is

ADMIN. For proper BMC conguration, please refer to http://www.supermicro.com/

products/info/les/IPMI/Best_Practices_BMC_Security.pdf

17

X11SPW-CTF/-TF User's Manual

#C-1

#B-1

#A-1

Figure 1-4.

System Block Diagram

VCCP0 12v
VR13

5+1 PHASE
205W

VCCP0

#D-1

#E-1

#F-1

SAS x1

RJ45

RTL8211E-VB-CG

DDR4

BMC Boot Flash

VGA CONN

Temp Sensor

EMC1402-1 *2 at diff SMBUS

SXB2

PCI-E X16

SXB1

LAN1
RJ45

LAN2
RJ45

LAN3

PCI-E X8

PCI-E X16

SPI

PCI-E X8 G3

PCI-E X16 G3

PCI-E X16 G3

LSI3008

M.2 SSD

Intel

X557 (10G)

RGRMII

BMC

AST2500

COM1
Connector

2133/2666

DDRIV

COM2
Header

PCI-E X4 G3

PCI-E X4 G3

RMII/NCSI

PCI-E X1 G2

SFI

USB 2.0

ESPI

ESPI

Header

SPI

SNB CORE
DDR-IV

#1A

SOCKET ID:0

#3 #1B

#2

#0~3

#8~11

SFI

C622 X8 UPLINK
NO QAT 2*10G+2*1G(~17W)

#5

#6 USB2.0

Switch

TPM HEADER

Debug Card

PECI:30

DMI3

PCI-E X8

DMI3

Uplink

PCH

C622

USB2.0 #2,3
USB2.0 #4,5

USB2.0 #0,1

SPI

SPI

BIOS

FRONT PANEL

2133/2666

DDRIV

#3

#2

#1

#0

6.0 Gb/S

#1

#0

6.0 Gb/S

Front USB2.0 x 4

USB 2.0

USB 2.0

Front USB3.0 x 2

USB 3.0

SYSTEM POWER

FAN SPEED

CTRL

#7

#6

#5

#4

SATA

SATA-DOM

sSATA

USB

Type A USB3.0

USB

USB

Rear USB2.0 x 2

USB

Rear USB3.0 x 2

USB

Note: This is a general block diagram and may not exactly represent the features on

your motherboard. See the previous pages for the actual specications of your moth­erboard.

18

Chapter 1: Introduction

1.2 Processor and Chipset Overview

Built upon the functionality and capability of the Intel® Xeon 81xx/61xx/51xx/41xx/31xx series
(Socket P0-LGA3647) processor and the Intel PCH C622 chipset, the X11SPW-CTF/-TF

motherboard offers maximum I/O expandability, energy efciency, and data reliability in a

14-nm process architecture, and is optimized for embedded storage solutions, data centers,
and high performance computing.

The Intel® Xeon 81xx/61xx/51xx/41xx/31xx and Intel PCH C622 chipset supports the following
features:

• ACPI Power Management Logic Support Rev. 6.0

• Intel® Turbo Boost Technology 2.0, Power Monitoring/Power Control, Turbo Time Param-

eter (TAU), and Platform Power Control

• Congurable TDP (cTDP) and Lower-Power Mode

• Adaptive Thermal Management/Monitoring

• PCI-E 3.0, SATA 3.0 with transfer rates of up to 6 Gb/s, xHCI USB with SuperSpeed 3.0

• System Management Bus (SMBus) Specication, Version 2.0

• Integrated Sensor Hub (ISH)The BMC supports remote management, virtualization, and

the security package for enterprise platforms

• Intel Trusted Execution Technology (Intel TXT)

• Intel Rapid Storage Technology

• Intel Virtualization Technology for Directed I/O (Intel VT-d)

1.3 Special Features

Recovery from AC Power Loss

The Basic I/O System (BIOS) provides a setting that determines how the system will respond
when AC power is lost and then restored to the system. You can choose for the system to
remain powered off (in which case you must press the power switch to turn it back on), or
for it to automatically return to the power-on state. See the Advanced BIOS Setup section
for this setting. The default setting is Last State.

19

X11SPW-CTF/-TF User's Manual

1.4 System Health Monitoring

Onboard Voltage Monitors

An onboard voltage monitor will scan the voltages of onboard chipset, memory, CPU, and
battery continuously. Once a voltage becomes unstable, a warning is given, or an error

message is sent to the screen. The user can adjust the voltage thresholds to dene the

sensitivity of the voltage monitor.

Fan Status Monitor with Firmware Control

The system health monitor embedded in the BMC chip can check the RPM status of the
cooling fans. The CPU and chassis fans are controlled via lPMI.

Environmental Temperature Control

System Health sensors monitor temperatures and voltage settings of onboard processors
and the system in real time via the IPMI interface. Whenever the temperature of the CPU or

the system exceeds a user-dened threshold, system/CPU cooling fans will be turned on to

prevent the CPU or the system from overheating.

Note: To avoid possible system overheating, please be sure to provide adequate air-

ow to your system.

System Resource Alert

This feature is available when used with SuperDoctor 5® in the Windows OS or in the Linux
environment. SuperDoctor is used to notify the user of certain system events. For example,

you can congure SuperDoctor to provide you with warnings when the system temperature,
CPU temperatures, voltages and fan speeds go beyond a predened range.

1.5 ACPI Features

ACPI stands for Advanced Conguration and Power Interface. The ACPI specication denes
a exible and abstract hardware interface that provides a standard way to integrate power

management features throughout a computer system, including its hardware, operating
system and application software. This enables the system to automatically turn on and off
peripherals such as CD-ROMs, network cards, hard disk drives and printers.

In addition to enabling operating system-directed power management, ACPI also provides a
generic system event mechanism for Plug and Play, and an operating system-independent

interface for conguration control. ACPI leverages the Plug and Play BIOS data structures,

while providing a processor architecture-independent implementation that is compatible with
Windows 2012/R2 and Windows Server 2016 operating systems.

20

Chapter 1: Introduction

1.6 Power Supply

As with all computer products, a stable power source is necessary for proper and reliable
operation. It is even more important for processors that have high CPU clock rates.

The X11SPW-CTF/-TF motherboard accommodates a 24-pin ATX power supply. Although

most power supplies generally meet the specications required by the CPU, some are

inadequate. In addition, one 12V 8-pin power connection is also required to ensure adequate
power supply to the system.

Warning: To avoid damaging the power supply or the motherboard, be sure to use a
power supply that contains a 24-pin and an 8-pin power connector. Be sure to connect
the power supplies to the 24-pin power connector (JPWR2), and the 8-pin power con­nector (JPWR1) on the motherboard. Failure in doing so may void the manufacturer
warranty on your power supply and motherboard.

It is strongly recommended that you use a high quality power supply that meets ATX power

supply Specication 2.02 or above. It must also be SSI compliant. (For more information,

please refer to the website at http://www.ssiforum.org/). Additionally, in areas where noisy

power transmission is present, you may choose to install a line lter to shield the computer

from noise. It is recommended that you also install a power surge protector to help avoid
problems caused by power surges.

1.7 Serial Port

The X11SPW-CTF/-TF motherboard supports two serial communication connections. COM
Ports 1 and 2 can be used for input/output. The UART provides legacy speeds with a baud
rate of up to 115.2 Kbps as well as an advanced speed with baud rates of 250 K, 500 K, or
1 Mb/s, which support high-speed serial communication devices.

21

X11SPW-CTF/-TF User's Manual

Chapter 2

Installation

2.1 Static-Sensitive Devices

Electrostatic Discharge (ESD) can damage electronic com ponents. To prevent damage to your
motherboard, it is important to handle it very carefully. The following measures are generally

sufcient to protect your equipment from ESD.

Precautions

• Use a grounded wrist strap designed to prevent static discharge.

• Touch a grounded metal object before removing the board from the antistatic bag.

• Handle the board by its edges only; do not touch its components, peripheral chips, memory

modules or gold contacts.

• When handling chips or modules, avoid touching their pins.

• Put the motherboard and peripherals back into their antistatic bags when not in use.

• For grounding purposes, make sure that your chassis provides excellent conductivity be-

tween the power supply, the case, the mounting fasteners and the motherboard.

• Use only the correct type of CMOS onboard battery as specied by the manufacturer. Do

not install the CMOS battery upside down, which may result in a possible explosion.

Unpacking

The motherboard is shipped in antistatic packaging to avoid static damage. When unpacking
the motherboard, make sure that the person handling it is static protected.

22

Chapter 2: Installation

2.2 Processor and Heatsink Installation

Warning: When handling the processor package, avoid placing direct pressure on the label

area of the CPU or CPU socket. Also, improper CPU installation or socket misalignment can
cause serious damage to the CPU or motherboard which may result in RMA repairs. Please
read and follow all instructions thoroughly before installing your CPU and heatsink.

Notes:

• Always connect the power cord last, and always remove it before adding, removing, or

changing any hardware components. Please note that the processor and heatsink should

be assembled together rst to form the Processor Heatsink Module (PHM), and then install

the entire PHM into the CPU socket.

• When you receive a motherboard without a processor pre-installed, make sure that the

plastic CPU socket cap is in place and that none of the socket pins are bent; otherwise,
contact your retailer immediately.

• Refer to the Supermicro website for updates on CPU support.

• Please follow the instructions given in the ESD Warning section on the rst page of this

chapter before handling, installing, or removing system components.

The Intel® Xeon 81xx/61xx/51xx/41xx/31xx Series Processor

SKX Processor

Note: All graphics, drawings, and pictures shown in this manual are for illustration only.

The components that came with your machine may or may not look exactly the same
as those shown in this manual.

23

X11SPW-CTF/-TF User's Manual

Overview of the Processor Socket Assembly

The processor socket assembly contains 1) the Intel SKX processor, 2) the processor clip,

3) the dust cover, and 4) the CPU socket.

1. SKX Processor

2. Processor Clip (the plastic processor package carrier used for the CPU)

3. Dust Cover

4. CPU Socket

Note: Be sure to cover the CPU socket with the dust cover when the CPU is not in-

stalled.

24

Chapter 2: Installation

Overview of the Processor Heatsink Module (PHM)

The Processor Heatsink Module (PHM) contains 1) a heatsink, 2) a processor clip, and 3)
the SKX processor.

1. Heatsink

2. Processor Clip

3. SKX Processor

Processor Heatsink Module (PHM)

(Bottom View for a non-F Model)

25

X11SPW-CTF/-TF User's Manual

A

Attaching the Non-F Model Processor to the Processor Clip to
Create the Processor Carrier Assembly

To properly install the CPU into the processor clip, please follow the steps below:

1. Locate pin 1 (notch A), which is the triangle located on the top of the processor clip.
Also locate notch B and notch C on the processor clip.

2. Locate pin 1 (notch A), which is the triangle on the substrate of the CPU. Also, locate
notch B and notch C on the CPU as shown below.

3. Align pin 1 (the triangle on the substrate) of the CPU with pin 1 (the triangle) of the
processor clip. Once they are aligned, carefully insert the CPU into the processor clip by

sliding notch B of the CPU into notch B of the processor clip, and sliding notch C of the
CPU into notch C of the processor clip.

4. Examine all corners of the CPU to ensure that it is properly seated on the processor
clip. Once the CPU is securely attached to the processor clip, the processor carrier
assembly is created.

Note: Please exercise extreme caution when handling the CPU. Do not touch the
CPU LGA-lands to avoid damaging the LGA-lands or the CPU. Be sure to wear ESD
gloves when handling components.

CPU (Upside Down)
w/CPU LGA Lands up

Align Notch B of the CPU
and Notch B of the Processor Clip

Align CPU Pin 1

C

Align Notch C of the CPU
and Notch C of the Processor Clip

B

Allow Notch C to
latch on to CPU

A

Pin 1

C

C

B

CPU/Heatsink Package
(Upside Down)

A

Allow Notch B to
latch on to CPU

B

Processor Carrier Assembly (with CPU

mounted on the Processor Clip)

26

Chapter 2: Installation

Attaching the Non-F Model Processor Carrier Assembly to the
Heatsink to Form the Processor Heatsink Module (PHM)

After you have made a processor carrier assembly by following the instructions on the
previous page, please follow the steps below to mount the processor carrier assembly onto
the heatsink to create the Processor Heatsink Module (PHM):

1. Locate "1" on the heatsink label and the triangular corner next to it on the heatsink.

With your index nger pressing against the screw at this triangular corner, carefully hold

and turn the heatsink upside down with the thermal-grease side facing up. Remove the

protective thermal lm if present, and apply the proper amount of the thermal grease

as needed. (Skip this step if you have a new heatsink because the necessary thermal
grease is pre-applied in the factory.)

2. Holding the processor carrier assembly at the center edge, turn it upside down. With
the thermal-grease side facing up, locate the hollow triangle located at the corner of the
processor carrier assembly ("a" in the graphic). Note a larger hole and plastic mounting
clicks located next to the hollow triangle. Also locate another set of mounting clicks and

a larger hole at the diagonal corner
of the same (reverse) side of the
processor carrier assembly ("b" in
the graphic).

3. With the back of the heatsink and
the reverse side of the processor
carrier assembly facing up, align the
triangular corner on the heatsink
("A" in the graphic) against the
mounting clips next to the hollow
triangle ("a") on the processor
carrier assembly.

4. Also align the triangular corner ("B")
at the diagonal side of the heatsink
with the corresponding clips on the
processor carrier assembly ("b").

5. Once the mounting clips on
the processor carrier assembly
are properly aligned with the
corresponding holes on the back
of the heatsink, securely attach the
heatsink to the processor carrier
assembly by snapping the mounting
clips at the proper places on the
heatsink to create the processor
heatsink module (PHM).

Triangle on the CPU

Triangle on the
Processor Clip

Non-Fabric CPU and Processor Clip

(Upside Down)

d

a

D

Heatsink

(Upside Down)

A

On Locations of (C, D), the notches

B

D

A

On Locations (A, B), the notches
snap onto the heatsink’s sides

b

c

B

C

snap onto the heat sink’s

mounting holes

C

Make sure Mounting

Notches snap into place

27

X11SPW-CTF/-TF User's Manual

Preparing the CPU Socket for Installation

This motherboard comes with the CPU socket pre-assembled in the factory. The CPU socket
contains 1) a dust cover, 2) a socket bracket, 3) the CPU (P0) socket, and 4) a back plate.
These components are pre-installed on the motherboard before shipping.

CPU Socket w/Dust Cover On

Removing the Dust Cover from the CPU Socket

Remove the dust cover from the CPU socket, exposing the SKX socket and socket pins as
shown on the illustration below.

Note: Do not touch the socket pins to avoid damaging them, causing the CPU to
malfunction.

Dusk Cover

Remove the dust cover from

the CPU socket. Do not

touch the socket pins!

Socket Pins

SKX CPU Socket

28

Chapter 2: Installation

Installing the Processor Heatsink Module (PHM)

Once you have assembled the processor heatsink module (PHM) by following the instructions
listed on page 26, you are ready to install the processor heatsink module (PHM) into the CPU
socket on the motherboard. To install the PHM into the CPU socket, follow the instructions
below:

1. Locate the triangle (pin 1) on the CPU socket, and locate the triangle (pin 1) at the

corner of the PHM that is closest to "1." (If you have difculty locating pin 1 of the PHM,

turn the PHM upside down. With the LGA-lands side facing up, you will note the hollow
triangle located next to a screw at the corner. Turn the PHM right side up, and you will
see a triangle marked on the processor clip at the same corner of hollow triangle.)

2. Carefully align pin 1 (the triangle) on the the PHM against pin 1 (the triangle) on the
CPU socket.

3. Once they are properly aligned, insert the two diagonal oval holes on the heatsink into
the guiding posts.

4. Using a T30 Torx-bit screwdriver, install four screws into the mounting holes on the
socket to securely attach the PHM onto the motherboard starting with the screw marked
"1" (in the sequence of 1, 2, 3, and 4).

Note: Do not use excessive force when tightening the screws to avoid damaging the
LGA-lands and the processor.

Oval C

Use a torque

Oval D

Large Guiding Post

T30 Torx Driver

of 12 lbf

#4

#1

#2

Small Guiding Post

Printed Triangle

Mounting the Processor Heatsink Module

into the CPU socket (on the motherboard)

#3

Tighten the screws in the

sequence of 1, 2, 3, 4 (top 3 quarter view)

29

X11SPW-CTF/-TF User's Manual

Removing the Processor Heatsink Module (PHM) from the
Motherboard

Before removing the processor heatsink module (PHM), unplug the power cord from the
power outlet.

1. Using a T30 Torx-bit screwdriver, turn the screws on the PHM counterclockwise to
loosen them from the socket, starting with the screw marked #4 (in the sequence of 4,
3, 2, 1).

2. After all four screws are removed, wiggle the PHM gently and pull it up to remove it
from the socket.

Note: To properly remove the processor heatsink module, be sure to loosen and re­move the screws on the PHM in the sequence of 4, 3, 2, 1 as shown below.

#1

Removing the screws in

the sequence of 4, 3, 2, 1

#4

#2

#3

Printed Triangle on Motherboard

CPU Socket

After removing the screws,

lift the Processor Heatsink
Module off the CPU socket.

30

Chapter 2: Installation

2.3 Motherboard Installation

All motherboards have standard mounting holes to t different types of chassis. Make sure

that the locations of all the mounting holes for both the motherboard and the chassis match.
Although a chassis may have both plastic and metal mounting fasteners, metal ones are
highly recommended because they ground the motherboard to the chassis. Make sure that
the metal standoffs click in or are screwed in tightly. Then use a screwdriver to secure the
motherboard onto the motherboard tray.

Tools Needed

Phillips

Screwdriver

(1)

SAN MAC

SAS CODE

SXB1B

IPMI CODE

MAC CODE

I-SATA2

I-SATA3

USB10/11(3.0)

S-SATA1

JSD2

JSD1

SXB1A

JUIDB1

SXB2

I-SATA0

SXB1C

USB6

S-SATA0

LE1

VGA

Intel

X557

JPME2

JPTG1

JWD1

BT1

+

I-SATA 4-7

Intel

C622

I-SATA1

X11SPW-CTF/-TF

REV: 1.02

DESIGNED IN USA

Phillips Screws

(7)

USB7/8(3.0)

MH10

IPMI_LAN

USB0/1

ASpeed
AST2500

MH11

BAR CODE

LEDS1

LSI3008

(-CTF only)

LE3

LAN2

LAN1

LEDM1

JBT1

M.2 PCI-E 3.0 X4

CPU

COM1

JNVI2C1

L-SAS0-3

PRESS FIT

JP1

JOH1

JSTBY1

JIPMB1

JPSAS1

USB4/5

JTPM1

JPG1

JPS1

USB9(3.0)

LE2

JPWR1

JP3

JF1

JPI2C1

Standoffs (7)
Only if Needed

COM2

JP4

USB2/3

JP2

JD1

ON

LEDLED12LEDFAIL

NMIXPWRHDDNICNICUIDPSRSTPWR

JL1

S-SGPIO1

I-SGPIO2

I-SGPIO1

FAN7

JRK1

JPWR3

DIMMF1

DIMME1

DIMMD1

FAN4

FAN5

FAN6

BIOS LICENSE

SP1

JPWR2

DIMMB1

DIMMC1

DIMMA1

FAN3

FAN1

FAN2

Location of Mounting Holes

Note: 1) To avoid damaging the motherboard and its components, please do not use

force greater than 8 lb/inch on each mounting screw during motherboard installation.

2) Some components are very close to the mounting holes. Please take precaution­ary measures to avoid damaging these components when installing the motherboard
to the chassis.

31

X11SPW-CTF/-TF User's Manual

Installing the Motherboard

1. Install the I/O shield into the back of the chassis.

2. Locate the mounting holes on the motherboard. See the previous page for the location.

3. Locate the matching mounting holes on the chassis. Align the mounting holes on the
motherboard against the mounting holes on the chassis.

4. Install standoffs in the chassis as needed.

5. Install the motherboard into the chassis carefully to avoid damaging other motherboard
components.

6. Using the Phillips screwdriver, insert a pan head #6 screw into all mounting holes on the
motherboard and the matching mounting holes on the chassis.

7. Make sure that the motherboard is securely placed in the chassis.

Note: Images displayed are for illustration only. Your chassis or components might
look different from those shown in this manual.

32

Chapter 2: Installation

2.4 Memory Support and Installation

Note: Check the Supermicro website for recommended memory modules.

Important: Exercise extreme care when installing or removing DIMM modules to pre-

vent any possible damage.

Memory Support

The X11SPW-CTF/-TF supports up to 192GB of RDIMM, 384GB of LRDIMM, and 768GB of
3DS LRDIMM DDR4 (288-pin) ECC memory with speeds of up to 2666MHz in six memory
slots. Refer to the table below for additional memory information.

Speed (MT/s); Voltage (V);

Slot Per Channel (SPC)

and DIMM Per Channel (DPC)

1 Slot Per

Channel

2 Slots Per Channel

Type

Ranks

Per DIMM

and Data

Width

DIMM Capacity

(GB)

RDIMM

RDIMM

RDIMM

RDIMM

RDIMM

3DS

LRDIMM

LRDIMM

3DS

SRx4

SRx8

DRx8

DRx4

QRx4

8Rx4

QRx4

QRx4

8Rx4

DRAM Density

4Gb

8GB

4GB

8GB

16GB

N/A

N/A

32GB 64GB

N/A

N/A

8Gb 1.2V 1.2V 1.2V

16GB

8GB

16GB

32GB

2H-64GB

4H-128GB

2H-64GB

4H-128GB

1DPC

2666 2666

1DPC

2DPC

2666

33

X11SPW-CTF/-TF User's Manual

DIMM Module Population Sequence

When installing memory modules, the DIMM slots must be populated in the following order:
DIMM A1, DIMMD1, DIMMB1, DIMME1, DIMMC1, DIMMF1.

• Always use DDR4 memory of the same type, size and speed.

• Mixed DIMM speeds can be installed. However, all DIMMs will run at the speed of the

slowest DIMM.

• The motherboard will support odd-numbered modules (1 or 3 modules installed). However,

to achieve the best memory performance, a balanced memory population is recommended.

LE1

SAN MAC

SXB1A

SAS CODE

SXB1B

IPMI CODE

MAC CODE

I-SATA2

I-SATA0

JUIDB1

SXB2

VGA

USB7/8(3.0)

MH10

MH11

ASpeed

AST2500

LEDS1

IPMI_LAN

USB0/1

BAR CODE

LAN2

Intel

X557

JPME2

JPTG1

JWD1

BT1

+

I-SATA 4-7

LAN1

LEDM1

JBT1

Intel

I-SATA1

C622

M.2 PCI-E 3.0 X4

LSI3008

(-CTF only)

COM1

JIPMB1

JPSAS1

L-SAS0-3

PRESS FIT

USB4/5

JPS1

JPG1

COM2

JP4

USB9(3.0)

USB2/3

I-SATA3

SXB1C

USB10/11(3.0)

USB6

S-SATA0

S-SATA1

JSD2

JSD1

JL1

S-SGPIO1

I-SGPIO2

JRK1

I-SGPIO1

JPWR3

FAN7

FAN6

DIMMF1

DIMME1

DIMMD1

X11SPW-CTF/-TF

REV: 1.02
DESIGNED IN USA

DIMMF1

DIMME1

DIMMD1

FAN4

FAN5

CPU

LE3

BIOS LICENSE

FAN3

DIMMA1

DIMMB1

DIMMC1

JNVI2C1

DIMMA1

FAN2

JP1

JOH1

JSTBY1

SP1

DIMMB1

DIMMC1

JTPM1

FAN1

JP3

JF1

LE2

JPI2C1

JPWR1

JPWR2

JP2

JD1

ON

LEDLED12LEDFAIL

NMIXPWRHDDNICNICUIDPSRSTPWR

34

FAN6

FAN3

FAN2

FAN1

DIMM Installation

1. Insert the desired number of DIMMs
into the memory slots in the following

order: DIMMA1, DIMMD1, DIMMB1,
DIMM E1, DIMMC1, DIMMF1. For the best

performance, please use the memory
modules of the same type and speed.

2. Push the release tabs outwards on both
ends of the DIMM slot to unlock it.

3. Align the key of the DIMM module with the
receptive point on the memory slot.

4. Align the notches on both ends of the
module against the receptive points on the
ends of the slot.

SAS CODE

IPMI CODE

MAC CODE

S-SATA1

JSD2

JL1

S-SGPIO1

I-SGPIO2

I-SGPIO1

FAN7

SAN MAC

SXB1B

I-SATA2

I-SATA3

USB10/11(3.0)

JSD1

Chapter 2: Installation

LE1

JUIDB1

VGA

Intel

SXB2

SXB1A

X557

JPME2

JPTG1

JWD1

BT1

+

I-SATA 4-7

Intel

I-SATA1

X11SPW-CTF/-TF

REV: 1.02
DESIGNED IN USA

DIMMF1

DIMME1

DIMMD1

FAN4

FAN5

C622

I-SATA0

SXB1C

USB6

S-SATA0

JRK1

JPWR3

USB7/8(3.0)

LAN2

LAN1

MH10

MH11

LEDM1

JBT1

M.2 PCI-E 3.0 X4

CPU

ASpeed

AST2500

LEDS1

LE3

BIOS LICENSE

IPMI_LAN

USB0/1

BAR CODE

LSI3008

(-CTF only)

JNVI2C1

COM1

JIPMB1

JPSAS1

JPG1

JPS1

COM2

L-SAS0-3

PRESS FIT

JP4

USB9(3.0)

USB2/3

USB4/5

JP3

JP2

JP1

JTPM1

JOH1

JD1

JSTBY1

ON

JF1

LEDLED12LEDFAIL

NMIXPWRHDDNICNICUIDPSRSTPWR

LE2

JPI2C1

JPWR1

SP1

JPWR2

DIMMB1

DIMMC1

DIMMA1

5. Press the notches on both ends of the
module straight down into the slot until the
module snaps into place.

6. Press the release tabs to the lock positions
to secure the DIMM module into the slot.

DIMM Removal

Press both release tabs on the ends of the
DIMM module to unlock it. Once the DIMM
module is loosened, remove it from the
memory slot.

Notches

Release Tabs

Press both notches

straight down into

the memory slot.

35

X11SPW-CTF/-TF User's Manual

FAN6

FAN3

FAN2

2.5 Rear I/O Ports

See Figure 2-1 below for the locations and descriptions of the various I/O ports on the rear
of the motherboard.

LE1

SAN MAC

SAS CODE

SXB1B

IPMI CODE

MAC CODE

I-SATA2

I-SATA3

USB10/11(3.0)

S-SATA1

JSD2

JSD1

SXB1A

JUIDB1

SXB2

I-SATA0

SXB1C

USB6

S-SATA0

VGA

Intel

X557

JPME2

JPTG1

JWD1

BT1

+

I-SATA 4-7

I-SATA1

X11SPW-CTF/-TF

REV: 1.02
DESIGNED IN USA

Intel

C622

USB7/8(3.0)

LAN2

LAN1

MH10

ASpeed

AST2500

MH11

LEDM1

LEDS1

JBT1

M.2 PCI-E 3.0 X4

CPU

LE3

IPMI_LAN

USB0/1

BAR CODE

LSI3008

(-CTF only)

COM1

JNVI2C1

JPSAS1

L-SAS0-3

PRESS FIT

JP1

JOH1

JSTBY1

JIPMB1

USB4/5

JTPM1

JPS1

LE2

JPWR1

JPG1

COM2

JP4

USB9(3.0)

USB2/3

JP3

JF1

JPI2C1

JP2

JD1

ON

LEDLED12LEDFAIL

NMIXPWRHDDNICNICUIDPSRSTPWR

JL1

S-SGPIO1

I-SGPIO2

I-SGPIO1

FAN7

JRK1

JPWR3

DIMMF1

DIMME1

DIMMD1

FAN4

FAN5

BIOS LICENSE

SP1

DIMMB1

DIMMA1

JPWR2

DIMMC1

FAN1

Figure 2-1. I/O Port Locations and Denitions

2

5

1

3

876

4

# Description # Description

1. COM Port 1 6. USB7 (3.0)

2. Dedicated IPMI LAN 7. LAN1

3 USB1 (2.0) 8 LAN2

4 USB0 (2.0) 9 VGA Port

5. USB8 (3.0) 10 UID Switch

9

10

36

Chapter 2: Installation

FAN6

VGA Port

The onboard VGA port is located next to LAN Port 2 on the I/O back panel. Use this connection
for VGA display.

COM Port

There is one COM port (COM1) on the I/O back panel and one COM header (COM2) on the

motherboard. See the table below for pin denitions.

COM Port

Pin Denitions

Pin# Denition Pin# Denition

1 DCD 6 DSR

2 RXD 7 RTS

3 TXD 8 CTS

4 DTR 9 RI

5 Ground 10 N/A

SAN MAC

SAS CODE

SXB1B

IPMI CODE

MAC CODE

I-SATA2

I-SATA3

USB10/11(3.0)

S-SATA1

JSD2

JSD1

JL1

S-SGPIO1

I-SGPIO2

I-SGPIO1

FAN7

JRK1

JPWR3

SXB1A

JUIDB1

SXB2

I-SATA0

SXB1C

USB6

S-SATA0

1

LE1

VGA

Intel

X557

JPME2

JPTG1

JWD1

BT1

+

I-SATA 4-7

Intel

C622

I-SATA1

X11SPW-CTF/-TF

REV: 1.02
DESIGNED IN USA

DIMMF1

DIMME1

DIMMD1

FAN4

FAN5

2

COM1

LSI3008

JNVI2C1

FAN2

L-SAS0-3

JOH1

SP1

DIMMB1

DIMMA1

PRESS FIT

JP1

JSTBY1

DIMMC1

JIPMB1

JPSAS1

USB4/5

JTPM1

JPS1

FAN1

JPG1

LE2

JPWR1

JPWR2

COM2

JP4

USB9(3.0)

USB2/3

JP3

JF1

JPI2C1

3

JP2

JD1

ON

LEDLED12LEDFAIL

NMIXPWRHDDNICNICUIDPSRSTPWR

USB7/8(3.0)

LAN1

MH10

MH11

M.2 PCI-E 3.0 X4

ASpeed
AST2500

LEDS1

LE3

BIOS LICENSE

IPMI_LAN

USB0/1

BAR CODE

FAN3

(-CTF only)

LAN2

LEDM1

JBT1

CPU

1. VGA Port

2. COM1

3. COM2

37

X11SPW-CTF/-TF User's Manual

LAN Ports

Two 10 Gigabit Ethernet ports (LAN1, LAN2) are located on the I/O back panel. In addition,
a dedicated IPMI LAN is located above USB ports 0/1 on the back panel. All of these ports
accept RJ45 type cables. Please refer to the LED Indicator section for LAN LED information

LAN Port

Pin Denition

Pin# Denition Pin# Denition

1 TD0- 11 P3V3_Dual

2 TD0+ 12 Act LED (Yellow)

3 TD1- 13

4 TD1+ 14

Link 1000

(Amber)

Link 100 LED

(Green)

5 TD2- 15 GND

6 TD2+ 16 GND

7 TD3- 17 GND

8 TD3+ 18 GND

9 COMMCT

10 GND

12 3

LE1

SAN MAC

SAS CODE

SXB1B

IPMI CODE

MAC CODE

I-SATA2

I-SATA3

USB10/11(3.0)

S-SATA1

JSD2

JSD1

SXB1A

JUIDB1

SXB2

I-SATA0

SXB1C

USB6

S-SATA0

VGA

Intel

X557

JPME2

JPTG1

JWD1

BT1

+

I-SATA 4-7

Intel

C622

I-SATA1

X11SPW-CTF/-TF

REV: 1.02
DESIGNED IN USA

LAN2

LEDM1

JBT1

CPU

USB7/8(3.0)

LAN1

MH10

MH11

M.2 PCI-E 3.0 X4

ASpeed

AST2500

LEDS1

LE3

IPMI_LAN

USB0/1

BAR CODE

LSI3008

(-CTF only)

COM1

JNVI2C1

JPSAS1

L-SAS0-3

PRESS FIT

JP1

JOH1

JSTBY1

JIPMB1

USB4/5

JTPM1

JPG1

JPS1

USB9(3.0)

LE2

JPWR1

IPMI LAN

Pin Denition

Pin# Denition Pin# Denition

9 19 GND

10 TD0+ 20

11 TD0- 21

12 TD1+ 22

13 TD1- 23 SGND

14 TD2+ 24 SGND

15 TD2- 25 SGND

16 TD3+ 26 SGND

17 TD3-

18 GND

1. LAN1

2. LAN2

JP3

JF1

COM2

USB2/3

JPI2C1

JP4

JP2

JD1

ON

LEDLED12LEDFAIL

NMIXPWRHDDNICNICUIDPSRSTPWR

3. IPMI LAN

Act LED

(Yellow)

Link 100 LED

(Green)

Link 1000 LED

(Amber)

JL1

S-SGPIO1

I-SGPIO2

I-SGPIO1

FAN7

JRK1

JPWR3

FAN6

FAN5

FAN4

DIMMF1

DIMME1

DIMMD1

BIOS LICENSE

FAN3

FAN2

SP1

DIMMB1

DIMMA1

JPWR2

DIMMC1

FAN1

38

Chapter 2: Installation

Universal Serial Bus (USB) Ports

There are two USB 2.0 ports (USB0/1) and two USB 3.0 ports (USB7/8) on the I/O back panel.
The motherboard also has three front access USB 2.0 headers (USB2/3, USB4/5, USB6) and
one front access USB 3.0 header (USB10/11). The USB9 header is USB 3.0 Type A. The
onboard headers can be used to provide front side USB access with a cable (not included).

Back Panel USB 3.0

Pin Denitions

Pin# Denition Pin# Denition

A1 VBUS B1 Power

A2 D- B2 USB 2.0 Differential Pair

A3 D+ B3

A4 Ground B4 Ground of PWR Return

A5 StdA_SSRX- B5 SuperSpeed Receiver

A6 StdA_SSRX+ B6 Differential Pair

A7 GND_DRAIN B7 Ground for Signal Return

A8 StdA_SSTX- B8 SuperSpeed Transmitter

A9 StdA_SSTX+ B9 Differential Pair

1

5

LE1

JUIDB1

SAN MAC

SXB2

SXB1A

SAS CODE

SXB1B

IPMI CODE

MAC CODE

I-SATA2

I-SATA0

I-SATA3

SXB1C

USB10/11(3.0)

7

USB6

VGA

Intel

X557

JPME2

JPTG1

JWD1

BT1

+

I-SATA 4-7

C622

I-SATA1

X11SPW-CTF/-TF

REV: 1.02
DESIGNED IN USA

Intel

USB7/8(3.0)

MH10

MH11

ASpeed

AST2500

LEDS1

LE3

IPMI_LAN

USB0/1

BAR CODE

LSI3008

(-CTF only)

LAN2

LAN1

LEDM1

JBT1

M.2 PCI-E 3.0 X4

CPU

4

S-SATA0

S-SATA1

JSD2

JSD1

3

COM1

JNVI2C1

JPSAS1

L-SAS0-3

PRESS FIT

JP1

JOH1

JSTBY1

JIPMB1

USB4/5

JTPM1

JPS1

JPWR1

JPG1

COM2

USB9(3.0)

USB2/3

JP3

JF1

LE2

JPI2C1

Front Panel USB 2.0

Header Pin Denitions

Pin# Denition Pin# Denition

1 +5V 2 +5V

3 USB_N 4 USB_N

5 USB_P 6 USB_P

7 Ground 8 Ground

9 Key 10 NC

USB Type A

Header Pin Denitions

Pin# Denition Pin# Denition

1 VBUS 2 D-N

3 D-P 4 GND

5 Stda_SSRX-N 6 Stda_SSRX-P

7 GND_DRAIN 8 Stda_SSTX-N

9 Stda_SSTX-P 10 CG

11 CG 12 CG

13 CG

1. USB0/1

JP4

2. USB2/3

6

3. USB4/5

2

4. USB6

5. USB7/8

JP2

JD1

ON

LEDLED12LEDFAIL

NMIXPWRHDDNICNICUIDPSRSTPWR

6. USB9

7. USB10/11

JL1

S-SGPIO1

I-SGPIO2

I-SGPIO1

FAN7

JRK1

JPWR3

SP1

FAN2

DIMMB1

DIMMA1

JPWR2

DIMMC1

FAN1

DIMMF1

DIMME1

DIMMD1

FAN4

FAN5

FAN6

BIOS LICENSE

FAN3

39

X11SPW-CTF/-TF User's Manual

FAN6

Unit Identier Switch/UID LED Indicator

A Unit Identier (UID) switch and an LED Indicator are located on the motherboard. The UID

switch is located at JUIDB1, which is next to the VGA port on the back panel. The UID LED
(LE1) is located next to the UID switch. When you press the UID switch, the UID LED will
be turned on. Press the UID switch again to turn off the LED indicator. The UID Indicator

provides easy identication of a system unit that may be in need of service.

Note: UID can also be triggered via IPMI on the motherboard. For more information
on IPMI, please refer to the IPMI User's Guide posted on our website at http://www.
supermicro.com.

SAN MAC

SAS CODE

SXB1B

IPMI CODE

MAC CODE

I-SATA2

I-SATA3

USB10/11(3.0)

S-SATA1

JSD2

JSD1

SXB1A

1

JUIDB1

SXB2

I-SATA0

SXB1C

USB6

S-SATA0

UID Switch

Pin Denitions

Pin# Denition

1 Ground

2 Ground

3 Button In

4 Button In

2

LE1

VGA

JPTG1

JPME2

LAN2

JWD1

Intel

C622

Intel
X557

BT1

+

I-SATA 4-7

I-SATA1

X11SPW-CTF/-TF

REV: 1.02
DESIGNED IN USA

LEDM1

JBT1

CPU

USB7/8(3.0)

LAN1

MH10

MH11

M.2 PCI-E 3.0 X4

ASpeed

AST2500

LEDS1

LE3

IPMI_LAN

USB0/1

BAR CODE

LSI3008

(-CTF only)

COM1

JNVI2C1

L-SAS0-3

PRESS FIT

JP1

JOH1

JSTBY1

JIPMB1

JPSAS1

USB4/5

JTPM1

JPS1

JPG1

LE2

JPWR1

COM2

JP4

USB9(3.0)

USB2/3

JP3

JF1

JPI2C1

UID LED

Pin Denitions

Color Status

Blue: On Unit Identied

1. UID Switch

2. UID LED

JP2

JD1

ON

LEDLED12LEDFAIL

NMIXPWRHDDNICNICUIDPSRSTPWR

JL1

S-SGPIO1

I-SGPIO2

I-SGPIO1

FAN7

JRK1

JPWR3

DIMMF1

DIMME1

DIMMD1

FAN4

FAN5

BIOS LICENSE

SP1

JPWR2

DIMMB1

DIMMC1

DIMMA1

FAN3

FAN1

FAN2

40

Chapter 2: Installation

2.6 Front Control Panel

JF1 contains header pins for various buttons and indicators that are normally located on a

control panel at the front of the chassis. These connectors are designed specically for use
with Supermicro chassis. See the gure below for the descriptions of the front control panel

buttons and LED indicators.

LE1

SAN MAC

SAS CODE

SXB1B

IPMI CODE

MAC CODE

I-SATA2

I-SATA3

USB10/11(3.0)

S-SATA1

JSD2

JSD1

SXB1A

JUIDB1

SXB2

I-SATA0

SXB1C

USB6

S-SATA0

VGA

Intel

X557

JPME2

JPTG1

JWD1

BT1

+

I-SATA 4-7

C622

I-SATA1

X11SPW-CTF/-TF

REV: 1.02
DESIGNED IN USA

Intel

USB7/8(3.0)

LAN2

LAN1

MH10

ASpeed

AST2500

MH11

LEDM1

LEDS1

JBT1

M.2 PCI-E 3.0 X4

CPU

LE3

IPMI_LAN

USB0/1

BAR CODE

LSI3008

(-CTF only)

COM1

JNVI2C1

JPSAS1

L-SAS0-3

PRESS FIT

JP1

JOH1

JSTBY1

JIPMB1

USB4/5

JTPM1

JPS1

JPG1

USB9(3.0)

JP3

JF1

LE2

JPI2C1

JPWR1

COM2

JP4

USB2/3

JP2

JD1

ON

LEDLED12LEDFAIL

NMIXPWRHDDNICNICUIDPSRSTPWR

JL1

S-SGPIO1

I-SGPIO2

I-SGPIO1

FAN7

JRK1

JPWR3

DIMMF1

DIMME1

DIMMD1

FAN4

FAN5

FAN6

Figure 2-2. JF1 Header Pins

1 2

PWR

Power Button

Reset

Reset Button

3.3 V

5V Stby

3.3V Stby

3.3V Stby

3.3V Stby

3.3V Stby

X

NMI

19

20

BIOS LICENSE

FAN3

Ground

Ground

Power Fail LED

UID LED

NIC2 Active LED

NIC1 Active LED

HDD LED

PWR LED

X

Ground

FAN2

SP1

DIMMB1

DIMMA1

JPWR2

DIMMC1

FAN1

41

X11SPW-CTF/-TF User's Manual

NIC1/NIC2 (LAN1/LAN2)

The Network Interface Controller (NIC) LED connection for LAN port 1 is located on pins 11
and 12 of JF1, and the LED connection for LAN Port 2 is on Pins 9 and 10. NIC1 LED and
NIC2 LED are 2-pin NIC LED headers. Attach the NIC LED cables here to display network

activity. Refer to the table below for pin denitions.

LAN1/LAN2 LED

Pin Denitions (JF1)

Pins Denition

9/11 Vcc

10/12

NIC2 Active LED/

NIC1 Active LED

HDD LED

The HDD LED connection is located on pins 13 and 14 of JF1. Attach a cable here to indicate
the status of HDD-related activities, including IDE and SATA activities. See the table below

for pin denitions.

HDD LED

Pin Denitions (JF1)

Pins Denition

13 3.3V Stby

14 HDD LED

Power LED

The Power LED connection is located on pins 15 and 16 of JF1. Refer to the table below

for pin denitions.

Power LED

Pin Denitions (JF1)

Pins Denition

15 3.3V

16 Ground

1 2

PWR

Reset

Power Button

Reset Button

3.3 V

5V Stby

Ground

Ground

Power Fail LED

UID LED

1. NIC2 LED

2. NIC1 LED

3. HDD LED

4. PWR LED

3.3V Stby

3.3V Stby

3.3V Stby

3.3V Stby

X

NIC2 Active LED

NIC1 Active LED

HDD LED

PWR LED

X

3

4

1

2

NMI

Ground

19

20

42

Chapter 2: Installation

Power Button

The Power Button connection is located on pins 1 and 2 of JF1. Momentarily contacting both

pins will power on/off the system. This button can also be congured to function as a suspend

button (with a setting in the BIOS - see Chapter 4). To turn off the power in the suspend

mode, press the button for at least 4 seconds. Refer to the table below for pin denitions.

Power Button

Pin Denitions (JF1)

Pins Denition

1 Signal

2 Ground

Reset Button

The Reset Button connection is located on pins 3 and 4 of JF1. Attach it to a hardware reset

switch on the computer case to reset the system. Refer to the table below for pin denitions.

Reset Button

Pin Denitions (JF1)

Pins Denition

3 Reset

4 Ground

Power Fail LED

The Power Fail LED connection is located on pins 5 and 6 of JF1. Refer to the table below

for pin denitions.

PWR Fail LED

Pin Denitions (JF1)

Pins Denition

5 3.3V

6 Power Fail

1 2

PWR

1

2

Reset

Power Button

Reset Button

3.3 V

5V Stby

3.3V Stby

3.3V Stby

3.3V Stby

3.3V Stby

Ground

Ground

Power Fail LED

UID LED

NIC2 Active LED

NIC1 Active LED

HDD LED

PWR LED

X

X

3

1. PWR Button

2. Reset Button

3. Power Fail

NMI

Ground

19

20

43

X11SPW-CTF/-TF User's Manual

UID LED

The UID LED is on pins 7 and 8 of JF1. Connect a cable here to show the UID activity. Refer

to the table below for pin denitions.

UID LED

Pin Denitions (JF1)

Pins Denition

7 5V Stby

8 UID LED

NMI Button

The non-maskable interrupt button header is located on pins 19 and 20 of JF1. Refer to the

table below for pin denitions.

NMI Button

Pin Denitions (JF1)

Pins Denition

19 Control

20 Ground

PWR

Reset

Power Button

Reset Button

3.3 V

5V Stby

3.3V Stby

3.3V Stby

3.3V Stby

3.3V Stby

NMI

2

1 2

Ground

Ground

Power Fail LED

UID LED

NIC2 Active LED

NIC1 Active LED

HDD LED

PWR LED

X

19

20

X

Ground

1

1. UID LED

2. NMI

44

Chapter 2: Installation

FAN6

2.7 Connectors

Power Connections

Main ATX Power Supply Connector

The primary power supply connector (JPWR2) meets the ATX SSI EPS 24-pin specication.

You must also connect the 8-pin (JPWR1) processor power connector to your power supply.

ATX Power 24-pin Connector

Pin Denitions

Pin# Denition Pin# Denition

13 +3.3V 1 +3.3V

14 -12V 2 +3.3V

15 Ground 3 Ground

16 PS_ON 4 +5V

17 Ground 5 Ground

18 Ground 6 +5V

19 Ground 7 Ground

20 Res (NC) 8 PWR_OK

21 +5V 9 5VSB

22 +5V 10 +12V

23 +5V 11 +12V

24 Ground 12 +3.3V

Required Connection

SAN MAC

SAS CODE

SXB1B

IPMI CODE

MAC CODE

I-SATA2

S-SATA1

JSD2

JL1

S-SGPIO1

I-SGPIO2

I-SGPIO1

FAN7

LE1

JUIDB1

SXB2

SXB1A

I-SATA0

I-SATA3

SXB1C

USB10/11(3.0)

USB6

S-SATA0

JSD1

JRK1

JPWR3

VGA

Intel

X557

JPME2

JPTG1

JWD1

BT1

+

I-SATA 4-7

I-SATA1

X11SPW-CTF/-TF

REV: 1.02
DESIGNED IN USA

DIMMF1

DIMME1

DIMMD1

FAN4

FAN5

Intel

C622

USB7/8(3.0)

LAN2

LAN1

MH10

ASpeed

AST2500

MH11

LEDM1

LEDS1

JBT1

M.2 PCI-E 3.0 X4

LE3

CPU

BIOS LICENSE

IPMI_LAN

USB0/1

BAR CODE

FAN3

LSI3008

(-CTF only)

COM1

JNVI2C1

FAN2

L-SAS0-3

JOH1

SP1

DIMMB1

DIMMA1

JPSAS1

PRESS FIT

JP1

JSTBY1

DIMMC1

JIPMB1

USB4/5

JTPM1

JPS1

FAN1

JPG1

USB9(3.0)

JP3

JF1

LE2

JPI2C1

JPWR1

JPWR2

COM2

JP4

USB2/3

1. 24-Pin ATX Main PWR

JP2

JD1

ON

LEDLED12LEDFAIL

NMIXPWRHDDNICNICUIDPSRSTPWR

1

45

X11SPW-CTF/-TF User's Manual

FAN6

Secondary Power Connector

JPWR1 must also be connected to the power supply. This connector is used to power the
processor.

+12V 8-pin Power

Pin Denitions

Pin# Denition

1 - 4 Ground

5 - 8 +12V

Required Connection

Power Connector for GPU

JPWR3 is a 4-pin 12V power connector for GPU cards that requires an extra 12V power with
up to 75W.

LE1

JUIDB1

SAN MAC

SXB2

SXB1A

SAS CODE

SXB1B

IPMI CODE

MAC CODE

I-SATA2

I-SATA0

I-SATA3

SXB1C

USB10/11(3.0)

USB6

S-SATA0

S-SATA1

JSD2

JSD1

JL1

S-SGPIO1

I-SGPIO2

JRK1

I-SGPIO1

2

JPWR3

FAN7

VGA

Intel

X557

JPME2

JPTG1

JWD1

BT1

+

I-SATA 4-7

I-SATA1

X11SPW-CTF/-TF

REV: 1.02
DESIGNED IN USA

DIMMF1

DIMME1

DIMMD1

FAN4

FAN5

Intel

C622

USB7/8(3.0)

LAN2

LAN1

MH10

ASpeed

AST2500

MH11

LEDM1

LEDS1

JBT1

M.2 PCI-E 3.0 X4

LE3

CPU

BIOS LICENSE

IPMI_LAN

USB0/1

BAR CODE

FAN3

LSI3008

(-CTF only)

COM1

JNVI2C1

FAN2

L-SAS0-3

JOH1

SP1

DIMMB1

DIMMA1

JPSAS1

PRESS FIT

JP1

JSTBY1

DIMMC1

JIPMB1

USB4/5

JTPM1

JPS1

FAN1

JPG1

USB9(3.0)

JP3

JF1

LE2

JPI2C1

JPWR1

JPWR2

COM2

JP4

USB2/3

1. 8-Pin PWR

2. 4-Pin 12V for GPU

JP2

JD1

ON

LEDLED12LEDFAIL

NMIXPWRHDDNICNICUIDPSRSTPWR

1

46

Chapter 2: Installation

FAN6

Headers

Fan Headers

There are seven fan headers on the motherboard. These are 4-pin fan headers; pins 1-3
are backward compatible with traditional 3-pin fans. The onboard fan speeds are controlled
by Thermal Management (via Hardware Monitoring) in the BIOS. When using Thermal
Management setting, please use all 3-pin fans or all 4-pin fans.

Fan Header

Pin Denitions

Pin# Denition

1 Ground (Black)

2 +12V (Red)

3 Tachometer

4 PWM Control

SAN MAC

SAS CODE

SXB1B

IPMI CODE

MAC CODE

I-SATA2

I-SATA3

USB10/11(3.0)

S-SATA1

JSD2

JSD1

JL1

S-SGPIO1

I-SGPIO2

I-SGPIO1

FAN7

JRK1

JPWR3

SXB1A

JUIDB1

SXB2

I-SATA0

SXB1C

USB6

S-SATA0

LE1

VGA

Intel

X557

JPME2

JPTG1

JWD1

BT1

+

I-SATA 4-7

I-SATA1

X11SPW-CTF/-TF

REV: 1.02
DESIGNED IN USA

DIMMF1

DIMME1

DIMMD1

FAN4

FAN5

Intel

C622

COM1

LSI3008

JNVI2C1

DIMMA1

FAN2

235 467

L-SAS0-3

PRESS FIT

JP1

JOH1

JSTBY1

SP1

DIMMB1

DIMMC1

JIPMB1

JPSAS1

JPS1

USB4/5

JTPM1

LE2

JPWR1

JPWR2

FAN1

JPG1

COM2

JP4

USB9(3.0)

USB2/3

JP3

JF1

JPI2C1

1

JP2

JD1

ON

LEDLED12LEDFAIL

NMIXPWRHDDNICNICUIDPSRSTPWR

USB7/8(3.0)

LAN1

MH10

MH11

M.2 PCI-E 3.0 X4

ASpeed

AST2500

LEDS1

LE3

BIOS LICENSE

IPMI_LAN

USB0/1

BAR CODE

FAN3

(-CTF only)

LAN2

LEDM1

JBT1

CPU

1. FAN1

2. FAN2

3. FAN3

4. FAN4

5. FAN5

6. FAN6

7. FAN7

47

X11SPW-CTF/-TF User's Manual

FAN6

FAN3

FAN2

SGPIO Headers

I-SGPIO1, I-SGPIO2 and S-SGPIO1 (Serial General Purpose Input/Output) headers are used
to communicate with the enclosure management chip on the backplane.

SGPIO Header

Pin Denitions

Pin# Denition Pin# Denition

1 NC 2 NC

3 Ground 4 DATA Out

5 Load 6 Ground

7 Clock 8 NC

NC = No Connection

Disk-On-Module Power Connector

The Disk-On-Module (DOM) power connectors at JSD1 and JSD2 provide 5V power to a
solid-state DOM storage device connected to one of the SATA ports. See the table below for

pin denitions.

DOM Power

Pin Denitions

Pin# Denition

1 5V

2 Ground

3 Ground

LE1

JUIDB1

SAN MAC

SXB2

SXB1A

SAS CODE

SXB1B

IPMI CODE

MAC CODE

I-SATA2

I-SATA0

I-SATA3

SXB1C

USB10/11(3.0)

USB6

S-SATA0

S-SATA1

JSD2

JSD1

45

JL1

3

S-SGPIO1

I-SGPIO2

JRK1

2

I-SGPIO1

JPWR3

1

FAN7

VGA

Intel

X557

JPME2

JPTG1

JWD1

BT1

+

I-SATA 4-7

I-SATA1

X11SPW-CTF/-TF

REV: 1.02
DESIGNED IN USA

DIMMF1

DIMME1

DIMMD1

FAN4

FAN5

Intel

C622

USB7/8(3.0)

LAN2

LAN1

MH10

ASpeed

AST2500

MH11

LEDM1

LEDS1

JBT1

M.2 PCI-E 3.0 X4

LE3

CPU

BIOS LICENSE

IPMI_LAN

USB0/1

BAR CODE

LSI3008

(-CTF only)

COM1

JNVI2C1

L-SAS0-3

JOH1

SP1

DIMMB1

DIMMA1

JPSAS1

PRESS FIT

JP1

JSTBY1

DIMMC1

JIPMB1

USB4/5

JTPM1

JPS1

FAN1

JPG1

USB9(3.0)

JP3

JF1

LE2

JPI2C1

JPWR1

JPWR2

COM2

JP4

USB2/3

1. I-SGPIO1

2. I-SGPIO2

3. S-SGPIO1

4. JSD1

5. JSD2

JP2

JD1

ON

LEDLED12LEDFAIL

NMIXPWRHDDNICNICUIDPSRSTPWR

48

Chapter 2: Installation

FAN6

TPM/Port 80 Header

The JTPM1 header is used to connect a Trusted Platform Module (TPM), which is available from
a third-party vendor. A TPM is a security device that supports encryption and authentication in
hard drives. It enables the motherboard to deny access if the TPM associated with the hard

drive is not installed in the system. See the table below for pin denitions.

TPM

Pin Denitions

Pin# Denition Pin# Denition

1 P3V3 6 GND

2 CS_N 7 MOSI

3 Reset 8 NC

4 MISO 9 P3V3_STBY

5 CLK 10 IRQ_N

SAN MAC

SAS CODE

SXB1B

IPMI CODE

MAC CODE

I-SATA2

I-SATA3

S-SATA1

JSD2

JSD1

JL1

S-SGPIO1

I-SGPIO2

I-SGPIO1

FAN7

USB10/11(3.0)

JRK1

JPWR3

SXB1A

JUIDB1

SXB2

I-SATA0

SXB1C

USB6

S-SATA0

LE1

VGA

Intel
X557

JPME2

JPTG1

JWD1

BT1

+

I-SATA 4-7

I-SATA1

X11SPW-CTF/-TF

REV: 1.02
DESIGNED IN USA

DIMMF1

DIMME1

DIMMD1

FAN4

FAN5

Intel

C622

COM1

LSI3008

JNVI2C1

FAN2

L-SAS0-3

JOH1

SP1

DIMMB1

DIMMA1

JPSAS1

PRESS FIT

JP1

JSTBY1

DIMMC1

JIPMB1

USB4/5

JTPM1

JPS1

JPWR1

JPWR2

FAN1

JPG1

COM2

USB9(3.0)

JP3

JF1

LE2

JPI2C1

JP4

USB2/3

JP2

1

JD1

ON

LEDLED12LEDFAIL

NMIXPWRHDDNICNICUIDPSRSTPWR

USB7/8(3.0)

LAN1

MH10

MH11

M.2 PCI-E 3.0 X4

ASpeed

AST2500

LEDS1

LE3

BIOS LICENSE

IPMI_LAN

USB0/1

BAR CODE

FAN3

(-CTF only)

LAN2

LEDM1

JBT1

CPU

1. TPM Header

49

X11SPW-CTF/-TF User's Manual

Standby Power

The Standby Power header is located at JSTBY1 on the motherboard. See the table below

for pin denitions.

Standby Power

Pin Denitions

Pin# Denition

1 +5V Standby

2 Ground

3 No Connection

Internal Speaker/Buzzer

The Internal Speaker/Buzzer (SP1) is used to provide audible indications for various beep

codes. See the table below for pin denitions.

SAN MAC

SAS CODE

SXB1B

IPMI CODE

MAC CODE

I-SATA2

I-SATA3

USB10/11(3.0)

S-SATA1

JSD2

JSD1

SXB1A

JUIDB1

SXB2

I-SATA0

SXB1C

USB6

S-SATA0

LE1

VGA

Intel

X557

JPME2

JPTG1

JWD1

BT1

+

I-SATA 4-7

I-SATA1

X11SPW-CTF/-TF

REV: 1.02
DESIGNED IN USA

Intel

C622

Internal Buzzer

Pin Denitions

Pin# Denition

1 Pos (+) Beep In

2 Neg (-) Alarm Speaker

COM1

LSI3008

(-CTF only)

JNVI2C1

JPSAS1

L-SAS0-3

PRESS FIT

JP1

JOH1

JSTBY1

JIPMB1

USB4/5

JTPM1

JPS1

JPG1

USB9(3.0)

JP3

JF1

LE2

JPI2C1

JPWR1

COM2

JP4

USB2/3

JP2

JD1

1

ON

LEDLED12LEDFAIL

NMIXPWRHDDNICNICUIDPSRSTPWR

USB7/8(3.0)

LAN1

MH10

MH11

M.2 PCI-E 3.0 X4

ASpeed

AST2500

LEDS1

LE3

IPMI_LAN

USB0/1

BAR CODE

LAN2

LEDM1

JBT1

CPU

1. Standby Power

2. Internal Speaker

JL1

S-SGPIO1

I-SGPIO2

I-SGPIO1

FAN7

JRK1

JPWR3

2

SP1

FAN2

DIMMB1

DIMMA1

JPWR2

DIMMC1

FAN1

DIMMF1

DIMME1

DIMMD1

FAN4

FAN5

FAN6

BIOS LICENSE

FAN3

50

Chapter 2: Installation

Power SMB (I2C) Header

A Power System Management Bus (I2C) header at JPI2C1 monitors the power supply, fan,

and system temperatures. See the table below for pin denitions.

Power SMB Header

Pin Denitions

Pin# Denition

1 Clock

2 Data

3 PMBUS_Alert

4 Ground

5 +3.3V

4-pin BMC External I2C Header

A System Management Bus header for IPMI 2.0 is located at JIPMB1. Connect a cable to this
header to use the IPMB I2C connection on your system. See the table below for pin denitions.

SAN MAC

SAS CODE

SXB1B

IPMI CODE

MAC CODE

I-SATA2

I-SATA3

USB10/11(3.0)

S-SATA1

JSD2

JSD1

SXB1A

JUIDB1

SXB2

I-SATA0

SXB1C

USB6

S-SATA0

LE1

VGA

Intel

X557

JPME2

JPTG1

JWD1

BT1

+

I-SATA 4-7

I-SATA1

X11SPW-CTF/-TF

REV: 1.02
DESIGNED IN USA

Intel

C622

External I2C Header

Pin Denitions

Pin# Denition

1 Data

2 Ground

3 Clock

4 No Connection

COM1

LSI3008

(-CTF only)

JNVI2C1

L-SAS0-3

PRESS FIT

JP1

JOH1

JSTBY1

JIPMB1

JPSAS1

USB4/5

JTPM1

JPS1

JPWR1

JPG1

COM2

JP4

USB9(3.0)

USB2/3

JP3

JF1

LE2

JPI2C1

2

JP2

JD1

ON

LEDLED12LEDFAIL

NMIXPWRHDDNICNICUIDPSRSTPWR

1

USB7/8(3.0)

LAN1

MH10

MH11

M.2 PCI-E 3.0 X4

ASpeed

AST2500

LEDS1

LE3

IPMI_LAN

USB0/1

BAR CODE

LAN2

LEDM1

JBT1

CPU

1. Power SMB Header

2. BMC External Header

JL1

S-SGPIO1

I-SGPIO2

I-SGPIO1

FAN7

JRK1

JPWR3

SP1

FAN2

DIMMB1

DIMMA1

JPWR2

DIMMC1

FAN1

DIMMF1

DIMME1

DIMMD1

FAN4

FAN5

FAN6

BIOS LICENSE

FAN3

51

X11SPW-CTF/-TF User's Manual

Overheat/Fan Fail LED Header

Connect an LED indicator to JOH1 to display warnings of chassis overheating and fan failure.
See the table below for the LED status.

Overheat LED Header

Status

State Denition

Solid Overheat

Blinking Fan Fail

Chassis Intrusion

A Chassis Intrusion header is located at JL1 on the motherboard. Attach the appropriate cable
from the chassis to the header to inform you when the chassis is opened.

Chassis Intrusion

Pin Denitions

Pins Denition

1 Intrusion Input

2 Ground

LE1

SAN MAC

SAS CODE

SXB1B

IPMI CODE

MAC CODE

I-SATA2

I-SATA3

USB10/11(3.0)

S-SATA1

JSD2

JSD1

SXB1A

JUIDB1

SXB2

I-SATA0

SXB1C

USB6

S-SATA0

VGA

Intel

X557

JPME2

JPTG1

JWD1

BT1

+

I-SATA 4-7

I-SATA1

X11SPW-CTF/-TF

REV: 1.02
DESIGNED IN USA

Intel
C622

USB7/8(3.0)

LAN2

LAN1

MH10

ASpeed

AST2500

MH11

LEDM1

LEDS1

JBT1

M.2 PCI-E 3.0 X4

LE3

CPU

IPMI_LAN

USB0/1

BAR CODE

LSI3008

(-CTF only)

1

COM1

JNVI2C1

JPSAS1

L-SAS0-3

PRESS FIT

JP1

JOH1

JSTBY1

JIPMB1

USB4/5

JTPM1

JPS1

JPG1

USB9(3.0)

JP3

JF1

LE2

JPI2C1

JPWR1

COM2

JP4

USB2/3

1. Overheat/Fan Fail LED Header

2. Chassis Intrusion

JP2

JD1

ON

LEDLED12LEDFAIL

NMIXPWRHDDNICNICUIDPSRSTPWR

JL1

S-SGPIO1

2

I-SGPIO2

JRK1

I-SGPIO1

JPWR3

FAN7

DIMMF1

DIMME1

DIMMD1

FAN4

FAN5

FAN6

BIOS LICENSE

SP1

JPWR2

DIMMB1

DIMMC1

DIMMA1

FAN3

FAN1

FAN2

52

Chapter 2: Installation

FAN6

SATA and SAS Ports

The X11SPW-CTF/-TF has eight I-SATA 3.0 ports and two S-SATA 3.0 ports that are supported
by the Intel C622 chipset. In addition to the SATA 3.0 ports, the X11SPW-CTF has four SAS

3.0 ports that are supported by the LSI 3008 controller.

M.2 Slot

M.2 is formerly known as Next Generation Form Factor (NGFF). The M.2 slot is designed for
internal mounting devices. The X11SPW-CTF/-TF motherboard deploys an M key dedicated
for SSD devices with the ulitmate performance capability in a PCI-Express 3.0 x4 interface
for native PCI-E SSD support. It can also support SATA devices.

LE1

JUIDB1

SAN MAC

SXB2

SXB1A

SAS CODE

SXB1B

IPMI CODE

MAC CODE

I-SATA2

S-SATA1

JSD2

JL1

S-SGPIO1

I-SGPIO2

I-SGPIO1

FAN7

I-SATA0

I-SATA3

SXB1C

1

USB10/11(3.0)

USB6

S-SATA0

JSD1

JRK1

JPWR3

3

4

7

Intel

X557

JPME2

JPTG1

BT1

+

I-SATA 4-7

5

I-SATA1

2

X11SPW-CTF/-TF

REV: 1.02
DESIGNED IN USA

6

DIMMF1

DIMME1

DIMMD1

FAN4

FAN5

VGA

LAN2

JWD1

Intel

C622

JBT1

CPU

LAN1

LEDM1

M.2 PCI-E 3.0 X4

MH10

MH11

USB7/8(3.0)

ASpeed

AST2500

LEDS1

LE3

BIOS LICENSE

IPMI_LAN

USB0/1

BAR CODE

9

FAN3

LSI3008

(-CTF only)

COM1

JNVI2C1

DIMMA1

FAN2

L-SAS0-3

PRESS FIT

JP1

JOH1

JSTBY1

SP1

DIMMB1

DIMMC1

JIPMB1

JPSAS1

USB4/5

JTPM1

JPS1

FAN1

JPG1

USB9(3.0)

JP3

LE2

JPWR1

JPWR2

COM2

JF1

JPI2C1

JP4

USB2/3

1. I-SATA0

2. I-SATA1

3. I-SATA2

8

4. I-SATA3

5. I-SATA4~7

6. S-SATA0

7. S-SATA1

JP2

JD1

ON

LEDLED12LEDFAIL

NMIXPWRHDDNICNICUIDPSRSTPWR

8. SAS 3.0 Ports (X11SPW-CTF only)

9. M.2 Slot

53

X11SPW-CTF/-TF User's Manual

FAN6

Intel RAID Key Header

The JRK1 header allows the user to enable RAID functions. Refer to the table below for pin

denitions.

Intel RAID Key Header

Pin Denitions

Pin# Dention

1 GND

2 PU 3.3V Stdby

3

4

GND

PCH RAID KEY

SAN MAC

SAS CODE

SXB1B

IPMI CODE

MAC CODE

I-SATA2

I-SATA3

S-SATA1

JSD2

JL1

S-SGPIO1

I-SGPIO2

I-SGPIO1

FAN7

USB10/11(3.0)

JSD1

JPWR3

JRK1

SXB1A

JUIDB1

SXB2

I-SATA0

SXB1C

USB6

S-SATA0

1

LE1

VGA

Intel

X557

JPME2

JPTG1

JWD1

BT1

+

I-SATA 4-7

I-SATA1

X11SPW-CTF/-TF

REV: 1.02
DESIGNED IN USA

DIMMF1

DIMME1

DIMMD1

FAN4

FAN5

Intel

C622

COM1

LSI3008

(-CTF only)

JNVI2C1

FAN2

L-SAS0-3

JOH1

SP1

DIMMB1

DIMMA1

JPSAS1

PRESS FIT

JP1

JSTBY1

DIMMC1

JIPMB1

USB4/5

JTPM1

JPS1

FAN1

JPG1

USB9(3.0)

JP3

JF1

LE2

JPI2C1

JPWR1

JPWR2

COM2

JP4

USB2/3

JP2

JD1

ON

LEDLED12LEDFAIL

NMIXPWRHDDNICNICUIDPSRSTPWR

USB7/8(3.0)

LAN1

MH10

MH11

M.2 PCI-E 3.0 X4

ASpeed

AST2500

LEDS1

LE3

BIOS LICENSE

IPMI_LAN

USB0/1

BAR CODE

FAN3

LAN2

LEDM1

JBT1

CPU

1. RAID Key

54

Chapter 2: Installation

FAN6

NVMe I2C Header

Connector JNVI2C1 is a management header for the Supermicro AOC NVMe PCI-E peripheral
cards. Connect the I2C cable to this connector.

Power LED/Speaker

Pins 1-3 of JD1 are used for power LED indication, and pins 4-7 are for the speaker. Please
note that the speaker connector pins (4-7) are used with an external speaker. If you wish to
use the onboard speaker, you should close pins 6-7 with a cap. Refer to the tables below

for pin denitions.

SAN MAC

SAS CODE

SXB1B

IPMI CODE

MAC CODE

I-SATA2

I-SATA3

USB10/11(3.0)

S-SATA1

JSD2

JSD1

PWR LED Connector

Pin Denitions

Pin# Denition

1 JD1_PIN1

2 FP_PWR_LED

3 FP_PWR_LED

LE1

SXB1A

JUIDB1

SXB2

I-SATA0

SXB1C

USB6

S-SATA0

VGA

Intel

X557

JPME2

JPTG1

JWD1

BT1

+

I-SATA 4-7

I-SATA1

X11SPW-CTF/-TF

REV: 1.02
DESIGNED IN USA

Intel
C622

Speaker Connector

Pin Denitions

Pin# Denition

4 P5V

5 Key

6 R_SPKPIN_N

7 R_SPKPIN

COM1

LSI3008

(-CTF only)

1

JNVI2C1

JPSAS1

L-SAS0-3

PRESS FIT

JP1

JOH1

JSTBY1

JIPMB1

USB4/5

JTPM1

JPS1

JPG1

USB9(3.0)

JP3

JF1

LE2

JPI2C1

JPWR1

COM2

JP4

USB2/3

JP2

JD1

2

ON

LEDLED12LEDFAIL

NMIXPWRHDDNICNICUIDPSRSTPWR

USB7/8(3.0)

LAN1

MH10

MH11

M.2 PCI-E 3.0 X4

ASpeed

AST2500

LEDS1

LE3

IPMI_LAN

USB0/1

BAR CODE

LAN2

LEDM1

JBT1

CPU

1. NVMe I2C Header

2. Power LED/Speaker

JL1

S-SGPIO1

I-SGPIO2

I-SGPIO1

FAN7

JRK1

JPWR3

DIMMF1

DIMME1

DIMMD1

FAN4

FAN5

BIOS LICENSE

SP1

JPWR2

DIMMB1

DIMMC1

DIMMA1

FAN3

FAN1

FAN2

55

X11SPW-CTF/-TF User's Manual

2.8 Jumper Settings

How Jumpers Work

To modify the operation of the motherboard, jumpers can be used to choose between optional

settings. Jumpers create shorts between two pins to change the function of the connector.

Pin 1 is identied with a square solder pad on the printed circuit board. See the diagram
below for an example of jumping pins 1 and 2. Refer to the motherboard layout page for
jumper locations.

Note: On two-pin jumpers, "Closed" means the jumper is on and "Open" means the
jumper is off the pins.

Connector

Pins

Jumper

Setting

3 2 1

3 2 1

CMOS Clear

JBT1 is used to clear CMOS, which will also clear any passwords. Instead of pins, this jumper

consists of contact pads to prevent accidentally clearing the contents of CMOS.

To Clear CMOS

1. First power down the system and unplug the power cord(s).

2. Remove the cover of the chassis to access the motherboard.

3. Remove the onboard battery from the motherboard.

4. Short the CMOS pads with a metal object such as a small screwdriver for at least four
seconds.

5. Remove the screwdriver (or shorting device).

6. Replace the cover, reconnect the power cord(s), and power on the system.

Note: Clearing CMOS will also clear all passwords.

Do not use the PW_ON connector to clear CMOS.

JBT1 contact pads

56

Chapter 2: Installation

FAN6

VGA Enable/Disable

JPG1 allows you to enable or disable the VGA port using the onboard graphics controller.
The default setting is Enabled.

VGA Enable/Disable

Jumper Settings

Jumper Setting Denition

Pins 1-2 Enabled

Pins 2-3 Disabled

10Gb LAN Enable/Disable

JPTG1 allows you to enable or disable the 10Gb LAN. The default setting is Enabled.

10Gb LAN Enable/Disable

Jumper Settings

Jumper Setting Denition

Pins 1-2 Enabled

Pins 2-3 Disabled

SAN MAC

SAS CODE

SXB1B

IPMI CODE

MAC CODE

I-SATA2

I-SATA3

S-SATA1

JSD2

JL1

S-SGPIO1

I-SGPIO2

I-SGPIO1

FAN7

USB10/11(3.0)

JSD1

JPWR3

JRK1

SXB1A

JUIDB1

SXB2

I-SATA0

SXB1C

USB6

S-SATA0

LE1

VGA

Intel

X557

JPME2

JPTG1

JWD1

BT1

+

I-SATA 4-7

I-SATA1

X11SPW-CTF/-TF

REV: 1.02
DESIGNED IN USA

DIMMF1

DIMME1

DIMMD1

FAN4

FAN5

2

Intel

C622

COM1

LSI3008

(-CTF only)

JNVI2C1

FAN2

L-SAS0-3

JOH1

SP1

DIMMB1

DIMMA1

JPSAS1

PRESS FIT

JP1

JSTBY1

DIMMC1

JIPMB1

USB4/5

JTPM1

JPS1

FAN1

JPG1

USB9(3.0)

JP3

JF1

LE2

JPI2C1

JPWR1

JPWR2

COM2

JP4

USB2/3

1

JP2

JD1

ON

LEDLED12LEDFAIL

NMIXPWRHDDNICNICUIDPSRSTPWR

USB7/8(3.0)

LAN1

MH10

MH11

M.2 PCI-E 3.0 X4

ASpeed

AST2500

LEDS1

LE3

BIOS LICENSE

IPMI_LAN

USB0/1

BAR CODE

FAN3

LAN2

LEDM1

JBT1

CPU

1. VGA Enable/Disable

2. 10G LAN Enable/Disable

57

X11SPW-CTF/-TF User's Manual

FAN6

FAN3

FAN2

Watch Dog

JWD1 controls the Watch Dog function. Watch Dog is a monitor that can reboot the system
when a software application hangs. Jumping pins 1-2 will cause Watch Dog to reset the
system if an application hangs. Jumping pins 2-3 will generate a non-maskable interrupt
signal for the application that hangs. Watch Dog must also be enabled in BIOS. The default
setting is Reset.

Note: When Watch Dog is enabled, the user needs to write a separate application
software to disable it.

Watch Dog

Jumper Settings

Jumper Setting Denition

Pins 1-2 Reset

Pins 2-3 NMI

Open Disabled

SAN MAC

SAS CODE

SXB1B

IPMI CODE

MAC CODE

I-SATA2

I-SATA3

S-SATA1

JSD2

JSD1

JL1

S-SGPIO1

I-SGPIO2

I-SGPIO1

FAN7

USB10/11(3.0)

JRK1

JPWR3

SXB1A

JUIDB1

SXB2

I-SATA0

SXB1C

USB6

S-SATA0

LE1

VGA

Intel
X557

JPME2

JPTG1

JWD1

BT1

+

I-SATA 4-7

I-SATA1

X11SPW-CTF/-TF

REV: 1.02
DESIGNED IN USA

DIMMF1

DIMME1

DIMMD1

FAN4

FAN5

Intel

C622

COM1

LSI3008

JNVI2C1

L-SAS0-3

JOH1

SP1

DIMMB1

DIMMA1

JPSAS1

PRESS FIT

JP1

JSTBY1

DIMMC1

JIPMB1

USB4/5

JTPM1

JPS1

JPWR1

JPWR2

FAN1

JPG1

COM2

USB9(3.0)

JP3

JF1

LE2

JPI2C1

JP4

USB2/3

JP2

JD1

ON

LEDLED12LEDFAIL

NMIXPWRHDDNICNICUIDPSRSTPWR

USB7/8(3.0)

LAN2

LEDM1

IPMI_LAN

LAN1

USB0/1

MH10

ASpeed

AST2500

MH11

BAR CODE

1

LEDS1

JBT1

M.2 PCI-E 3.0 X4

CPU

(-CTF only)

LE3

BIOS LICENSE

1. Watch Dog

58

Chapter 2: Installation

FAN6

SAS HDD Enable/Disable (X11SPW-CTF only)

JPSAS1 allows you to enable the SAS HDD. See the table below for jumper settings.

SAS HDD

Jumper Settings

Jumper Setting Denition

Pins 1-2 Enabled

Pins 2-3 Disabled

SAS 3.0 Enable/Disable (X11SPW-CTF only)

JPS1 allows you to enable the onboard SAS 3.0 ports. See the table below for jumper settings.

SAS Enable/Disable

Jumper Settings

Jumper Setting Denition

Pins 1-2 Enabled

Pins 2-3 Disabled

SAN MAC

SAS CODE

SXB1B

IPMI CODE

MAC CODE

I-SATA2

I-SATA3

S-SATA1

JSD2

JL1

S-SGPIO1

I-SGPIO2

I-SGPIO1

FAN7

USB10/11(3.0)

JSD1

JPWR3

JRK1

SXB1A

JUIDB1

SXB2

I-SATA0

SXB1C

USB6

S-SATA0

LE1

VGA

Intel

X557

JPME2

JPTG1

JWD1

BT1

+

I-SATA 4-7

I-SATA1

X11SPW-CTF/-TF

REV: 1.02
DESIGNED IN USA

DIMMF1

DIMME1

DIMMD1

FAN4

FAN5

Intel

C622

COM1

LSI3008

(-CTF only)

JPSAS1

L-SAS0-3

PRESS FIT

1 2

JNVI2C1

JP1

JOH1

JSTBY1

SP1

DIMMB1

DIMMC1

DIMMA1

FAN2

JIPMB1

USB4/5

JTPM1

JPS1

FAN1

JPG1

USB9(3.0)

JP3

JF1

LE2

JPI2C1

JPWR1

JPWR2

COM2

JP4

USB2/3

JP2

JD1

ON

LEDLED12LEDFAIL

NMIXPWRHDDNICNICUIDPSRSTPWR

USB7/8(3.0)

LAN1

MH10

MH11

M.2 PCI-E 3.0 X4

ASpeed

AST2500

LEDS1

LE3

BIOS LICENSE

IPMI_LAN

USB0/1

BAR CODE

FAN3

LAN2

LEDM1

JBT1

CPU

1. SAS HDD Enable

2. SAS 3.0 Enable

59

X11SPW-CTF/-TF User's Manual

FAN6

ME Manufacturing Mode

Close JPME2 to bypass SPI ash security and force the system to use the Manufacturing
Mode, which will allow you to ash the system rmware from a host server to modify system
settings. See the table below for jumper settings.

Manufacturing Mode

Jumper Settings

Jumper Setting Denition

Pins 1-2 Normal (Default)

Pins 2-3 Manufacturing Mode

SAN MAC

SAS CODE

SXB1B

IPMI CODE

MAC CODE

I-SATA2

I-SATA3

S-SATA1

JSD2

JSD1

JL1

S-SGPIO1

I-SGPIO2

I-SGPIO1

FAN7

USB10/11(3.0)

JRK1

JPWR3

SXB1A

JUIDB1

SXB2

I-SATA0

SXB1C

USB6

S-SATA0

LE1

VGA

Intel

X557

JPME2

JPTG1

JWD1

BT1

+

I-SATA 4-7

I-SATA1

X11SPW-CTF/-TF

REV: 1.02
DESIGNED IN USA

DIMMF1

DIMME1

DIMMD1

FAN4

FAN5

1

Intel

C622

COM1

LSI3008

(-CTF only)

JNVI2C1

FAN2

L-SAS0-3

JOH1

SP1

DIMMB1

DIMMA1

JPSAS1

PRESS FIT

JP1

JSTBY1

DIMMC1

JIPMB1

USB4/5

JTPM1

JPS1

JPWR1

JPWR2

FAN1

JPG1

COM2

USB9(3.0)

JP3

JF1

LE2

JPI2C1

JP4

USB2/3

JP2

JD1

ON

LEDLED12LEDFAIL

NMIXPWRHDDNICNICUIDPSRSTPWR

USB7/8(3.0)

LAN1

MH10

MH11

M.2 PCI-E 3.0 X4

ASpeed

AST2500

LEDS1

LE3

BIOS LICENSE

IPMI_LAN

USB0/1

BAR CODE

FAN3

LAN2

LEDM1

JBT1

CPU

1. Manufacturing Mode

60

Chapter 2: Installation

FAN6

2.9 LED Indicators

LAN LEDs

Two LAN ports (LAN 1 and LAN 2) are located on the I/O back panel of the motherboard.
Each Ethernet LAN port has two LEDs. The green LED indicates activity, while the other Link
LED may be green, amber, or off to indicate the speed of the connection. Refer to the tables
below for more information.

LAN1/2 Activity LED (Right)

LED State

Color Status Denition

Green Flashing Active

LED Color Denition

Green 10Gbps

LAN1/2 Link LED (Left)

LED State

Yellow/Amber 1Gbps

Dedicated IPMI LAN LEDs

In addition to LAN1 and LAN2, an IPMI LAN is also located on the I/O back panel. The
amber LED on the right of the IPMI LAN port indicates activity, while the green LED on the
left indicates the speed of the connection. See the table below for more information.

IPMI LAN LEDs

Color/State Denition

Green: Solid

Amber: Solid

100 Mb/s

1Gbps

1. LAN 1/2 LED

2. IPMI LAN LED

SAN MAC

SAS CODE

SXB1B

IPMI CODE

MAC CODE

I-SATA2

I-SATA3

USB10/11(3.0)

S-SATA1

JSD2

JSD1

SXB1A

JUIDB1

SXB2

I-SATA0

SXB1C

USB6

S-SATA0

IPMI LAN

LE1

VGA

Intel

X557

JPME2

JPTG1

JWD1

BT1

+

I-SATA 4-7

C622

I-SATA1

X11SPW-CTF/-TF

REV: 1.02
DESIGNED IN USA

Intel

Activity LEDLink LED

Link (left)

Activity (right) Amber: Blinking Active

1

LAN2

LAN1

LEDM1

JBT1

M.2 PCI-E 3.0 X4

CPU

MH10

MH11

USB7/8(3.0)

ASpeed

AST2500

LEDS1

2

COM1

JIPMB1

JPSAS1

JPG1

LSI3008

JNVI2C1

L-SAS0-3

PRESS FIT

JP1

JOH1

JSTBY1

USB4/5

JTPM1

JPS1

JPWR1

COM2

USB9(3.0)

USB2/3

JP3

JF1

LE2

JPI2C1

JP4

JP2

JD1

ON

LEDLED12LEDFAIL

NMIXPWRHDDNICNICUIDPSRSTPWR

IPMI_LAN

USB0/1

BAR CODE

(-CTF only)

LE3

JL1

S-SGPIO1

I-SGPIO2

I-SGPIO1

FAN7

JRK1

JPWR3

DIMMF1

DIMME1

DIMMD1

FAN4

FAN5

BIOS LICENSE

SP1

JPWR2

DIMMB1

DIMMC1

DIMMA1

FAN3

FAN1

FAN2

61

X11SPW-CTF/-TF User's Manual

FAN6

Onboard Power LED

LE2 is an Onboard Power LED. When this LED is lit, it means power is present on the
motherboard. In suspend mode, this LED will blink on and off. Be sure to turn off the system
and unplug the power cord(s) before removing or installing components.

Onboard Power LED Indicator

LED Color Denition

System Off

Off

(power cable not

connected)

Green System On

BMC Heartbeat LED

LEDM1 is the BMC heartbeat LED. When the LED is blinking green, BMC is functioning
normally. See the table below for the LED status.

SAN MAC

SAS CODE

SXB1B

IPMI CODE

MAC CODE

I-SATA2

I-SATA3

USB10/11(3.0)

S-SATA1

JSD2

JSD1

SXB1A

JUIDB1

SXB2

I-SATA0

SXB1C

USB6

S-SATA0

LE1

VGA

Intel

X557

JPME2

JPTG1

JWD1

BT1

+

I-SATA 4-7

I-SATA1

X11SPW-CTF/-TF

REV: 1.02
DESIGNED IN USA

Intel

C622

BMC Heartbeat LED Indicator

LED Color Denition

Green:

Blinking

IPMI_LAN

USB0/1

BAR CODE

LSI3008

(-CTF only)

COM1

L-SAS0-3

JNVI2C1

JOH1

JSTBY1

USB7/8(3.0)

LAN2

LAN1

MH10

2

ASpeed

AST2500

MH11

LEDM1

LEDS1

JBT1

M.2 PCI-E 3.0 X4

LE3

CPU

1

PRESS FIT

JP1

JIPMB1

JPSAS1

USB4/5

JTPM1

JPS1

JPG1

USB9(3.0)

LE2

JPWR1

JP3

JF1

JPI2C1

COM2

JP4

USB2/3

JP2

JD1

ON

LEDLED12LEDFAIL

NMIXPWRHDDNICNICUIDPSRSTPWR

BMC Normal

1. Onboard Power LED

2. BMC Heartbeat LED

JL1

S-SGPIO1

I-SGPIO2

I-SGPIO1

FAN7

JRK1

JPWR3

DIMMF1

DIMME1

DIMMD1

FAN4

FAN5

BIOS LICENSE

SP1

JPWR2

DIMMB1

DIMMC1

DIMMA1

FAN3

FAN1

FAN2

62

Chapter 2: Installation

FAN6

SAS Activity LED (X11SPW-CTF only)

A SAS Activity LED is located at LEDS1. When LEDS1 ashes, it indicates activity on a SAS

port.

SAS Activity

LED Indicator

LED Color Denition

Green:

Blinking

SAS Active

Red SAS Error

Unit ID LED

A rear UID LED indicator at LE1 is located near the UID switch on the I/O back panel. This

UID indicator provides easy identication of a system unit that may need service.

UID LED

LED Indicator

LED Color Denition

Blue: On Unit Identied

SAN MAC

SAS CODE

SXB1B

IPMI CODE

MAC CODE

I-SATA2

I-SATA3

S-SATA1

JSD2

JL1

S-SGPIO1

I-SGPIO2

I-SGPIO1

FAN7

USB10/11(3.0)

JSD1

JPWR3

JRK1

SXB1A

JUIDB1

SXB2

I-SATA0

SXB1C

USB6

S-SATA0

2

LE1

VGA

Intel

X557

JPME2

JPTG1

JWD1

BT1

+

I-SATA 4-7

I-SATA1

X11SPW-CTF/-TF

REV: 1.02
DESIGNED IN USA

DIMMF1

DIMME1

DIMMD1

FAN4

FAN5

Intel

C622

COM1

LSI3008

(-CTF only)

JNVI2C1

FAN2

L-SAS0-3

JOH1

SP1

DIMMB1

DIMMA1

JPSAS1

PRESS FIT

JP1

JSTBY1

DIMMC1

JIPMB1

USB4/5

JTPM1

JPS1

FAN1

JPG1

USB9(3.0)

JP3

JF1

LE2

JPI2C1

JPWR1

JPWR2

COM2

JP4

USB2/3

JP2

JD1

ON

LEDLED12LEDFAIL

NMIXPWRHDDNICNICUIDPSRSTPWR

USB7/8(3.0)

LAN1

MH10

MH11

1

M.2 PCI-E 3.0 X4

ASpeed

AST2500

LEDS1

LE3

BIOS LICENSE

IPMI_LAN

USB0/1

BAR CODE

FAN3

LAN2

LEDM1

JBT1

CPU

1. SAS Activity LED

2. UID LED

63

X11SPW-CTF/-TF User's Manual

FAN6

M.2 LED

The M.2 LED is located at LE3. When LE3 is blinking, M.2 functions normally. Refer to the
table below for more information

M.2 LED State

LED Color Denition

Green:

Blinking

Device is working

SAN MAC

SAS CODE

SXB1B

IPMI CODE

MAC CODE

I-SATA2

I-SATA3

S-SATA1

JSD2

JL1

S-SGPIO1

I-SGPIO2

I-SGPIO1

FAN7

USB10/11(3.0)

JSD1

JPWR3

JRK1

SXB1A

JUIDB1

SXB2

I-SATA0

SXB1C

USB6

S-SATA0

LE1

VGA

Intel

X557

JPME2

JPTG1

JWD1

BT1

+

I-SATA 4-7

I-SATA1

X11SPW-CTF/-TF

REV: 1.02
DESIGNED IN USA

DIMMF1

DIMME1

DIMMD1

FAN4

FAN5

Intel

C622

COM1

LSI3008

(-CTF only)

JNVI2C1

FAN2

L-SAS0-3

JOH1

SP1

DIMMB1

DIMMA1

JPSAS1

PRESS FIT

JP1

JSTBY1

DIMMC1

JIPMB1

USB4/5

JTPM1

JPS1

FAN1

JPG1

USB9(3.0)

JP3

JF1

LE2

JPI2C1

JPWR1

JPWR2

COM2

JP4

USB2/3

JP2

JD1

ON

LEDLED12LEDFAIL

NMIXPWRHDDNICNICUIDPSRSTPWR

USB7/8(3.0)

LAN1

MH10

MH11

M.2 PCI-E 3.0 X4

ASpeed

AST2500

LEDS1

LE3

BIOS LICENSE

IPMI_LAN

USB0/1

BAR CODE

FAN3

1

LAN2

LEDM1

JBT1

CPU

1. M.2 LED

64

Chapter 3: Troubleshooting

Chapter 3

Troubleshooting

3.1 Troubleshooting Procedures

Use the following procedures to troubleshoot your system. If you have followed all of the
procedures below and still need assistance, refer to the ‘Technical Support Procedures’ and/
or ‘Returning Merchandise for Service’ section(s) in this chapter. Always disconnect the AC
power cord before adding, changing or installing any non hot-swap hardware components.

Before Power On

1. Make sure that there are no short circuits between the motherboard and chassis.

2. Disconnect all ribbon/wire cables from the motherboard, including those for the keyboard
and mouse.

3. Remove all add-on cards.

4. Install the CPU (making sure it is fully seated) and connect the front panel connectors to
the motherboard.

No Power

1. Make sure that there are no short circuits between the motherboard and the chassis.

2. Make sure that the ATX power connectors are properly connected.

3. Check that the 115V/230V switch, if available, on the power supply is properly set.

4. Turn the power switch on and off to test the system, if applicable.

5. The battery on your motherboard may be old. Check to verify that it still supplies
~3VDC. If it does not, replace it with a new one.

65

X11SPW-CTF/-TF User's Manual

No Video

1. If the power is on, but you have no video, remove all add-on cards and cables.

2. Use the speaker to determine if any beep codes are present. Refer to Appendix A for
details on beep codes.

3. Remove all memory modules and turn on the system (if the alarm is on, check the
specs of memory modules, reset the memory or try a different one).

System Boot Failure

If the system does not display POST (Power-On-Self-Test) or does not respond after the
power is turned on, check the following:

1. Check for any error beep from the motherboard speaker.

• If there is no error beep, try to turn on the system without DIMM modules installed. If there

is still no error beep, replace the motherboard.

• If there are error beeps, clear the CMOS settings by unplugging the power cord and con-

tacting both pads on the CMOS clear jumper (JBT1). Refer to Section 2-8 in Chapter 2.

2. Remove all components from the motherboard, especially the DIMM modules. Make
sure that system power is on and that memory error beeps are activated.

3. Turn on the system with only one DIMM module installed. If the system boots, check for
bad DIMM modules or slots by following the Memory Errors Troubleshooting procedure

in this chapter.

Memory Errors

When a no-memory beep code is issued by the system, check the following:

1. Make sure that the memory modules are compatible with the system and that the
DIMMs are properly and fully installed. (For memory compatibility, refer to the memory
compatibility chart posted on our website at http://www.supermicro.com.)

2. Check if different speeds of DIMMs have been installed. It is strongly recommended that
you use the same RAM type and speed for all DIMMs in the system.

3. Make sure that you are using the correct type of ECC DDR4 modules recommended by
the manufacturer.

4. Check for bad DIMM modules or slots by swapping a single module among all memory
slots and check the results.

66

Chapter 3: Troubleshooting

5. Make sure that all memory modules are fully seated in their slots. Follow the instructions
given in Section 2-4 in Chapter 2.

6. Please follow the instructions given in the DIMM population tables listed in Section 2-4
to install your memory modules.

Losing the System's Setup Conguration

1. Make sure that you are using a high-quality power supply. A poor-quality power supply
may cause the system to lose the CMOS setup information. Refer to Chapter 2 for
details on recommended power supplies.

2. The battery on your motherboard may be old. Check to verify that it still supplies
~3VDC. If it does not, replace it with a new one.

3. If the above steps do not x the setup conguration problem, contact your vendor for
repairs.

When the System Becomes Unstable

A. If the system becomes unstable during or after OS installation, check the following:

1. CPU/BIOS support: Make sure that your CPU is supported and that you have the latest
BIOS installed in your system.

2. Memory support: Make sure that the memory modules are supported by testing the
modules using memtest86 or a similar utility.

Note: Refer to the product page on our website at http:\\www.supermicro.com for
memory and CPU support and updates.

3. HDD support: Make sure that all hard disk drives (HDDs) work properly. Replace the
bad HDDs with good ones.

4. System cooling: Check the system cooling to make sure that all heatsink fans and CPU/
system fans, etc., work properly. Check the hardware monitoring settings in the IPMI
to make sure that the CPU and system temperatures are within the normal range. Also
check the front panel Overheat LED and make sure that it is not on.

5. Adequate power supply: Make sure that the power supply provides adequate power to
the system. Make sure that all power connectors are connected. Please refer to our
website for more information on the minimum power requirements.

6. Proper software support: Make sure that the correct drivers are used.

67

X11SPW-CTF/-TF User's Manual

B. If the system becomes unstable before or during OS installation, check the following:

1. Source of installation: Make sure that the devices used for installation are working
properly, including boot devices such as CD/DVD.

2. Cable connection: Check to make sure that all cables are connected and working
properly.

3. Using the minimum conguration for troubleshooting: Remove all unnecessary

components (starting with add-on cards rst), and use the minimum conguration (but

with the CPU and a memory module installed) to identify the trouble areas. Refer to the
steps listed in Section A above for proper troubleshooting procedures.

4. Identifying bad components by isolating them: If necessary, remove a component in
question from the chassis, and test it in isolation to make sure that it works properly.
Replace a bad component with a good one.

5. Check and change one component at a time instead of changing several items at the
same time. This will help isolate and identify the problem.

6. To nd out if a component is good, swap this component with a new one to see if the
system will work properly. If so, then the old component is bad. You can also install the
component in question in another system. If the new system works, the component is
good and the old system has problems.

68

Chapter 3: Troubleshooting

3.2 Technical Support Procedures

Before contacting Technical Support, please take the following steps. Also, please note that as
a motherboard manufacturer, Supermicro also sells motherboards through its channels, so it

is best to rst check with your distributor or reseller for troubleshooting services. They should
know of any possible problems with the specic system conguration that was sold to you.

1. Please go through the Troubleshooting Procedures and Frequently Asked Questions
(FAQ) sections in this chapter or see the FAQs on our website (http://www.supermicro.

com/FAQ/index.php) before contacting Technical Support.

2. BIOS upgrades can be downloaded from our website (http://www.supermicro.com/

ResourceApps/BIOS_IPMI_Intel.html).

3. If you still cannot resolve the problem, include the following information when contacting
Supermicro for technical support:

• Motherboard model and PCB revision number

• BIOS release date/version (This can be seen on the initial display when your system rst

boots up.)

• System conguration

4. An example of a Technical Support form is on our website at http://www.supermicro.com/

RmaForm/.

• Distributors: For immediate assistance, please have your account number ready when

placing a call to our Technical Support department. We can be reached by email at sup­[e-mail].

69

X11SPW-CTF/-TF User's Manual

3.3 Frequently Asked Questions

Question: What type of memory does my motherboard support?

Answer: The motherboard supports DDR4 ECC RDIMM, LRDIMM, or 3DS LRDIMM modules.

To enhance memory performance, do not mix memory modules of different speeds and sizes.
Please follow all memory installation instructions given on Section 2-4 in Chapter 2.

Question: How do I update my BIOS?

Answer: It is recommended that you do not upgrade your BIOS if you are not experiencing

any problems with your system. Updated BIOS les are located on our website at http://

www.supermicro.com/ResourceApps/BIOS_IPMI_Intel.html. Please check our BIOS warning

message and the information on how to update your BIOS on our website. Select your

motherboard model and download the BIOS le to your computer. Also, check the current

BIOS revision to make sure that it is newer than your BIOS before downloading. Please

unzip the BIOS le onto a bootable USB device. Run the batch le using the format FLASH.
BAT lename.rom from your bootable USB device to ash the BIOS. Then, your system will

automatically reboot.

Warning: Do not shut down or reset the system while updating the BIOS to prevent possible
system boot failure!

Note: The SPI BIOS chip used on this motherboard cannot be removed. Send your
motherboard back to our RMA Department at Supermicro for repair. For BIOS Recovery
instructions, please refer to the AMI BIOS Recovery Instructions posted at http://www.

supermicro.com/support/manuals/.

70

Chapter 3: Troubleshooting

3.4 Battery Removal and Installation

Battery Removal

To remove the onboard battery, follow the steps below:

1. Power off your system and unplug your power cable.

2. Locate the onboard battery as shown below.

3. Using a tool such as a pen or a small screwdriver, push the battery lock outwards to
unlock it. Once unlocked, the battery will pop out from the holder.

4. Remove the battery.

Proper Battery Disposal

Warning: Please handle used batteries carefully. Do not damage the battery in any way; a

damaged battery may release hazardous materials into the environment. Do not discard a used

battery in the garbage or a public landll. Please comply with the regulations set up by your

local hazardous waste management agency to dispose of your used battery properly.

Battery Installation

1. To install an onboard battery, follow steps 1 and 2 above and continue below:

2. Identify the battery's polarity. The positive (+) side should be facing up.

3. Insert the battery into the battery holder and push it down until you hear a click to
ensure that the battery is securely locked.

Warning: When replacing a battery, be sure to only replace it with the same type.

OR

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3.5 Returning Merchandise for Service

A receipt or copy of your invoice marked with the date of purchase is required before any
warranty service will be rendered. You can obtain service by calling your vendor for a
Returned Merchandise Authorization (RMA) number. When returning the motherboard to
the manufacturer, the RMA number should be prominently displayed on the outside of the
shipping carton, and the shipping package is mailed prepaid or hand-carried. Shipping and
handling charges will be applied for all orders that must be mailed when service is complete.
For faster service, you can also request a RMA authorization online (http://www.supermicro.

com/RmaForm/).

This warranty only covers normal consumer use and does not cover damages incurred in
shipping or from failure due to the alternation, misuse, abuse or improper maintenance of
products.

During the warranty period, contact your distributor rst for any product problems.

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Chapter 4

BIOS

4.1 Introduction

This chapter describes the AMIBIOS™ Setup utility for the motherboard. The BIOS is stored

on a chip and can be easily upgraded using a ash program.

Note: Due to periodic changes to the BIOS, some settings may have been added
or deleted and might not yet be recorded in this manual. Please refer to the Manual

Download area of our website for any changes to BIOS that may not be reected in

this manual.

Starting the Setup Utility

To enter the BIOS Setup Utility, hit the <Delete> key while the system is booting-up. (In
most cases, the <Delete> key is used to invoke the BIOS setup screen. There are a few
cases when other keys are used, such as <F1>, <F2>, etc.) Each main BIOS menu option
is described in this manual.

The Main BIOS screen has two main frames. The left frame displays all the options that can

be congured. “Grayed-out” options cannot be congured. The right frame displays the key

legend. Above the key legend is an area reserved for a text message. When an option is
selected in the left frame, it is highlighted in white. Often a text message will accompany it.
(Note that BIOS has default text messages built in. We retain the option to include, omit, or
change any of these text messages.) Settings printed in Bold are the default values.

A " " indicates a submenu. Highlighting such an item and pressing the <Enter> key will
open the list of settings within that submenu.

The BIOS setup utility uses a key-based navigation system called hot keys. Most of these
hot keys (<F1>, <F2>, <F3>, <Enter>, <ESC>, <Arrow> keys, etc.) can be used at any time
during the setup navigation process.

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4.2 Main Setup

When you rst enter the AMI BIOS setup utility, you will enter the Main setup screen. You can

always return to the Main setup screen by selecting the Main tab on the top of the screen.
The Main BIOS setup screen is shown below and the following items will be displayed:

System Date/System Time

Use this option to change the system date and time. Highlight System Date or System Time
using the arrow keys. Enter new values using the keyboard. Press the <Tab> key or the arrow

keys to move between elds. The date must be entered in MM/DD/YYYY format. The time

is entered in HH:MM:SS format.

Note: The time is in the 24-hour format. For example, 5:30 P.M. appears as 17:30:00.
The date's default value is the BIOS build date after RTC reset.

Supermicro X11SPW-TF

BIOS Version

This item displays the version of the BIOS ROM used in the system.

Build Date

This item displays the date when the version of the BIOS ROM used in the system was built.

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CPLD Version

This item displays the Complex Programmable Logic Device version.

Memory Information

Total Memory

This item displays the total size of memory available in the system.

Chapter 4: BIOS

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4.3 Advanced Setup Congurations

Use the arrow keys to select Boot Setup and press <Enter> to access the submenu items.

Warning: Take caution when changing the Advanced settings. An incorrect value, a very high
DRAM frequency, or an incorrect DRAM timing setting may make the system unstable. When
this occurs, revert to default manufacturer settings.

Boot Feature

Quiet Boot

Use this feature to select the screen display between the POST messages and the OEM logo
upon bootup. Select Disabled to display the POST messages. Select Enabled to display the
OEM logo instead of the normal POST messages. The options are Disabled and Enabled.

Option ROM Messages

Use this feature to set the display mode for the Option ROM. Select Keep Current to display
the current AddOn ROM setting. Select Force BIOS to use the Option ROM display set by
the system BIOS. The options are Force BIOS and Keep Current.

Bootup NumLock State

Use this feature to set the Power-on state for the <Numlock> key. The options are On and Off.

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Wait For "" If Error

Use this feature to force the system to wait until the "F1" key is pressed if an error occurs.
The options are Disabled and Enabled.

INT19 (Interrupt 19) Trap Response

Interrupt 19 is the software interrupt that handles the disk function. When this item is set
to Immediate, the ROM BIOS of the host adaptors will "capture" Interrupt 19 at bootup
immediately and allow the drives that are attached to these host adaptors to function as
bootable disks. If this item is set to Postponed, the ROM BIOS of the host adaptors will not
capture Interrupt 19 immediately and allow the drives attached to these adaptors to function
as bootable devices at bootup. The options are Immediate and Postponed.

Re-try Boot

If this item is enabled, the BIOS will automatically reboot the system from a specied boot

device after its initial boot failure. The options are Disabled, Legacy Boot, and EFI Boot.

Install Windows 7 USB Support

Enable this feature to use the USB keyboard and mouse during the Windows 7 installation
since the native XHCI driver support is unavailable. Use a SATA optical drive as a USB drive,
and USB CD/DVD drives are not supported. Disable this feature after the XHCI driver has
been installed in Windows. The options are Disabled and Enabled.

Port 61h Bit-4 Emulation

Select Enabled to enable the emulation of Port 61h bit-4 toggling in SMM (System Management
Mode). The options are Disabled and Enabled.

Power Conguration

Watch Dog Function

If enabled, the Watch Dog Timer will allow the system to reset or generate NMI based on

jumper settings when it has expired for more than ve minutes. The options are Disabled

and Enabled.

Restore on AC Power Loss

Use this feature to set the power state after a power outage. Select Stay Off for
the system power to remain off after a power loss. Select Power On for the system
power to be turned on after a power loss. Select Last State to allow the system to
resume its last power state before a power loss. The options are Stay Off, Power On,
and Last State.

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Power Button Function

This feature controls how the system shuts down when the power button is pressed. Select 4
Seconds Override for the user to power off the system after pressing and holding the power
button for 4 seconds or longer. Select Instant Off to instantly power off the system as soon
as the user presses the power button. The options are Instant Off and 4 Seconds Override.

Throttle on Power Fail

Use this feature to decrease system power by throttling CPU frequency when one power
supply has failed. The options are Disabled and Enabled.

CPU Conguration

The following CPU information will display:

• Processor BSP Revision

• Processor Socket

• Processor ID

• Processor Frequency

• Processor Max Ratio

• Processor Min Ratio

• Microcode Revision

• L1 Cache RAM

• L2 Cache RAM

• L3 Cache RAM

• Processor 0 Version

Hyper-Threading (ALL) (Available when supported by the CPU)

Select Enable to support Intel Hyper-threading Technology to enhance CPU performance.
The options are Disable and Enable.

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Execute Disable Bit (Available if supported by the OS & the CPU)

Select Enable to enable the Execute-Disable Bit, which will allow the processor to designate
areas in the system memory where an application code can execute and where it cannot,

thus preventing a worm or a virus from ooding illegal codes to overwhelm the processor

or damage the system during an attack. The options are Disable and Enable. (Refer to the
Intel® and Microsoft® websites for more information.)

Intel Virtualization Technology

Use this feature to enable the Vanderpool Technology. This technology allows the system to
run several operating systems simultaneously. The options are Disable and Enable.

PPIN Control

Select Unlock/Enable to use the Protected-Processor Inventory Number (PPIN) in the system.
The options are Unlock/Disable and Unlock/Enable.

Hardware Prefetcher (Available when supported by the CPU)

If set to Enable, the hardware prefetcher will prefetch streams of data and instructions from
the main memory to the L2 cache to improve CPU performance. The options are Disable
and Enable.

Adjacent Cache Prefetch (Available when supported by the CPU)

The CPU prefetches the cache line for 64 bytes if this feature is set to Disable. The CPU
prefetches both cache lines for 128 bytes as comprised if this feature is set to Enable.

DCU Streamer Prefetcher (Available when supported by the CPU)

Select Enable to enable the DCU (Data Cache Unit) Streamer Prefetcher, which will stream
and prefetch data and send it to the Level 1 data cache to improve data processing and
system performance. The options are Disable and Enable.

DCU IP Prefetcher (Available when supported by the CPU)

Select Enable to enable DCU (Data Cache Unit) IP Prefetcher support, which will prefetch IP
addresses to improve network connectivity and system performance. The options are Enable
and Disable.

LLC Prefetch

If set to Enable, the hardware prefetcher will prefetch streams of data and instructions from
the main memory to the L3 cache to improve CPU performance. The options are Disable
and Enable.

Extended APIC

Select Enable to activate APIC (Advanced Programmable Interrupt Controller) support. The
options are Disable and Enable.

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AES-NI

Select Enable to use the Intel Advanced Encryption Standard (AES) New Instructions (NI) to
ensure data security. The options are Disable and Enable.

Advanced Power Management Conguration

CPU P State Control

This feature allows the user to congure the following CPU power settings:

Speedstep (Pstates)

Intel SpeedStep Technology allows the system to automatically adjust processor voltage

and core frequency to reduce power consumption and heat dissipation. The options are
Disable and Enable.

EIST PSD Funtion

This feature allows the user to choose between Hardware and Software to control the
processor's frequency and performance (P-state). In HW_ALL mode, the processor hard­ware is responsible for coordinating the P-state, and the OS is responsible for keeping the
P-state request up to date on all Logical Processors. In SW_ALL mode, the OS Power
Manager is responsible for coordinating the P-state, and must initiate the transition on
all Logical Processors. In SW_ANY mode, the OS Power Manager is responsible for
coordinating the P-state and may initiate the transition on any Logical Processors. The
options are HW_ALL, SW_ALL, and SW_ANY.

Turbo Mode

This feature will enable dynamic control of the processor, allowing it to run above stock
frequency. The options are Disable and Enable.

Hardware PM State Control

Hardware P-States

This setting allows the user to select between OS and hardware-controlled P-states.
Selecting Native Mode allows the OS to choose a P-state. Selecting Out of Band Mode
allows the hardware to autonomously choose a P-state without OS guidance. Selecting
Native Mode with No Legacy Support functions as Native Mode with no support for older
hardware. The options are Disable, Native Mode, Out of Band Mode, and Native Mode
with No Legacy Support.

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CPU C State Control

Autonomous Core C-State

Enabling this setting allows the hardware to autonomously choose to enter a C-state
based on power consumption and clock speed. The options are Disable and Enable.

CPU C6 Report

Select Enable to allow the BIOS to report the CPU C6 State (ACPI C3) to the operating
system. During the CPU C6 State, the power to all cache is turned off. The options are
Disable, Enable, and Auto.

Enhanced Halt State (C1E)

Select Enable to use Enhanced Halt State technology, which will signicantly reduce the

CPU's power consumption by reducing it's clock cycle and voltage during a Halt-state.
The options are Disable and Enable.

Package C State Control

Package C State

This feature allows the user to set the limit on the C State package register. The options
are C0/C1 State, C2 State, C6 (Non Retention) State, C6 (Retention) State, No Limit,
and Auto.

CPU T State Control

Software Controlled T-States

Use this feature to enable Software Controlled T-States. The options are Disable and
Enable.

Chipset Conguration

Warning: Setting the wrong values in the following features may cause the system to malfunc­tion.

North Bridge

This feature allows the user to congure the following North Bridge settings:

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UPI Conguration

The following UPI information will display:

• Number of CPU

• Number of IIO

• Current UPI Link Speed

• Current UPI Link Frequency

• UPI Global MMIO Low Base / Limit

• UPI Global MMIO High Base / Limit

• UPI Pci-e Conguration Base / Size

Degrade Precedence

Use this feature to set degrade precedence when system settings are in conict. Select

Topology Precedence to degrade Features. Select Feature Precedence to degrade Topol­ogy. The options are Topology Precedence and Feature Precedence.

Link L0p Enable

Select Enable for the QPI to enter the L0p state for power saving. The options are Dis­able, Enable, and Auto.

Link L1 Enable

Select Enable for the QPI to enter the L1 state for power saving. The options are Dis­able, Enable, and Auto.

IO Directory Cache (IODC)

IO Directory Cache is an 8-entry cache that stores the directory state of remote IIO writes
and memory lookups, and saves directory updates. Use this feature to lower cache to
cache (C2C) transfer latencies. The options are Disable, Auto, Enable for Remote InvItoM
Hybrid Push, InvItoM AllocFlow, Enable for Remote InvItoM Hybrid AllocNonAlloc, and
Enable for Remote InvItoM and Remote WViLF.

Isoc Mode

Isochronous (Isoc) mode allows time-sensitive processes to be given priority. The options
are Disable, Enable, and Auto.

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Memory Conguration

Enforce POR

Select POR (Plan of Record) to enforce POR restrictions on DDR4 frequency and volt­age programming. The options are POR and Disable.

Memory Frequency

Use this feature to set the maximum memory frequency for onboard memory modules.
The options are Auto, 1866, 2000, 2133, 2200, 2400, 2600, and 2666.

Data Scrambling for NVDIMM

Use this festure to enable or disable data scrambling for non-volatile DIMM (NVDIMM)
memory. The options are Auto, Disable, and Enable.

Data Scrambling for DDR4

Use this festure to enable or disable data scrambling for DDR4 memory. The options are

Auto, Disable, and Enable.

tCCD_L Relaxation

Select Enable to get TCDD settings from SPD (Serial Presence Detect) and implement
into memory RC code to improve system reliability. Select Disable for TCCD to follow
Intel POR. The options are Disable and Enable.

Enable ADR

Select Enable for ADR (Automatic Diagnostic Repository) support to enhance memory
performance. The options are Disable and Enable.

2X REFRESH

Use this feature to select the memory controller refresh rate to 2x refresh mode. The
options are Auto and Enable.

Memory Topology

This feature displays DIMM population information.

Memory RAS Conguration

Static Virtual Lockstep Mode

Select Enable to run the system's memory channels in lockstep mode to minimize
memory access latency. The options are Disable and Enable.

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Mirror Mode

This feature allows memory to be mirrored between two channels, providing 100%
redundancy. The options are Disable, Mirror Mode 1LM, and Mirror Mode 2LM.

UEFI ARM Mirror

Select Enable to support the UEFI-based address range mirroring with setup option.
The options are Disable and Enable.

Memory Rank Sparing

Select Enable to enable memory-sparing support for memory ranks to improve memory
performance. The options are Disable and Enable.

Correctable Error Threshold

Use this item to specify the threshold value for correctable memory-error logging, which
sets a limit on the maximum number of events that can be logged in the memory-error
log at a given time. The default setting is 10.

SDDC Plus One

Single device data correction +1 (SDDC Plus One) organizes data in a single bundle
(x4/x8 DRAM). If any or all the bits become corrupted, corrections occur. The x4 con­dition is corrected on all cases. The x8 condition is corrected only if the system is in
Lockstep Mode. The options are Disable and Enable.

ADDDC Sparing

Adaptive Double Device Data Correction (ADDDC) Sparing detects when the prede­termined threshold for correctable errors is reached, copying the contents of the failing
DIMM to spare memory. The failing DIMM or memory rank will then be disabled. The
options are Disable and Enable.

Patrol Scrub

Patrol Scrubbing is a process that allows the CPU to correct correctable memory
errors detected on a memory module and send the correction to the requestor (the
original source). When this item is set to Enable, the IO hub will read and write back
one cache line every 16K cycles, if there is no delay caused by internal processing.
By using this method, roughly 64 GB of memory behind the IO hub will be scrubbed
every day. The options are Disable and Enable.

Patrol Scrub Interval

This feature allows you to decide how many hours the system should wait before the
next complete patrol scrub is performed. Use the keyboard to enter a value from 0-24.
The default setting is 24.

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IIO Conguration

EV DFX Features

When this feature is set to Enable, the EV_DFX Lock Bits that are located on a proces­sor will always remain clear during electric tuning. The options are Disable and Enable.

CPU Conguration

IOU0 (II0 PCIe Br1)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by the

user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

IOU1 (II0 PCIe Br2)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by the

user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

IOU2 (II0 PCIe Br3)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by the

user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

MCP0 (II0 PCIe Br4)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by

the user. The options are x16 and Auto.

MCP1 (II0 PCIe Br5)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by

the user. The options are x16 and Auto.

IOAT Conguration

Disable TPH

Transparent Huge Pages (TPH) is a Linux memory management system that enables
communication in larger blocks (pages). Enabling this feature will increase perfor­mance. The options are No and Yes.

Prioritize TPH

Use this feature to enable Prioritize TPH support. The options are Enable and Disable.

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Relaxed Ordering

Select Enable to enable Relaxed Ordering support, which will allow certain transac­tions to violate the strict-ordering rules of PCI bus for a transaction to be completed
prior to other transactions that have already been enqueued. The options are Disable
and Enable.

Intel® VT for Directed I/O (VT-d)

Intel® VT for Directed I/O (VT-d)

Select Enable to use Intel Virtualization Technology for Direct I/O VT-d support by
reporting the I/O device assignments to the VMM (Virtual Machine Monitor) through
the DMAR ACPI tables. This feature offers fully-protected I/O resource sharing across
Intel platforms, providing greater reliability, security and availability in networking and
data-sharing. The options are Disable and Enable.

Interrupt Remapping

Use this feature to enable Interrupt Remapping support, which detects and controls
external interrupt requests. The options are Enable and Disable.

PassThrough DMA

Use this feature to allow devices such as network cards to access the system memory
without using a processor. Select Enable to use the Non-Isoch VT_D Engine Pass
Through Direct Memory Access (DMA) support. The options are Enable and Disable.

ATS

Use this feature to enable Non-Isoch VT-d Engine Address Translation Services (ATS)
support. ATS translates virtual addresses to physical addresses. The options are En-

able and Disable.

Posted Interrupt

Use this feature to enable VT_D Posted Interrupt. The options are Enable and Disable.

Coherency Support (Non-Isoch)

Use this feature to maintain setting coherency between processors or other devices.
Select Enable for the Non-Iscoh VT-d engine to pass through DMA to enhance system
performance. The options are Enable and Disable.

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Intel® VMD Technology

Intel® VMD for Volume Management Device on CPU

VMD Cong for PStack0~PStack2

Intel® VMD for Volume Management Device

Select Enable to use the Intel Volume Management Device Technology for this stack.
The options are Disable and Enable.

*If the item above is set to Enable, the following item will be dislayed:

Hot Plug Capable (Available when the device is detected by the system)

Use this feature to enable hot plug support for PCIe root ports 1A~1D/2A~2D/3A~3D.
The options are Disable and Enable.

PCI-E Completion Timeout Disable

Use this feature to enable PCI-E Completion Timeout support for electric tuning. The
options are Yes, No, and Per-Port.

South Bridge

This feature allows the user to congure the following South Bridge settings:

• USB Module Version

• USB Devices

Legacy USB Support

This feature enables support for USB 2.0 and older. The options are Enabled and Dis­abled, and Auto.

XHCI Hand-off

When disabled, the motherboard will not support USB 3.0. Options are Enabled and

Disabled.

Port 60/64 Emulation

This feature allows legacy I/O support for USB devices like mice and keyboards. The
options are Enabled and Disabled.

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Server ME Conguration

The following General ME Conguration will display:

• Oper. Firmware Version

• Backup Firmware Version

• Recovery Firmware Version

• ME Firmware Status #1

• ME Firmware Status #2

• Current State

• Error Code

PCH SATA Conguration

When this submenu is selected, the AMI BIOS automatically detects the presence of the SATA
devices that are supported by the Intel PCH chip and displays the following items:

SATA Controller

This item enables or disables the onboard SATA controller supported by the Intel PCH chip.
The options are Disable and Enable.

Congure SATA as

Select AHCI to congure a SATA drive specied by the user as an AHCI drive. Select RAID
to congure a SATA drive specied by the user as a RAID drive. The options are AHCI and

RAID.

SATA HDD Unlock

This feature allows the user to remove any password-protected SATA disk drives. The options
are Enable and Disable.

Aggressive Link Power Management

When this item is set to Enable, the SATA AHCI controller manages the power usage of the
SATA link. The controller will put the link in a low power mode during extended periods of I/O
inactivity, and will return the link to an active state when I/O activity resumes. The options
are Disable and Enable.

*If the item "Congure SATA as" above is set to RAID, the following items will display:

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Chapter 4: BIOS

SATA RSTe Boot Info

Select Enable to provide full int13h support for the devices attached to SATA controller The
options are Disable and Enable.

SATA RAID Option ROM/UEFI Driver

Select UEFI to load the EFI driver for system boot. Select Legacy to load a legacy driver for
system boot. The options are Disable, EFI, and Legacy.

SATA Port 0 ~ Port 7

This item displays the information detected on the installed SATA drive on the particular SATA
port.

• Model number of drive and capacity

• Software Preserve Support

Port 0 ~ Port 7 Hot Plug

Set this item to Enable for hot plug support, which will allow the user to replace a SATA
drive without shutting down the system. The options are Disable and Enable.

Port 0 ~ Port 7 Spin Up Device

On an edge detect from 0 to 1, set this item to allow the PCH to initialize the device. The
options are Disable and Enable.

Port 0 ~ Port 7 SATA Device Type

Use this item to specify if the SATA port specied by the user should be connected to a Solid

State drive or a Hard Disk Drive. The options are Hard Disk Drive and Solid State Drive.

PCH sSATA Conguration

When this submenu is selected, the AMI BIOS automatically detects the presence of the SATA
devices that are supported by the Intel PCH chip and displays the following items:

sSATA Controller

This item enables or disables the onboard sSATA controller supported by the Intel PCH chip.
The options are Enable and Disable.

Congure sSATA as

Select AHCI to congure an sSATA drive specied by the user as an AHCI drive. Select RAID
to congure an sSATA drive specied by the user as a RAID drive. The options are AHCI

and RAID.

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SATA HDD Unlock

This feature allows the user to remove any password-protected SATA disk drives. The options
are Disable and Enable.

Aggressive Link Power Management

When this item is set to Enable, the SATA AHCI controller manages the power usage of the
SATA link. The controller will put the link in a low power mode during extended periods of I/O
inactivity, and will return the link to an active state when I/O activity resumes. The options
are Disable and Enable.

*If the item above "Congure sSATA as" is set to RAID, the following items will display:

sSATA RSTe Boot Info

Select Enable to provide full int13h support for the devices attached to sSATA controller. The

options are Disable and Enable.

sSATA RAID Option ROM/UEFI Driver

Select UEFI to load the EFI driver for system boot. Select Legacy to load a legacy driver for
system boot. The options are Disable, EFI, and Legacy.

sSATA Port 0 ~ Port 5

This item displays the information detected on the installed sSATA drive on the particular
sSATA port.

• Model number of drive and capacity

• Software Preserve Support

Port 0 ~ Port 5 Hot Plug

Set this item to Enable for hot plug support, which will allow the user to replace a SATA
drive without shutting down the system. The options are Disable and Enable.

Port 0 ~ Port 5 Spin Up Device

On an edge detect from 0 to 1, set this item to allow the PCH to initialize the device. The
options are Disable and Enable.

Port 0 ~ Port 5 sSATA Device Type

Use this item to specify if the SATA port specied by the user should be connected to a Solid

State drive or a Hard Disk Drive. The options are Hard Disk Drive and Solid State Drive.

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PCIe/PCI/PnP Conguration

The following information will display:

• PCI Bus Driver Version

• PCI Devices Common Settings:

Above 4G Decoding (Available if the system supports 64-bit PCI decoding)

Select Enabled to decode a PCI device that supports 64-bit in the space above 4G Address.
The options are Disabled and Enabled.

SR-IOV Support

Use this feature to enable or disable Single Root IO Virtualization Support. The options are

Disabled and Enabled.

MMIO High Base

Use this item to select the base memory size according to memory-address mapping for the
IO hub. The options are 56 TB, 40 TB, 24 TB, 16 TB, 4 TB, and 1 TB.

MMIO High Granularity Size

Use this item to select the high memory size according to memory-address mapping for the
IO hub. The options are 1 GB, 4 GB, 16 GB, 64 GB. 256 GB, and 1024 GB.

PCI PERR/SERR Support

Select Enabled to allow a PCI device to generate a PERR/SERR number for a PCI Bus Signal
Error Event. The options are Disabled and Enabled.

Maximum Read Request

Use this item to select the Maximum Read Request size of the PCI-Express device, or select
Auto to allow the System BIOS to determine the value. The options are Auto, 128 Bytes, 256
Bytes, 512 Bytes, 1024 Bytes, 2048 Bytes, and 4096 Bytes.

MMCFG Base

Use this item to select the low base address for PCIE adapters to increase base memory.
The options are 1G, 1.5G, 1.75G, 2G, 2.25G. and 3G.

NVMe Firmware Source

Use this item to select the NVMe rmware to support booting. The options are Vendor

Dened Firmware and AMI Native Support. The default option, Vendor Dened Firmware,

is pre-installed on the drive and may resolve errata or enable innovative functions for the

drive. The other option, AMI Native Support, is offered by the BIOS with a generic method.

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VGA Priority

Use this feature to select VGA priority when multiple VGA devices are detected. Select On­board to give priority to your onboard video device. Select Offboard to give priority to your
graphics card. The options are Onboard and Offboard.

M.2 PCI-E 3.0 x4 OPROM

Use this feature to select which rmware type to be loaded for the add-on card in this slot.

The options are Disabled, Legacy, and EFI.

Onboard SAS Option ROM

Select Enabled to enable SAS Option ROM support to boot the computer using a SAS device

specied by the user. The options are Disabled, Legacy, and EFI.

Onboard LAN Device

Use this feature to enable or disable Onboard LAN devices. The options are Disabled and

Enabled.

Onboard LAN1 Option ROM

Use this feature to select which rmware function to be loaded for LAN Port1 used for system

boot. The options are Disabled, Legacy, and EFI.

Onboard LAN2 Option ROM

Use this feature to select which rmware function to be loaded for LAN Port2 used for system

boot. The options are Disabled, Legacy, and EFI.

Onboard Video Option ROM

Use this item to select the Onboard Video Option ROM type. The options are Disabled,
Legacy, and EFI.

Network Stack Conguration

Network Stack

Select Enabled to enable PXE (Preboot Execution Environment) or UEFI (Unied Extensible

Firmware Interface) for network stack support. The options are Enabled and Disabled.

IPv4 PXE Support

Select Enabled to enable IPv4 PXE boot support. The options are Disabled and Enabled.

IPv4 HTTP Support

Select Enabled to enable IPv4 HTTP boot support. The options are Disabled and Enabled.

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IPv6 PXE Support

Select Enabled to enable IPv6 PXE boot support. The options are Disabled and Enabled.

IPv6 HTTP Support

Select Enabled to enable IPv6 HTTP boot support. The options are Disabled and Enabled.

PXE Boot Wait Time

Use this option to specify the wait time to press the ESC key to abort the PXE boot. Press
"+" or "-" on your keyboard to change the value. The default setting is 0.

Media Detect Count

Use this option to specify the number of times media will be checked. Press "+" or "-" on
your keyboard to change the value. The default setting is 1.

Super IO Conguration

The following Super IO information will display:

• Super IO Chip AST2500

Serial Port 1 Conguration

This submenu allows the user to congure the settings of Serial Port 1.

Serial Port 1

Select Enabled to enable the selected onboard serial port. The options are Disabled and

Enabled.

Device Settings

This item displays the status of a serial part specied by the user.

Serial Port 1 Change Settings

This feature species the base I/O port address and the Interrupt Request address of a
serial port specied by the user. Select Auto to allow the BIOS to automatically assign the

base I/O and IRQ address.

The options for Serial Port 1 are Auto, (IO=3F8h; IRQ=4;), (IO=3F8h; IRQ=3, 4, 5, 6, 7,
9, 10, 11, 12;), (IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12;), (IO=3E8h; IRQ=3, 4, 5, 6, 7,
9, 10, 11, 12;), and (IO=2E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12;).

Serial Port 2 Conguration

This submenu allows the user the congure settings of Serial Port 2.

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Serial Port 2

Select Enabled to enable the selected onboard serial port. The options are Disabled and

Enabled.

Device Settings

This item displays the status of a serial part specied by the user.

Serial Port 2 Change Settings

This feature species the base I/O port address and the Interrupt Request address of a
serial port specied by the user. Select Auto to allow the BIOS to automatically assign the

base I/O and IRQ address.

The options for Serial Port 2 are Auto, (IO=2F8h; IRQ=3;), (IO=3F8h; IRQ=3, 4, 5, 6, 7,
9, 10, 11, 12;), (IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12;), (IO=3E8h; IRQ=3, 4, 5, 6, 7,
9, 10, 11, 12;), and (IO=2E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12;).

Serial Port 2 Attribute (Available for Serial Port 2 only)

Select SOL to use COM Port 2 as a Serial Over LAN (SOL) port for console redirection.
The options are SOL and COM.

Serial Port Console Redirection

COM1 Console Redirection

Select Enabled to enable console redirection support for a serial port specied by the user.

The options are Enabled and Disabled.

*If the item above is set to Enabled, the following items will become available for the

user's conguration:

COM1 Console Redirection Settings

This feature allows the user to specify how the host computer will exchange data with the
client computer, which is the remote computer used by the user.

COM1 Terminal Type

This feature allows the user to select the target terminal emulation type for Console
Redirection. Select VT100 to use the ASCII Character set. Select VT100+ to add color
and function key support. Select ANSI to use the Extended ASCII Character Set. Select
VT-UTF8 to use UTF8 encoding to map Unicode characters into one or more bytes. The
options are VT100, VT100+, VT-UTF8, and ANSI.

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COM1 Bits Per Second

Use this feature to set the transmission speed for a serial port used in Console Redirection.
Make sure that the same speed is used in the host computer and the client computer. A
lower transmission speed may be required for long and busy lines. The options are 9600,
19200, 38400, 57600 and 115200 (bits per second).

COM1 Data Bits

Use this feature to set the data transmission size for Console Redirection. The options are
7 Bits and 8 Bits.

COM1 Parity

A parity bit can be sent along with regular data bits to detect data transmission errors. Select
Even if the parity bit is set to 0, and the number of 1's in data bits is even. Select Odd if
the parity bit is set to 0, and the number of 1's in data bits is odd. Select None if you do
not want to send a parity bit with your data bits in transmission. Select Mark to add a mark
as a parity bit to be sent along with the data bits. Select Space to add a Space as a parity
bit to be sent with your data bits. The options are None, Even, Odd, Mark, and Space.

COM1 Stop Bits

A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard serial
data communication. Select 2 Stop Bits if slower devices are used. The options are 1 and 2.

COM1 Flow Control

Use this feature to set the ow control for Console Redirection to prevent data loss caused
by buffer overow. Send a "Stop" signal to stop sending data when the receiving buffer

is full. Send a "Start" signal to start sending data when the receiving buffer is empty. The
options are None and Hardware RTS/CTS.

COM1 VT-UTF8 Combo Key Support

Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100 terminals.
The options are Disabled and Enabled.

COM1 Recorder Mode

Select Enabled to capture the data displayed on a terminal and send it as text messages
to a remote server. The options are Disabled and Enabled.

COM1 Resolution 100x31

Select Enabled for extended-terminal resolution support. The options are Disabled and
Enabled.

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COM1 Legacy OS Redirection Resolution

Use this feature to select the number of rows and columns used in Console Redirection
for legacy OS support. The options are 80x24 and 80x25.

COM1 Putty KeyPad

This feature selects the settings for Function Keys and KeyPad used for Putty, which
is a terminal emulator designed for the Windows OS. The options are VT100, LINUX,
XTERMR6, SC0, ESCN, and VT400.

COM1 Redirection After BIOS POST

Use this feature to enable or disable legacy console redirection after BIOS POST. When
set to Bootloader, legacy console redirection is disabled before booting the OS. When set
to Always Enable, legacy console redirection remains enabled when booting the OS. The
options are Always Enable and Bootloader.

SOL/COM2 Console Redirection

Select Enabled to enable console redirection support for a serial port specied by the user.

The options are Enabled and Disabled.

*If the item above is set to Enabled, the following items will become available for user's

conguration:

SOL/COM2 Console Redirection Settings

Use this feature to specify how the host computer will exchange data with the client
computer, which is the remote computer used by the user.

COM2 Terminal Type

Use this feature to select the target terminal emulation type for Console Redirection.
Select VT100 to use the ASCII Character set. Select VT100+ to add color and function key
support. Select ANSI to use the Extended ASCII Character Set. Select VT-UTF8 to use
UTF8 encoding to map Unicode characters into one or more bytes. The options are ANSI,
VT100, VT100+, and VT-UTF8.

COM2 Bits Per Second

Use this feature to set the transmission speed for a serial port used in Console Redirection.
Make sure that the same speed is used in the host computer and the client computer. A
lower transmission speed may be required for long and busy lines. The options are 9600,
19200, 38400, 57600 and 115200 (bits per second).

COM2 Data Bits

Use this feature to set the data transmission size for Console Redirection. The options are
7 Bits and 8 Bits.

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COM2 Parity

A parity bit can be sent along with regular data bits to detect data transmission errors.
Select Even if the parity bit is set to 0, and the number of 1's in data bits is even. Select
Odd if the parity bit is set to 0, and the number of 1's in data bits is odd. Select None if you
do not want to send a parity bit with your data bits in transmission. Select Mark to add a
mark as a parity bit to be sent along with the data bits. Select Space to add a Space as a
parity bit to be sent with your data bits. The options are None, Even, Odd, Mark and Space.

COM2 Stop Bits

A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard serial
data communication. Select 2 Stop Bits if slower devices are used. The options are 1 and 2.

COM2 Flow Control

Use this feature to set the ow control for Console Redirection to prevent data loss caused
by buffer overow. Send a "Stop" signal to stop sending data when the receiving buffer

is full. Send a "Start" signal to start sending data when the receiving buffer is empty. The
options are None and Hardware RTS/CTS.

COM2 VT-UTF8 Combo Key Support

Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100 terminals.
The options are Disabled and Enabled.

COM2 Recorder Mode

Select Enabled to capture the data displayed on a terminal and send it as text messages
to a remote server. The options are Disabled and Enabled.

COM2 Resolution 100x31

Select Enabled for extended-terminal resolution support. The options are Disabled and

Enabled.

COM2 Legacy OS Redirection Resolution

Use this feature to select the number of rows and columns used in Console Redirection
for legacy OS support. The options are 80x24 and 80x25.

COM2 Putty KeyPad

This feature selects Function Keys and KeyPad settings for Putty, which is a terminal
emulator designed for the Windows OS. The options are VT100, LINUX, XTERMR6, SCO,
ESCN, and VT400.

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COM2 Redirection After BIOS POST

Use this feature to enable or disable legacy Console Redirection after BIOS POST. When
set to Bootloader, legacy Console Redirection is disabled before booting the OS. When
set to Always Enable, legacy Console Redirection remains enabled when booting the OS.
The options are Always Enable and Bootloader.

Legacy Console Redirection

Legacy Serial Redirection Port

Use this feature to select a COM port to display redirection of Legacy OS and Legacy OPROM
messages. The options are COM1 and SOL/COM2.

EMS (Emergency Management Services) Console Redirection

Select Enabled to use a COM port selected by the user for EMS Console Redirection. The
options are Enabled and Disabled.

*If the item above is set to Enabled, the following items will become available for user's

conguration:

EMS Console Redirection Settings

This feature allows the user to specify how the host computer will exchange data with the
client computer, which is the remote computer used by the user.

Out-of-Band Mgmt Port

The feature selects a serial port in a client server to be used by the Microsoft Windows
Emergency Management Services (EMS) to communicate with a remote host server. The
options are COM1 and SOL/COM2.

Terminal Type

Use this feature to select the target terminal emulation type for Console Redirection.
Select VT100 to use the ASCII character set. Select VT100+ to add color and function
key support. Select ANSI to use the extended ASCII character set. Select VT-UTF8 to use
UTF8 encoding to map Unicode characters into one or more bytes. The options are VT100,
VT100+, VT-UTF8, and ANSI.

Bits Per Second

This item sets the transmission speed for a serial port used in Console Redirection. Make
sure that the same speed is used in the host computer and the client computer. A lower
transmission speed may be required for long and busy lines. The options are 9600, 19200,
57600, and 115200 (bits per second).

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Flow Control

Use this item to set the ow control for Console Redirection to prevent data loss caused
by buffer overow. Send a "Stop" signal to stop sending data when the receiving buffer

is full. Send a "Start" signal to start sending data when the receiving buffer is empty. The
options are None, Hardware RTS/CTS, and Software Xon/Xoff.

Data Bits, Parity, Stop Bits

ACPI Settings

WHEA Support

Select Enabled to support the Windows Hardware Error Architecture (WHEA) platform and
provide a common infrastructure for the system to handle hardware errors within the Windows
OS environment to reduce system crashes and to enhance system recovery and health
monitoring. The options are Disabled and Enabled.

High Precision Event Timer

Select Enabled to activate the High Precision Event Timer (HPET) that produces periodic
interrupts at a much higher frequency than a Real-time Clock (RTC) does in synchronizing
multimedia streams, providing smooth playback and reducing the dependency on other
timestamp calculation devices, such as an x86 RDTSC Instruction embedded in the CPU.
The High Performance Event Timer is used to replace the 8254 Programmable Interval Timer.
The options are Disabled and Enabled.

Trusted Computing

Security Device Support

If this feature and the TPM jumper on the motherboard are both set to Enabled, onboard

security devices will be enabled for TPM (Trusted Platform Module) support to enhance data
integrity and network security. Please reboot the system for a change on this setting to take
effect. The options are Disable and Enable.

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iSCSI Conguration

iSCSI Initiator Name

This feature allows the user to enter the unique name of the iSCSI Initiator in IQN format.

Once the name of the iSCSI Initiator is entered into the system, congure the proper settings

for the following items.

Add an Attempt

Delete Attempts

Change Attempt Order

Intel(R) Virtual RAID on CPU

Intel(R) VROC with VMD Technology 5.1.0.1007

RAID volumes and Intel VMD Controllers information will be displayed if they are detected
by the system.

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