S4242/S42WD42/S4261/S42WD61
Dual Voltage Supervisory Circuit
With Watchdog Timer(S42WD61) (S42WD42)
FEATURES
•Precision Dual Voltage Monitor
–VCC Supply Monitor
-Dual reset outputs for complex microcontroller systems
-Integrated memory write lockout function
-No external components required
•Second Voltage Monitor Output
–Separate VLOW output
–Generates interrupt to MCU
–Generates RESET for dual supply systems
-Guaranteed output assertion to VCC - 1V
•Watchdog Timer (S42WD42, S42WD61)
–1.6s
•High Reliability
–Endurance: 100,000 erase/write cycles
–Data retention: 100 years
OVERVIEW
The S42xxx are a precision power supervisory circuit. It automatically monitors the device’s VCC level and will generate a reset output on two complementary open drain outputs. In addition to the VCC monitoring, the S42xxx also provides a second voltage comparator input. This input has an independent open drain output that can be wireOR’ed with the RESET I/O or it can be used as a system interrupt.
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Memory Internally Organized 2 x8 |
The S42xxx also has an integrated 4k/16k-bit nonvolatile |
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Extended Programmable Functions |
memory. The memory conforms to the industry standard |
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two-wire serial interface. In addition to the reset circuitry, |
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Available on SMS24 |
the S42WD42/S42WD61 also has a watchdog timer. |
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BLOCK DIAGRAM |
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VCC |
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8 |
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SCL |
6 |
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NONVOLATILE |
SDA |
5 |
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MEMORY |
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ARRAY |
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WRITE |
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CONTROL |
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PROGRAMMABLE |
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RESET PULSE |
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GENERATOR |
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VTRIP |
RESET |
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– |
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CONTROL |
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PROGRAMMABLE |
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WATCHDOG |
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TIMER |
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UV |
VSENSE 3 |
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– |
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OV |
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1.26V |
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4 |
2 RESET#
7 RESET
(S42WD42,
S42WD61)
1 VLOW#
GND |
2025 T BD 2.0 |
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SUMMIT MICROELECTRONICS, Inc. • 300 Orchard City Drive, Suite 131 |
• Campbell, CA 95008 • Telephone 408-378- 6461 • Fax 408-378-6586 • www.summitmicro.com |
© SUMMIT MICROELECTRONICS, Inc. 2000 |
Characteristics subject to change without notice |
2025 6.0 4/17/00 |
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S4242/S42WD42/S4261/S42WD61 |
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ABSOLUTE MAXIMUM RATINGS |
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Temperature Under Bias ............................................................................................................................... |
-40°C to +85°C |
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Storage Temperature ..................................................................................................................................... |
-65°C to +125°C |
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Soldering Temperature (less than 10 seconds) ................................................................................................................... |
300°C |
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Supply Voltage ............................................................................................................................................................. |
0 to 6.5V |
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Voltage on Any Pin ....................................................................................................................................... |
-0.3V to VCC+0.3V |
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ESD Voltage (JEDEC method) .......................................................................................................................................... |
2,000V |
NOTE: These are STRESS ratings only. Appropriate conditions for operating these devices are given elsewhere in this specification. Stresses beyond those listed here may permanently damage the part. Prolonged exposure to maximum ratings may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
Temperature |
Min |
Max |
Commercial |
0°C |
+70°C |
Industrial |
-40°C |
+85°C |
2025 PGM T1.0
DC ELECTRICAL CHARACTERISTICS (over recommended operating conditions unless otherwise specified)
Symbol |
Parameter |
Conditions |
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Min |
Max |
Units |
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SCL = CMOS Levels @ 100KHz |
VCC =5.5V |
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3 |
mA |
ICC |
Supply Current (CMOS) |
SDA = Open |
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All other inputs = GND or VCC |
VCC =3.3V |
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2 |
mA |
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ISB |
Standby Current (CMOS) |
SCL = SDA = VCC |
VCC =5.5V |
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50 |
µA |
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All other inputs = GND |
VCC =3.3V |
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25 |
µA |
ILI |
Input Leakage |
VIN = 0 To VCC |
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10 |
µA |
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ILO |
Output Leakage |
VOUT = 0 To VCC |
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10 |
µA |
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VIL |
Input Low Voltage |
SCL, SDA, RESET# (pin 2) |
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0.3xVCC |
V |
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VIH |
Input High Voltage |
SCL, SDA, RESET (pin7) |
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0.7xVCC |
V |
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VOL |
Output Low Voltage |
IOL = 3mA SDA |
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0.4 |
V |
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2025 PGM T2.0
AC ELECTRICAL CHARACTERISTICS |
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(over recommended operating conditions unless otherwise specified) |
2.7V to 4.5V |
4.5V to 5.5V |
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Symbol |
Parameter |
Conditions |
Min |
Max |
Min |
Max |
Units |
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fSCL |
SCL Clock Frequency |
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0 |
100 |
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400 |
KHz |
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tLOW |
Clock Low Period |
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4.7 |
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1.3 |
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µs |
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tHIGH |
Clock High Period |
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4.0 |
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0.6 |
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µs |
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tBUF |
Bus Free Time |
Before New Transmission |
4.7 |
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1.3 |
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µs |
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tSU:STA |
Start Condition Setup Time |
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4.7 |
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0.6 |
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µs |
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tHD:STA |
Start Condition Hold Time |
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4.0 |
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0.6 |
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µs |
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tSU:STO |
Stop Condition Setup Time |
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4.7 |
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0.6 |
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µs |
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tAA |
Clock to Output |
SCL Low to SDA Data Out Valid |
0.3 |
3.5 |
0.2 |
0.9 |
µs |
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tDH |
Data Out Hold Time |
SCL Low to SDA Data Out Change |
0.3 |
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0.2 |
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µs |
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tR |
SCL and SDA Rise Time |
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1000 |
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300 |
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tF |
SCL and SDA Fall Time |
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300 |
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300 |
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tSU:DAT |
Data In Setup Time |
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250 |
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100 |
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tHD:DAT |
Data In Hold Time |
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0 |
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TI |
Noise Spike Width |
Noise Suppression Time Constant |
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100 |
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100 |
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@ SCL, SDA Inputs |
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tWR |
Write Cycle Time |
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10 |
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10 |
ms |
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2025 PGM T3.0 |
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2025 6.0 4/17/00 |
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S4242/S42WD42/S4261/S42WD61
CAPACITANCE
TA = 25°C, f = 100KHz
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Parameter |
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Max |
Units |
CIN |
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Input Capacitance |
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5 |
pF |
COUT |
Output Capacitance |
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8 |
pF |
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2025 PGM T4.0 |
tR |
tF |
tHIGH |
tLOW |
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SCL |
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tSU:SDA |
tHD:SDA |
tHD:DAT |
tSU:DAT |
tSU:STO |
tBUF |
SDA In |
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tAA |
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tDH |
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SDA Out |
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2025 Fig01 1.0 |
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FIGURE 1. BUS TIMING |
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START |
STOP |
Condition |
Condition |
SCL
SDA In
2025 Fig02 1.0
FIGURE 2. START AND STOP CONDITIONS
2025 6.0 4/17/00
3
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S4242/S42WD42/S4261/S42WD61 |
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tGLITCH |
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VTRIP |
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VCC |
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VRVALID |
tRPD |
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tPURST |
tPURST |
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RESET# |
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tRPD |
RESET |
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FIGURE 3. RESET OUTPUT TIMING |
2025 T fig03 2.0 |
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RESET CIRCUIT AC and DC ELECTRICAL CHARACTERISTICS
TA=-40°C to +85°C
Symbol |
Parameter |
Part no. |
Min. |
Typ. |
Max. |
Unit |
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Suffix |
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VTRIP |
Reset Trip Point |
A (or) Blank |
4.250 |
4.375 |
4.5 |
V |
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B |
4.50 |
4.625 |
4.75 |
V |
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2.7 |
2.7 |
2.9 |
3.10 |
V |
tPURST |
Reset Timeout |
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200 |
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ms |
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tRPD |
VTRIP to RESET Output Delay |
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5 |
µs |
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VRVALID |
RESET Output Valid to VCC min. Guarantee |
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1 |
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V |
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tGLITCH |
Glitch Reject Pulse Width note 1 |
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30 |
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VOLRS |
RESET Output Low Voltage IOL = 1mA |
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0.4 |
V |
VOHRS |
RESET High Voltage Output IOH = 800µA |
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VCC-.75 |
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V |
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VULH |
VSENSE Under-voltage threshold low to high |
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1.20 |
1.25 |
1.30 |
V |
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VUHL |
VSENSE Under-voltage threshold high to low |
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1.20 |
1.25 |
1.30 |
V |
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VOLH |
VSENSE Over-voltage threshold low to high |
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1.20 |
1.25 |
1.30 |
V |
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VOHL |
VSENSE Over-voltage threshold high to low |
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1.20 |
1.25 |
1.30 |
V |
tVD1 |
Delay to VLOW Active |
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5 |
µs |
tVD2 |
Delay to VLOW Released |
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5 |
µs |
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tWDTO |
Watchdog timeout Period (S42WD61) |
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1600 |
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(S42WD42) |
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2025 PGM T5.2 |
2025 6.0 4/17/00
4
S4242/S42WD42/S4261/S42WD61
VULH |
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VUHL |
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(Under-voltage detect) |
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VSENSE |
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tVD1 |
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tVD2 |
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VLOW#
2025 T fig04 2.0
FIGURE 4. VSENSE UNDER-VOLTAGE FUNCTION
RESET# (in) |
RESET# (out) |
tPURST |
tPURST |
RESET (out) |
2025 T fig05 2.0 |
FIGURE 5. RESET AS AN INPUT |
2025 6.0 4/17/00
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